[linux-2.6-block.git] / drivers / cpuidle / cpuidle-exynos.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * Coupled cpuidle support based on the work of:
 *	Colin Cross <ccross@android.com>
 *	Daniel Lezcano <daniel.lezcano@linaro.org>
*/

#include <linux/cpuidle.h>
#include <linux/cpu_pm.h>
#include <linux/export.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/platform_data/cpuidle-exynos.h>

#include <asm/suspend.h>
#include <asm/cpuidle.h>

static atomic_t exynos_idle_barrier;

static struct cpuidle_exynos_data *exynos_cpuidle_pdata;
static void (*exynos_enter_aftr)(void);

static int exynos_enter_coupled_lowpower(struct cpuidle_device *dev,
					 struct cpuidle_driver *drv,
					 int index)
{
	int ret;

	exynos_cpuidle_pdata->pre_enter_aftr();

	/*
	 * Waiting all cpus to reach this point at the same moment
	 */
	cpuidle_coupled_parallel_barrier(dev, &exynos_idle_barrier);

	/*
	 * Both cpus will reach this point at the same time
	 */
	ret = dev->cpu ? exynos_cpuidle_pdata->cpu1_powerdown()
		       : exynos_cpuidle_pdata->cpu0_enter_aftr();
	if (ret)
		index = ret;

	/*
	 * Waiting all cpus to finish the power sequence before going further
	 */
	cpuidle_coupled_parallel_barrier(dev, &exynos_idle_barrier);

	exynos_cpuidle_pdata->post_enter_aftr();

	return index;
}

static int exynos_enter_lowpower(struct cpuidle_device *dev,
				struct cpuidle_driver *drv,
				int index)
{
	int new_index = index;

	/* AFTR can only be entered when cores other than CPU0 are offline */
	if (num_online_cpus() > 1 || dev->cpu != 0)
		new_index = drv->safe_state_index;

	if (new_index == 0)
		return arm_cpuidle_simple_enter(dev, drv, new_index);

	exynos_enter_aftr();

	return new_index;
}

static struct cpuidle_driver exynos_idle_driver = {
	.name			= "exynos_idle",
	.owner			= THIS_MODULE,
	.states = {
		[0] = ARM_CPUIDLE_WFI_STATE,
		[1] = {
			.enter			= exynos_enter_lowpower,
			.exit_latency		= 300,
			.target_residency	= 10000,
			.name			= "C1",
			.desc			= "ARM power down",
		},
	},
	.state_count = 2,
	.safe_state_index = 0,
};

static struct cpuidle_driver exynos_coupled_idle_driver = {
	.name			= "exynos_coupled_idle",
	.owner			= THIS_MODULE,
	.states = {
		[0] = ARM_CPUIDLE_WFI_STATE,
		[1] = {
			.enter			= exynos_enter_coupled_lowpower,
			.exit_latency		= 5000,
			.target_residency	= 10000,
			.flags			= CPUIDLE_FLAG_COUPLED |
						  CPUIDLE_FLAG_TIMER_STOP,
			.name			= "C1",
			.desc			= "ARM power down",
		},
	},
	.state_count = 2,
	.safe_state_index = 0,
};

static int exynos_cpuidle_probe(struct platform_device *pdev)
{
	int ret;

	if (IS_ENABLED(CONFIG_SMP) &&
	    (of_machine_is_compatible("samsung,exynos4210") ||
	     of_machine_is_compatible("samsung,exynos3250"))) {
		exynos_cpuidle_pdata = pdev->dev.platform_data;

		ret = cpuidle_register(&exynos_coupled_idle_driver,
				       cpu_possible_mask);
	} else {
		exynos_enter_aftr = (void *)(pdev->dev.platform_data);

		ret = cpuidle_register(&exynos_idle_driver, NULL);
	}

	if (ret) {
		dev_err(&pdev->dev, "failed to register cpuidle driver\n");
		return ret;
	}

	return 0;
}

static struct platform_driver exynos_cpuidle_driver = {
	.probe	= exynos_cpuidle_probe,
	.driver = {
		.name = "exynos_cpuidle",
	},
};
builtin_platform_driver(exynos_cpuidle_driver);
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
712eddf7 BZ	2	/*
712eddf7 BZ	3	* Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
3d739985 JL	4	* http://www.samsung.com
3d739985 JL	5	*
712eddf7 BZ	6	* Coupled cpuidle support based on the work of:
	7	* Colin Cross <ccross@android.com>
	8	* Daniel Lezcano <daniel.lezcano@linaro.org>
3d739985 JL	9	*/
3d739985 JL	10
3d739985	11	#include <linux/cpuidle.h>
67173ca4	12	#include <linux/cpu_pm.h>
76ee4557	13	#include <linux/export.h>
84599238	14	#include <linux/init.h>
35baa336	15	#include <linux/platform_device.h>
712eddf7 BZ	16	#include <linux/of.h>
712eddf7 BZ	17	#include <linux/platform_data/cpuidle-exynos.h>
3d739985	18
67173ca4	19	#include <asm/suspend.h>
06c77b3c	20	#include <asm/cpuidle.h>
67173ca4	21
712eddf7 BZ	22	static atomic_t exynos_idle_barrier;
	23
	24	static struct cpuidle_exynos_data *exynos_cpuidle_pdata;
277f5046	25	static void (*exynos_enter_aftr)(void);
ccd458c1	26
712eddf7 BZ	27	static int exynos_enter_coupled_lowpower(struct cpuidle_device *dev,
	28	struct cpuidle_driver *drv,
	29	int index)
	30	{
	31	int ret;
	32
	33	exynos_cpuidle_pdata->pre_enter_aftr();
	34
	35	/*
	36	* Waiting all cpus to reach this point at the same moment
	37	*/
	38	cpuidle_coupled_parallel_barrier(dev, &exynos_idle_barrier);
	39
	40	/*
	41	* Both cpus will reach this point at the same time
	42	*/
	43	ret = dev->cpu ? exynos_cpuidle_pdata->cpu1_powerdown()
	44	: exynos_cpuidle_pdata->cpu0_enter_aftr();
	45	if (ret)
	46	index = ret;
	47
	48	/*
	49	* Waiting all cpus to finish the power sequence before going further
	50	*/
	51	cpuidle_coupled_parallel_barrier(dev, &exynos_idle_barrier);
	52
	53	exynos_cpuidle_pdata->post_enter_aftr();
	54
	55	return index;
	56	}
	57
7880e45e	58	static int exynos_enter_lowpower(struct cpuidle_device *dev,
67173ca4 ADK	59	struct cpuidle_driver *drv,
	60	int index)
	61	{
	62	int new_index = index;
	63
118f5c1d BZ	64	/* AFTR can only be entered when cores other than CPU0 are offline */
118f5c1d BZ	65	if (num_online_cpus() > 1 \|\| dev->cpu != 0)
67173ca4 ADK	66	new_index = drv->safe_state_index;
	67
	68	if (new_index == 0)
06c77b3c	69	return arm_cpuidle_simple_enter(dev, drv, new_index);
01601b34 TF	70
	71	exynos_enter_aftr();
	72
	73	return new_index;
67173ca4 ADK	74	}
67173ca4 ADK	75
7880e45e DL	76	static struct cpuidle_driver exynos_idle_driver = {
7880e45e DL	77	.name = "exynos_idle",
53af16a1 DL	78	.owner = THIS_MODULE,
	79	.states = {
	80	[0] = ARM_CPUIDLE_WFI_STATE,
	81	[1] = {
7880e45e	82	.enter = exynos_enter_lowpower,
53af16a1	83	.exit_latency = 300,
c324f43a	84	.target_residency = 10000,
53af16a1 DL	85	.name = "C1",
	86	.desc = "ARM power down",
	87	},
	88	},
	89	.state_count = 2,
	90	.safe_state_index = 0,
	91	};
	92
712eddf7 BZ	93	static struct cpuidle_driver exynos_coupled_idle_driver = {
	94	.name = "exynos_coupled_idle",
	95	.owner = THIS_MODULE,
	96	.states = {
	97	[0] = ARM_CPUIDLE_WFI_STATE,
	98	[1] = {
	99	.enter = exynos_enter_coupled_lowpower,
	100	.exit_latency = 5000,
	101	.target_residency = 10000,
	102	.flags = CPUIDLE_FLAG_COUPLED \|
	103	CPUIDLE_FLAG_TIMER_STOP,
	104	.name = "C1",
	105	.desc = "ARM power down",
	106	},
	107	},
	108	.state_count = 2,
	109	.safe_state_index = 0,
	110	};
	111
f612a4fb	112	static int exynos_cpuidle_probe(struct platform_device *pdev)
3d739985	113	{
043c86b6	114	int ret;
46bcfad7	115
cfdda353	116	if (IS_ENABLED(CONFIG_SMP) &&
8919d779 MS	117	(of_machine_is_compatible("samsung,exynos4210") \|\|
8919d779 MS	118	of_machine_is_compatible("samsung,exynos3250"))) {
712eddf7 BZ	119	exynos_cpuidle_pdata = pdev->dev.platform_data;
	120
	121	ret = cpuidle_register(&exynos_coupled_idle_driver,
	122	cpu_possible_mask);
	123	} else {
	124	exynos_enter_aftr = (void *)(pdev->dev.platform_data);
	125
	126	ret = cpuidle_register(&exynos_idle_driver, NULL);
	127	}
277f5046	128
5db9f436	129	if (ret) {
ae7c4c87	130	dev_err(&pdev->dev, "failed to register cpuidle driver\n");
5db9f436	131	return ret;
46bcfad7	132	}
3d739985	133
3d739985 JL	134	return 0;
3d739985 JL	135	}
35baa336 BZ	136
	137	static struct platform_driver exynos_cpuidle_driver = {
	138	.probe = exynos_cpuidle_probe,
	139	.driver = {
	140	.name = "exynos_cpuidle",
35baa336 BZ	141	},
35baa336 BZ	142	};
84599238	143	builtin_platform_driver(exynos_cpuidle_driver);