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42099322 DS |
1 | /* |
2 | * drivers/cpufreq/spear-cpufreq.c | |
3 | * | |
4 | * CPU Frequency Scaling for SPEAr platform | |
5 | * | |
6 | * Copyright (C) 2012 ST Microelectronics | |
7 | * Deepak Sikri <deepak.sikri@st.com> | |
8 | * | |
9 | * This file is licensed under the terms of the GNU General Public | |
10 | * License version 2. This program is licensed "as is" without any | |
11 | * warranty of any kind, whether express or implied. | |
12 | */ | |
13 | ||
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
15 | ||
16 | #include <linux/clk.h> | |
17 | #include <linux/cpufreq.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/module.h> | |
c0e46948 | 21 | #include <linux/of_device.h> |
42099322 DS |
22 | #include <linux/slab.h> |
23 | #include <linux/types.h> | |
24 | ||
25 | /* SPEAr CPUFreq driver data structure */ | |
26 | static struct { | |
27 | struct clk *clk; | |
28 | unsigned int transition_latency; | |
29 | struct cpufreq_frequency_table *freq_tbl; | |
30 | u32 cnt; | |
31 | } spear_cpufreq; | |
32 | ||
f8517804 | 33 | static int spear_cpufreq_verify(struct cpufreq_policy *policy) |
42099322 DS |
34 | { |
35 | return cpufreq_frequency_table_verify(policy, spear_cpufreq.freq_tbl); | |
36 | } | |
37 | ||
38 | static unsigned int spear_cpufreq_get(unsigned int cpu) | |
39 | { | |
40 | return clk_get_rate(spear_cpufreq.clk) / 1000; | |
41 | } | |
42 | ||
43 | static struct clk *spear1340_cpu_get_possible_parent(unsigned long newfreq) | |
44 | { | |
45 | struct clk *sys_pclk; | |
46 | int pclk; | |
47 | /* | |
48 | * In SPEAr1340, cpu clk's parent sys clk can take input from | |
49 | * following sources | |
50 | */ | |
51 | const char *sys_clk_src[] = { | |
52 | "sys_syn_clk", | |
53 | "pll1_clk", | |
54 | "pll2_clk", | |
55 | "pll3_clk", | |
56 | }; | |
57 | ||
58 | /* | |
59 | * As sys clk can have multiple source with their own range | |
60 | * limitation so we choose possible sources accordingly | |
61 | */ | |
62 | if (newfreq <= 300000000) | |
63 | pclk = 0; /* src is sys_syn_clk */ | |
64 | else if (newfreq > 300000000 && newfreq <= 500000000) | |
65 | pclk = 3; /* src is pll3_clk */ | |
66 | else if (newfreq == 600000000) | |
67 | pclk = 1; /* src is pll1_clk */ | |
68 | else | |
69 | return ERR_PTR(-EINVAL); | |
70 | ||
71 | /* Get parent to sys clock */ | |
72 | sys_pclk = clk_get(NULL, sys_clk_src[pclk]); | |
73 | if (IS_ERR(sys_pclk)) | |
74 | pr_err("Failed to get %s clock\n", sys_clk_src[pclk]); | |
75 | ||
76 | return sys_pclk; | |
77 | } | |
78 | ||
79 | /* | |
80 | * In SPEAr1340, we cannot use newfreq directly because we need to actually | |
81 | * access a source clock (clk) which might not be ancestor of cpu at present. | |
82 | * Hence in SPEAr1340 we would operate on source clock directly before switching | |
83 | * cpu clock to it. | |
84 | */ | |
85 | static int spear1340_set_cpu_rate(struct clk *sys_pclk, unsigned long newfreq) | |
86 | { | |
87 | struct clk *sys_clk; | |
88 | int ret = 0; | |
89 | ||
90 | sys_clk = clk_get_parent(spear_cpufreq.clk); | |
91 | if (IS_ERR(sys_clk)) { | |
92 | pr_err("failed to get cpu's parent (sys) clock\n"); | |
93 | return PTR_ERR(sys_clk); | |
94 | } | |
95 | ||
96 | /* Set the rate of the source clock before changing the parent */ | |
97 | ret = clk_set_rate(sys_pclk, newfreq); | |
98 | if (ret) { | |
99 | pr_err("Failed to set sys clk rate to %lu\n", newfreq); | |
100 | return ret; | |
101 | } | |
102 | ||
103 | ret = clk_set_parent(sys_clk, sys_pclk); | |
104 | if (ret) { | |
105 | pr_err("Failed to set sys clk parent\n"); | |
106 | return ret; | |
107 | } | |
108 | ||
109 | return 0; | |
110 | } | |
111 | ||
112 | static int spear_cpufreq_target(struct cpufreq_policy *policy, | |
113 | unsigned int target_freq, unsigned int relation) | |
114 | { | |
115 | struct cpufreq_freqs freqs; | |
116 | unsigned long newfreq; | |
117 | struct clk *srcclk; | |
118 | int index, ret, mult = 1; | |
119 | ||
120 | if (cpufreq_frequency_table_target(policy, spear_cpufreq.freq_tbl, | |
121 | target_freq, relation, &index)) | |
122 | return -EINVAL; | |
123 | ||
42099322 DS |
124 | freqs.old = spear_cpufreq_get(0); |
125 | ||
126 | newfreq = spear_cpufreq.freq_tbl[index].frequency * 1000; | |
127 | if (of_machine_is_compatible("st,spear1340")) { | |
128 | /* | |
129 | * SPEAr1340 is special in the sense that due to the possibility | |
130 | * of multiple clock sources for cpu clk's parent we can have | |
131 | * different clock source for different frequency of cpu clk. | |
132 | * Hence we need to choose one from amongst these possible clock | |
133 | * sources. | |
134 | */ | |
135 | srcclk = spear1340_cpu_get_possible_parent(newfreq); | |
136 | if (IS_ERR(srcclk)) { | |
137 | pr_err("Failed to get src clk\n"); | |
138 | return PTR_ERR(srcclk); | |
139 | } | |
140 | ||
141 | /* SPEAr1340: src clk is always 2 * intended cpu clk */ | |
142 | mult = 2; | |
143 | } else { | |
144 | /* | |
145 | * src clock to be altered is ancestor of cpu clock. Hence we | |
146 | * can directly work on cpu clk | |
147 | */ | |
148 | srcclk = spear_cpufreq.clk; | |
149 | } | |
150 | ||
151 | newfreq = clk_round_rate(srcclk, newfreq * mult); | |
152 | if (newfreq < 0) { | |
153 | pr_err("clk_round_rate failed for cpu src clock\n"); | |
154 | return newfreq; | |
155 | } | |
156 | ||
157 | freqs.new = newfreq / 1000; | |
158 | freqs.new /= mult; | |
6f35a65f | 159 | |
b43a7ffb | 160 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); |
42099322 DS |
161 | |
162 | if (mult == 2) | |
163 | ret = spear1340_set_cpu_rate(srcclk, newfreq); | |
164 | else | |
165 | ret = clk_set_rate(spear_cpufreq.clk, newfreq); | |
166 | ||
167 | /* Get current rate after clk_set_rate, in case of failure */ | |
168 | if (ret) { | |
169 | pr_err("CPU Freq: cpu clk_set_rate failed: %d\n", ret); | |
170 | freqs.new = clk_get_rate(spear_cpufreq.clk) / 1000; | |
171 | } | |
172 | ||
b43a7ffb | 173 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); |
42099322 DS |
174 | return ret; |
175 | } | |
176 | ||
177 | static int spear_cpufreq_init(struct cpufreq_policy *policy) | |
178 | { | |
179 | int ret; | |
180 | ||
181 | ret = cpufreq_frequency_table_cpuinfo(policy, spear_cpufreq.freq_tbl); | |
182 | if (ret) { | |
183 | pr_err("cpufreq_frequency_table_cpuinfo() failed"); | |
184 | return ret; | |
185 | } | |
186 | ||
187 | cpufreq_frequency_table_get_attr(spear_cpufreq.freq_tbl, policy->cpu); | |
188 | policy->cpuinfo.transition_latency = spear_cpufreq.transition_latency; | |
189 | policy->cur = spear_cpufreq_get(0); | |
190 | ||
4c738d00 | 191 | cpumask_setall(policy->cpus); |
42099322 DS |
192 | |
193 | return 0; | |
194 | } | |
195 | ||
196 | static int spear_cpufreq_exit(struct cpufreq_policy *policy) | |
197 | { | |
198 | cpufreq_frequency_table_put_attr(policy->cpu); | |
199 | return 0; | |
200 | } | |
201 | ||
202 | static struct freq_attr *spear_cpufreq_attr[] = { | |
203 | &cpufreq_freq_attr_scaling_available_freqs, | |
204 | NULL, | |
205 | }; | |
206 | ||
207 | static struct cpufreq_driver spear_cpufreq_driver = { | |
208 | .name = "cpufreq-spear", | |
209 | .flags = CPUFREQ_STICKY, | |
210 | .verify = spear_cpufreq_verify, | |
211 | .target = spear_cpufreq_target, | |
212 | .get = spear_cpufreq_get, | |
213 | .init = spear_cpufreq_init, | |
214 | .exit = spear_cpufreq_exit, | |
215 | .attr = spear_cpufreq_attr, | |
216 | }; | |
217 | ||
218 | static int spear_cpufreq_driver_init(void) | |
219 | { | |
220 | struct device_node *np; | |
221 | const struct property *prop; | |
222 | struct cpufreq_frequency_table *freq_tbl; | |
223 | const __be32 *val; | |
224 | int cnt, i, ret; | |
225 | ||
c0e46948 | 226 | np = of_cpu_device_node_get(0); |
42099322 DS |
227 | if (!np) { |
228 | pr_err("No cpu node found"); | |
229 | return -ENODEV; | |
230 | } | |
231 | ||
232 | if (of_property_read_u32(np, "clock-latency", | |
233 | &spear_cpufreq.transition_latency)) | |
234 | spear_cpufreq.transition_latency = CPUFREQ_ETERNAL; | |
235 | ||
236 | prop = of_find_property(np, "cpufreq_tbl", NULL); | |
237 | if (!prop || !prop->value) { | |
238 | pr_err("Invalid cpufreq_tbl"); | |
239 | ret = -ENODEV; | |
240 | goto out_put_node; | |
241 | } | |
242 | ||
243 | cnt = prop->length / sizeof(u32); | |
244 | val = prop->value; | |
245 | ||
246 | freq_tbl = kmalloc(sizeof(*freq_tbl) * (cnt + 1), GFP_KERNEL); | |
247 | if (!freq_tbl) { | |
248 | ret = -ENOMEM; | |
249 | goto out_put_node; | |
250 | } | |
251 | ||
252 | for (i = 0; i < cnt; i++) { | |
50701588 | 253 | freq_tbl[i].driver_data = i; |
42099322 DS |
254 | freq_tbl[i].frequency = be32_to_cpup(val++); |
255 | } | |
256 | ||
50701588 | 257 | freq_tbl[i].driver_data = i; |
42099322 DS |
258 | freq_tbl[i].frequency = CPUFREQ_TABLE_END; |
259 | ||
260 | spear_cpufreq.freq_tbl = freq_tbl; | |
261 | ||
262 | of_node_put(np); | |
263 | ||
264 | spear_cpufreq.clk = clk_get(NULL, "cpu_clk"); | |
265 | if (IS_ERR(spear_cpufreq.clk)) { | |
266 | pr_err("Unable to get CPU clock\n"); | |
267 | ret = PTR_ERR(spear_cpufreq.clk); | |
268 | goto out_put_mem; | |
269 | } | |
270 | ||
271 | ret = cpufreq_register_driver(&spear_cpufreq_driver); | |
272 | if (!ret) | |
273 | return 0; | |
274 | ||
275 | pr_err("failed register driver: %d\n", ret); | |
276 | clk_put(spear_cpufreq.clk); | |
277 | ||
278 | out_put_mem: | |
279 | kfree(freq_tbl); | |
280 | return ret; | |
281 | ||
282 | out_put_node: | |
283 | of_node_put(np); | |
284 | return ret; | |
285 | } | |
286 | late_initcall(spear_cpufreq_driver_init); | |
287 | ||
288 | MODULE_AUTHOR("Deepak Sikri <deepak.sikri@st.com>"); | |
289 | MODULE_DESCRIPTION("SPEAr CPUFreq driver"); | |
290 | MODULE_LICENSE("GPL"); |