[linux-2.6-block.git] / drivers / cpufreq / sc520_freq.c

/*
 *	sc520_freq.c: cpufreq driver for the AMD Elan sc520
 *
 *	Copyright (C) 2005 Sean Young <sean@mess.org>
 *
 *	This program is free software; you can redistribute it and/or
 *	modify it under the terms of the GNU General Public License
 *	as published by the Free Software Foundation; either version
 *	2 of the License, or (at your option) any later version.
 *
 *	Based on elanfreq.c
 *
 *	2005-03-30: - initial revision
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>

#include <linux/delay.h>
#include <linux/cpufreq.h>
#include <linux/timex.h>
#include <linux/io.h>

#include <asm/cpu_device_id.h>
#include <asm/msr.h>

#define MMCR_BASE	0xfffef000	/* The default base address */
#define OFFS_CPUCTL	0x2   /* CPU Control Register */

static __u8 __iomem *cpuctl;

static struct cpufreq_frequency_table sc520_freq_table[] = {
	{0, 0x01,	100000},
	{0, 0x02,	133000},
	{0, 0,	CPUFREQ_TABLE_END},
};

static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
{
	u8 clockspeed_reg = *cpuctl;

	switch (clockspeed_reg & 0x03) {
	default:
		pr_err("error: cpuctl register has unexpected value %02x\n",
		       clockspeed_reg);
	case 0x01:
		return 100000;
	case 0x02:
		return 133000;
	}
}

static int sc520_freq_target(struct cpufreq_policy *policy, unsigned int state)
{

	u8 clockspeed_reg;

	local_irq_disable();

	clockspeed_reg = *cpuctl & ~0x03;
	*cpuctl = clockspeed_reg | sc520_freq_table[state].driver_data;

	local_irq_enable();

	return 0;
}

/*
 *	Module init and exit code
 */

static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
{
	struct cpuinfo_x86 *c = &cpu_data(0);

	/* capability check */
	if (c->x86_vendor != X86_VENDOR_AMD ||
	    c->x86 != 4 || c->x86_model != 9)
		return -ENODEV;

	/* cpuinfo and default policy values */
	policy->cpuinfo.transition_latency = 1000000; /* 1ms */
	policy->freq_table = sc520_freq_table;

	return 0;
}


static struct cpufreq_driver sc520_freq_driver = {
	.get	= sc520_freq_get_cpu_frequency,
	.verify	= cpufreq_generic_frequency_table_verify,
	.target_index = sc520_freq_target,
	.init	= sc520_freq_cpu_init,
	.name	= "sc520_freq",
	.attr	= cpufreq_generic_attr,
};

static const struct x86_cpu_id sc520_ids[] = {
	{ X86_VENDOR_AMD, 4, 9 },
	{}
};
MODULE_DEVICE_TABLE(x86cpu, sc520_ids);

static int __init sc520_freq_init(void)
{
	int err;

	if (!x86_match_cpu(sc520_ids))
		return -ENODEV;

	cpuctl = ioremap((unsigned long)(MMCR_BASE + OFFS_CPUCTL), 1);
	if (!cpuctl) {
		pr_err("sc520_freq: error: failed to remap memory\n");
		return -ENOMEM;
	}

	err = cpufreq_register_driver(&sc520_freq_driver);
	if (err)
		iounmap(cpuctl);

	return err;
}


static void __exit sc520_freq_exit(void)
{
	cpufreq_unregister_driver(&sc520_freq_driver);
	iounmap(cpuctl);
}


MODULE_LICENSE("GPL");
MODULE_AUTHOR("Sean Young <sean@mess.org>");
MODULE_DESCRIPTION("cpufreq driver for AMD's Elan sc520 CPU");

module_init(sc520_freq_init);
module_exit(sc520_freq_exit);
Commit	Line	Data
bf6fc9fd DJ	1	/*
	2	* sc520_freq.c: cpufreq driver for the AMD Elan sc520
	3	*
	4	* Copyright (C) 2005 Sean Young <sean@mess.org>
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*
	11	* Based on elanfreq.c
	12	*
	13	* 2005-03-30: - initial revision
	14	*/
	15
1c5864e2 JP	16	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
1c5864e2 JP	17
bf6fc9fd DJ	18	#include <linux/kernel.h>
	19	#include <linux/module.h>
	20	#include <linux/init.h>
	21
	22	#include <linux/delay.h>
	23	#include <linux/cpufreq.h>
6072ace4 DJ	24	#include <linux/timex.h>
6072ace4 DJ	25	#include <linux/io.h>
bf6fc9fd	26
fa8031ae	27	#include <asm/cpu_device_id.h>
bf6fc9fd	28	#include <asm/msr.h>
bf6fc9fd DJ	29
	30	#define MMCR_BASE 0xfffef000 /* The default base address */
	31	#define OFFS_CPUCTL 0x2 /* CPU Control Register */
	32
	33	static __u8 __iomem *cpuctl;
	34
bf6fc9fd	35	static struct cpufreq_frequency_table sc520_freq_table[] = {
7f4b0461 VK	36	{0, 0x01, 100000},
	37	{0, 0x02, 133000},
	38	{0, 0, CPUFREQ_TABLE_END},
bf6fc9fd DJ	39	};
	40
	41	static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
	42	{
	43	u8 clockspeed_reg = *cpuctl;
	44
	45	switch (clockspeed_reg & 0x03) {
	46	default:
1c5864e2	47	pr_err("error: cpuctl register has unexpected value %02x\n",
b49c22a6	48	clockspeed_reg);
bf6fc9fd DJ	49	case 0x01:
	50	return 100000;
	51	case 0x02:
	52	return 133000;
	53	}
	54	}
	55
9c0ebcf7	56	static int sc520_freq_target(struct cpufreq_policy *policy, unsigned int state)
bf6fc9fd DJ	57	{
bf6fc9fd DJ	58
bf6fc9fd DJ	59	u8 clockspeed_reg;
bf6fc9fd DJ	60
bf6fc9fd DJ	61	local_irq_disable();
	62
	63	clockspeed_reg = *cpuctl & ~0x03;
50701588	64	*cpuctl = clockspeed_reg \| sc520_freq_table[state].driver_data;
bf6fc9fd DJ	65
	66	local_irq_enable();
	67
bf6fc9fd DJ	68	return 0;
	69	}
	70
bf6fc9fd DJ	71	/*
	72	* Module init and exit code
	73	*/
	74
	75	static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
	76	{
92cb7612	77	struct cpuinfo_x86 *c = &cpu_data(0);
bf6fc9fd DJ	78
	79	/* capability check */
	80	if (c->x86_vendor != X86_VENDOR_AMD \|\|
	81	c->x86 != 4 \|\| c->x86_model != 9)
	82	return -ENODEV;
	83
	84	/* cpuinfo and default policy values */
bf6fc9fd	85	policy->cpuinfo.transition_latency = 1000000; /* 1ms */
f35750c8	86	policy->freq_table = sc520_freq_table;
bf6fc9fd	87
f35750c8	88	return 0;
bf6fc9fd DJ	89	}
	90
	91
221dee28	92	static struct cpufreq_driver sc520_freq_driver = {
bf6fc9fd	93	.get = sc520_freq_get_cpu_frequency,
a823c4ae	94	.verify = cpufreq_generic_frequency_table_verify,
9c0ebcf7	95	.target_index = sc520_freq_target,
bf6fc9fd	96	.init = sc520_freq_cpu_init,
bf6fc9fd	97	.name = "sc520_freq",
a823c4ae	98	.attr = cpufreq_generic_attr,
bf6fc9fd DJ	99	};
bf6fc9fd DJ	100
fa8031ae AK	101	static const struct x86_cpu_id sc520_ids[] = {
	102	{ X86_VENDOR_AMD, 4, 9 },
	103	{}
	104	};
	105	MODULE_DEVICE_TABLE(x86cpu, sc520_ids);
bf6fc9fd DJ	106
	107	static int __init sc520_freq_init(void)
	108	{
3e74341c	109	int err;
bf6fc9fd	110
fa8031ae	111	if (!x86_match_cpu(sc520_ids))
bf6fc9fd	112	return -ENODEV;
fa8031ae	113
bf6fc9fd	114	cpuctl = ioremap((unsigned long)(MMCR_BASE + OFFS_CPUCTL), 1);
6072ace4	115	if (!cpuctl) {
b49c22a6	116	pr_err("sc520_freq: error: failed to remap memory\n");
bf6fc9fd DJ	117	return -ENOMEM;
	118	}
	119
3e74341c AL	120	err = cpufreq_register_driver(&sc520_freq_driver);
	121	if (err)
	122	iounmap(cpuctl);
	123
	124	return err;
bf6fc9fd DJ	125	}
	126
	127
	128	static void __exit sc520_freq_exit(void)
	129	{
	130	cpufreq_unregister_driver(&sc520_freq_driver);
	131	iounmap(cpuctl);
	132	}
	133
	134
	135	MODULE_LICENSE("GPL");
	136	MODULE_AUTHOR("Sean Young <sean@mess.org>");
	137	MODULE_DESCRIPTION("cpufreq driver for AMD's Elan sc520 CPU");
	138
	139	module_init(sc520_freq_init);
	140	module_exit(sc520_freq_exit);
	141