Commit | Line | Data |
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4f19048f | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1da177e4 | 2 | /* |
b2bd68e1 | 3 | * (c) 2003-2012 Advanced Micro Devices, Inc. |
1da177e4 | 4 | * |
b2bd68e1 | 5 | * Maintainer: |
29c4bcdd | 6 | * Andreas Herrmann <herrmann.der.user@googlemail.com> |
1da177e4 LT |
7 | * |
8 | * Based on the powernow-k7.c module written by Dave Jones. | |
f4432c5c | 9 | * (C) 2003 Dave Jones on behalf of SuSE Labs |
1da177e4 | 10 | * (C) 2004 Dominik Brodowski <linux@brodo.de> |
a2531293 | 11 | * (C) 2004 Pavel Machek <pavel@ucw.cz> |
1da177e4 LT |
12 | * Based upon datasheets & sample CPUs kindly provided by AMD. |
13 | * | |
14 | * Valuable input gratefully received from Dave Jones, Pavel Machek, | |
1f729e06 | 15 | * Dominik Brodowski, Jacob Shin, and others. |
065b807c | 16 | * Originally developed by Paul Devriendt. |
1da177e4 | 17 | * |
b2bd68e1 AH |
18 | * Processor information obtained from Chapter 9 (Power and Thermal |
19 | * Management) of the "BIOS and Kernel Developer's Guide (BKDG) for | |
20 | * the AMD Athlon 64 and AMD Opteron Processors" and section "2.x | |
21 | * Power Management" in BKDGs for newer AMD CPU families. | |
22 | * | |
23 | * Tables for specific CPUs can be inferred from AMD's processor | |
24 | * power and thermal data sheets, (e.g. 30417.pdf, 30430.pdf, 43375.pdf) | |
1da177e4 LT |
25 | */ |
26 | ||
e54173b4 SK |
27 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
28 | ||
1da177e4 LT |
29 | #include <linux/kernel.h> |
30 | #include <linux/smp.h> | |
31 | #include <linux/module.h> | |
32 | #include <linux/init.h> | |
33 | #include <linux/cpufreq.h> | |
34 | #include <linux/slab.h> | |
35 | #include <linux/string.h> | |
065b807c | 36 | #include <linux/cpumask.h> |
0e64a0c9 DJ |
37 | #include <linux/io.h> |
38 | #include <linux/delay.h> | |
1da177e4 LT |
39 | |
40 | #include <asm/msr.h> | |
fa8031ae | 41 | #include <asm/cpu_device_id.h> |
1da177e4 | 42 | |
1da177e4 | 43 | #include <linux/acpi.h> |
14cc3e2b | 44 | #include <linux/mutex.h> |
1da177e4 | 45 | #include <acpi/processor.h> |
1da177e4 | 46 | |
c5829cd0 | 47 | #define VERSION "version 2.20.00" |
1da177e4 LT |
48 | #include "powernow-k8.h" |
49 | ||
50 | /* serialize freq changes */ | |
14cc3e2b | 51 | static DEFINE_MUTEX(fidvid_mutex); |
1da177e4 | 52 | |
2c6b8c03 | 53 | static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data); |
1da177e4 | 54 | |
a2fed573 ML |
55 | static struct cpufreq_driver cpufreq_amd64_driver; |
56 | ||
1da177e4 LT |
57 | /* Return a frequency in MHz, given an input fid */ |
58 | static u32 find_freq_from_fid(u32 fid) | |
59 | { | |
60 | return 800 + (fid * 100); | |
61 | } | |
62 | ||
63 | /* Return a frequency in KHz, given an input fid */ | |
64 | static u32 find_khz_freq_from_fid(u32 fid) | |
65 | { | |
66 | return 1000 * find_freq_from_fid(fid); | |
67 | } | |
68 | ||
1da177e4 LT |
69 | /* Return the vco fid for an input fid |
70 | * | |
71 | * Each "low" fid has corresponding "high" fid, and you can get to "low" fids | |
72 | * only from corresponding high fids. This returns "high" fid corresponding to | |
73 | * "low" one. | |
74 | */ | |
75 | static u32 convert_fid_to_vco_fid(u32 fid) | |
76 | { | |
32ee8c3e | 77 | if (fid < HI_FID_TABLE_BOTTOM) |
1da177e4 | 78 | return 8 + (2 * fid); |
32ee8c3e | 79 | else |
1da177e4 | 80 | return fid; |
1da177e4 LT |
81 | } |
82 | ||
83 | /* | |
84 | * Return 1 if the pending bit is set. Unless we just instructed the processor | |
85 | * to transition to a new state, seeing this bit set is really bad news. | |
86 | */ | |
87 | static int pending_bit_stuck(void) | |
88 | { | |
638b5097 | 89 | u32 lo, hi __always_unused; |
1da177e4 LT |
90 | |
91 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
92 | return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; | |
93 | } | |
94 | ||
95 | /* | |
96 | * Update the global current fid / vid values from the status msr. | |
97 | * Returns 1 on error. | |
98 | */ | |
99 | static int query_current_values_with_pending_wait(struct powernow_k8_data *data) | |
100 | { | |
101 | u32 lo, hi; | |
102 | u32 i = 0; | |
103 | ||
7153d961 | 104 | do { |
0213df74 | 105 | if (i++ > 10000) { |
2d06d8c4 | 106 | pr_debug("detected change pending stuck\n"); |
1da177e4 LT |
107 | return 1; |
108 | } | |
109 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
7153d961 | 110 | } while (lo & MSR_S_LO_CHANGE_PENDING); |
1da177e4 LT |
111 | |
112 | data->currvid = hi & MSR_S_HI_CURRENT_VID; | |
113 | data->currfid = lo & MSR_S_LO_CURRENT_FID; | |
114 | ||
115 | return 0; | |
116 | } | |
117 | ||
118 | /* the isochronous relief time */ | |
119 | static void count_off_irt(struct powernow_k8_data *data) | |
120 | { | |
121 | udelay((1 << data->irt) * 10); | |
1da177e4 LT |
122 | } |
123 | ||
27b46d76 | 124 | /* the voltage stabilization time */ |
1da177e4 LT |
125 | static void count_off_vst(struct powernow_k8_data *data) |
126 | { | |
127 | udelay(data->vstable * VST_UNITS_20US); | |
1da177e4 LT |
128 | } |
129 | ||
130 | /* need to init the control msr to a safe value (for each cpu) */ | |
131 | static void fidvid_msr_init(void) | |
132 | { | |
133 | u32 lo, hi; | |
134 | u8 fid, vid; | |
135 | ||
136 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
137 | vid = hi & MSR_S_HI_CURRENT_VID; | |
138 | fid = lo & MSR_S_LO_CURRENT_FID; | |
139 | lo = fid | (vid << MSR_C_LO_VID_SHIFT); | |
140 | hi = MSR_C_HI_STP_GNT_BENIGN; | |
2d06d8c4 | 141 | pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi); |
1da177e4 LT |
142 | wrmsr(MSR_FIDVID_CTL, lo, hi); |
143 | } | |
144 | ||
1da177e4 LT |
145 | /* write the new fid value along with the other control fields to the msr */ |
146 | static int write_new_fid(struct powernow_k8_data *data, u32 fid) | |
147 | { | |
148 | u32 lo; | |
149 | u32 savevid = data->currvid; | |
0213df74 | 150 | u32 i = 0; |
1da177e4 LT |
151 | |
152 | if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) { | |
e54173b4 | 153 | pr_err("internal error - overflow on fid write\n"); |
1da177e4 LT |
154 | return 1; |
155 | } | |
156 | ||
0e64a0c9 DJ |
157 | lo = fid; |
158 | lo |= (data->currvid << MSR_C_LO_VID_SHIFT); | |
159 | lo |= MSR_C_LO_INIT_FID_VID; | |
1da177e4 | 160 | |
2d06d8c4 | 161 | pr_debug("writing fid 0x%x, lo 0x%x, hi 0x%x\n", |
1da177e4 LT |
162 | fid, lo, data->plllock * PLL_LOCK_CONVERSION); |
163 | ||
0213df74 DJ |
164 | do { |
165 | wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); | |
166 | if (i++ > 100) { | |
e54173b4 | 167 | pr_err("Hardware error - pending bit very stuck - no further pstate changes possible\n"); |
63172cb3 | 168 | return 1; |
32ee8c3e | 169 | } |
0213df74 | 170 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
171 | |
172 | count_off_irt(data); | |
173 | ||
174 | if (savevid != data->currvid) { | |
e54173b4 SK |
175 | pr_err("vid change on fid trans, old 0x%x, new 0x%x\n", |
176 | savevid, data->currvid); | |
1da177e4 LT |
177 | return 1; |
178 | } | |
179 | ||
180 | if (fid != data->currfid) { | |
e54173b4 | 181 | pr_err("fid trans failed, fid 0x%x, curr 0x%x\n", fid, |
0e64a0c9 | 182 | data->currfid); |
1da177e4 LT |
183 | return 1; |
184 | } | |
185 | ||
186 | return 0; | |
187 | } | |
188 | ||
189 | /* Write a new vid to the hardware */ | |
190 | static int write_new_vid(struct powernow_k8_data *data, u32 vid) | |
191 | { | |
192 | u32 lo; | |
193 | u32 savefid = data->currfid; | |
0213df74 | 194 | int i = 0; |
1da177e4 LT |
195 | |
196 | if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { | |
e54173b4 | 197 | pr_err("internal error - overflow on vid write\n"); |
1da177e4 LT |
198 | return 1; |
199 | } | |
200 | ||
0e64a0c9 DJ |
201 | lo = data->currfid; |
202 | lo |= (vid << MSR_C_LO_VID_SHIFT); | |
203 | lo |= MSR_C_LO_INIT_FID_VID; | |
1da177e4 | 204 | |
2d06d8c4 | 205 | pr_debug("writing vid 0x%x, lo 0x%x, hi 0x%x\n", |
1da177e4 LT |
206 | vid, lo, STOP_GRANT_5NS); |
207 | ||
0213df74 DJ |
208 | do { |
209 | wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); | |
6df89006 | 210 | if (i++ > 100) { |
e54173b4 | 211 | pr_err("internal error - pending bit very stuck - no further pstate changes possible\n"); |
6df89006 DJ |
212 | return 1; |
213 | } | |
0213df74 | 214 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
215 | |
216 | if (savefid != data->currfid) { | |
e54173b4 SK |
217 | pr_err("fid changed on vid trans, old 0x%x new 0x%x\n", |
218 | savefid, data->currfid); | |
1da177e4 LT |
219 | return 1; |
220 | } | |
221 | ||
222 | if (vid != data->currvid) { | |
e54173b4 | 223 | pr_err("vid trans failed, vid 0x%x, curr 0x%x\n", |
0e64a0c9 | 224 | vid, data->currvid); |
1da177e4 LT |
225 | return 1; |
226 | } | |
227 | ||
228 | return 0; | |
229 | } | |
230 | ||
231 | /* | |
232 | * Reduce the vid by the max of step or reqvid. | |
233 | * Decreasing vid codes represent increasing voltages: | |
841e40b3 | 234 | * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off. |
1da177e4 | 235 | */ |
0e64a0c9 DJ |
236 | static int decrease_vid_code_by_step(struct powernow_k8_data *data, |
237 | u32 reqvid, u32 step) | |
1da177e4 LT |
238 | { |
239 | if ((data->currvid - reqvid) > step) | |
240 | reqvid = data->currvid - step; | |
241 | ||
242 | if (write_new_vid(data, reqvid)) | |
243 | return 1; | |
244 | ||
245 | count_off_vst(data); | |
246 | ||
247 | return 0; | |
248 | } | |
249 | ||
1f729e06 | 250 | /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */ |
0e64a0c9 DJ |
251 | static int transition_fid_vid(struct powernow_k8_data *data, |
252 | u32 reqfid, u32 reqvid) | |
1da177e4 | 253 | { |
a2e1b4c3 | 254 | if (core_voltage_pre_transition(data, reqvid, reqfid)) |
1da177e4 LT |
255 | return 1; |
256 | ||
257 | if (core_frequency_transition(data, reqfid)) | |
258 | return 1; | |
259 | ||
260 | if (core_voltage_post_transition(data, reqvid)) | |
261 | return 1; | |
262 | ||
263 | if (query_current_values_with_pending_wait(data)) | |
264 | return 1; | |
265 | ||
266 | if ((reqfid != data->currfid) || (reqvid != data->currvid)) { | |
e54173b4 | 267 | pr_err("failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n", |
1da177e4 LT |
268 | smp_processor_id(), |
269 | reqfid, reqvid, data->currfid, data->currvid); | |
270 | return 1; | |
271 | } | |
272 | ||
2d06d8c4 | 273 | pr_debug("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n", |
1da177e4 LT |
274 | smp_processor_id(), data->currfid, data->currvid); |
275 | ||
276 | return 0; | |
277 | } | |
278 | ||
279 | /* Phase 1 - core voltage transition ... setup voltage */ | |
0e64a0c9 | 280 | static int core_voltage_pre_transition(struct powernow_k8_data *data, |
a2e1b4c3 | 281 | u32 reqvid, u32 reqfid) |
1da177e4 LT |
282 | { |
283 | u32 rvosteps = data->rvo; | |
284 | u32 savefid = data->currfid; | |
638b5097 | 285 | u32 maxvid, lo __always_unused, rvomult = 1; |
1da177e4 | 286 | |
e54173b4 | 287 | pr_debug("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n", |
1da177e4 LT |
288 | smp_processor_id(), |
289 | data->currfid, data->currvid, reqvid, data->rvo); | |
290 | ||
a2e1b4c3 ML |
291 | if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP)) |
292 | rvomult = 2; | |
293 | rvosteps *= rvomult; | |
065b807c DJ |
294 | rdmsr(MSR_FIDVID_STATUS, lo, maxvid); |
295 | maxvid = 0x1f & (maxvid >> 16); | |
2d06d8c4 | 296 | pr_debug("ph1 maxvid=0x%x\n", maxvid); |
065b807c DJ |
297 | if (reqvid < maxvid) /* lower numbers are higher voltages */ |
298 | reqvid = maxvid; | |
299 | ||
1da177e4 | 300 | while (data->currvid > reqvid) { |
2d06d8c4 | 301 | pr_debug("ph1: curr 0x%x, req vid 0x%x\n", |
1da177e4 LT |
302 | data->currvid, reqvid); |
303 | if (decrease_vid_code_by_step(data, reqvid, data->vidmvs)) | |
304 | return 1; | |
305 | } | |
306 | ||
a2e1b4c3 ML |
307 | while ((rvosteps > 0) && |
308 | ((rvomult * data->rvo + data->currvid) > reqvid)) { | |
065b807c | 309 | if (data->currvid == maxvid) { |
1da177e4 LT |
310 | rvosteps = 0; |
311 | } else { | |
2d06d8c4 | 312 | pr_debug("ph1: changing vid for rvo, req 0x%x\n", |
1da177e4 | 313 | data->currvid - 1); |
0e64a0c9 | 314 | if (decrease_vid_code_by_step(data, data->currvid-1, 1)) |
1da177e4 LT |
315 | return 1; |
316 | rvosteps--; | |
317 | } | |
318 | } | |
319 | ||
320 | if (query_current_values_with_pending_wait(data)) | |
321 | return 1; | |
322 | ||
323 | if (savefid != data->currfid) { | |
e54173b4 | 324 | pr_err("ph1 err, currfid changed 0x%x\n", data->currfid); |
1da177e4 LT |
325 | return 1; |
326 | } | |
327 | ||
2d06d8c4 | 328 | pr_debug("ph1 complete, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
329 | data->currfid, data->currvid); |
330 | ||
331 | return 0; | |
332 | } | |
333 | ||
334 | /* Phase 2 - core frequency transition */ | |
335 | static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid) | |
336 | { | |
0e64a0c9 DJ |
337 | u32 vcoreqfid, vcocurrfid, vcofiddiff; |
338 | u32 fid_interval, savevid = data->currvid; | |
1da177e4 | 339 | |
1da177e4 | 340 | if (data->currfid == reqfid) { |
e54173b4 | 341 | pr_err("ph2 null fid transition 0x%x\n", data->currfid); |
1da177e4 LT |
342 | return 0; |
343 | } | |
344 | ||
e54173b4 | 345 | pr_debug("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n", |
1da177e4 LT |
346 | smp_processor_id(), |
347 | data->currfid, data->currvid, reqfid); | |
348 | ||
349 | vcoreqfid = convert_fid_to_vco_fid(reqfid); | |
350 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
351 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
352 | : vcoreqfid - vcocurrfid; | |
353 | ||
a2e1b4c3 ML |
354 | if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP)) |
355 | vcofiddiff = 0; | |
356 | ||
1da177e4 | 357 | while (vcofiddiff > 2) { |
019a61b9 LM |
358 | (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2); |
359 | ||
1da177e4 LT |
360 | if (reqfid > data->currfid) { |
361 | if (data->currfid > LO_FID_TABLE_TOP) { | |
0e64a0c9 DJ |
362 | if (write_new_fid(data, |
363 | data->currfid + fid_interval)) | |
1da177e4 | 364 | return 1; |
1da177e4 LT |
365 | } else { |
366 | if (write_new_fid | |
0e64a0c9 DJ |
367 | (data, |
368 | 2 + convert_fid_to_vco_fid(data->currfid))) | |
1da177e4 | 369 | return 1; |
1da177e4 LT |
370 | } |
371 | } else { | |
019a61b9 | 372 | if (write_new_fid(data, data->currfid - fid_interval)) |
1da177e4 LT |
373 | return 1; |
374 | } | |
375 | ||
376 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
377 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
378 | : vcoreqfid - vcocurrfid; | |
379 | } | |
380 | ||
381 | if (write_new_fid(data, reqfid)) | |
382 | return 1; | |
383 | ||
384 | if (query_current_values_with_pending_wait(data)) | |
385 | return 1; | |
386 | ||
387 | if (data->currfid != reqfid) { | |
e54173b4 | 388 | pr_err("ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n", |
1da177e4 LT |
389 | data->currfid, reqfid); |
390 | return 1; | |
391 | } | |
392 | ||
393 | if (savevid != data->currvid) { | |
e54173b4 | 394 | pr_err("ph2: vid changed, save 0x%x, curr 0x%x\n", |
1da177e4 LT |
395 | savevid, data->currvid); |
396 | return 1; | |
397 | } | |
398 | ||
2d06d8c4 | 399 | pr_debug("ph2 complete, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
400 | data->currfid, data->currvid); |
401 | ||
402 | return 0; | |
403 | } | |
404 | ||
405 | /* Phase 3 - core voltage transition flow ... jump to the final vid. */ | |
0e64a0c9 DJ |
406 | static int core_voltage_post_transition(struct powernow_k8_data *data, |
407 | u32 reqvid) | |
1da177e4 LT |
408 | { |
409 | u32 savefid = data->currfid; | |
410 | u32 savereqvid = reqvid; | |
411 | ||
2d06d8c4 | 412 | pr_debug("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
413 | smp_processor_id(), |
414 | data->currfid, data->currvid); | |
415 | ||
416 | if (reqvid != data->currvid) { | |
417 | if (write_new_vid(data, reqvid)) | |
418 | return 1; | |
419 | ||
420 | if (savefid != data->currfid) { | |
e54173b4 SK |
421 | pr_err("ph3: bad fid change, save 0x%x, curr 0x%x\n", |
422 | savefid, data->currfid); | |
1da177e4 LT |
423 | return 1; |
424 | } | |
425 | ||
426 | if (data->currvid != reqvid) { | |
e54173b4 SK |
427 | pr_err("ph3: failed vid transition\n, req 0x%x, curr 0x%x", |
428 | reqvid, data->currvid); | |
1da177e4 LT |
429 | return 1; |
430 | } | |
431 | } | |
432 | ||
433 | if (query_current_values_with_pending_wait(data)) | |
434 | return 1; | |
435 | ||
436 | if (savereqvid != data->currvid) { | |
2d06d8c4 | 437 | pr_debug("ph3 failed, currvid 0x%x\n", data->currvid); |
1da177e4 LT |
438 | return 1; |
439 | } | |
440 | ||
441 | if (savefid != data->currfid) { | |
2d06d8c4 | 442 | pr_debug("ph3 failed, currfid changed 0x%x\n", |
1da177e4 LT |
443 | data->currfid); |
444 | return 1; | |
445 | } | |
446 | ||
2d06d8c4 | 447 | pr_debug("ph3 complete, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
448 | data->currfid, data->currvid); |
449 | ||
450 | return 0; | |
451 | } | |
452 | ||
fa8031ae AK |
453 | static const struct x86_cpu_id powernow_k8_ids[] = { |
454 | /* IO based frequency switching */ | |
b11d77fa | 455 | X86_MATCH_VENDOR_FAM(AMD, 0xf, NULL), |
fa8031ae AK |
456 | {} |
457 | }; | |
458 | MODULE_DEVICE_TABLE(x86cpu, powernow_k8_ids); | |
459 | ||
1ff6e97f | 460 | static void check_supported_cpu(void *_rc) |
1da177e4 | 461 | { |
1da177e4 | 462 | u32 eax, ebx, ecx, edx; |
1ff6e97f | 463 | int *rc = _rc; |
1da177e4 | 464 | |
1ff6e97f | 465 | *rc = -ENODEV; |
1da177e4 | 466 | |
1da177e4 | 467 | eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
2c906ae6 | 468 | |
1f729e06 DJ |
469 | if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) { |
470 | if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) || | |
99fbe1ac | 471 | ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) { |
e54173b4 | 472 | pr_info("Processor cpuid %x not supported\n", eax); |
1ff6e97f | 473 | return; |
1f729e06 | 474 | } |
1da177e4 | 475 | |
1f729e06 DJ |
476 | eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES); |
477 | if (eax < CPUID_FREQ_VOLT_CAPABILITIES) { | |
e54173b4 | 478 | pr_info("No frequency change capabilities detected\n"); |
1ff6e97f | 479 | return; |
1f729e06 | 480 | } |
1da177e4 | 481 | |
1f729e06 | 482 | cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); |
0e64a0c9 DJ |
483 | if ((edx & P_STATE_TRANSITION_CAPABLE) |
484 | != P_STATE_TRANSITION_CAPABLE) { | |
e54173b4 | 485 | pr_info("Power state transitions not supported\n"); |
1ff6e97f | 486 | return; |
1f729e06 | 487 | } |
e1f0b8e9 | 488 | *rc = 0; |
1da177e4 | 489 | } |
1da177e4 LT |
490 | } |
491 | ||
0e64a0c9 DJ |
492 | static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, |
493 | u8 maxvid) | |
1da177e4 LT |
494 | { |
495 | unsigned int j; | |
496 | u8 lastfid = 0xff; | |
497 | ||
498 | for (j = 0; j < data->numps; j++) { | |
499 | if (pst[j].vid > LEAST_VID) { | |
e54173b4 SK |
500 | pr_err(FW_BUG "vid %d invalid : 0x%x\n", j, |
501 | pst[j].vid); | |
1da177e4 LT |
502 | return -EINVAL; |
503 | } | |
0e64a0c9 DJ |
504 | if (pst[j].vid < data->rvo) { |
505 | /* vid + rvo >= 0 */ | |
e54173b4 | 506 | pr_err(FW_BUG "0 vid exceeded with pstate %d\n", j); |
1da177e4 LT |
507 | return -ENODEV; |
508 | } | |
0e64a0c9 DJ |
509 | if (pst[j].vid < maxvid + data->rvo) { |
510 | /* vid + rvo >= maxvid */ | |
e54173b4 | 511 | pr_err(FW_BUG "maxvid exceeded with pstate %d\n", j); |
1da177e4 LT |
512 | return -ENODEV; |
513 | } | |
8aae8284 | 514 | if (pst[j].fid > MAX_FID) { |
e54173b4 | 515 | pr_err(FW_BUG "maxfid exceeded with pstate %d\n", j); |
8aae8284 JS |
516 | return -ENODEV; |
517 | } | |
8aae8284 | 518 | if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) { |
1da177e4 | 519 | /* Only first fid is allowed to be in "low" range */ |
e54173b4 SK |
520 | pr_err(FW_BUG "two low fids - %d : 0x%x\n", j, |
521 | pst[j].fid); | |
1da177e4 LT |
522 | return -EINVAL; |
523 | } | |
524 | if (pst[j].fid < lastfid) | |
525 | lastfid = pst[j].fid; | |
526 | } | |
527 | if (lastfid & 1) { | |
e54173b4 | 528 | pr_err(FW_BUG "lastfid invalid\n"); |
1da177e4 LT |
529 | return -EINVAL; |
530 | } | |
531 | if (lastfid > LO_FID_TABLE_TOP) | |
e54173b4 | 532 | pr_info(FW_BUG "first fid not from lo freq table\n"); |
1da177e4 LT |
533 | |
534 | return 0; | |
535 | } | |
536 | ||
f0adb134 KR |
537 | static void invalidate_entry(struct cpufreq_frequency_table *powernow_table, |
538 | unsigned int entry) | |
0e64a0c9 | 539 | { |
f0adb134 | 540 | powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID; |
0e64a0c9 DJ |
541 | } |
542 | ||
1da177e4 LT |
543 | static void print_basics(struct powernow_k8_data *data) |
544 | { | |
545 | int j; | |
546 | for (j = 0; j < data->numps; j++) { | |
0e64a0c9 DJ |
547 | if (data->powernow_table[j].frequency != |
548 | CPUFREQ_ENTRY_INVALID) { | |
e54173b4 SK |
549 | pr_info("fid 0x%x (%d MHz), vid 0x%x\n", |
550 | data->powernow_table[j].driver_data & 0xff, | |
551 | data->powernow_table[j].frequency/1000, | |
552 | data->powernow_table[j].driver_data >> 8); | |
1f729e06 | 553 | } |
1da177e4 LT |
554 | } |
555 | if (data->batps) | |
e54173b4 | 556 | pr_info("Only %d pstates on battery\n", data->batps); |
1da177e4 LT |
557 | } |
558 | ||
0e64a0c9 DJ |
559 | static int fill_powernow_table(struct powernow_k8_data *data, |
560 | struct pst_s *pst, u8 maxvid) | |
1da177e4 LT |
561 | { |
562 | struct cpufreq_frequency_table *powernow_table; | |
563 | unsigned int j; | |
564 | ||
0e64a0c9 DJ |
565 | if (data->batps) { |
566 | /* use ACPI support to get full speed on mains power */ | |
e54173b4 SK |
567 | pr_warn("Only %d pstates usable (use ACPI driver for full range\n", |
568 | data->batps); | |
1da177e4 LT |
569 | data->numps = data->batps; |
570 | } | |
571 | ||
0e64a0c9 | 572 | for (j = 1; j < data->numps; j++) { |
1da177e4 | 573 | if (pst[j-1].fid >= pst[j].fid) { |
e54173b4 | 574 | pr_err("PST out of sequence\n"); |
1da177e4 LT |
575 | return -EINVAL; |
576 | } | |
577 | } | |
578 | ||
579 | if (data->numps < 2) { | |
e54173b4 | 580 | pr_err("no p states to transition\n"); |
1da177e4 LT |
581 | return -ENODEV; |
582 | } | |
583 | ||
584 | if (check_pst_table(data, pst, maxvid)) | |
585 | return -EINVAL; | |
586 | ||
71508a1f | 587 | powernow_table = kzalloc((sizeof(*powernow_table) |
1da177e4 | 588 | * (data->numps + 1)), GFP_KERNEL); |
7f3a1d66 | 589 | if (!powernow_table) |
1da177e4 | 590 | return -ENOMEM; |
1da177e4 LT |
591 | |
592 | for (j = 0; j < data->numps; j++) { | |
0e64a0c9 | 593 | int freq; |
50701588 VK |
594 | powernow_table[j].driver_data = pst[j].fid; /* lower 8 bits */ |
595 | powernow_table[j].driver_data |= (pst[j].vid << 8); /* upper 8 bits */ | |
0e64a0c9 DJ |
596 | freq = find_khz_freq_from_fid(pst[j].fid); |
597 | powernow_table[j].frequency = freq; | |
1da177e4 LT |
598 | } |
599 | powernow_table[data->numps].frequency = CPUFREQ_TABLE_END; | |
50701588 | 600 | powernow_table[data->numps].driver_data = 0; |
1da177e4 LT |
601 | |
602 | if (query_current_values_with_pending_wait(data)) { | |
603 | kfree(powernow_table); | |
604 | return -EIO; | |
605 | } | |
606 | ||
2d06d8c4 | 607 | pr_debug("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid); |
1da177e4 | 608 | data->powernow_table = powernow_table; |
38c52e63 | 609 | if (cpumask_first(topology_core_cpumask(data->cpu)) == data->cpu) |
2e497620 | 610 | print_basics(data); |
1da177e4 LT |
611 | |
612 | for (j = 0; j < data->numps; j++) | |
0e64a0c9 DJ |
613 | if ((pst[j].fid == data->currfid) && |
614 | (pst[j].vid == data->currvid)) | |
1da177e4 LT |
615 | return 0; |
616 | ||
2d06d8c4 | 617 | pr_debug("currfid/vid do not match PST, ignoring\n"); |
1da177e4 LT |
618 | return 0; |
619 | } | |
620 | ||
621 | /* Find and validate the PSB/PST table in BIOS. */ | |
622 | static int find_psb_table(struct powernow_k8_data *data) | |
623 | { | |
624 | struct psb_s *psb; | |
625 | unsigned int i; | |
626 | u32 mvs; | |
627 | u8 maxvid; | |
628 | u32 cpst = 0; | |
629 | u32 thiscpuid; | |
630 | ||
631 | for (i = 0xc0000; i < 0xffff0; i += 0x10) { | |
632 | /* Scan BIOS looking for the signature. */ | |
633 | /* It can not be at ffff0 - it is too big. */ | |
634 | ||
635 | psb = phys_to_virt(i); | |
636 | if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0) | |
637 | continue; | |
638 | ||
2d06d8c4 | 639 | pr_debug("found PSB header at 0x%p\n", psb); |
1da177e4 | 640 | |
2d06d8c4 | 641 | pr_debug("table vers: 0x%x\n", psb->tableversion); |
1da177e4 | 642 | if (psb->tableversion != PSB_VERSION_1_4) { |
e54173b4 | 643 | pr_err(FW_BUG "PSB table is not v1.4\n"); |
1da177e4 LT |
644 | return -ENODEV; |
645 | } | |
646 | ||
2d06d8c4 | 647 | pr_debug("flags: 0x%x\n", psb->flags1); |
1da177e4 | 648 | if (psb->flags1) { |
e54173b4 | 649 | pr_err(FW_BUG "unknown flags\n"); |
1da177e4 LT |
650 | return -ENODEV; |
651 | } | |
652 | ||
653 | data->vstable = psb->vstable; | |
2d06d8c4 | 654 | pr_debug("voltage stabilization time: %d(*20us)\n", |
0e64a0c9 | 655 | data->vstable); |
1da177e4 | 656 | |
2d06d8c4 | 657 | pr_debug("flags2: 0x%x\n", psb->flags2); |
1da177e4 LT |
658 | data->rvo = psb->flags2 & 3; |
659 | data->irt = ((psb->flags2) >> 2) & 3; | |
660 | mvs = ((psb->flags2) >> 4) & 3; | |
661 | data->vidmvs = 1 << mvs; | |
662 | data->batps = ((psb->flags2) >> 6) & 3; | |
663 | ||
2d06d8c4 DB |
664 | pr_debug("ramp voltage offset: %d\n", data->rvo); |
665 | pr_debug("isochronous relief time: %d\n", data->irt); | |
666 | pr_debug("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs); | |
1da177e4 | 667 | |
2d06d8c4 | 668 | pr_debug("numpst: 0x%x\n", psb->num_tables); |
1da177e4 | 669 | cpst = psb->num_tables; |
0e64a0c9 DJ |
670 | if ((psb->cpuid == 0x00000fc0) || |
671 | (psb->cpuid == 0x00000fe0)) { | |
1da177e4 | 672 | thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
0e64a0c9 DJ |
673 | if ((thiscpuid == 0x00000fc0) || |
674 | (thiscpuid == 0x00000fe0)) | |
1da177e4 | 675 | cpst = 1; |
1da177e4 LT |
676 | } |
677 | if (cpst != 1) { | |
e54173b4 | 678 | pr_err(FW_BUG "numpst must be 1\n"); |
1da177e4 LT |
679 | return -ENODEV; |
680 | } | |
681 | ||
682 | data->plllock = psb->plllocktime; | |
2d06d8c4 DB |
683 | pr_debug("plllocktime: 0x%x (units 1us)\n", psb->plllocktime); |
684 | pr_debug("maxfid: 0x%x\n", psb->maxfid); | |
685 | pr_debug("maxvid: 0x%x\n", psb->maxvid); | |
1da177e4 LT |
686 | maxvid = psb->maxvid; |
687 | ||
688 | data->numps = psb->numps; | |
2d06d8c4 | 689 | pr_debug("numpstates: 0x%x\n", data->numps); |
0e64a0c9 DJ |
690 | return fill_powernow_table(data, |
691 | (struct pst_s *)(psb+1), maxvid); | |
1da177e4 LT |
692 | } |
693 | /* | |
694 | * If you see this message, complain to BIOS manufacturer. If | |
695 | * he tells you "we do not support Linux" or some similar | |
696 | * nonsense, remember that Windows 2000 uses the same legacy | |
697 | * mechanism that the old Linux PSB driver uses. Tell them it | |
698 | * is broken with Windows 2000. | |
699 | * | |
700 | * The reference to the AMD documentation is chapter 9 in the | |
701 | * BIOS and Kernel Developer's Guide, which is available on | |
702 | * www.amd.com | |
703 | */ | |
e54173b4 SK |
704 | pr_err(FW_BUG "No PSB or ACPI _PSS objects\n"); |
705 | pr_err("Make sure that your BIOS is up to date and Cool'N'Quiet support is enabled in BIOS setup\n"); | |
1da177e4 LT |
706 | return -ENODEV; |
707 | } | |
708 | ||
0e64a0c9 DJ |
709 | static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, |
710 | unsigned int index) | |
1da177e4 | 711 | { |
439913ff | 712 | u64 control; |
0e64a0c9 | 713 | |
e1f0b8e9 | 714 | if (!data->acpi_data.state_count) |
1da177e4 LT |
715 | return; |
716 | ||
21335d02 LH |
717 | control = data->acpi_data.states[index].control; |
718 | data->irt = (control >> IRT_SHIFT) & IRT_MASK; | |
719 | data->rvo = (control >> RVO_SHIFT) & RVO_MASK; | |
720 | data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK; | |
721 | data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK; | |
722 | data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK); | |
723 | data->vstable = (control >> VST_SHIFT) & VST_MASK; | |
724 | } | |
1da177e4 LT |
725 | |
726 | static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) | |
727 | { | |
1da177e4 | 728 | struct cpufreq_frequency_table *powernow_table; |
2fdf66b4 | 729 | int ret_val = -ENODEV; |
439913ff | 730 | u64 control, status; |
1da177e4 | 731 | |
f607e3a0 | 732 | if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) { |
2d06d8c4 | 733 | pr_debug("register performance failed: bad ACPI data\n"); |
1da177e4 LT |
734 | return -EIO; |
735 | } | |
736 | ||
737 | /* verify the data contained in the ACPI structures */ | |
f607e3a0 | 738 | if (data->acpi_data.state_count <= 1) { |
2d06d8c4 | 739 | pr_debug("No ACPI P-States\n"); |
1da177e4 LT |
740 | goto err_out; |
741 | } | |
742 | ||
2c701b10 DJ |
743 | control = data->acpi_data.control_register.space_id; |
744 | status = data->acpi_data.status_register.space_id; | |
745 | ||
746 | if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) || | |
747 | (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) { | |
2d06d8c4 | 748 | pr_debug("Invalid control/status registers (%llx - %llx)\n", |
2c701b10 | 749 | control, status); |
1da177e4 LT |
750 | goto err_out; |
751 | } | |
752 | ||
753 | /* fill in data->powernow_table */ | |
71508a1f | 754 | powernow_table = kzalloc((sizeof(*powernow_table) |
f607e3a0 | 755 | * (data->acpi_data.state_count + 1)), GFP_KERNEL); |
7f3a1d66 | 756 | if (!powernow_table) |
1da177e4 | 757 | goto err_out; |
1da177e4 | 758 | |
db39d552 ML |
759 | /* fill in data */ |
760 | data->numps = data->acpi_data.state_count; | |
761 | powernow_k8_acpi_pst_values(data, 0); | |
762 | ||
e1f0b8e9 | 763 | ret_val = fill_powernow_table_fidvid(data, powernow_table); |
1f729e06 DJ |
764 | if (ret_val) |
765 | goto err_out_mem; | |
766 | ||
0e64a0c9 DJ |
767 | powernow_table[data->acpi_data.state_count].frequency = |
768 | CPUFREQ_TABLE_END; | |
1f729e06 DJ |
769 | data->powernow_table = powernow_table; |
770 | ||
38c52e63 | 771 | if (cpumask_first(topology_core_cpumask(data->cpu)) == data->cpu) |
2e497620 | 772 | print_basics(data); |
1f729e06 DJ |
773 | |
774 | /* notify BIOS that we exist */ | |
775 | acpi_processor_notify_smm(THIS_MODULE); | |
776 | ||
eaa95840 | 777 | if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) { |
e54173b4 | 778 | pr_err("unable to alloc powernow_k8_data cpumask\n"); |
2fdf66b4 RR |
779 | ret_val = -ENOMEM; |
780 | goto err_out_mem; | |
781 | } | |
782 | ||
1f729e06 DJ |
783 | return 0; |
784 | ||
785 | err_out_mem: | |
786 | kfree(powernow_table); | |
787 | ||
788 | err_out: | |
b2f8dc4c | 789 | acpi_processor_unregister_performance(data->cpu); |
1f729e06 | 790 | |
0e64a0c9 DJ |
791 | /* data->acpi_data.state_count informs us at ->exit() |
792 | * whether ACPI was used */ | |
f607e3a0 | 793 | data->acpi_data.state_count = 0; |
1f729e06 | 794 | |
2fdf66b4 | 795 | return ret_val; |
1f729e06 DJ |
796 | } |
797 | ||
0e64a0c9 DJ |
798 | static int fill_powernow_table_fidvid(struct powernow_k8_data *data, |
799 | struct cpufreq_frequency_table *powernow_table) | |
1f729e06 DJ |
800 | { |
801 | int i; | |
0e64a0c9 | 802 | |
f607e3a0 | 803 | for (i = 0; i < data->acpi_data.state_count; i++) { |
094ce7fd DJ |
804 | u32 fid; |
805 | u32 vid; | |
0e64a0c9 | 806 | u32 freq, index; |
439913ff | 807 | u64 status, control; |
094ce7fd DJ |
808 | |
809 | if (data->exttype) { | |
0e64a0c9 DJ |
810 | status = data->acpi_data.states[i].status; |
811 | fid = status & EXT_FID_MASK; | |
812 | vid = (status >> VID_SHIFT) & EXT_VID_MASK; | |
841e40b3 | 813 | } else { |
0e64a0c9 DJ |
814 | control = data->acpi_data.states[i].control; |
815 | fid = control & FID_MASK; | |
816 | vid = (control >> VID_SHIFT) & VID_MASK; | |
841e40b3 | 817 | } |
1da177e4 | 818 | |
2d06d8c4 | 819 | pr_debug(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid); |
1da177e4 | 820 | |
0e64a0c9 | 821 | index = fid | (vid<<8); |
50701588 | 822 | powernow_table[i].driver_data = index; |
0e64a0c9 DJ |
823 | |
824 | freq = find_khz_freq_from_fid(fid); | |
825 | powernow_table[i].frequency = freq; | |
1da177e4 LT |
826 | |
827 | /* verify frequency is OK */ | |
0e64a0c9 | 828 | if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) { |
2d06d8c4 | 829 | pr_debug("invalid freq %u kHz, ignoring\n", freq); |
f0adb134 | 830 | invalidate_entry(powernow_table, i); |
1da177e4 LT |
831 | continue; |
832 | } | |
833 | ||
0e64a0c9 DJ |
834 | /* verify voltage is OK - |
835 | * BIOSs are using "off" to indicate invalid */ | |
841e40b3 | 836 | if (vid == VID_OFF) { |
2d06d8c4 | 837 | pr_debug("invalid vid %u, ignoring\n", vid); |
f0adb134 | 838 | invalidate_entry(powernow_table, i); |
1da177e4 LT |
839 | continue; |
840 | } | |
841 | ||
0e64a0c9 | 842 | if (freq != (data->acpi_data.states[i].core_frequency * 1000)) { |
e54173b4 SK |
843 | pr_info("invalid freq entries %u kHz vs. %u kHz\n", |
844 | freq, (unsigned int) | |
0e64a0c9 DJ |
845 | (data->acpi_data.states[i].core_frequency |
846 | * 1000)); | |
f0adb134 | 847 | invalidate_entry(powernow_table, i); |
1da177e4 LT |
848 | continue; |
849 | } | |
850 | } | |
1da177e4 | 851 | return 0; |
1da177e4 LT |
852 | } |
853 | ||
854 | static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) | |
855 | { | |
f607e3a0 | 856 | if (data->acpi_data.state_count) |
b2f8dc4c | 857 | acpi_processor_unregister_performance(data->cpu); |
2fdf66b4 | 858 | free_cpumask_var(data->acpi_data.shared_cpu_map); |
1da177e4 LT |
859 | } |
860 | ||
732553e5 ML |
861 | static int get_transition_latency(struct powernow_k8_data *data) |
862 | { | |
863 | int max_latency = 0; | |
864 | int i; | |
865 | for (i = 0; i < data->acpi_data.state_count; i++) { | |
866 | int cur_latency = data->acpi_data.states[i].transition_latency | |
867 | + data->acpi_data.states[i].bus_master_latency; | |
868 | if (cur_latency > max_latency) | |
869 | max_latency = cur_latency; | |
870 | } | |
86e13684 | 871 | if (max_latency == 0) { |
e54173b4 | 872 | pr_err(FW_WARN "Invalid zero transition latency\n"); |
86e13684 TR |
873 | max_latency = 1; |
874 | } | |
732553e5 ML |
875 | /* value in usecs, needs to be in nanoseconds */ |
876 | return 1000 * max_latency; | |
877 | } | |
878 | ||
1da177e4 | 879 | /* Take a frequency, and issue the fid/vid transition command */ |
0e64a0c9 | 880 | static int transition_frequency_fidvid(struct powernow_k8_data *data, |
943bdd0c CIK |
881 | unsigned int index, |
882 | struct cpufreq_policy *policy) | |
1da177e4 | 883 | { |
1f729e06 DJ |
884 | u32 fid = 0; |
885 | u32 vid = 0; | |
b43a7ffb | 886 | int res; |
1da177e4 LT |
887 | struct cpufreq_freqs freqs; |
888 | ||
2d06d8c4 | 889 | pr_debug("cpu %d transition to index %u\n", smp_processor_id(), index); |
1da177e4 | 890 | |
1f729e06 | 891 | /* fid/vid correctness check for k8 */ |
1da177e4 | 892 | /* fid are the lower 8 bits of the index we stored into |
1f729e06 DJ |
893 | * the cpufreq frequency table in find_psb_table, vid |
894 | * are the upper 8 bits. | |
1da177e4 | 895 | */ |
50701588 VK |
896 | fid = data->powernow_table[index].driver_data & 0xFF; |
897 | vid = (data->powernow_table[index].driver_data & 0xFF00) >> 8; | |
1da177e4 | 898 | |
2d06d8c4 | 899 | pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid); |
1da177e4 LT |
900 | |
901 | if (query_current_values_with_pending_wait(data)) | |
902 | return 1; | |
903 | ||
904 | if ((data->currvid == vid) && (data->currfid == fid)) { | |
2d06d8c4 | 905 | pr_debug("target matches current values (fid 0x%x, vid 0x%x)\n", |
1da177e4 LT |
906 | fid, vid); |
907 | return 0; | |
908 | } | |
909 | ||
2d06d8c4 | 910 | pr_debug("cpu %d, changing to fid 0x%x, vid 0x%x\n", |
1da177e4 | 911 | smp_processor_id(), fid, vid); |
1da177e4 LT |
912 | freqs.old = find_khz_freq_from_fid(data->currfid); |
913 | freqs.new = find_khz_freq_from_fid(fid); | |
1f729e06 | 914 | |
8fec051e | 915 | cpufreq_freq_transition_begin(policy, &freqs); |
1da177e4 | 916 | res = transition_fid_vid(data, fid, vid); |
8fec051e | 917 | cpufreq_freq_transition_end(policy, &freqs, res); |
1f729e06 | 918 | |
1f729e06 DJ |
919 | return res; |
920 | } | |
921 | ||
6889125b TH |
922 | struct powernowk8_target_arg { |
923 | struct cpufreq_policy *pol; | |
9c0ebcf7 | 924 | unsigned newstate; |
6889125b TH |
925 | }; |
926 | ||
927 | static long powernowk8_target_fn(void *arg) | |
1da177e4 | 928 | { |
6889125b TH |
929 | struct powernowk8_target_arg *pta = arg; |
930 | struct cpufreq_policy *pol = pta->pol; | |
9c0ebcf7 | 931 | unsigned newstate = pta->newstate; |
2c6b8c03 | 932 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
9180053c AB |
933 | u32 checkfid; |
934 | u32 checkvid; | |
6889125b | 935 | int ret; |
1da177e4 | 936 | |
4211a303 JS |
937 | if (!data) |
938 | return -EINVAL; | |
939 | ||
9180053c AB |
940 | checkfid = data->currfid; |
941 | checkvid = data->currvid; | |
942 | ||
1da177e4 | 943 | if (pending_bit_stuck()) { |
e54173b4 | 944 | pr_err("failing targ, change pending bit set\n"); |
6889125b | 945 | return -EIO; |
1da177e4 LT |
946 | } |
947 | ||
9c0ebcf7 VK |
948 | pr_debug("targ: cpu %d, %d kHz, min %d, max %d\n", |
949 | pol->cpu, data->powernow_table[newstate].frequency, pol->min, | |
950 | pol->max); | |
1da177e4 | 951 | |
83844510 | 952 | if (query_current_values_with_pending_wait(data)) |
6889125b | 953 | return -EIO; |
1da177e4 | 954 | |
e1f0b8e9 | 955 | pr_debug("targ: curr fid 0x%x, vid 0x%x\n", |
e54173b4 | 956 | data->currfid, data->currvid); |
1da177e4 | 957 | |
e1f0b8e9 MG |
958 | if ((checkvid != data->currvid) || |
959 | (checkfid != data->currfid)) { | |
e54173b4 | 960 | pr_info("error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n", |
e1f0b8e9 MG |
961 | checkfid, data->currfid, |
962 | checkvid, data->currvid); | |
1da177e4 LT |
963 | } |
964 | ||
14cc3e2b | 965 | mutex_lock(&fidvid_mutex); |
065b807c | 966 | |
1da177e4 LT |
967 | powernow_k8_acpi_pst_values(data, newstate); |
968 | ||
943bdd0c | 969 | ret = transition_frequency_fidvid(data, newstate, pol); |
e1f0b8e9 | 970 | |
1f729e06 | 971 | if (ret) { |
e54173b4 | 972 | pr_err("transition frequency failed\n"); |
14cc3e2b | 973 | mutex_unlock(&fidvid_mutex); |
6889125b | 974 | return 1; |
1da177e4 | 975 | } |
14cc3e2b | 976 | mutex_unlock(&fidvid_mutex); |
065b807c | 977 | |
e1f0b8e9 | 978 | pol->cur = find_khz_freq_from_fid(data->currfid); |
1da177e4 | 979 | |
6889125b TH |
980 | return 0; |
981 | } | |
982 | ||
983 | /* Driver entry point to switch to the target frequency */ | |
9c0ebcf7 | 984 | static int powernowk8_target(struct cpufreq_policy *pol, unsigned index) |
6889125b | 985 | { |
9c0ebcf7 | 986 | struct powernowk8_target_arg pta = { .pol = pol, .newstate = index }; |
6889125b | 987 | |
e4df1cbc | 988 | return work_on_cpu(pol->cpu, powernowk8_target_fn, &pta); |
1da177e4 LT |
989 | } |
990 | ||
1ff6e97f RR |
991 | struct init_on_cpu { |
992 | struct powernow_k8_data *data; | |
993 | int rc; | |
994 | }; | |
995 | ||
2760984f | 996 | static void powernowk8_cpu_init_on_cpu(void *_init_on_cpu) |
1ff6e97f RR |
997 | { |
998 | struct init_on_cpu *init_on_cpu = _init_on_cpu; | |
999 | ||
1000 | if (pending_bit_stuck()) { | |
e54173b4 | 1001 | pr_err("failing init, change pending bit set\n"); |
1ff6e97f RR |
1002 | init_on_cpu->rc = -ENODEV; |
1003 | return; | |
1004 | } | |
1005 | ||
1006 | if (query_current_values_with_pending_wait(init_on_cpu->data)) { | |
1007 | init_on_cpu->rc = -ENODEV; | |
1008 | return; | |
1009 | } | |
1010 | ||
e1f0b8e9 | 1011 | fidvid_msr_init(); |
1ff6e97f RR |
1012 | |
1013 | init_on_cpu->rc = 0; | |
1014 | } | |
1015 | ||
e54173b4 SK |
1016 | #define MISSING_PSS_MSG \ |
1017 | FW_BUG "No compatible ACPI _PSS objects found.\n" \ | |
1018 | FW_BUG "First, make sure Cool'N'Quiet is enabled in the BIOS.\n" \ | |
1019 | FW_BUG "If that doesn't help, try upgrading your BIOS.\n" | |
56835e6c | 1020 | |
1da177e4 | 1021 | /* per CPU init entry point to the driver */ |
2760984f | 1022 | static int powernowk8_cpu_init(struct cpufreq_policy *pol) |
1da177e4 LT |
1023 | { |
1024 | struct powernow_k8_data *data; | |
1ff6e97f | 1025 | struct init_on_cpu init_on_cpu; |
c3274763 | 1026 | int rc, cpu; |
1da177e4 | 1027 | |
1ff6e97f RR |
1028 | smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1); |
1029 | if (rc) | |
1da177e4 LT |
1030 | return -ENODEV; |
1031 | ||
d5b73cd8 | 1032 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
7f3a1d66 | 1033 | if (!data) |
1da177e4 | 1034 | return -ENOMEM; |
1da177e4 LT |
1035 | |
1036 | data->cpu = pol->cpu; | |
1037 | ||
a0abd520 | 1038 | if (powernow_k8_cpu_init_acpi(data)) { |
1da177e4 | 1039 | /* |
0d2eb44f | 1040 | * Use the PSB BIOS structure. This is only available on |
1da177e4 LT |
1041 | * an UP version, and is deprecated by AMD. |
1042 | */ | |
9ed059e1 | 1043 | if (num_online_cpus() != 1) { |
e54173b4 | 1044 | pr_err_once(MISSING_PSS_MSG); |
0cb8bc25 | 1045 | goto err_out; |
1da177e4 LT |
1046 | } |
1047 | if (pol->cpu != 0) { | |
e54173b4 | 1048 | pr_err(FW_BUG "No ACPI _PSS objects for CPU other than CPU0. Complain to your BIOS vendor.\n"); |
0cb8bc25 | 1049 | goto err_out; |
1da177e4 LT |
1050 | } |
1051 | rc = find_psb_table(data); | |
0cb8bc25 DJ |
1052 | if (rc) |
1053 | goto err_out; | |
1054 | ||
732553e5 ML |
1055 | /* Take a crude guess here. |
1056 | * That guess was in microseconds, so multiply with 1000 */ | |
1057 | pol->cpuinfo.transition_latency = ( | |
1058 | ((data->rvo + 8) * data->vstable * VST_UNITS_20US) + | |
1059 | ((1 << data->irt) * 30)) * 1000; | |
1060 | } else /* ACPI _PSS objects available */ | |
1061 | pol->cpuinfo.transition_latency = get_transition_latency(data); | |
1da177e4 LT |
1062 | |
1063 | /* only run on specific CPU from here on */ | |
1ff6e97f RR |
1064 | init_on_cpu.data = data; |
1065 | smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu, | |
1066 | &init_on_cpu, 1); | |
1067 | rc = init_on_cpu.rc; | |
1068 | if (rc != 0) | |
1069 | goto err_out_exit_acpi; | |
1da177e4 | 1070 | |
38c52e63 | 1071 | cpumask_copy(pol->cpus, topology_core_cpumask(pol->cpu)); |
835481d9 | 1072 | data->available_cores = pol->cpus; |
e2376d1f | 1073 | pol->freq_table = data->powernow_table; |
1da177e4 | 1074 | |
e1f0b8e9 | 1075 | pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n", |
e54173b4 | 1076 | data->currfid, data->currvid); |
1da177e4 | 1077 | |
c3274763 SB |
1078 | /* Point all the CPUs in this policy to the same data */ |
1079 | for_each_cpu(cpu, pol->cpus) | |
1080 | per_cpu(powernow_data, cpu) = data; | |
1da177e4 LT |
1081 | |
1082 | return 0; | |
1083 | ||
1ff6e97f | 1084 | err_out_exit_acpi: |
1da177e4 LT |
1085 | powernow_k8_cpu_exit_acpi(data); |
1086 | ||
0cb8bc25 | 1087 | err_out: |
1da177e4 LT |
1088 | kfree(data); |
1089 | return -ENODEV; | |
1090 | } | |
1091 | ||
c0e61cb1 | 1092 | static int powernowk8_cpu_exit(struct cpufreq_policy *pol) |
1da177e4 | 1093 | { |
2c6b8c03 | 1094 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
c3274763 | 1095 | int cpu; |
1da177e4 LT |
1096 | |
1097 | if (!data) | |
1098 | return -EINVAL; | |
1099 | ||
1100 | powernow_k8_cpu_exit_acpi(data); | |
1101 | ||
1da177e4 LT |
1102 | kfree(data->powernow_table); |
1103 | kfree(data); | |
03997da0 LC |
1104 | /* pol->cpus will be empty here, use related_cpus instead. */ |
1105 | for_each_cpu(cpu, pol->related_cpus) | |
c3274763 | 1106 | per_cpu(powernow_data, cpu) = NULL; |
1da177e4 LT |
1107 | |
1108 | return 0; | |
1109 | } | |
1110 | ||
1ff6e97f RR |
1111 | static void query_values_on_cpu(void *_err) |
1112 | { | |
1113 | int *err = _err; | |
0a3aee0d | 1114 | struct powernow_k8_data *data = __this_cpu_read(powernow_data); |
1ff6e97f RR |
1115 | |
1116 | *err = query_current_values_with_pending_wait(data); | |
1117 | } | |
1118 | ||
0e64a0c9 | 1119 | static unsigned int powernowk8_get(unsigned int cpu) |
1da177e4 | 1120 | { |
e15bc455 | 1121 | struct powernow_k8_data *data = per_cpu(powernow_data, cpu); |
1da177e4 | 1122 | unsigned int khz = 0; |
1ff6e97f | 1123 | int err; |
eef5167e | 1124 | |
1125 | if (!data) | |
557a701c | 1126 | return 0; |
eef5167e | 1127 | |
1ff6e97f RR |
1128 | smp_call_function_single(cpu, query_values_on_cpu, &err, true); |
1129 | if (err) | |
1da177e4 LT |
1130 | goto out; |
1131 | ||
e1f0b8e9 | 1132 | khz = find_khz_freq_from_fid(data->currfid); |
58389a86 | 1133 | |
1da177e4 | 1134 | |
b9111b7b | 1135 | out: |
1da177e4 LT |
1136 | return khz; |
1137 | } | |
1138 | ||
221dee28 | 1139 | static struct cpufreq_driver cpufreq_amd64_driver = { |
7dbf694d | 1140 | .flags = CPUFREQ_ASYNC_NOTIFICATION, |
d63bd27f | 1141 | .verify = cpufreq_generic_frequency_table_verify, |
9c0ebcf7 | 1142 | .target_index = powernowk8_target, |
e2f74f35 TR |
1143 | .bios_limit = acpi_processor_get_bios_limit, |
1144 | .init = powernowk8_cpu_init, | |
ce2650d4 | 1145 | .exit = powernowk8_cpu_exit, |
e2f74f35 TR |
1146 | .get = powernowk8_get, |
1147 | .name = "powernow-k8", | |
d63bd27f | 1148 | .attr = cpufreq_generic_attr, |
1da177e4 LT |
1149 | }; |
1150 | ||
4827ea6e BP |
1151 | static void __request_acpi_cpufreq(void) |
1152 | { | |
06324664 KC |
1153 | const char drv[] = "acpi-cpufreq"; |
1154 | const char *cur_drv; | |
4827ea6e BP |
1155 | |
1156 | cur_drv = cpufreq_get_current_driver(); | |
1157 | if (!cur_drv) | |
1158 | goto request; | |
1159 | ||
1160 | if (strncmp(cur_drv, drv, min_t(size_t, strlen(cur_drv), strlen(drv)))) | |
e54173b4 | 1161 | pr_warn("WTF driver: %s\n", cur_drv); |
4827ea6e BP |
1162 | |
1163 | return; | |
1164 | ||
1165 | request: | |
e54173b4 | 1166 | pr_warn("This CPU is not supported anymore, using acpi-cpufreq instead.\n"); |
4827ea6e BP |
1167 | request_module(drv); |
1168 | } | |
1169 | ||
1da177e4 | 1170 | /* driver entry point for init */ |
2760984f | 1171 | static int powernowk8_init(void) |
1da177e4 | 1172 | { |
e1f0b8e9 | 1173 | unsigned int i, supported_cpus = 0; |
c0939e46 | 1174 | int ret; |
1da177e4 | 1175 | |
3870a44d ML |
1176 | if (!x86_match_cpu(powernow_k8_ids)) |
1177 | return -ENODEV; | |
1178 | ||
108ec36b | 1179 | if (boot_cpu_has(X86_FEATURE_HW_PSTATE)) { |
4827ea6e | 1180 | __request_acpi_cpufreq(); |
fa8031ae | 1181 | return -ENODEV; |
e1f0b8e9 | 1182 | } |
fa8031ae | 1183 | |
09681a07 | 1184 | cpus_read_lock(); |
a7201156 | 1185 | for_each_online_cpu(i) { |
c0939e46 BP |
1186 | smp_call_function_single(i, check_supported_cpu, &ret, 1); |
1187 | if (!ret) | |
1da177e4 LT |
1188 | supported_cpus++; |
1189 | } | |
1190 | ||
c0939e46 | 1191 | if (supported_cpus != num_online_cpus()) { |
09681a07 | 1192 | cpus_read_unlock(); |
73860c6b | 1193 | return -ENODEV; |
c0939e46 | 1194 | } |
09681a07 | 1195 | cpus_read_unlock(); |
73860c6b | 1196 | |
c0939e46 BP |
1197 | ret = cpufreq_register_driver(&cpufreq_amd64_driver); |
1198 | if (ret) | |
1199 | return ret; | |
73860c6b | 1200 | |
e54173b4 | 1201 | pr_info("Found %d %s (%d cpu cores) (" VERSION ")\n", |
c0939e46 | 1202 | num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus); |
73860c6b | 1203 | |
c0939e46 | 1204 | return ret; |
1da177e4 LT |
1205 | } |
1206 | ||
1207 | /* driver entry point for term */ | |
1208 | static void __exit powernowk8_exit(void) | |
1209 | { | |
2d06d8c4 | 1210 | pr_debug("exit\n"); |
1da177e4 LT |
1211 | |
1212 | cpufreq_unregister_driver(&cpufreq_amd64_driver); | |
1213 | } | |
1214 | ||
e54173b4 SK |
1215 | MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com>"); |
1216 | MODULE_AUTHOR("Mark Langsdorf <mark.langsdorf@amd.com>"); | |
1da177e4 LT |
1217 | MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver."); |
1218 | MODULE_LICENSE("GPL"); | |
1219 | ||
1220 | late_initcall(powernowk8_init); | |
1221 | module_exit(powernowk8_exit); |