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14cf11af | 1 | /* |
14cf11af PM |
2 | * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org> |
3 | * Copyright (C) 2004 John Steele Scott <toojays@toojays.net> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * TODO: Need a big cleanup here. Basically, we need to have different | |
10 | * cpufreq_driver structures for the different type of HW instead of the | |
11 | * current mess. We also need to better deal with the detection of the | |
12 | * type of machine. | |
13 | * | |
14 | */ | |
15 | ||
14cf11af PM |
16 | #include <linux/module.h> |
17 | #include <linux/types.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/sched.h> | |
22 | #include <linux/adb.h> | |
23 | #include <linux/pmu.h> | |
14cf11af PM |
24 | #include <linux/cpufreq.h> |
25 | #include <linux/init.h> | |
edbaa603 | 26 | #include <linux/device.h> |
14cf11af | 27 | #include <linux/hardirq.h> |
1037b275 | 28 | #include <linux/of_device.h> |
14cf11af PM |
29 | #include <asm/prom.h> |
30 | #include <asm/machdep.h> | |
31 | #include <asm/irq.h> | |
32 | #include <asm/pmac_feature.h> | |
33 | #include <asm/mmu_context.h> | |
34 | #include <asm/sections.h> | |
35 | #include <asm/cputable.h> | |
36 | #include <asm/time.h> | |
14cf11af PM |
37 | #include <asm/mpic.h> |
38 | #include <asm/keylargo.h> | |
ae3a197e | 39 | #include <asm/switch_to.h> |
14cf11af PM |
40 | |
41 | /* WARNING !!! This will cause calibrate_delay() to be called, | |
42 | * but this is an __init function ! So you MUST go edit | |
43 | * init/main.c to make it non-init before enabling DEBUG_FREQ | |
44 | */ | |
45 | #undef DEBUG_FREQ | |
46 | ||
14cf11af PM |
47 | extern void low_choose_7447a_dfs(int dfs); |
48 | extern void low_choose_750fx_pll(int pll); | |
49 | extern void low_sleep_handler(void); | |
50 | ||
51 | /* | |
52 | * Currently, PowerMac cpufreq supports only high & low frequencies | |
53 | * that are set by the firmware | |
54 | */ | |
55 | static unsigned int low_freq; | |
56 | static unsigned int hi_freq; | |
57 | static unsigned int cur_freq; | |
58 | static unsigned int sleep_freq; | |
bb29b719 | 59 | static unsigned long transition_latency; |
14cf11af PM |
60 | |
61 | /* | |
b3c2ffd5 | 62 | * Different models uses different mechanisms to switch the frequency |
14cf11af PM |
63 | */ |
64 | static int (*set_speed_proc)(int low_speed); | |
65 | static unsigned int (*get_speed_proc)(void); | |
66 | ||
67 | /* | |
68 | * Some definitions used by the various speedprocs | |
69 | */ | |
70 | static u32 voltage_gpio; | |
71 | static u32 frequency_gpio; | |
72 | static u32 slew_done_gpio; | |
73 | static int no_schedule; | |
74 | static int has_cpu_l2lve; | |
75 | static int is_pmu_based; | |
76 | ||
77 | /* There are only two frequency states for each processor. Values | |
78 | * are in kHz for the time being. | |
79 | */ | |
80 | #define CPUFREQ_HIGH 0 | |
81 | #define CPUFREQ_LOW 1 | |
82 | ||
83 | static struct cpufreq_frequency_table pmac_cpu_freqs[] = { | |
84 | {CPUFREQ_HIGH, 0}, | |
85 | {CPUFREQ_LOW, 0}, | |
86 | {0, CPUFREQ_TABLE_END}, | |
87 | }; | |
88 | ||
89 | static struct freq_attr* pmac_cpu_freqs_attr[] = { | |
90 | &cpufreq_freq_attr_scaling_available_freqs, | |
91 | NULL, | |
92 | }; | |
93 | ||
94 | static inline void local_delay(unsigned long ms) | |
95 | { | |
96 | if (no_schedule) | |
97 | mdelay(ms); | |
98 | else | |
99 | msleep(ms); | |
100 | } | |
101 | ||
14cf11af PM |
102 | #ifdef DEBUG_FREQ |
103 | static inline void debug_calc_bogomips(void) | |
104 | { | |
105 | /* This will cause a recalc of bogomips and display the | |
106 | * result. We backup/restore the value to avoid affecting the | |
107 | * core cpufreq framework's own calculation. | |
108 | */ | |
14cf11af PM |
109 | unsigned long save_lpj = loops_per_jiffy; |
110 | calibrate_delay(); | |
111 | loops_per_jiffy = save_lpj; | |
112 | } | |
113 | #endif /* DEBUG_FREQ */ | |
114 | ||
115 | /* Switch CPU speed under 750FX CPU control | |
116 | */ | |
117 | static int cpu_750fx_cpu_speed(int low_speed) | |
118 | { | |
119 | u32 hid2; | |
120 | ||
121 | if (low_speed == 0) { | |
122 | /* ramping up, set voltage first */ | |
123 | pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05); | |
124 | /* Make sure we sleep for at least 1ms */ | |
125 | local_delay(10); | |
126 | ||
127 | /* tweak L2 for high voltage */ | |
128 | if (has_cpu_l2lve) { | |
129 | hid2 = mfspr(SPRN_HID2); | |
130 | hid2 &= ~0x2000; | |
131 | mtspr(SPRN_HID2, hid2); | |
132 | } | |
133 | } | |
134 | #ifdef CONFIG_6xx | |
135 | low_choose_750fx_pll(low_speed); | |
136 | #endif | |
137 | if (low_speed == 1) { | |
138 | /* tweak L2 for low voltage */ | |
139 | if (has_cpu_l2lve) { | |
140 | hid2 = mfspr(SPRN_HID2); | |
141 | hid2 |= 0x2000; | |
142 | mtspr(SPRN_HID2, hid2); | |
143 | } | |
144 | ||
145 | /* ramping down, set voltage last */ | |
146 | pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04); | |
147 | local_delay(10); | |
148 | } | |
149 | ||
150 | return 0; | |
151 | } | |
152 | ||
153 | static unsigned int cpu_750fx_get_cpu_speed(void) | |
154 | { | |
155 | if (mfspr(SPRN_HID1) & HID1_PS) | |
156 | return low_freq; | |
157 | else | |
158 | return hi_freq; | |
159 | } | |
160 | ||
161 | /* Switch CPU speed using DFS */ | |
162 | static int dfs_set_cpu_speed(int low_speed) | |
163 | { | |
164 | if (low_speed == 0) { | |
165 | /* ramping up, set voltage first */ | |
166 | pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05); | |
167 | /* Make sure we sleep for at least 1ms */ | |
168 | local_delay(1); | |
169 | } | |
170 | ||
171 | /* set frequency */ | |
172 | #ifdef CONFIG_6xx | |
173 | low_choose_7447a_dfs(low_speed); | |
174 | #endif | |
175 | udelay(100); | |
176 | ||
177 | if (low_speed == 1) { | |
178 | /* ramping down, set voltage last */ | |
179 | pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04); | |
180 | local_delay(1); | |
181 | } | |
182 | ||
183 | return 0; | |
184 | } | |
185 | ||
186 | static unsigned int dfs_get_cpu_speed(void) | |
187 | { | |
188 | if (mfspr(SPRN_HID1) & HID1_DFS) | |
189 | return low_freq; | |
190 | else | |
191 | return hi_freq; | |
192 | } | |
193 | ||
194 | ||
195 | /* Switch CPU speed using slewing GPIOs | |
196 | */ | |
197 | static int gpios_set_cpu_speed(int low_speed) | |
198 | { | |
199 | int gpio, timeout = 0; | |
200 | ||
201 | /* If ramping up, set voltage first */ | |
202 | if (low_speed == 0) { | |
203 | pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05); | |
204 | /* Delay is way too big but it's ok, we schedule */ | |
205 | local_delay(10); | |
206 | } | |
207 | ||
208 | /* Set frequency */ | |
209 | gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0); | |
210 | if (low_speed == ((gpio & 0x01) == 0)) | |
211 | goto skip; | |
212 | ||
213 | pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio, | |
214 | low_speed ? 0x04 : 0x05); | |
215 | udelay(200); | |
216 | do { | |
217 | if (++timeout > 100) | |
218 | break; | |
219 | local_delay(1); | |
220 | gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0); | |
221 | } while((gpio & 0x02) == 0); | |
222 | skip: | |
223 | /* If ramping down, set voltage last */ | |
224 | if (low_speed == 1) { | |
225 | pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04); | |
226 | /* Delay is way too big but it's ok, we schedule */ | |
227 | local_delay(10); | |
228 | } | |
229 | ||
230 | #ifdef DEBUG_FREQ | |
231 | debug_calc_bogomips(); | |
232 | #endif | |
233 | ||
234 | return 0; | |
235 | } | |
236 | ||
237 | /* Switch CPU speed under PMU control | |
238 | */ | |
239 | static int pmu_set_cpu_speed(int low_speed) | |
240 | { | |
241 | struct adb_request req; | |
242 | unsigned long save_l2cr; | |
243 | unsigned long save_l3cr; | |
244 | unsigned int pic_prio; | |
245 | unsigned long flags; | |
246 | ||
247 | preempt_disable(); | |
248 | ||
249 | #ifdef DEBUG_FREQ | |
250 | printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1)); | |
251 | #endif | |
252 | pmu_suspend(); | |
253 | ||
254 | /* Disable all interrupt sources on openpic */ | |
255 | pic_prio = mpic_cpu_get_priority(); | |
256 | mpic_cpu_set_priority(0xf); | |
257 | ||
258 | /* Make sure the decrementer won't interrupt us */ | |
259 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); | |
80f7228b | 260 | /* Make sure any pending DEC interrupt occurring while we did |
14cf11af PM |
261 | * the above didn't re-enable the DEC */ |
262 | mb(); | |
263 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); | |
264 | ||
265 | /* We can now disable MSR_EE */ | |
266 | local_irq_save(flags); | |
267 | ||
268 | /* Giveup the FPU & vec */ | |
269 | enable_kernel_fp(); | |
270 | ||
271 | #ifdef CONFIG_ALTIVEC | |
272 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) | |
273 | enable_kernel_altivec(); | |
274 | #endif /* CONFIG_ALTIVEC */ | |
275 | ||
276 | /* Save & disable L2 and L3 caches */ | |
277 | save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ | |
278 | save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ | |
279 | ||
280 | /* Send the new speed command. My assumption is that this command | |
281 | * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep | |
282 | */ | |
283 | pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed); | |
284 | while (!req.complete) | |
285 | pmu_poll(); | |
286 | ||
287 | /* Prepare the northbridge for the speed transition */ | |
288 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1); | |
289 | ||
290 | /* Call low level code to backup CPU state and recover from | |
291 | * hardware reset | |
292 | */ | |
293 | low_sleep_handler(); | |
294 | ||
295 | /* Restore the northbridge */ | |
296 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0); | |
297 | ||
298 | /* Restore L2 cache */ | |
299 | if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) | |
300 | _set_L2CR(save_l2cr); | |
301 | /* Restore L3 cache */ | |
302 | if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0) | |
303 | _set_L3CR(save_l3cr); | |
304 | ||
305 | /* Restore userland MMU context */ | |
5e696617 | 306 | switch_mmu_context(NULL, current->active_mm); |
14cf11af PM |
307 | |
308 | #ifdef DEBUG_FREQ | |
309 | printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1)); | |
310 | #endif | |
311 | ||
312 | /* Restore low level PMU operations */ | |
313 | pmu_unlock(); | |
314 | ||
c1aa687d PM |
315 | /* |
316 | * Restore decrementer; we'll take a decrementer interrupt | |
317 | * as soon as interrupts are re-enabled and the generic | |
318 | * clockevents code will reprogram it with the right value. | |
319 | */ | |
320 | set_dec(1); | |
14cf11af PM |
321 | |
322 | /* Restore interrupts */ | |
323 | mpic_cpu_set_priority(pic_prio); | |
324 | ||
325 | /* Let interrupts flow again ... */ | |
326 | local_irq_restore(flags); | |
327 | ||
328 | #ifdef DEBUG_FREQ | |
329 | debug_calc_bogomips(); | |
330 | #endif | |
331 | ||
332 | pmu_resume(); | |
333 | ||
334 | preempt_enable(); | |
335 | ||
336 | return 0; | |
337 | } | |
338 | ||
b43a7ffb VK |
339 | static int do_set_cpu_speed(struct cpufreq_policy *policy, int speed_mode, |
340 | int notify) | |
14cf11af PM |
341 | { |
342 | struct cpufreq_freqs freqs; | |
343 | unsigned long l3cr; | |
344 | static unsigned long prev_l3cr; | |
345 | ||
346 | freqs.old = cur_freq; | |
347 | freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq; | |
14cf11af PM |
348 | |
349 | if (freqs.old == freqs.new) | |
350 | return 0; | |
351 | ||
352 | if (notify) | |
b43a7ffb | 353 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); |
14cf11af PM |
354 | if (speed_mode == CPUFREQ_LOW && |
355 | cpu_has_feature(CPU_FTR_L3CR)) { | |
356 | l3cr = _get_L3CR(); | |
357 | if (l3cr & L3CR_L3E) { | |
358 | prev_l3cr = l3cr; | |
359 | _set_L3CR(0); | |
360 | } | |
361 | } | |
362 | set_speed_proc(speed_mode == CPUFREQ_LOW); | |
363 | if (speed_mode == CPUFREQ_HIGH && | |
364 | cpu_has_feature(CPU_FTR_L3CR)) { | |
365 | l3cr = _get_L3CR(); | |
366 | if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr) | |
367 | _set_L3CR(prev_l3cr); | |
368 | } | |
369 | if (notify) | |
b43a7ffb | 370 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); |
14cf11af PM |
371 | cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq; |
372 | ||
373 | return 0; | |
374 | } | |
375 | ||
376 | static unsigned int pmac_cpufreq_get_speed(unsigned int cpu) | |
377 | { | |
378 | return cur_freq; | |
379 | } | |
380 | ||
381 | static int pmac_cpufreq_verify(struct cpufreq_policy *policy) | |
382 | { | |
383 | return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs); | |
384 | } | |
385 | ||
386 | static int pmac_cpufreq_target( struct cpufreq_policy *policy, | |
387 | unsigned int target_freq, | |
388 | unsigned int relation) | |
389 | { | |
390 | unsigned int newstate = 0; | |
4350147a | 391 | int rc; |
14cf11af PM |
392 | |
393 | if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs, | |
394 | target_freq, relation, &newstate)) | |
395 | return -EINVAL; | |
396 | ||
b43a7ffb | 397 | rc = do_set_cpu_speed(policy, newstate, 1); |
14cf11af | 398 | |
4350147a BH |
399 | ppc_proc_freq = cur_freq * 1000ul; |
400 | return rc; | |
14cf11af PM |
401 | } |
402 | ||
403 | static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy) | |
404 | { | |
405 | if (policy->cpu != 0) | |
406 | return -ENODEV; | |
407 | ||
bb29b719 | 408 | policy->cpuinfo.transition_latency = transition_latency; |
14cf11af PM |
409 | policy->cur = cur_freq; |
410 | ||
0e645df9 | 411 | return cpufreq_table_validate_and_show(policy, pmac_cpu_freqs); |
14cf11af PM |
412 | } |
413 | ||
414 | static u32 read_gpio(struct device_node *np) | |
415 | { | |
e2eb6392 | 416 | const u32 *reg = of_get_property(np, "reg", NULL); |
14cf11af PM |
417 | u32 offset; |
418 | ||
419 | if (reg == NULL) | |
420 | return 0; | |
421 | /* That works for all keylargos but shall be fixed properly | |
422 | * some day... The problem is that it seems we can't rely | |
423 | * on the "reg" property of the GPIO nodes, they are either | |
424 | * relative to the base of KeyLargo or to the base of the | |
425 | * GPIO space, and the device-tree doesn't help. | |
426 | */ | |
427 | offset = *reg; | |
428 | if (offset < KEYLARGO_GPIO_LEVELS0) | |
429 | offset += KEYLARGO_GPIO_LEVELS0; | |
430 | return offset; | |
431 | } | |
432 | ||
7ca64e2d | 433 | static int pmac_cpufreq_suspend(struct cpufreq_policy *policy) |
14cf11af PM |
434 | { |
435 | /* Ok, this could be made a bit smarter, but let's be robust for now. We | |
436 | * always force a speed change to high speed before sleep, to make sure | |
437 | * we have appropriate voltage and/or bus speed for the wakeup process, | |
438 | * and to make sure our loops_per_jiffies are "good enough", that is will | |
439 | * not cause too short delays if we sleep in low speed and wake in high | |
440 | * speed.. | |
441 | */ | |
442 | no_schedule = 1; | |
443 | sleep_freq = cur_freq; | |
444 | if (cur_freq == low_freq && !is_pmu_based) | |
b43a7ffb | 445 | do_set_cpu_speed(policy, CPUFREQ_HIGH, 0); |
14cf11af PM |
446 | return 0; |
447 | } | |
448 | ||
449 | static int pmac_cpufreq_resume(struct cpufreq_policy *policy) | |
450 | { | |
451 | /* If we resume, first check if we have a get() function */ | |
452 | if (get_speed_proc) | |
453 | cur_freq = get_speed_proc(); | |
22358ea8 | 454 | else |
14cf11af PM |
455 | cur_freq = 0; |
456 | ||
457 | /* We don't, hrm... we don't really know our speed here, best | |
458 | * is that we force a switch to whatever it was, which is | |
459 | * probably high speed due to our suspend() routine | |
460 | */ | |
b43a7ffb | 461 | do_set_cpu_speed(policy, sleep_freq == low_freq ? |
14cf11af PM |
462 | CPUFREQ_LOW : CPUFREQ_HIGH, 0); |
463 | ||
4350147a BH |
464 | ppc_proc_freq = cur_freq * 1000ul; |
465 | ||
14cf11af PM |
466 | no_schedule = 0; |
467 | return 0; | |
468 | } | |
469 | ||
470 | static struct cpufreq_driver pmac_cpufreq_driver = { | |
471 | .verify = pmac_cpufreq_verify, | |
472 | .target = pmac_cpufreq_target, | |
473 | .get = pmac_cpufreq_get_speed, | |
474 | .init = pmac_cpufreq_cpu_init, | |
475 | .suspend = pmac_cpufreq_suspend, | |
476 | .resume = pmac_cpufreq_resume, | |
477 | .flags = CPUFREQ_PM_NO_WARN, | |
478 | .attr = pmac_cpu_freqs_attr, | |
479 | .name = "powermac", | |
14cf11af PM |
480 | }; |
481 | ||
482 | ||
483 | static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode) | |
484 | { | |
485 | struct device_node *volt_gpio_np = of_find_node_by_name(NULL, | |
486 | "voltage-gpio"); | |
487 | struct device_node *freq_gpio_np = of_find_node_by_name(NULL, | |
488 | "frequency-gpio"); | |
489 | struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL, | |
490 | "slewing-done"); | |
018a3d1d | 491 | const u32 *value; |
14cf11af PM |
492 | |
493 | /* | |
494 | * Check to see if it's GPIO driven or PMU only | |
495 | * | |
496 | * The way we extract the GPIO address is slightly hackish, but it | |
497 | * works well enough for now. We need to abstract the whole GPIO | |
498 | * stuff sooner or later anyway | |
499 | */ | |
500 | ||
501 | if (volt_gpio_np) | |
502 | voltage_gpio = read_gpio(volt_gpio_np); | |
503 | if (freq_gpio_np) | |
504 | frequency_gpio = read_gpio(freq_gpio_np); | |
505 | if (slew_done_gpio_np) | |
506 | slew_done_gpio = read_gpio(slew_done_gpio_np); | |
507 | ||
508 | /* If we use the frequency GPIOs, calculate the min/max speeds based | |
509 | * on the bus frequencies | |
510 | */ | |
511 | if (frequency_gpio && slew_done_gpio) { | |
512 | int lenp, rc; | |
018a3d1d | 513 | const u32 *freqs, *ratio; |
14cf11af | 514 | |
e2eb6392 | 515 | freqs = of_get_property(cpunode, "bus-frequencies", &lenp); |
14cf11af PM |
516 | lenp /= sizeof(u32); |
517 | if (freqs == NULL || lenp != 2) { | |
518 | printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n"); | |
519 | return 1; | |
520 | } | |
e2eb6392 SR |
521 | ratio = of_get_property(cpunode, "processor-to-bus-ratio*2", |
522 | NULL); | |
14cf11af PM |
523 | if (ratio == NULL) { |
524 | printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n"); | |
525 | return 1; | |
526 | } | |
527 | ||
528 | /* Get the min/max bus frequencies */ | |
529 | low_freq = min(freqs[0], freqs[1]); | |
530 | hi_freq = max(freqs[0], freqs[1]); | |
531 | ||
532 | /* Grrrr.. It _seems_ that the device-tree is lying on the low bus | |
533 | * frequency, it claims it to be around 84Mhz on some models while | |
534 | * it appears to be approx. 101Mhz on all. Let's hack around here... | |
535 | * fortunately, we don't need to be too precise | |
536 | */ | |
537 | if (low_freq < 98000000) | |
538 | low_freq = 101000000; | |
4350147a | 539 | |
14cf11af PM |
540 | /* Convert those to CPU core clocks */ |
541 | low_freq = (low_freq * (*ratio)) / 2000; | |
542 | hi_freq = (hi_freq * (*ratio)) / 2000; | |
543 | ||
544 | /* Now we get the frequencies, we read the GPIO to see what is out current | |
545 | * speed | |
546 | */ | |
547 | rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0); | |
548 | cur_freq = (rc & 0x01) ? hi_freq : low_freq; | |
549 | ||
550 | set_speed_proc = gpios_set_cpu_speed; | |
551 | return 1; | |
552 | } | |
553 | ||
554 | /* If we use the PMU, look for the min & max frequencies in the | |
555 | * device-tree | |
556 | */ | |
e2eb6392 | 557 | value = of_get_property(cpunode, "min-clock-frequency", NULL); |
14cf11af PM |
558 | if (!value) |
559 | return 1; | |
560 | low_freq = (*value) / 1000; | |
561 | /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree | |
562 | * here */ | |
563 | if (low_freq < 100000) | |
564 | low_freq *= 10; | |
565 | ||
e2eb6392 | 566 | value = of_get_property(cpunode, "max-clock-frequency", NULL); |
14cf11af PM |
567 | if (!value) |
568 | return 1; | |
569 | hi_freq = (*value) / 1000; | |
570 | set_speed_proc = pmu_set_cpu_speed; | |
571 | is_pmu_based = 1; | |
572 | ||
573 | return 0; | |
574 | } | |
575 | ||
576 | static int pmac_cpufreq_init_7447A(struct device_node *cpunode) | |
577 | { | |
578 | struct device_node *volt_gpio_np; | |
579 | ||
e2eb6392 | 580 | if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL) |
14cf11af PM |
581 | return 1; |
582 | ||
583 | volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select"); | |
584 | if (volt_gpio_np) | |
585 | voltage_gpio = read_gpio(volt_gpio_np); | |
586 | if (!voltage_gpio){ | |
587 | printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n"); | |
588 | return 1; | |
589 | } | |
590 | ||
591 | /* OF only reports the high frequency */ | |
592 | hi_freq = cur_freq; | |
593 | low_freq = cur_freq/2; | |
594 | ||
595 | /* Read actual frequency from CPU */ | |
596 | cur_freq = dfs_get_cpu_speed(); | |
597 | set_speed_proc = dfs_set_cpu_speed; | |
598 | get_speed_proc = dfs_get_cpu_speed; | |
599 | ||
600 | return 0; | |
601 | } | |
602 | ||
603 | static int pmac_cpufreq_init_750FX(struct device_node *cpunode) | |
604 | { | |
605 | struct device_node *volt_gpio_np; | |
018a3d1d JK |
606 | u32 pvr; |
607 | const u32 *value; | |
14cf11af | 608 | |
e2eb6392 | 609 | if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL) |
14cf11af PM |
610 | return 1; |
611 | ||
612 | hi_freq = cur_freq; | |
e2eb6392 | 613 | value = of_get_property(cpunode, "reduced-clock-frequency", NULL); |
14cf11af PM |
614 | if (!value) |
615 | return 1; | |
616 | low_freq = (*value) / 1000; | |
617 | ||
618 | volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select"); | |
619 | if (volt_gpio_np) | |
620 | voltage_gpio = read_gpio(volt_gpio_np); | |
621 | ||
622 | pvr = mfspr(SPRN_PVR); | |
623 | has_cpu_l2lve = !((pvr & 0xf00) == 0x100); | |
624 | ||
625 | set_speed_proc = cpu_750fx_cpu_speed; | |
626 | get_speed_proc = cpu_750fx_get_cpu_speed; | |
627 | cur_freq = cpu_750fx_get_cpu_speed(); | |
628 | ||
629 | return 0; | |
630 | } | |
631 | ||
632 | /* Currently, we support the following machines: | |
633 | * | |
634 | * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz) | |
635 | * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz) | |
636 | * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz) | |
637 | * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz) | |
638 | * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz) | |
639 | * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage) | |
640 | * - Recent MacRISC3 laptops | |
641 | * - All new machines with 7447A CPUs | |
642 | */ | |
643 | static int __init pmac_cpufreq_setup(void) | |
644 | { | |
645 | struct device_node *cpunode; | |
018a3d1d | 646 | const u32 *value; |
14cf11af PM |
647 | |
648 | if (strstr(cmd_line, "nocpufreq")) | |
649 | return 0; | |
650 | ||
1037b275 SK |
651 | /* Get first CPU node */ |
652 | cpunode = of_cpu_device_node_get(0); | |
14cf11af PM |
653 | if (!cpunode) |
654 | goto out; | |
655 | ||
656 | /* Get current cpu clock freq */ | |
e2eb6392 | 657 | value = of_get_property(cpunode, "clock-frequency", NULL); |
14cf11af PM |
658 | if (!value) |
659 | goto out; | |
660 | cur_freq = (*value) / 1000; | |
bb29b719 | 661 | transition_latency = CPUFREQ_ETERNAL; |
14cf11af PM |
662 | |
663 | /* Check for 7447A based MacRISC3 */ | |
71a157e8 | 664 | if (of_machine_is_compatible("MacRISC3") && |
e2eb6392 | 665 | of_get_property(cpunode, "dynamic-power-step", NULL) && |
14cf11af PM |
666 | PVR_VER(mfspr(SPRN_PVR)) == 0x8003) { |
667 | pmac_cpufreq_init_7447A(cpunode); | |
bb29b719 | 668 | transition_latency = 8000000; |
14cf11af | 669 | /* Check for other MacRISC3 machines */ |
71a157e8 GL |
670 | } else if (of_machine_is_compatible("PowerBook3,4") || |
671 | of_machine_is_compatible("PowerBook3,5") || | |
672 | of_machine_is_compatible("MacRISC3")) { | |
14cf11af PM |
673 | pmac_cpufreq_init_MacRISC3(cpunode); |
674 | /* Else check for iBook2 500/600 */ | |
71a157e8 | 675 | } else if (of_machine_is_compatible("PowerBook4,1")) { |
14cf11af PM |
676 | hi_freq = cur_freq; |
677 | low_freq = 400000; | |
678 | set_speed_proc = pmu_set_cpu_speed; | |
679 | is_pmu_based = 1; | |
680 | } | |
5629d41d | 681 | /* Else check for TiPb 550 */ |
71a157e8 | 682 | else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) { |
5629d41d PM |
683 | hi_freq = cur_freq; |
684 | low_freq = 500000; | |
685 | set_speed_proc = pmu_set_cpu_speed; | |
686 | is_pmu_based = 1; | |
687 | } | |
14cf11af | 688 | /* Else check for TiPb 400 & 500 */ |
71a157e8 | 689 | else if (of_machine_is_compatible("PowerBook3,2")) { |
14cf11af PM |
690 | /* We only know about the 400 MHz and the 500Mhz model |
691 | * they both have 300 MHz as low frequency | |
692 | */ | |
693 | if (cur_freq < 350000 || cur_freq > 550000) | |
694 | goto out; | |
695 | hi_freq = cur_freq; | |
696 | low_freq = 300000; | |
697 | set_speed_proc = pmu_set_cpu_speed; | |
698 | is_pmu_based = 1; | |
699 | } | |
700 | /* Else check for 750FX */ | |
701 | else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000) | |
702 | pmac_cpufreq_init_750FX(cpunode); | |
703 | out: | |
1658ab66 | 704 | of_node_put(cpunode); |
14cf11af PM |
705 | if (set_speed_proc == NULL) |
706 | return -ENODEV; | |
707 | ||
708 | pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq; | |
709 | pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq; | |
4350147a | 710 | ppc_proc_freq = cur_freq * 1000ul; |
14cf11af PM |
711 | |
712 | printk(KERN_INFO "Registering PowerMac CPU frequency driver\n"); | |
713 | printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n", | |
714 | low_freq/1000, hi_freq/1000, cur_freq/1000); | |
715 | ||
716 | return cpufreq_register_driver(&pmac_cpufreq_driver); | |
717 | } | |
718 | ||
719 | module_init(pmac_cpufreq_setup); | |
720 |