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a0a22cf1 KC |
1 | /* |
2 | * CPU Frequency Scaling for Loongson 1 SoC | |
3 | * | |
6a1d55cc | 4 | * Copyright (C) 2014-2016 Zhang, Keguang <keguang.zhang@gmail.com> |
a0a22cf1 KC |
5 | * |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without any | |
8 | * warranty of any kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | #include <linux/clk.h> | |
12 | #include <linux/clk-provider.h> | |
13 | #include <linux/cpu.h> | |
14 | #include <linux/cpufreq.h> | |
15 | #include <linux/delay.h> | |
62e59c4e | 16 | #include <linux/io.h> |
a0a22cf1 KC |
17 | #include <linux/module.h> |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/slab.h> | |
20 | ||
30ad29bb HC |
21 | #include <cpufreq.h> |
22 | #include <loongson1.h> | |
a0a22cf1 | 23 | |
99bf2e68 | 24 | struct ls1x_cpufreq { |
a0a22cf1 KC |
25 | struct device *dev; |
26 | struct clk *clk; /* CPU clk */ | |
27 | struct clk *mux_clk; /* MUX of CPU clk */ | |
28 | struct clk *pll_clk; /* PLL clk */ | |
29 | struct clk *osc_clk; /* OSC clk */ | |
30 | unsigned int max_freq; | |
31 | unsigned int min_freq; | |
99bf2e68 KC |
32 | }; |
33 | ||
34 | static struct ls1x_cpufreq *cpufreq; | |
a0a22cf1 KC |
35 | |
36 | static int ls1x_cpufreq_notifier(struct notifier_block *nb, | |
37 | unsigned long val, void *data) | |
38 | { | |
39 | if (val == CPUFREQ_POSTCHANGE) | |
40 | current_cpu_data.udelay_val = loops_per_jiffy; | |
41 | ||
42 | return NOTIFY_OK; | |
43 | } | |
44 | ||
45 | static struct notifier_block ls1x_cpufreq_notifier_block = { | |
46 | .notifier_call = ls1x_cpufreq_notifier | |
47 | }; | |
48 | ||
49 | static int ls1x_cpufreq_target(struct cpufreq_policy *policy, | |
50 | unsigned int index) | |
51 | { | |
99bf2e68 | 52 | struct device *cpu_dev = get_cpu_device(policy->cpu); |
a0a22cf1 KC |
53 | unsigned int old_freq, new_freq; |
54 | ||
55 | old_freq = policy->cur; | |
56 | new_freq = policy->freq_table[index].frequency; | |
57 | ||
58 | /* | |
59 | * The procedure of reconfiguring CPU clk is as below. | |
60 | * | |
61 | * - Reparent CPU clk to OSC clk | |
62 | * - Reset CPU clock (very important) | |
63 | * - Reconfigure CPU DIV | |
64 | * - Reparent CPU clk back to CPU DIV clk | |
65 | */ | |
66 | ||
99bf2e68 | 67 | clk_set_parent(policy->clk, cpufreq->osc_clk); |
a0a22cf1 KC |
68 | __raw_writel(__raw_readl(LS1X_CLK_PLL_DIV) | RST_CPU_EN | RST_CPU, |
69 | LS1X_CLK_PLL_DIV); | |
70 | __raw_writel(__raw_readl(LS1X_CLK_PLL_DIV) & ~(RST_CPU_EN | RST_CPU), | |
71 | LS1X_CLK_PLL_DIV); | |
99bf2e68 KC |
72 | clk_set_rate(cpufreq->mux_clk, new_freq * 1000); |
73 | clk_set_parent(policy->clk, cpufreq->mux_clk); | |
74 | dev_dbg(cpu_dev, "%u KHz --> %u KHz\n", old_freq, new_freq); | |
a0a22cf1 KC |
75 | |
76 | return 0; | |
77 | } | |
78 | ||
79 | static int ls1x_cpufreq_init(struct cpufreq_policy *policy) | |
80 | { | |
99bf2e68 | 81 | struct device *cpu_dev = get_cpu_device(policy->cpu); |
a0a22cf1 KC |
82 | struct cpufreq_frequency_table *freq_tbl; |
83 | unsigned int pll_freq, freq; | |
c4dcc8a1 | 84 | int steps, i; |
a0a22cf1 | 85 | |
99bf2e68 | 86 | pll_freq = clk_get_rate(cpufreq->pll_clk) / 1000; |
a0a22cf1 KC |
87 | |
88 | steps = 1 << DIV_CPU_WIDTH; | |
379e38a7 KC |
89 | freq_tbl = kcalloc(steps, sizeof(*freq_tbl), GFP_KERNEL); |
90 | if (!freq_tbl) | |
91 | return -ENOMEM; | |
a0a22cf1 KC |
92 | |
93 | for (i = 0; i < (steps - 1); i++) { | |
94 | freq = pll_freq / (i + 1); | |
99bf2e68 | 95 | if ((freq < cpufreq->min_freq) || (freq > cpufreq->max_freq)) |
a0a22cf1 KC |
96 | freq_tbl[i].frequency = CPUFREQ_ENTRY_INVALID; |
97 | else | |
98 | freq_tbl[i].frequency = freq; | |
99bf2e68 | 99 | dev_dbg(cpu_dev, |
a0a22cf1 KC |
100 | "cpufreq table: index %d: frequency %d\n", i, |
101 | freq_tbl[i].frequency); | |
102 | } | |
103 | freq_tbl[i].frequency = CPUFREQ_TABLE_END; | |
104 | ||
99bf2e68 | 105 | policy->clk = cpufreq->clk; |
c4dcc8a1 | 106 | cpufreq_generic_init(policy, freq_tbl, 0); |
379e38a7 | 107 | |
c4dcc8a1 | 108 | return 0; |
a0a22cf1 KC |
109 | } |
110 | ||
111 | static int ls1x_cpufreq_exit(struct cpufreq_policy *policy) | |
112 | { | |
113 | kfree(policy->freq_table); | |
114 | return 0; | |
115 | } | |
116 | ||
117 | static struct cpufreq_driver ls1x_cpufreq_driver = { | |
118 | .name = "cpufreq-ls1x", | |
5ae4a4b4 | 119 | .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK, |
a0a22cf1 KC |
120 | .verify = cpufreq_generic_frequency_table_verify, |
121 | .target_index = ls1x_cpufreq_target, | |
122 | .get = cpufreq_generic_get, | |
123 | .init = ls1x_cpufreq_init, | |
124 | .exit = ls1x_cpufreq_exit, | |
125 | .attr = cpufreq_generic_attr, | |
126 | }; | |
127 | ||
128 | static int ls1x_cpufreq_remove(struct platform_device *pdev) | |
129 | { | |
130 | cpufreq_unregister_notifier(&ls1x_cpufreq_notifier_block, | |
131 | CPUFREQ_TRANSITION_NOTIFIER); | |
132 | cpufreq_unregister_driver(&ls1x_cpufreq_driver); | |
133 | ||
134 | return 0; | |
135 | } | |
136 | ||
137 | static int ls1x_cpufreq_probe(struct platform_device *pdev) | |
138 | { | |
25581d2b | 139 | struct plat_ls1x_cpufreq *pdata = dev_get_platdata(&pdev->dev); |
a0a22cf1 KC |
140 | struct clk *clk; |
141 | int ret; | |
142 | ||
65b2849a KC |
143 | if (!pdata || !pdata->clk_name || !pdata->osc_clk_name) { |
144 | dev_err(&pdev->dev, "platform data missing\n"); | |
a0a22cf1 | 145 | return -EINVAL; |
65b2849a | 146 | } |
a0a22cf1 | 147 | |
99bf2e68 KC |
148 | cpufreq = |
149 | devm_kzalloc(&pdev->dev, sizeof(struct ls1x_cpufreq), GFP_KERNEL); | |
150 | if (!cpufreq) | |
151 | return -ENOMEM; | |
152 | ||
153 | cpufreq->dev = &pdev->dev; | |
a0a22cf1 KC |
154 | |
155 | clk = devm_clk_get(&pdev->dev, pdata->clk_name); | |
156 | if (IS_ERR(clk)) { | |
99bf2e68 | 157 | dev_err(&pdev->dev, "unable to get %s clock\n", |
a0a22cf1 | 158 | pdata->clk_name); |
65b2849a | 159 | return PTR_ERR(clk); |
a0a22cf1 | 160 | } |
99bf2e68 | 161 | cpufreq->clk = clk; |
a0a22cf1 KC |
162 | |
163 | clk = clk_get_parent(clk); | |
164 | if (IS_ERR(clk)) { | |
99bf2e68 KC |
165 | dev_err(&pdev->dev, "unable to get parent of %s clock\n", |
166 | __clk_get_name(cpufreq->clk)); | |
65b2849a | 167 | return PTR_ERR(clk); |
a0a22cf1 | 168 | } |
99bf2e68 | 169 | cpufreq->mux_clk = clk; |
a0a22cf1 KC |
170 | |
171 | clk = clk_get_parent(clk); | |
172 | if (IS_ERR(clk)) { | |
99bf2e68 KC |
173 | dev_err(&pdev->dev, "unable to get parent of %s clock\n", |
174 | __clk_get_name(cpufreq->mux_clk)); | |
65b2849a | 175 | return PTR_ERR(clk); |
a0a22cf1 | 176 | } |
99bf2e68 | 177 | cpufreq->pll_clk = clk; |
a0a22cf1 KC |
178 | |
179 | clk = devm_clk_get(&pdev->dev, pdata->osc_clk_name); | |
180 | if (IS_ERR(clk)) { | |
99bf2e68 | 181 | dev_err(&pdev->dev, "unable to get %s clock\n", |
a0a22cf1 | 182 | pdata->osc_clk_name); |
65b2849a | 183 | return PTR_ERR(clk); |
a0a22cf1 | 184 | } |
99bf2e68 | 185 | cpufreq->osc_clk = clk; |
a0a22cf1 | 186 | |
99bf2e68 KC |
187 | cpufreq->max_freq = pdata->max_freq; |
188 | cpufreq->min_freq = pdata->min_freq; | |
a0a22cf1 KC |
189 | |
190 | ret = cpufreq_register_driver(&ls1x_cpufreq_driver); | |
191 | if (ret) { | |
99bf2e68 KC |
192 | dev_err(&pdev->dev, |
193 | "failed to register CPUFreq driver: %d\n", ret); | |
65b2849a | 194 | return ret; |
a0a22cf1 KC |
195 | } |
196 | ||
197 | ret = cpufreq_register_notifier(&ls1x_cpufreq_notifier_block, | |
198 | CPUFREQ_TRANSITION_NOTIFIER); | |
199 | ||
65b2849a KC |
200 | if (ret) { |
201 | dev_err(&pdev->dev, | |
202 | "failed to register CPUFreq notifier: %d\n",ret); | |
203 | cpufreq_unregister_driver(&ls1x_cpufreq_driver); | |
204 | } | |
a0a22cf1 | 205 | |
a0a22cf1 KC |
206 | return ret; |
207 | } | |
208 | ||
209 | static struct platform_driver ls1x_cpufreq_platdrv = { | |
6a1d55cc KC |
210 | .probe = ls1x_cpufreq_probe, |
211 | .remove = ls1x_cpufreq_remove, | |
212 | .driver = { | |
a0a22cf1 | 213 | .name = "ls1x-cpufreq", |
a0a22cf1 | 214 | }, |
a0a22cf1 KC |
215 | }; |
216 | ||
217 | module_platform_driver(ls1x_cpufreq_platdrv); | |
218 | ||
b9acab09 | 219 | MODULE_ALIAS("platform:ls1x-cpufreq"); |
a0a22cf1 | 220 | MODULE_AUTHOR("Kelvin Cheung <keguang.zhang@gmail.com>"); |
6a1d55cc | 221 | MODULE_DESCRIPTION("Loongson1 CPUFreq driver"); |
a0a22cf1 | 222 | MODULE_LICENSE("GPL"); |