[linux-2.6-block.git] / drivers / cpufreq / longrun.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * (C) 2002 - 2003  Dominik Brodowski <linux@brodo.de>
 *
 *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/cpufreq.h>
#include <linux/timex.h>

#include <asm/msr.h>
#include <asm/processor.h>
#include <asm/cpu_device_id.h>

static struct cpufreq_driver	longrun_driver;

/**
 * longrun_{low,high}_freq is needed for the conversion of cpufreq kHz
 * values into per cent values. In TMTA microcode, the following is valid:
 * performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
 */
static unsigned int longrun_low_freq, longrun_high_freq;


/**
 * longrun_get_policy - get the current LongRun policy
 * @policy: struct cpufreq_policy where current policy is written into
 *
 * Reads the current LongRun policy by access to MSR_TMTA_LONGRUN_FLAGS
 * and MSR_TMTA_LONGRUN_CTRL
 */
static void longrun_get_policy(struct cpufreq_policy *policy)
{
	u32 msr_lo, msr_hi;

	rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
	pr_debug("longrun flags are %x - %x\n", msr_lo, msr_hi);
	if (msr_lo & 0x01)
		policy->policy = CPUFREQ_POLICY_PERFORMANCE;
	else
		policy->policy = CPUFREQ_POLICY_POWERSAVE;

	rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
	pr_debug("longrun ctrl is %x - %x\n", msr_lo, msr_hi);
	msr_lo &= 0x0000007F;
	msr_hi &= 0x0000007F;

	if (longrun_high_freq <= longrun_low_freq) {
		/* Assume degenerate Longrun table */
		policy->min = policy->max = longrun_high_freq;
	} else {
		policy->min = longrun_low_freq + msr_lo *
			((longrun_high_freq - longrun_low_freq) / 100);
		policy->max = longrun_low_freq + msr_hi *
			((longrun_high_freq - longrun_low_freq) / 100);
	}
	policy->cpu = 0;
}


/**
 * longrun_set_policy - sets a new CPUFreq policy
 * @policy: new policy
 *
 * Sets a new CPUFreq policy on LongRun-capable processors. This function
 * has to be called with cpufreq_driver locked.
 */
static int longrun_set_policy(struct cpufreq_policy *policy)
{
	u32 msr_lo, msr_hi;
	u32 pctg_lo, pctg_hi;

	if (!policy)
		return -EINVAL;

	if (longrun_high_freq <= longrun_low_freq) {
		/* Assume degenerate Longrun table */
		pctg_lo = pctg_hi = 100;
	} else {
		pctg_lo = (policy->min - longrun_low_freq) /
			((longrun_high_freq - longrun_low_freq) / 100);
		pctg_hi = (policy->max - longrun_low_freq) /
			((longrun_high_freq - longrun_low_freq) / 100);
	}

	if (pctg_hi > 100)
		pctg_hi = 100;
	if (pctg_lo > pctg_hi)
		pctg_lo = pctg_hi;

	/* performance or economy mode */
	rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
	msr_lo &= 0xFFFFFFFE;
	switch (policy->policy) {
	case CPUFREQ_POLICY_PERFORMANCE:
		msr_lo |= 0x00000001;
		break;
	case CPUFREQ_POLICY_POWERSAVE:
		break;
	}
	wrmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);

	/* lower and upper boundary */
	rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
	msr_lo &= 0xFFFFFF80;
	msr_hi &= 0xFFFFFF80;
	msr_lo |= pctg_lo;
	msr_hi |= pctg_hi;
	wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);

	return 0;
}


/**
 * longrun_verify_poliy - verifies a new CPUFreq policy
 * @policy: the policy to verify
 *
 * Validates a new CPUFreq policy. This function has to be called with
 * cpufreq_driver locked.
 */
static int longrun_verify_policy(struct cpufreq_policy *policy)
{
	if (!policy)
		return -EINVAL;

	policy->cpu = 0;
	cpufreq_verify_within_cpu_limits(policy);

	if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
	    (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
		return -EINVAL;

	return 0;
}

static unsigned int longrun_get(unsigned int cpu)
{
	u32 eax, ebx, ecx, edx;

	if (cpu)
		return 0;

	cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
	pr_debug("cpuid eax is %u\n", eax);

	return eax * 1000;
}

/**
 * longrun_determine_freqs - determines the lowest and highest possible core frequency
 * @low_freq: an int to put the lowest frequency into
 * @high_freq: an int to put the highest frequency into
 *
 * Determines the lowest and highest possible core frequencies on this CPU.
 * This is necessary to calculate the performance percentage according to
 * TMTA rules:
 * performance_pctg = (target_freq - low_freq)/(high_freq - low_freq)
 */
static int longrun_determine_freqs(unsigned int *low_freq,
						      unsigned int *high_freq)
{
	u32 msr_lo, msr_hi;
	u32 save_lo, save_hi;
	u32 eax, ebx, ecx, edx;
	u32 try_hi;
	struct cpuinfo_x86 *c = &cpu_data(0);

	if (!low_freq || !high_freq)
		return -EINVAL;

	if (cpu_has(c, X86_FEATURE_LRTI)) {
		/* if the LongRun Table Interface is present, the
		 * detection is a bit easier:
		 * For minimum frequency, read out the maximum
		 * level (msr_hi), write that into "currently
		 * selected level", and read out the frequency.
		 * For maximum frequency, read out level zero.
		 */
		/* minimum */
		rdmsr(MSR_TMTA_LRTI_READOUT, msr_lo, msr_hi);
		wrmsr(MSR_TMTA_LRTI_READOUT, msr_hi, msr_hi);
		rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
		*low_freq = msr_lo * 1000; /* to kHz */

		/* maximum */
		wrmsr(MSR_TMTA_LRTI_READOUT, 0, msr_hi);
		rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
		*high_freq = msr_lo * 1000; /* to kHz */

		pr_debug("longrun table interface told %u - %u kHz\n",
				*low_freq, *high_freq);

		if (*low_freq > *high_freq)
			*low_freq = *high_freq;
		return 0;
	}

	/* set the upper border to the value determined during TSC init */
	*high_freq = (cpu_khz / 1000);
	*high_freq = *high_freq * 1000;
	pr_debug("high frequency is %u kHz\n", *high_freq);

	/* get current borders */
	rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
	save_lo = msr_lo & 0x0000007F;
	save_hi = msr_hi & 0x0000007F;

	/* if current perf_pctg is larger than 90%, we need to decrease the
	 * upper limit to make the calculation more accurate.
	 */
	cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
	/* try decreasing in 10% steps, some processors react only
	 * on some barrier values */
	for (try_hi = 80; try_hi > 0 && ecx > 90; try_hi -= 10) {
		/* set to 0 to try_hi perf_pctg */
		msr_lo &= 0xFFFFFF80;
		msr_hi &= 0xFFFFFF80;
		msr_hi |= try_hi;
		wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);

		/* read out current core MHz and current perf_pctg */
		cpuid(0x80860007, &eax, &ebx, &ecx, &edx);

		/* restore values */
		wrmsr(MSR_TMTA_LONGRUN_CTRL, save_lo, save_hi);
	}
	pr_debug("percentage is %u %%, freq is %u MHz\n", ecx, eax);

	/* performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
	 * eqals
	 * low_freq * (1 - perf_pctg) = (cur_freq - high_freq * perf_pctg)
	 *
	 * high_freq * perf_pctg is stored tempoarily into "ebx".
	 */
	ebx = (((cpu_khz / 1000) * ecx) / 100); /* to MHz */

	if ((ecx > 95) || (ecx == 0) || (eax < ebx))
		return -EIO;

	edx = ((eax - ebx) * 100) / (100 - ecx);
	*low_freq = edx * 1000; /* back to kHz */

	pr_debug("low frequency is %u kHz\n", *low_freq);

	if (*low_freq > *high_freq)
		*low_freq = *high_freq;

	return 0;
}


static int longrun_cpu_init(struct cpufreq_policy *policy)
{
	int result = 0;

	/* capability check */
	if (policy->cpu != 0)
		return -ENODEV;

	/* detect low and high frequency */
	result = longrun_determine_freqs(&longrun_low_freq, &longrun_high_freq);
	if (result)
		return result;

	/* cpuinfo and default policy values */
	policy->cpuinfo.min_freq = longrun_low_freq;
	policy->cpuinfo.max_freq = longrun_high_freq;
	longrun_get_policy(policy);

	return 0;
}


static struct cpufreq_driver longrun_driver = {
	.flags		= CPUFREQ_CONST_LOOPS,
	.verify		= longrun_verify_policy,
	.setpolicy	= longrun_set_policy,
	.get		= longrun_get,
	.init		= longrun_cpu_init,
	.name		= "longrun",
};

static const struct x86_cpu_id longrun_ids[] = {
	{ X86_VENDOR_TRANSMETA, X86_FAMILY_ANY, X86_MODEL_ANY,
	  X86_FEATURE_LONGRUN },
	{}
};
MODULE_DEVICE_TABLE(x86cpu, longrun_ids);

/**
 * longrun_init - initializes the Transmeta Crusoe LongRun CPUFreq driver
 *
 * Initializes the LongRun support.
 */
static int __init longrun_init(void)
{
	if (!x86_match_cpu(longrun_ids))
		return -ENODEV;
	return cpufreq_register_driver(&longrun_driver);
}


/**
 * longrun_exit - unregisters LongRun support
 */
static void __exit longrun_exit(void)
{
	cpufreq_unregister_driver(&longrun_driver);
}


MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>");
MODULE_DESCRIPTION("LongRun driver for Transmeta Crusoe and "
		"Efficeon processors.");
MODULE_LICENSE("GPL");

module_init(longrun_init);
module_exit(longrun_exit);
Commit	Line	Data
4f19048f	1	// SPDX-License-Identifier: GPL-2.0-only
1da177e4 LT	2	/*
	3	* (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
	4	*
1da177e4 LT	5	* BIG FAT DISCLAIMER: Work in progress code. Possibly dangerous
	6	*/
	7
	8	#include <linux/kernel.h>
	9	#include <linux/module.h>
	10	#include <linux/init.h>
1da177e4	11	#include <linux/cpufreq.h>
48ee923a	12	#include <linux/timex.h>
1da177e4 LT	13
	14	#include <asm/msr.h>
	15	#include <asm/processor.h>
fa8031ae	16	#include <asm/cpu_device_id.h>
1da177e4	17
221dee28	18	static struct cpufreq_driver longrun_driver;
1da177e4 LT	19
	20	/**
	21	* longrun_{low,high}_freq is needed for the conversion of cpufreq kHz
	22	* values into per cent values. In TMTA microcode, the following is valid:
	23	* performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
	24	*/
	25	static unsigned int longrun_low_freq, longrun_high_freq;
	26
	27
	28	/**
	29	* longrun_get_policy - get the current LongRun policy
	30	* @policy: struct cpufreq_policy where current policy is written into
	31	*
	32	* Reads the current LongRun policy by access to MSR_TMTA_LONGRUN_FLAGS
	33	* and MSR_TMTA_LONGRUN_CTRL
	34	*/
2760984f	35	static void longrun_get_policy(struct cpufreq_policy *policy)
1da177e4 LT	36	{
	37	u32 msr_lo, msr_hi;
	38
	39	rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
2d06d8c4	40	pr_debug("longrun flags are %x - %x\n", msr_lo, msr_hi);
1da177e4 LT	41	if (msr_lo & 0x01)
	42	policy->policy = CPUFREQ_POLICY_PERFORMANCE;
	43	else
	44	policy->policy = CPUFREQ_POLICY_POWERSAVE;
	45
	46	rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
2d06d8c4	47	pr_debug("longrun ctrl is %x - %x\n", msr_lo, msr_hi);
1da177e4 LT	48	msr_lo &= 0x0000007F;
	49	msr_hi &= 0x0000007F;
	50
48ee923a	51	if (longrun_high_freq <= longrun_low_freq) {
1da177e4 LT	52	/* Assume degenerate Longrun table */
	53	policy->min = policy->max = longrun_high_freq;
	54	} else {
	55	policy->min = longrun_low_freq + msr_lo *
	56	((longrun_high_freq - longrun_low_freq) / 100);
	57	policy->max = longrun_low_freq + msr_hi *
	58	((longrun_high_freq - longrun_low_freq) / 100);
	59	}
	60	policy->cpu = 0;
	61	}
	62
	63
	64	/**
	65	* longrun_set_policy - sets a new CPUFreq policy
	66	* @policy: new policy
	67	*
	68	* Sets a new CPUFreq policy on LongRun-capable processors. This function
	69	* has to be called with cpufreq_driver locked.
	70	*/
	71	static int longrun_set_policy(struct cpufreq_policy *policy)
	72	{
	73	u32 msr_lo, msr_hi;
	74	u32 pctg_lo, pctg_hi;
	75
	76	if (!policy)
	77	return -EINVAL;
	78
48ee923a	79	if (longrun_high_freq <= longrun_low_freq) {
1da177e4 LT	80	/* Assume degenerate Longrun table */
	81	pctg_lo = pctg_hi = 100;
	82	} else {
	83	pctg_lo = (policy->min - longrun_low_freq) /
	84	((longrun_high_freq - longrun_low_freq) / 100);
	85	pctg_hi = (policy->max - longrun_low_freq) /
	86	((longrun_high_freq - longrun_low_freq) / 100);
	87	}
	88
	89	if (pctg_hi > 100)
	90	pctg_hi = 100;
	91	if (pctg_lo > pctg_hi)
	92	pctg_lo = pctg_hi;
	93
	94	/* performance or economy mode */
	95	rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
	96	msr_lo &= 0xFFFFFFFE;
	97	switch (policy->policy) {
	98	case CPUFREQ_POLICY_PERFORMANCE:
	99	msr_lo \|= 0x00000001;
	100	break;
	101	case CPUFREQ_POLICY_POWERSAVE:
	102	break;
	103	}
	104	wrmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
	105
	106	/* lower and upper boundary */
	107	rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
	108	msr_lo &= 0xFFFFFF80;
	109	msr_hi &= 0xFFFFFF80;
	110	msr_lo \|= pctg_lo;
	111	msr_hi \|= pctg_hi;
	112	wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
	113
	114	return 0;
	115	}
	116
	117
	118	/**
	119	* longrun_verify_poliy - verifies a new CPUFreq policy
	120	* @policy: the policy to verify
	121	*
	122	* Validates a new CPUFreq policy. This function has to be called with
	123	* cpufreq_driver locked.
	124	*/
	125	static int longrun_verify_policy(struct cpufreq_policy *policy)
	126	{
	127	if (!policy)
	128	return -EINVAL;
	129
	130	policy->cpu = 0;
be49e346	131	cpufreq_verify_within_cpu_limits(policy);
1da177e4 LT	132
	133	if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
	134	(policy->policy != CPUFREQ_POLICY_PERFORMANCE))
	135	return -EINVAL;
	136
	137	return 0;
	138	}
	139
	140	static unsigned int longrun_get(unsigned int cpu)
	141	{
	142	u32 eax, ebx, ecx, edx;
	143
	144	if (cpu)
	145	return 0;
	146
	147	cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
2d06d8c4	148	pr_debug("cpuid eax is %u\n", eax);
1da177e4	149
48ee923a	150	return eax * 1000;
1da177e4 LT	151	}
	152
	153	/**
	154	* longrun_determine_freqs - determines the lowest and highest possible core frequency
	155	* @low_freq: an int to put the lowest frequency into
	156	* @high_freq: an int to put the highest frequency into
	157	*
	158	* Determines the lowest and highest possible core frequencies on this CPU.
	159	* This is necessary to calculate the performance percentage according to
	160	* TMTA rules:
	161	* performance_pctg = (target_freq - low_freq)/(high_freq - low_freq)
	162	*/
2760984f	163	static int longrun_determine_freqs(unsigned int *low_freq,
7e2d8112	164	unsigned int *high_freq)
1da177e4 LT	165	{
	166	u32 msr_lo, msr_hi;
	167	u32 save_lo, save_hi;
	168	u32 eax, ebx, ecx, edx;
	169	u32 try_hi;
92cb7612	170	struct cpuinfo_x86 *c = &cpu_data(0);
1da177e4 LT	171
	172	if (!low_freq \|\| !high_freq)
	173	return -EINVAL;
	174
	175	if (cpu_has(c, X86_FEATURE_LRTI)) {
	176	/* if the LongRun Table Interface is present, the
	177	* detection is a bit easier:
	178	* For minimum frequency, read out the maximum
	179	* level (msr_hi), write that into "currently
	180	* selected level", and read out the frequency.
	181	* For maximum frequency, read out level zero.
	182	*/
	183	/* minimum */
	184	rdmsr(MSR_TMTA_LRTI_READOUT, msr_lo, msr_hi);
	185	wrmsr(MSR_TMTA_LRTI_READOUT, msr_hi, msr_hi);
	186	rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
	187	low_freq = msr_lo 1000; /* to kHz */
	188
	189	/* maximum */
	190	wrmsr(MSR_TMTA_LRTI_READOUT, 0, msr_hi);
	191	rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
	192	high_freq = msr_lo 1000; /* to kHz */
	193
2d06d8c4	194	pr_debug("longrun table interface told %u - %u kHz\n",
48ee923a	195	low_freq, high_freq);
1da177e4 LT	196
	197	if (low_freq > high_freq)
	198	low_freq = high_freq;
	199	return 0;
	200	}
	201
	202	/* set the upper border to the value determined during TSC init */
	203	*high_freq = (cpu_khz / 1000);
	204	high_freq = high_freq * 1000;
2d06d8c4	205	pr_debug("high frequency is %u kHz\n", *high_freq);
1da177e4 LT	206
	207	/* get current borders */
	208	rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
	209	save_lo = msr_lo & 0x0000007F;
	210	save_hi = msr_hi & 0x0000007F;
	211
	212	/* if current perf_pctg is larger than 90%, we need to decrease the
	213	* upper limit to make the calculation more accurate.
	214	*/
	215	cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
	216	/* try decreasing in 10% steps, some processors react only
	217	* on some barrier values */
48ee923a	218	for (try_hi = 80; try_hi > 0 && ecx > 90; try_hi -= 10) {
1da177e4 LT	219	/* set to 0 to try_hi perf_pctg */
	220	msr_lo &= 0xFFFFFF80;
	221	msr_hi &= 0xFFFFFF80;
1da177e4 LT	222	msr_hi \|= try_hi;
	223	wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
	224
	225	/* read out current core MHz and current perf_pctg */
	226	cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
	227
	228	/* restore values */
	229	wrmsr(MSR_TMTA_LONGRUN_CTRL, save_lo, save_hi);
	230	}
2d06d8c4	231	pr_debug("percentage is %u %%, freq is %u MHz\n", ecx, eax);
1da177e4 LT	232
	233	/* performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
	234	* eqals
48ee923a	235	* low_freq * (1 - perf_pctg) = (cur_freq - high_freq * perf_pctg)
1da177e4 LT	236	*
	237	* high_freq * perf_pctg is stored tempoarily into "ebx".
	238	*/
	239	ebx = (((cpu_khz / 1000) * ecx) / 100); /* to MHz */
	240
	241	if ((ecx > 95) \|\| (ecx == 0) \|\| (eax < ebx))
	242	return -EIO;
	243
667ad4f7	244	edx = ((eax - ebx) * 100) / (100 - ecx);
1da177e4 LT	245	low_freq = edx 1000; /* back to kHz */
1da177e4 LT	246
2d06d8c4	247	pr_debug("low frequency is %u kHz\n", *low_freq);
1da177e4 LT	248
	249	if (low_freq > high_freq)
	250	low_freq = high_freq;
	251
	252	return 0;
	253	}
	254
	255
2760984f	256	static int longrun_cpu_init(struct cpufreq_policy *policy)
1da177e4 LT	257	{
	258	int result = 0;
	259
	260	/* capability check */
	261	if (policy->cpu != 0)
	262	return -ENODEV;
	263
	264	/* detect low and high frequency */
	265	result = longrun_determine_freqs(&longrun_low_freq, &longrun_high_freq);
	266	if (result)
	267	return result;
	268
	269	/* cpuinfo and default policy values */
	270	policy->cpuinfo.min_freq = longrun_low_freq;
	271	policy->cpuinfo.max_freq = longrun_high_freq;
1da177e4 LT	272	longrun_get_policy(policy);
	273
	274	return 0;
	275	}
	276
	277
221dee28	278	static struct cpufreq_driver longrun_driver = {
1da177e4 LT	279	.flags = CPUFREQ_CONST_LOOPS,
	280	.verify = longrun_verify_policy,
	281	.setpolicy = longrun_set_policy,
	282	.get = longrun_get,
	283	.init = longrun_cpu_init,
	284	.name = "longrun",
1da177e4 LT	285	};
1da177e4 LT	286
fa8031ae AK	287	static const struct x86_cpu_id longrun_ids[] = {
	288	{ X86_VENDOR_TRANSMETA, X86_FAMILY_ANY, X86_MODEL_ANY,
	289	X86_FEATURE_LONGRUN },
	290	{}
	291	};
	292	MODULE_DEVICE_TABLE(x86cpu, longrun_ids);
1da177e4 LT	293
	294	/**
	295	* longrun_init - initializes the Transmeta Crusoe LongRun CPUFreq driver
	296	*
	297	* Initializes the LongRun support.
	298	*/
	299	static int __init longrun_init(void)
	300	{
fa8031ae	301	if (!x86_match_cpu(longrun_ids))
1da177e4	302	return -ENODEV;
1da177e4 LT	303	return cpufreq_register_driver(&longrun_driver);
	304	}
	305
	306
	307	/**
	308	* longrun_exit - unregisters LongRun support
	309	*/
	310	static void __exit longrun_exit(void)
	311	{
	312	cpufreq_unregister_driver(&longrun_driver);
	313	}
	314
	315
48ee923a DJ	316	MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>");
	317	MODULE_DESCRIPTION("LongRun driver for Transmeta Crusoe and "
	318	"Efficeon processors.");
	319	MODULE_LICENSE("GPL");
1da177e4 LT	320
	321	module_init(longrun_init);
	322	module_exit(longrun_exit);