[linux-block.git] / drivers / cpufreq / kirkwood-cpufreq.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 *	kirkwood_freq.c: cpufreq driver for the Marvell kirkwood
 *
 *	Copyright (C) 2013 Andrew Lunn <andrew@lunn.ch>
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/clk.h>
#include <linux/cpufreq.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <asm/proc-fns.h>

#define CPU_SW_INT_BLK BIT(28)

static struct priv
{
	struct clk *cpu_clk;
	struct clk *ddr_clk;
	struct clk *powersave_clk;
	struct device *dev;
	void __iomem *base;
} priv;

#define STATE_CPU_FREQ 0x01
#define STATE_DDR_FREQ 0x02

/*
 * Kirkwood can swap the clock to the CPU between two clocks:
 *
 * - cpu clk
 * - ddr clk
 *
 * The frequencies are set at runtime before registering this table.
 */
static struct cpufreq_frequency_table kirkwood_freq_table[] = {
	{0, STATE_CPU_FREQ,	0}, /* CPU uses cpuclk */
	{0, STATE_DDR_FREQ,	0}, /* CPU uses ddrclk */
	{0, 0,			CPUFREQ_TABLE_END},
};

static unsigned int kirkwood_cpufreq_get_cpu_frequency(unsigned int cpu)
{
	return clk_get_rate(priv.powersave_clk) / 1000;
}

static int kirkwood_cpufreq_target(struct cpufreq_policy *policy,
			    unsigned int index)
{
	unsigned int state = kirkwood_freq_table[index].driver_data;
	unsigned long reg;

	local_irq_disable();

	/* Disable interrupts to the CPU */
	reg = readl_relaxed(priv.base);
	reg |= CPU_SW_INT_BLK;
	writel_relaxed(reg, priv.base);

	switch (state) {
	case STATE_CPU_FREQ:
		clk_set_parent(priv.powersave_clk, priv.cpu_clk);
		break;
	case STATE_DDR_FREQ:
		clk_set_parent(priv.powersave_clk, priv.ddr_clk);
		break;
	}

	/* Wait-for-Interrupt, while the hardware changes frequency */
	cpu_do_idle();

	/* Enable interrupts to the CPU */
	reg = readl_relaxed(priv.base);
	reg &= ~CPU_SW_INT_BLK;
	writel_relaxed(reg, priv.base);

	local_irq_enable();

	return 0;
}

/* Module init and exit code */
static int kirkwood_cpufreq_cpu_init(struct cpufreq_policy *policy)
{
	cpufreq_generic_init(policy, kirkwood_freq_table, 5000);
	return 0;
}

static struct cpufreq_driver kirkwood_cpufreq_driver = {
	.flags	= CPUFREQ_NEED_INITIAL_FREQ_CHECK,
	.get	= kirkwood_cpufreq_get_cpu_frequency,
	.verify	= cpufreq_generic_frequency_table_verify,
	.target_index = kirkwood_cpufreq_target,
	.init	= kirkwood_cpufreq_cpu_init,
	.name	= "kirkwood-cpufreq",
	.attr	= cpufreq_generic_attr,
};

static int kirkwood_cpufreq_probe(struct platform_device *pdev)
{
	struct device_node *np;
	int err;

	priv.dev = &pdev->dev;

	priv.base = devm_platform_ioremap_resource(pdev, 0);
	if (IS_ERR(priv.base))
		return PTR_ERR(priv.base);

	np = of_cpu_device_node_get(0);
	if (!np) {
		dev_err(&pdev->dev, "failed to get cpu device node\n");
		return -ENODEV;
	}

	priv.cpu_clk = of_clk_get_by_name(np, "cpu_clk");
	if (IS_ERR(priv.cpu_clk)) {
		dev_err(priv.dev, "Unable to get cpuclk\n");
		err = PTR_ERR(priv.cpu_clk);
		goto out_node;
	}

	err = clk_prepare_enable(priv.cpu_clk);
	if (err) {
		dev_err(priv.dev, "Unable to prepare cpuclk\n");
		goto out_node;
	}

	kirkwood_freq_table[0].frequency = clk_get_rate(priv.cpu_clk) / 1000;

	priv.ddr_clk = of_clk_get_by_name(np, "ddrclk");
	if (IS_ERR(priv.ddr_clk)) {
		dev_err(priv.dev, "Unable to get ddrclk\n");
		err = PTR_ERR(priv.ddr_clk);
		goto out_cpu;
	}

	err = clk_prepare_enable(priv.ddr_clk);
	if (err) {
		dev_err(priv.dev, "Unable to prepare ddrclk\n");
		goto out_cpu;
	}
	kirkwood_freq_table[1].frequency = clk_get_rate(priv.ddr_clk) / 1000;

	priv.powersave_clk = of_clk_get_by_name(np, "powersave");
	if (IS_ERR(priv.powersave_clk)) {
		dev_err(priv.dev, "Unable to get powersave\n");
		err = PTR_ERR(priv.powersave_clk);
		goto out_ddr;
	}
	err = clk_prepare_enable(priv.powersave_clk);
	if (err) {
		dev_err(priv.dev, "Unable to prepare powersave clk\n");
		goto out_ddr;
	}

	err = cpufreq_register_driver(&kirkwood_cpufreq_driver);
	if (err) {
		dev_err(priv.dev, "Failed to register cpufreq driver\n");
		goto out_powersave;
	}

	of_node_put(np);
	return 0;

out_powersave:
	clk_disable_unprepare(priv.powersave_clk);
out_ddr:
	clk_disable_unprepare(priv.ddr_clk);
out_cpu:
	clk_disable_unprepare(priv.cpu_clk);
out_node:
	of_node_put(np);

	return err;
}

static void kirkwood_cpufreq_remove(struct platform_device *pdev)
{
	cpufreq_unregister_driver(&kirkwood_cpufreq_driver);

	clk_disable_unprepare(priv.powersave_clk);
	clk_disable_unprepare(priv.ddr_clk);
	clk_disable_unprepare(priv.cpu_clk);
}

static struct platform_driver kirkwood_cpufreq_platform_driver = {
	.probe = kirkwood_cpufreq_probe,
	.remove_new = kirkwood_cpufreq_remove,
	.driver = {
		.name = "kirkwood-cpufreq",
	},
};

module_platform_driver(kirkwood_cpufreq_platform_driver);

MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch");
MODULE_DESCRIPTION("cpufreq driver for Marvell's kirkwood CPU");
MODULE_ALIAS("platform:kirkwood-cpufreq");
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
2a4bd9f0 AL	2	/*
	3	* kirkwood_freq.c: cpufreq driver for the Marvell kirkwood
	4	*
	5	* Copyright (C) 2013 Andrew Lunn <andrew@lunn.ch>
2a4bd9f0 AL	6	*/
	7
	8	#include <linux/kernel.h>
	9	#include <linux/module.h>
	10	#include <linux/clk.h>
2a4bd9f0	11	#include <linux/cpufreq.h>
21bb32b1	12	#include <linux/of.h>
2a4bd9f0 AL	13	#include <linux/platform_device.h>
	14	#include <linux/io.h>
	15	#include <asm/proc-fns.h>
	16
	17	#define CPU_SW_INT_BLK BIT(28)
	18
	19	static struct priv
	20	{
	21	struct clk *cpu_clk;
	22	struct clk *ddr_clk;
	23	struct clk *powersave_clk;
	24	struct device *dev;
	25	void __iomem *base;
	26	} priv;
	27
	28	#define STATE_CPU_FREQ 0x01
	29	#define STATE_DDR_FREQ 0x02
	30
	31	/*
	32	* Kirkwood can swap the clock to the CPU between two clocks:
	33	*
	34	* - cpu clk
	35	* - ddr clk
	36	*
10529938	37	* The frequencies are set at runtime before registering this table.
2a4bd9f0 AL	38	*/
2a4bd9f0 AL	39	static struct cpufreq_frequency_table kirkwood_freq_table[] = {
7f4b0461 VK	40	{0, STATE_CPU_FREQ, 0}, /* CPU uses cpuclk */
	41	{0, STATE_DDR_FREQ, 0}, /* CPU uses ddrclk */
	42	{0, 0, CPUFREQ_TABLE_END},
2a4bd9f0 AL	43	};
	44
	45	static unsigned int kirkwood_cpufreq_get_cpu_frequency(unsigned int cpu)
	46	{
10529938	47	return clk_get_rate(priv.powersave_clk) / 1000;
2a4bd9f0 AL	48	}
2a4bd9f0 AL	49
9c0ebcf7 VK	50	static int kirkwood_cpufreq_target(struct cpufreq_policy *policy,
9c0ebcf7 VK	51	unsigned int index)
2a4bd9f0	52	{
50701588	53	unsigned int state = kirkwood_freq_table[index].driver_data;
2a4bd9f0 AL	54	unsigned long reg;
2a4bd9f0 AL	55
d4019f0a	56	local_irq_disable();
2a4bd9f0	57
d4019f0a VK	58	/* Disable interrupts to the CPU */
	59	reg = readl_relaxed(priv.base);
	60	reg \|= CPU_SW_INT_BLK;
	61	writel_relaxed(reg, priv.base);
2a4bd9f0	62
d4019f0a VK	63	switch (state) {
d4019f0a VK	64	case STATE_CPU_FREQ:
10529938	65	clk_set_parent(priv.powersave_clk, priv.cpu_clk);
d4019f0a VK	66	break;
d4019f0a VK	67	case STATE_DDR_FREQ:
10529938	68	clk_set_parent(priv.powersave_clk, priv.ddr_clk);
d4019f0a VK	69	break;
d4019f0a VK	70	}
2a4bd9f0	71
d4019f0a VK	72	/* Wait-for-Interrupt, while the hardware changes frequency */
d4019f0a VK	73	cpu_do_idle();
2a4bd9f0	74
d4019f0a VK	75	/* Enable interrupts to the CPU */
	76	reg = readl_relaxed(priv.base);
	77	reg &= ~CPU_SW_INT_BLK;
	78	writel_relaxed(reg, priv.base);
2a4bd9f0	79
d4019f0a	80	local_irq_enable();
2a4bd9f0 AL	81
	82	return 0;
	83	}
	84
	85	/* Module init and exit code */
	86	static int kirkwood_cpufreq_cpu_init(struct cpufreq_policy *policy)
	87	{
c4dcc8a1 VK	88	cpufreq_generic_init(policy, kirkwood_freq_table, 5000);
c4dcc8a1 VK	89	return 0;
2a4bd9f0 AL	90	}
2a4bd9f0 AL	91
2a4bd9f0	92	static struct cpufreq_driver kirkwood_cpufreq_driver = {
ae6b4271	93	.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
2a4bd9f0	94	.get = kirkwood_cpufreq_get_cpu_frequency,
a86a41a1	95	.verify = cpufreq_generic_frequency_table_verify,
9c0ebcf7	96	.target_index = kirkwood_cpufreq_target,
2a4bd9f0	97	.init = kirkwood_cpufreq_cpu_init,
2a4bd9f0	98	.name = "kirkwood-cpufreq",
a86a41a1	99	.attr = cpufreq_generic_attr,
2a4bd9f0 AL	100	};
	101
	102	static int kirkwood_cpufreq_probe(struct platform_device *pdev)
	103	{
	104	struct device_node *np;
2a4bd9f0 AL	105	int err;
	106
	107	priv.dev = &pdev->dev;
	108
af9c8e91	109	priv.base = devm_platform_ioremap_resource(pdev, 0);
cc721c4f SMP	110	if (IS_ERR(priv.base))
cc721c4f SMP	111	return PTR_ERR(priv.base);
2a4bd9f0	112
e768f350 SK	113	np = of_cpu_device_node_get(0);
	114	if (!np) {
	115	dev_err(&pdev->dev, "failed to get cpu device node\n");
2a4bd9f0	116	return -ENODEV;
e768f350	117	}
2a4bd9f0 AL	118
	119	priv.cpu_clk = of_clk_get_by_name(np, "cpu_clk");
	120	if (IS_ERR(priv.cpu_clk)) {
4c232f94	121	dev_err(priv.dev, "Unable to get cpuclk\n");
7c468966 WY	122	err = PTR_ERR(priv.cpu_clk);
7c468966 WY	123	goto out_node;
2a4bd9f0 AL	124	}
2a4bd9f0 AL	125
7575f825 AY	126	err = clk_prepare_enable(priv.cpu_clk);
	127	if (err) {
	128	dev_err(priv.dev, "Unable to prepare cpuclk\n");
7c468966	129	goto out_node;
7575f825 AY	130	}
7575f825 AY	131
2a4bd9f0 AL	132	kirkwood_freq_table[0].frequency = clk_get_rate(priv.cpu_clk) / 1000;
	133
	134	priv.ddr_clk = of_clk_get_by_name(np, "ddrclk");
	135	if (IS_ERR(priv.ddr_clk)) {
4c232f94	136	dev_err(priv.dev, "Unable to get ddrclk\n");
2a4bd9f0 AL	137	err = PTR_ERR(priv.ddr_clk);
	138	goto out_cpu;
	139	}
	140
7575f825 AY	141	err = clk_prepare_enable(priv.ddr_clk);
	142	if (err) {
	143	dev_err(priv.dev, "Unable to prepare ddrclk\n");
	144	goto out_cpu;
	145	}
2a4bd9f0 AL	146	kirkwood_freq_table[1].frequency = clk_get_rate(priv.ddr_clk) / 1000;
	147
	148	priv.powersave_clk = of_clk_get_by_name(np, "powersave");
	149	if (IS_ERR(priv.powersave_clk)) {
4c232f94	150	dev_err(priv.dev, "Unable to get powersave\n");
2a4bd9f0 AL	151	err = PTR_ERR(priv.powersave_clk);
	152	goto out_ddr;
	153	}
7575f825 AY	154	err = clk_prepare_enable(priv.powersave_clk);
	155	if (err) {
	156	dev_err(priv.dev, "Unable to prepare powersave clk\n");
	157	goto out_ddr;
	158	}
2a4bd9f0	159
2a4bd9f0	160	err = cpufreq_register_driver(&kirkwood_cpufreq_driver);
7c468966 WY	161	if (err) {
	162	dev_err(priv.dev, "Failed to register cpufreq driver\n");
	163	goto out_powersave;
	164	}
2a4bd9f0	165
7c468966 WY	166	of_node_put(np);
7c468966 WY	167	return 0;
2a4bd9f0	168
7c468966	169	out_powersave:
2a4bd9f0 AL	170	clk_disable_unprepare(priv.powersave_clk);
	171	out_ddr:
	172	clk_disable_unprepare(priv.ddr_clk);
	173	out_cpu:
	174	clk_disable_unprepare(priv.cpu_clk);
7c468966	175	out_node:
2a4bd9f0 AL	176	of_node_put(np);
	177
	178	return err;
	179	}
	180
cc35f433	181	static void kirkwood_cpufreq_remove(struct platform_device *pdev)
2a4bd9f0 AL	182	{
	183	cpufreq_unregister_driver(&kirkwood_cpufreq_driver);
	184
	185	clk_disable_unprepare(priv.powersave_clk);
	186	clk_disable_unprepare(priv.ddr_clk);
	187	clk_disable_unprepare(priv.cpu_clk);
2a4bd9f0 AL	188	}
	189
	190	static struct platform_driver kirkwood_cpufreq_platform_driver = {
	191	.probe = kirkwood_cpufreq_probe,
cc35f433	192	.remove_new = kirkwood_cpufreq_remove,
2a4bd9f0 AL	193	.driver = {
2a4bd9f0 AL	194	.name = "kirkwood-cpufreq",
2a4bd9f0 AL	195	},
	196	};
	197
	198	module_platform_driver(kirkwood_cpufreq_platform_driver);
	199
	200	MODULE_LICENSE("GPL v2");
	201	MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch");
	202	MODULE_DESCRIPTION("cpufreq driver for Marvell's kirkwood CPU");
	203	MODULE_ALIAS("platform:kirkwood-cpufreq");