cpufreq: exynos: Use APLL_FREQ macro for cpu divider value
[linux-2.6-block.git] / drivers / cpufreq / exynos-cpufreq.c
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1/*
2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * EXYNOS - CPU frequency scaling support for EXYNOS series
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
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12#include <linux/kernel.h>
13#include <linux/err.h>
14#include <linux/clk.h>
15#include <linux/io.h>
16#include <linux/slab.h>
17#include <linux/regulator/consumer.h>
18#include <linux/cpufreq.h>
19#include <linux/suspend.h>
a125a17f 20
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21#include <mach/cpufreq.h>
22
6c523c61 23#include <plat/cpu.h>
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24
25static struct exynos_dvfs_info *exynos_info;
26
27static struct regulator *arm_regulator;
28static struct cpufreq_freqs freqs;
29
30static unsigned int locking_frequency;
31static bool frequency_locked;
32static DEFINE_MUTEX(cpufreq_lock);
33
5542721a 34static int exynos_verify_speed(struct cpufreq_policy *policy)
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35{
36 return cpufreq_frequency_table_verify(policy,
37 exynos_info->freq_table);
38}
39
5542721a 40static unsigned int exynos_getspeed(unsigned int cpu)
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41{
42 return clk_get_rate(exynos_info->cpu_clk) / 1000;
43}
44
45static int exynos_target(struct cpufreq_policy *policy,
46 unsigned int target_freq,
47 unsigned int relation)
48{
49 unsigned int index, old_index;
50 unsigned int arm_volt, safe_arm_volt = 0;
51 int ret = 0;
52 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
53 unsigned int *volt_table = exynos_info->volt_table;
54 unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
55
56 mutex_lock(&cpufreq_lock);
57
58 freqs.old = policy->cur;
59
60 if (frequency_locked && target_freq != locking_frequency) {
61 ret = -EAGAIN;
62 goto out;
63 }
64
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65 /*
66 * The policy max have been changed so that we cannot get proper
67 * old_index with cpufreq_frequency_table_target(). Thus, ignore
68 * policy and get the index from the raw freqeuncy table.
69 */
70 for (old_index = 0;
71 freq_table[old_index].frequency != CPUFREQ_TABLE_END;
72 old_index++)
73 if (freq_table[old_index].frequency == freqs.old)
74 break;
75
76 if (freq_table[old_index].frequency == CPUFREQ_TABLE_END) {
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77 ret = -EINVAL;
78 goto out;
79 }
80
81 if (cpufreq_frequency_table_target(policy, freq_table,
82 target_freq, relation, &index)) {
83 ret = -EINVAL;
84 goto out;
85 }
86
87 freqs.new = freq_table[index].frequency;
88 freqs.cpu = policy->cpu;
89
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90 if (freqs.new == freqs.old)
91 goto out;
92
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93 /*
94 * ARM clock source will be changed APLL to MPLL temporary
95 * To support this level, need to control regulator for
96 * required voltage level
97 */
98 if (exynos_info->need_apll_change != NULL) {
99 if (exynos_info->need_apll_change(old_index, index) &&
100 (freq_table[index].frequency < mpll_freq_khz) &&
101 (freq_table[old_index].frequency < mpll_freq_khz))
102 safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
103 }
104 arm_volt = volt_table[index];
105
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106 for_each_cpu(freqs.cpu, policy->cpus)
107 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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108
109 /* When the new frequency is higher than current frequency */
110 if ((freqs.new > freqs.old) && !safe_arm_volt) {
111 /* Firstly, voltage up to increase frequency */
112 regulator_set_voltage(arm_regulator, arm_volt,
113 arm_volt);
114 }
115
116 if (safe_arm_volt)
117 regulator_set_voltage(arm_regulator, safe_arm_volt,
118 safe_arm_volt);
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119
120 exynos_info->set_freq(old_index, index);
a125a17f 121
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122 for_each_cpu(freqs.cpu, policy->cpus)
123 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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124
125 /* When the new frequency is lower than current frequency */
126 if ((freqs.new < freqs.old) ||
127 ((freqs.new > freqs.old) && safe_arm_volt)) {
128 /* down the voltage after frequency change */
129 regulator_set_voltage(arm_regulator, arm_volt,
130 arm_volt);
131 }
132
133out:
134 mutex_unlock(&cpufreq_lock);
135
136 return ret;
137}
138
139#ifdef CONFIG_PM
140static int exynos_cpufreq_suspend(struct cpufreq_policy *policy)
141{
142 return 0;
143}
144
145static int exynos_cpufreq_resume(struct cpufreq_policy *policy)
146{
147 return 0;
148}
149#endif
150
151/**
152 * exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume
153 * context
154 * @notifier
155 * @pm_event
156 * @v
157 *
158 * While frequency_locked == true, target() ignores every frequency but
159 * locking_frequency. The locking_frequency value is the initial frequency,
160 * which is set by the bootloader. In order to eliminate possible
161 * inconsistency in clock values, we save and restore frequencies during
162 * suspend and resume and block CPUFREQ activities. Note that the standard
163 * suspend/resume cannot be used as they are too deep (syscore_ops) for
164 * regulator actions.
165 */
166static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier,
167 unsigned long pm_event, void *v)
168{
169 struct cpufreq_policy *policy = cpufreq_cpu_get(0); /* boot CPU */
170 static unsigned int saved_frequency;
171 unsigned int temp;
172
173 mutex_lock(&cpufreq_lock);
174 switch (pm_event) {
175 case PM_SUSPEND_PREPARE:
176 if (frequency_locked)
177 goto out;
178
179 frequency_locked = true;
180
181 if (locking_frequency) {
182 saved_frequency = exynos_getspeed(0);
183
184 mutex_unlock(&cpufreq_lock);
185 exynos_target(policy, locking_frequency,
186 CPUFREQ_RELATION_H);
187 mutex_lock(&cpufreq_lock);
188 }
189 break;
190
191 case PM_POST_SUSPEND:
192 if (saved_frequency) {
193 /*
194 * While frequency_locked, only locking_frequency
195 * is valid for target(). In order to use
196 * saved_frequency while keeping frequency_locked,
197 * we temporarly overwrite locking_frequency.
198 */
199 temp = locking_frequency;
200 locking_frequency = saved_frequency;
201
202 mutex_unlock(&cpufreq_lock);
203 exynos_target(policy, locking_frequency,
204 CPUFREQ_RELATION_H);
205 mutex_lock(&cpufreq_lock);
206
207 locking_frequency = temp;
208 }
209 frequency_locked = false;
210 break;
211 }
212out:
213 mutex_unlock(&cpufreq_lock);
214
215 return NOTIFY_OK;
216}
217
218static struct notifier_block exynos_cpufreq_nb = {
219 .notifier_call = exynos_cpufreq_pm_notifier,
220};
221
222static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
223{
224 policy->cur = policy->min = policy->max = exynos_getspeed(policy->cpu);
225
226 cpufreq_frequency_table_get_attr(exynos_info->freq_table, policy->cpu);
227
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228 locking_frequency = exynos_getspeed(0);
229
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230 /* set the transition latency value */
231 policy->cpuinfo.transition_latency = 100000;
232
233 /*
234 * EXYNOS4 multi-core processors has 2 cores
235 * that the frequency cannot be set independently.
236 * Each cpu is bound to the same speed.
237 * So the affected cpu is all of the cpus.
238 */
239 if (num_online_cpus() == 1) {
240 cpumask_copy(policy->related_cpus, cpu_possible_mask);
241 cpumask_copy(policy->cpus, cpu_online_mask);
242 } else {
fd06a208 243 policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
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244 cpumask_setall(policy->cpus);
245 }
246
247 return cpufreq_frequency_table_cpuinfo(policy, exynos_info->freq_table);
248}
249
250static struct cpufreq_driver exynos_driver = {
251 .flags = CPUFREQ_STICKY,
252 .verify = exynos_verify_speed,
253 .target = exynos_target,
254 .get = exynos_getspeed,
255 .init = exynos_cpufreq_cpu_init,
256 .name = "exynos_cpufreq",
257#ifdef CONFIG_PM
258 .suspend = exynos_cpufreq_suspend,
259 .resume = exynos_cpufreq_resume,
260#endif
261};
262
263static int __init exynos_cpufreq_init(void)
264{
265 int ret = -EINVAL;
266
267 exynos_info = kzalloc(sizeof(struct exynos_dvfs_info), GFP_KERNEL);
268 if (!exynos_info)
269 return -ENOMEM;
270
271 if (soc_is_exynos4210())
272 ret = exynos4210_cpufreq_init(exynos_info);
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273 else if (soc_is_exynos4212() || soc_is_exynos4412())
274 ret = exynos4x12_cpufreq_init(exynos_info);
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275 else if (soc_is_exynos5250())
276 ret = exynos5250_cpufreq_init(exynos_info);
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277 else
278 pr_err("%s: CPU type not found\n", __func__);
279
280 if (ret)
281 goto err_vdd_arm;
282
283 if (exynos_info->set_freq == NULL) {
284 pr_err("%s: No set_freq function (ERR)\n", __func__);
285 goto err_vdd_arm;
286 }
287
288 arm_regulator = regulator_get(NULL, "vdd_arm");
289 if (IS_ERR(arm_regulator)) {
290 pr_err("%s: failed to get resource vdd_arm\n", __func__);
291 goto err_vdd_arm;
292 }
293
294 register_pm_notifier(&exynos_cpufreq_nb);
295
296 if (cpufreq_register_driver(&exynos_driver)) {
297 pr_err("%s: failed to register cpufreq driver\n", __func__);
298 goto err_cpufreq;
299 }
300
301 return 0;
302err_cpufreq:
303 unregister_pm_notifier(&exynos_cpufreq_nb);
304
184cddd1 305 regulator_put(arm_regulator);
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306err_vdd_arm:
307 kfree(exynos_info);
308 pr_debug("%s: failed initialization\n", __func__);
309 return -EINVAL;
310}
311late_initcall(exynos_cpufreq_init);