Commit | Line | Data |
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95ceafd4 SG |
1 | /* |
2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. | |
3 | * | |
748c8766 VK |
4 | * Copyright (C) 2014 Linaro. |
5 | * Viresh Kumar <viresh.kumar@linaro.org> | |
6 | * | |
bbcf0719 | 7 | * The OPP code in function set_target() is reused from |
95ceafd4 SG |
8 | * drivers/cpufreq/omap-cpufreq.c |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
16 | ||
17 | #include <linux/clk.h> | |
e1825b25 | 18 | #include <linux/cpu.h> |
77cff592 | 19 | #include <linux/cpu_cooling.h> |
95ceafd4 | 20 | #include <linux/cpufreq.h> |
34e5a527 | 21 | #include <linux/cpufreq-dt.h> |
77cff592 | 22 | #include <linux/cpumask.h> |
95ceafd4 SG |
23 | #include <linux/err.h> |
24 | #include <linux/module.h> | |
25 | #include <linux/of.h> | |
e4db1c74 | 26 | #include <linux/pm_opp.h> |
5553f9e2 | 27 | #include <linux/platform_device.h> |
95ceafd4 SG |
28 | #include <linux/regulator/consumer.h> |
29 | #include <linux/slab.h> | |
77cff592 | 30 | #include <linux/thermal.h> |
95ceafd4 | 31 | |
d2f31f1d VK |
32 | struct private_data { |
33 | struct device *cpu_dev; | |
d2f31f1d | 34 | struct thermal_cooling_device *cdev; |
050794aa | 35 | const char *reg_name; |
d2f31f1d | 36 | }; |
95ceafd4 | 37 | |
21c36d35 BZ |
38 | static struct freq_attr *cpufreq_dt_attr[] = { |
39 | &cpufreq_freq_attr_scaling_available_freqs, | |
40 | NULL, /* Extra space for boost-attr if required */ | |
41 | NULL, | |
42 | }; | |
43 | ||
bbcf0719 | 44 | static int set_target(struct cpufreq_policy *policy, unsigned int index) |
95ceafd4 | 45 | { |
d2f31f1d | 46 | struct private_data *priv = policy->driver_data; |
95ceafd4 | 47 | |
78c3ba5d VK |
48 | return dev_pm_opp_set_rate(priv->cpu_dev, |
49 | policy->freq_table[index].frequency * 1000); | |
95ceafd4 SG |
50 | } |
51 | ||
050794aa VK |
52 | /* |
53 | * An earlier version of opp-v1 bindings used to name the regulator | |
54 | * "cpu0-supply", we still need to handle that for backwards compatibility. | |
55 | */ | |
df2c8ec2 | 56 | static const char *find_supply_name(struct device *dev) |
050794aa | 57 | { |
df2c8ec2 | 58 | struct device_node *np; |
050794aa VK |
59 | struct property *pp; |
60 | int cpu = dev->id; | |
df2c8ec2 VK |
61 | const char *name = NULL; |
62 | ||
63 | np = of_node_get(dev->of_node); | |
64 | ||
65 | /* This must be valid for sure */ | |
66 | if (WARN_ON(!np)) | |
67 | return NULL; | |
050794aa VK |
68 | |
69 | /* Try "cpu0" for older DTs */ | |
70 | if (!cpu) { | |
71 | pp = of_find_property(np, "cpu0-supply", NULL); | |
df2c8ec2 VK |
72 | if (pp) { |
73 | name = "cpu0"; | |
74 | goto node_put; | |
75 | } | |
050794aa VK |
76 | } |
77 | ||
78 | pp = of_find_property(np, "cpu-supply", NULL); | |
df2c8ec2 VK |
79 | if (pp) { |
80 | name = "cpu"; | |
81 | goto node_put; | |
82 | } | |
050794aa VK |
83 | |
84 | dev_dbg(dev, "no regulator for cpu%d\n", cpu); | |
df2c8ec2 VK |
85 | node_put: |
86 | of_node_put(np); | |
87 | return name; | |
050794aa VK |
88 | } |
89 | ||
dd02a3d9 | 90 | static int resources_available(void) |
95ceafd4 | 91 | { |
d2f31f1d VK |
92 | struct device *cpu_dev; |
93 | struct regulator *cpu_reg; | |
94 | struct clk *cpu_clk; | |
95 | int ret = 0; | |
dd02a3d9 | 96 | const char *name; |
95ceafd4 | 97 | |
dd02a3d9 | 98 | cpu_dev = get_cpu_device(0); |
e1825b25 | 99 | if (!cpu_dev) { |
dd02a3d9 | 100 | pr_err("failed to get cpu0 device\n"); |
e1825b25 SK |
101 | return -ENODEV; |
102 | } | |
6754f556 | 103 | |
dd02a3d9 VK |
104 | cpu_clk = clk_get(cpu_dev, NULL); |
105 | ret = PTR_ERR_OR_ZERO(cpu_clk); | |
b331bc20 | 106 | if (ret) { |
fc31d6f5 | 107 | /* |
dd02a3d9 VK |
108 | * If cpu's clk node is present, but clock is not yet |
109 | * registered, we should try defering probe. | |
fc31d6f5 | 110 | */ |
dd02a3d9 VK |
111 | if (ret == -EPROBE_DEFER) |
112 | dev_dbg(cpu_dev, "clock not ready, retry\n"); | |
113 | else | |
114 | dev_err(cpu_dev, "failed to get clock: %d\n", ret); | |
2d2c5e0e | 115 | |
dd02a3d9 | 116 | return ret; |
fc31d6f5 NM |
117 | } |
118 | ||
dd02a3d9 VK |
119 | clk_put(cpu_clk); |
120 | ||
121 | name = find_supply_name(cpu_dev); | |
122 | /* Platform doesn't require regulator */ | |
123 | if (!name) | |
124 | return 0; | |
d2f31f1d | 125 | |
dd02a3d9 VK |
126 | cpu_reg = regulator_get_optional(cpu_dev, name); |
127 | ret = PTR_ERR_OR_ZERO(cpu_reg); | |
128 | if (ret) { | |
48a8624b | 129 | /* |
dd02a3d9 VK |
130 | * If cpu's regulator supply node is present, but regulator is |
131 | * not yet registered, we should try defering probe. | |
48a8624b VK |
132 | */ |
133 | if (ret == -EPROBE_DEFER) | |
dd02a3d9 | 134 | dev_dbg(cpu_dev, "cpu0 regulator not ready, retry\n"); |
48a8624b | 135 | else |
dd02a3d9 VK |
136 | dev_dbg(cpu_dev, "no regulator for cpu0: %d\n", ret); |
137 | ||
138 | return ret; | |
d2f31f1d VK |
139 | } |
140 | ||
dd02a3d9 VK |
141 | regulator_put(cpu_reg); |
142 | return 0; | |
d2f31f1d VK |
143 | } |
144 | ||
bbcf0719 | 145 | static int cpufreq_init(struct cpufreq_policy *policy) |
d2f31f1d VK |
146 | { |
147 | struct cpufreq_frequency_table *freq_table; | |
d2f31f1d VK |
148 | struct private_data *priv; |
149 | struct device *cpu_dev; | |
d2f31f1d | 150 | struct clk *cpu_clk; |
953ba9ff | 151 | struct dev_pm_opp *suspend_opp; |
d2f31f1d | 152 | unsigned int transition_latency; |
457e99e6 | 153 | bool opp_v1 = false; |
050794aa | 154 | const char *name; |
d2f31f1d VK |
155 | int ret; |
156 | ||
dd02a3d9 VK |
157 | cpu_dev = get_cpu_device(policy->cpu); |
158 | if (!cpu_dev) { | |
159 | pr_err("failed to get cpu%d device\n", policy->cpu); | |
160 | return -ENODEV; | |
161 | } | |
162 | ||
163 | cpu_clk = clk_get(cpu_dev, NULL); | |
164 | if (IS_ERR(cpu_clk)) { | |
165 | ret = PTR_ERR(cpu_clk); | |
166 | dev_err(cpu_dev, "%s: failed to get clk: %d\n", __func__, ret); | |
d2f31f1d VK |
167 | return ret; |
168 | } | |
48a8624b | 169 | |
2e02d872 | 170 | /* Get OPP-sharing information from "operating-points-v2" bindings */ |
8f8d37b2 | 171 | ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, policy->cpus); |
2e02d872 VK |
172 | if (ret) { |
173 | /* | |
174 | * operating-points-v2 not supported, fallback to old method of | |
175 | * finding shared-OPPs for backward compatibility. | |
176 | */ | |
177 | if (ret == -ENOENT) | |
457e99e6 | 178 | opp_v1 = true; |
2e02d872 | 179 | else |
dd02a3d9 | 180 | goto out_put_clk; |
2e02d872 VK |
181 | } |
182 | ||
050794aa VK |
183 | /* |
184 | * OPP layer will be taking care of regulators now, but it needs to know | |
185 | * the name of the regulator first. | |
186 | */ | |
df2c8ec2 | 187 | name = find_supply_name(cpu_dev); |
050794aa VK |
188 | if (name) { |
189 | ret = dev_pm_opp_set_regulator(cpu_dev, name); | |
190 | if (ret) { | |
191 | dev_err(cpu_dev, "Failed to set regulator for cpu%d: %d\n", | |
192 | policy->cpu, ret); | |
dd02a3d9 | 193 | goto out_put_clk; |
050794aa VK |
194 | } |
195 | } | |
196 | ||
2e02d872 VK |
197 | /* |
198 | * Initialize OPP tables for all policy->cpus. They will be shared by | |
199 | * all CPUs which have marked their CPUs shared with OPP bindings. | |
200 | * | |
201 | * For platforms not using operating-points-v2 bindings, we do this | |
202 | * before updating policy->cpus. Otherwise, we will end up creating | |
203 | * duplicate OPPs for policy->cpus. | |
204 | * | |
205 | * OPPs might be populated at runtime, don't check for error here | |
206 | */ | |
8f8d37b2 | 207 | dev_pm_opp_of_cpumask_add_table(policy->cpus); |
2e02d872 | 208 | |
7d5d0c8b VK |
209 | /* |
210 | * But we need OPP table to function so if it is not there let's | |
211 | * give platform code chance to provide it for us. | |
212 | */ | |
213 | ret = dev_pm_opp_get_opp_count(cpu_dev); | |
214 | if (ret <= 0) { | |
896d6a4c | 215 | dev_dbg(cpu_dev, "OPP table is not ready, deferring probe\n"); |
7d5d0c8b VK |
216 | ret = -EPROBE_DEFER; |
217 | goto out_free_opp; | |
218 | } | |
219 | ||
457e99e6 | 220 | if (opp_v1) { |
2e02d872 VK |
221 | struct cpufreq_dt_platform_data *pd = cpufreq_get_driver_data(); |
222 | ||
223 | if (!pd || !pd->independent_clocks) | |
224 | cpumask_setall(policy->cpus); | |
225 | ||
226 | /* | |
227 | * OPP tables are initialized only for policy->cpu, do it for | |
228 | * others as well. | |
229 | */ | |
8f8d37b2 | 230 | ret = dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus); |
8bc86284 VK |
231 | if (ret) |
232 | dev_err(cpu_dev, "%s: failed to mark OPPs as shared: %d\n", | |
233 | __func__, ret); | |
2e02d872 | 234 | } |
95ceafd4 | 235 | |
d2f31f1d VK |
236 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
237 | if (!priv) { | |
238 | ret = -ENOMEM; | |
2f0f609f | 239 | goto out_free_opp; |
95ceafd4 SG |
240 | } |
241 | ||
050794aa | 242 | priv->reg_name = name; |
95ceafd4 | 243 | |
045ee45c LS |
244 | ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table); |
245 | if (ret) { | |
896d6a4c | 246 | dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret); |
045ee45c LS |
247 | goto out_free_priv; |
248 | } | |
249 | ||
d2f31f1d | 250 | priv->cpu_dev = cpu_dev; |
d2f31f1d | 251 | policy->driver_data = priv; |
d2f31f1d | 252 | policy->clk = cpu_clk; |
953ba9ff BZ |
253 | |
254 | rcu_read_lock(); | |
255 | suspend_opp = dev_pm_opp_get_suspend_opp(cpu_dev); | |
256 | if (suspend_opp) | |
257 | policy->suspend_freq = dev_pm_opp_get_freq(suspend_opp) / 1000; | |
258 | rcu_read_unlock(); | |
259 | ||
34e5a527 TP |
260 | ret = cpufreq_table_validate_and_show(policy, freq_table); |
261 | if (ret) { | |
262 | dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__, | |
263 | ret); | |
9a004428 | 264 | goto out_free_cpufreq_table; |
d15fa862 VK |
265 | } |
266 | ||
267 | /* Support turbo/boost mode */ | |
268 | if (policy_has_boost_freq(policy)) { | |
269 | /* This gets disabled by core on driver unregister */ | |
270 | ret = cpufreq_enable_boost_support(); | |
271 | if (ret) | |
272 | goto out_free_cpufreq_table; | |
21c36d35 | 273 | cpufreq_dt_attr[1] = &cpufreq_freq_attr_scaling_boost_freqs; |
34e5a527 TP |
274 | } |
275 | ||
755b888f VK |
276 | transition_latency = dev_pm_opp_get_max_transition_latency(cpu_dev); |
277 | if (!transition_latency) | |
278 | transition_latency = CPUFREQ_ETERNAL; | |
279 | ||
34e5a527 TP |
280 | policy->cpuinfo.transition_latency = transition_latency; |
281 | ||
95ceafd4 SG |
282 | return 0; |
283 | ||
9a004428 | 284 | out_free_cpufreq_table: |
5d4879cd | 285 | dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table); |
045ee45c LS |
286 | out_free_priv: |
287 | kfree(priv); | |
2f0f609f | 288 | out_free_opp: |
8f8d37b2 | 289 | dev_pm_opp_of_cpumask_remove_table(policy->cpus); |
050794aa VK |
290 | if (name) |
291 | dev_pm_opp_put_regulator(cpu_dev); | |
dd02a3d9 | 292 | out_put_clk: |
ed4b053c | 293 | clk_put(cpu_clk); |
d2f31f1d VK |
294 | |
295 | return ret; | |
296 | } | |
297 | ||
bbcf0719 | 298 | static int cpufreq_exit(struct cpufreq_policy *policy) |
d2f31f1d VK |
299 | { |
300 | struct private_data *priv = policy->driver_data; | |
301 | ||
17ad13ba | 302 | cpufreq_cooling_unregister(priv->cdev); |
d2f31f1d | 303 | dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table); |
8f8d37b2 | 304 | dev_pm_opp_of_cpumask_remove_table(policy->related_cpus); |
050794aa VK |
305 | if (priv->reg_name) |
306 | dev_pm_opp_put_regulator(priv->cpu_dev); | |
307 | ||
d2f31f1d | 308 | clk_put(policy->clk); |
d2f31f1d VK |
309 | kfree(priv); |
310 | ||
311 | return 0; | |
312 | } | |
313 | ||
9a004428 VK |
314 | static void cpufreq_ready(struct cpufreq_policy *policy) |
315 | { | |
316 | struct private_data *priv = policy->driver_data; | |
317 | struct device_node *np = of_node_get(priv->cpu_dev->of_node); | |
318 | ||
319 | if (WARN_ON(!np)) | |
320 | return; | |
321 | ||
322 | /* | |
323 | * For now, just loading the cooling device; | |
324 | * thermal DT code takes care of matching them. | |
325 | */ | |
326 | if (of_find_property(np, "#cooling-cells", NULL)) { | |
f8fa8ae0 PA |
327 | u32 power_coefficient = 0; |
328 | ||
329 | of_property_read_u32(np, "dynamic-power-coefficient", | |
330 | &power_coefficient); | |
331 | ||
332 | priv->cdev = of_cpufreq_power_cooling_register(np, | |
333 | policy->related_cpus, power_coefficient, NULL); | |
9a004428 VK |
334 | if (IS_ERR(priv->cdev)) { |
335 | dev_err(priv->cpu_dev, | |
336 | "running cpufreq without cooling device: %ld\n", | |
337 | PTR_ERR(priv->cdev)); | |
338 | ||
339 | priv->cdev = NULL; | |
340 | } | |
341 | } | |
342 | ||
343 | of_node_put(np); | |
344 | } | |
345 | ||
bbcf0719 | 346 | static struct cpufreq_driver dt_cpufreq_driver = { |
d2f31f1d VK |
347 | .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK, |
348 | .verify = cpufreq_generic_frequency_table_verify, | |
bbcf0719 | 349 | .target_index = set_target, |
d2f31f1d | 350 | .get = cpufreq_generic_get, |
bbcf0719 VK |
351 | .init = cpufreq_init, |
352 | .exit = cpufreq_exit, | |
9a004428 | 353 | .ready = cpufreq_ready, |
bbcf0719 | 354 | .name = "cpufreq-dt", |
21c36d35 | 355 | .attr = cpufreq_dt_attr, |
953ba9ff | 356 | .suspend = cpufreq_generic_suspend, |
d2f31f1d VK |
357 | }; |
358 | ||
bbcf0719 | 359 | static int dt_cpufreq_probe(struct platform_device *pdev) |
d2f31f1d | 360 | { |
d2f31f1d VK |
361 | int ret; |
362 | ||
363 | /* | |
364 | * All per-cluster (CPUs sharing clock/voltages) initialization is done | |
365 | * from ->init(). In probe(), we just need to make sure that clk and | |
366 | * regulators are available. Else defer probe and retry. | |
367 | * | |
368 | * FIXME: Is checking this only for CPU0 sufficient ? | |
369 | */ | |
dd02a3d9 | 370 | ret = resources_available(); |
d2f31f1d VK |
371 | if (ret) |
372 | return ret; | |
373 | ||
34e5a527 TP |
374 | dt_cpufreq_driver.driver_data = dev_get_platdata(&pdev->dev); |
375 | ||
bbcf0719 | 376 | ret = cpufreq_register_driver(&dt_cpufreq_driver); |
d2f31f1d | 377 | if (ret) |
dd02a3d9 | 378 | dev_err(&pdev->dev, "failed register driver: %d\n", ret); |
d2f31f1d | 379 | |
95ceafd4 SG |
380 | return ret; |
381 | } | |
5553f9e2 | 382 | |
bbcf0719 | 383 | static int dt_cpufreq_remove(struct platform_device *pdev) |
5553f9e2 | 384 | { |
bbcf0719 | 385 | cpufreq_unregister_driver(&dt_cpufreq_driver); |
5553f9e2 SG |
386 | return 0; |
387 | } | |
388 | ||
bbcf0719 | 389 | static struct platform_driver dt_cpufreq_platdrv = { |
5553f9e2 | 390 | .driver = { |
bbcf0719 | 391 | .name = "cpufreq-dt", |
5553f9e2 | 392 | }, |
bbcf0719 VK |
393 | .probe = dt_cpufreq_probe, |
394 | .remove = dt_cpufreq_remove, | |
5553f9e2 | 395 | }; |
bbcf0719 | 396 | module_platform_driver(dt_cpufreq_platdrv); |
95ceafd4 | 397 | |
07949bf9 | 398 | MODULE_ALIAS("platform:cpufreq-dt"); |
748c8766 | 399 | MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>"); |
95ceafd4 | 400 | MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>"); |
bbcf0719 | 401 | MODULE_DESCRIPTION("Generic cpufreq driver"); |
95ceafd4 | 402 | MODULE_LICENSE("GPL"); |