cpufreq: imx-cpufreq-dt: Remove global platform match list
[linux-2.6-block.git] / drivers / cpufreq / cpufreq-dt-platdev.c
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1/*
2 * Copyright (C) 2016 Linaro.
3 * Viresh Kumar <viresh.kumar@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#include <linux/err.h>
11#include <linux/of.h>
edeec420 12#include <linux/of_device.h>
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13#include <linux/platform_device.h>
14
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15#include "cpufreq-dt.h"
16
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17/*
18 * Machines for which the cpufreq device is *always* created, mostly used for
19 * platforms using "operating-points" (V1) property.
20 */
21static const struct of_device_id whitelist[] __initconst = {
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22 { .compatible = "allwinner,sun4i-a10", },
23 { .compatible = "allwinner,sun5i-a10s", },
24 { .compatible = "allwinner,sun5i-a13", },
25 { .compatible = "allwinner,sun5i-r8", },
26 { .compatible = "allwinner,sun6i-a31", },
27 { .compatible = "allwinner,sun6i-a31s", },
28 { .compatible = "allwinner,sun7i-a20", },
29 { .compatible = "allwinner,sun8i-a23", },
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30 { .compatible = "allwinner,sun8i-a83t", },
31 { .compatible = "allwinner,sun8i-h3", },
32
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HT
33 { .compatible = "apm,xgene-shadowcat", },
34
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LW
35 { .compatible = "arm,integrator-ap", },
36 { .compatible = "arm,integrator-cp", },
37
a0df7734 38 { .compatible = "hisilicon,hi3660", },
3920be47 39
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40 { .compatible = "fsl,imx27", },
41 { .compatible = "fsl,imx51", },
42 { .compatible = "fsl,imx53", },
43 { .compatible = "fsl,imx7d", },
44
a59511d1 45 { .compatible = "marvell,berlin", },
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RJ
46 { .compatible = "marvell,pxa250", },
47 { .compatible = "marvell,pxa270", },
a59511d1 48
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49 { .compatible = "samsung,exynos3250", },
50 { .compatible = "samsung,exynos4210", },
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51 { .compatible = "samsung,exynos5250", },
52#ifndef CONFIG_BL_SWITCHER
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53 { .compatible = "samsung,exynos5800", },
54#endif
7694ca6e 55
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56 { .compatible = "renesas,emev2", },
57 { .compatible = "renesas,r7s72100", },
58 { .compatible = "renesas,r8a73a4", },
59 { .compatible = "renesas,r8a7740", },
f0da898b 60 { .compatible = "renesas,r8a7743", },
d1e13031 61 { .compatible = "renesas,r8a7744", },
f0da898b 62 { .compatible = "renesas,r8a7745", },
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63 { .compatible = "renesas,r8a7778", },
64 { .compatible = "renesas,r8a7779", },
65 { .compatible = "renesas,r8a7790", },
66 { .compatible = "renesas,r8a7791", },
ffdf8b86 67 { .compatible = "renesas,r8a7792", },
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68 { .compatible = "renesas,r8a7793", },
69 { .compatible = "renesas,r8a7794", },
70 { .compatible = "renesas,sh73a0", },
71
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72 { .compatible = "rockchip,rk2928", },
73 { .compatible = "rockchip,rk3036", },
74 { .compatible = "rockchip,rk3066a", },
75 { .compatible = "rockchip,rk3066b", },
76 { .compatible = "rockchip,rk3188", },
77 { .compatible = "rockchip,rk3228", },
78 { .compatible = "rockchip,rk3288", },
319af40a 79 { .compatible = "rockchip,rk3328", },
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80 { .compatible = "rockchip,rk3366", },
81 { .compatible = "rockchip,rk3368", },
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82 { .compatible = "rockchip,rk3399",
83 .data = &(struct cpufreq_dt_platform_data)
84 { .have_governor_per_policy = true, },
85 },
014400c1 86
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87 { .compatible = "st-ericsson,u8500", },
88 { .compatible = "st-ericsson,u8540", },
89 { .compatible = "st-ericsson,u9500", },
90 { .compatible = "st-ericsson,u9540", },
91
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92 { .compatible = "ti,omap2", },
93 { .compatible = "ti,omap3", },
94 { .compatible = "ti,omap4", },
95 { .compatible = "ti,omap5", },
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96
97 { .compatible = "xlnx,zynq-7000", },
a5685781 98 { .compatible = "xlnx,zynqmp", },
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99
100 { }
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101};
102
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103/*
104 * Machines for which the cpufreq device is *not* created, mostly used for
105 * platforms using "operating-points-v2" property.
106 */
107static const struct of_device_id blacklist[] __initconst = {
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108 { .compatible = "calxeda,highbank", },
109 { .compatible = "calxeda,ecx-2000", },
110
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111 { .compatible = "fsl,imx8mq", },
112 { .compatible = "fsl,imx8mm", },
113
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114 { .compatible = "marvell,armadaxp", },
115
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116 { .compatible = "mediatek,mt2701", },
117 { .compatible = "mediatek,mt2712", },
118 { .compatible = "mediatek,mt7622", },
119 { .compatible = "mediatek,mt7623", },
120 { .compatible = "mediatek,mt817x", },
121 { .compatible = "mediatek,mt8173", },
122 { .compatible = "mediatek,mt8176", },
123
ff76898c 124 { .compatible = "nvidia,tegra124", },
43c36002 125 { .compatible = "nvidia,tegra210", },
ff76898c 126
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127 { .compatible = "qcom,apq8096", },
128 { .compatible = "qcom,msm8996", },
129
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130 { .compatible = "st,stih407", },
131 { .compatible = "st,stih410", },
132
133 { .compatible = "sigma,tango4", },
134
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135 { .compatible = "ti,am33xx", },
136 { .compatible = "ti,am43", },
137 { .compatible = "ti,dra7", },
138
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139 { }
140};
141
142static bool __init cpu0_node_has_opp_v2_prop(void)
143{
144 struct device_node *np = of_cpu_device_node_get(0);
145 bool ret = false;
146
147 if (of_get_property(np, "operating-points-v2", NULL))
148 ret = true;
149
150 of_node_put(np);
151 return ret;
152}
153
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154static int __init cpufreq_dt_platdev_init(void)
155{
156 struct device_node *np = of_find_node_by_path("/");
ca5eda5d 157 const struct of_device_id *match;
edeec420 158 const void *data = NULL;
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159
160 if (!np)
161 return -ENODEV;
162
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163 match = of_match_node(whitelist, np);
164 if (match) {
165 data = match->data;
166 goto create_pdev;
167 }
168
169 if (cpu0_node_has_opp_v2_prop() && !of_match_node(blacklist, np))
170 goto create_pdev;
171
ca5eda5d 172 of_node_put(np);
edeec420 173 return -ENODEV;
f56aad1d 174
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175create_pdev:
176 of_node_put(np);
297a6622 177 return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
edeec420 178 -1, data,
297a6622 179 sizeof(struct cpufreq_dt_platform_data)));
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180}
181device_initcall(cpufreq_dt_platdev_init);