Merge tag 'rproc-v5.3' of git://github.com/andersson/remoteproc
[linux-2.6-block.git] / drivers / cpufreq / cpufreq-dt-platdev.c
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d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
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2/*
3 * Copyright (C) 2016 Linaro.
4 * Viresh Kumar <viresh.kumar@linaro.org>
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5 */
6
7#include <linux/err.h>
8#include <linux/of.h>
edeec420 9#include <linux/of_device.h>
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10#include <linux/platform_device.h>
11
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12#include "cpufreq-dt.h"
13
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14/*
15 * Machines for which the cpufreq device is *always* created, mostly used for
16 * platforms using "operating-points" (V1) property.
17 */
18static const struct of_device_id whitelist[] __initconst = {
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19 { .compatible = "allwinner,sun4i-a10", },
20 { .compatible = "allwinner,sun5i-a10s", },
21 { .compatible = "allwinner,sun5i-a13", },
22 { .compatible = "allwinner,sun5i-r8", },
23 { .compatible = "allwinner,sun6i-a31", },
24 { .compatible = "allwinner,sun6i-a31s", },
25 { .compatible = "allwinner,sun7i-a20", },
26 { .compatible = "allwinner,sun8i-a23", },
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27 { .compatible = "allwinner,sun8i-a83t", },
28 { .compatible = "allwinner,sun8i-h3", },
29
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HT
30 { .compatible = "apm,xgene-shadowcat", },
31
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LW
32 { .compatible = "arm,integrator-ap", },
33 { .compatible = "arm,integrator-cp", },
34
a0df7734 35 { .compatible = "hisilicon,hi3660", },
3920be47 36
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37 { .compatible = "fsl,imx27", },
38 { .compatible = "fsl,imx51", },
39 { .compatible = "fsl,imx53", },
7ead83f6 40
a59511d1 41 { .compatible = "marvell,berlin", },
dcd2ea41
RJ
42 { .compatible = "marvell,pxa250", },
43 { .compatible = "marvell,pxa270", },
a59511d1 44
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45 { .compatible = "samsung,exynos3250", },
46 { .compatible = "samsung,exynos4210", },
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47 { .compatible = "samsung,exynos5250", },
48#ifndef CONFIG_BL_SWITCHER
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49 { .compatible = "samsung,exynos5800", },
50#endif
7694ca6e 51
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52 { .compatible = "renesas,emev2", },
53 { .compatible = "renesas,r7s72100", },
54 { .compatible = "renesas,r8a73a4", },
55 { .compatible = "renesas,r8a7740", },
f0da898b 56 { .compatible = "renesas,r8a7743", },
d1e13031 57 { .compatible = "renesas,r8a7744", },
f0da898b 58 { .compatible = "renesas,r8a7745", },
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59 { .compatible = "renesas,r8a7778", },
60 { .compatible = "renesas,r8a7779", },
61 { .compatible = "renesas,r8a7790", },
62 { .compatible = "renesas,r8a7791", },
ffdf8b86 63 { .compatible = "renesas,r8a7792", },
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64 { .compatible = "renesas,r8a7793", },
65 { .compatible = "renesas,r8a7794", },
66 { .compatible = "renesas,sh73a0", },
67
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68 { .compatible = "rockchip,rk2928", },
69 { .compatible = "rockchip,rk3036", },
70 { .compatible = "rockchip,rk3066a", },
71 { .compatible = "rockchip,rk3066b", },
72 { .compatible = "rockchip,rk3188", },
73 { .compatible = "rockchip,rk3228", },
74 { .compatible = "rockchip,rk3288", },
319af40a 75 { .compatible = "rockchip,rk3328", },
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76 { .compatible = "rockchip,rk3366", },
77 { .compatible = "rockchip,rk3368", },
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78 { .compatible = "rockchip,rk3399",
79 .data = &(struct cpufreq_dt_platform_data)
80 { .have_governor_per_policy = true, },
81 },
014400c1 82
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83 { .compatible = "st-ericsson,u8500", },
84 { .compatible = "st-ericsson,u8540", },
85 { .compatible = "st-ericsson,u9500", },
86 { .compatible = "st-ericsson,u9540", },
87
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88 { .compatible = "ti,omap2", },
89 { .compatible = "ti,omap3", },
90 { .compatible = "ti,omap4", },
91 { .compatible = "ti,omap5", },
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92
93 { .compatible = "xlnx,zynq-7000", },
a5685781 94 { .compatible = "xlnx,zynqmp", },
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95
96 { }
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97};
98
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99/*
100 * Machines for which the cpufreq device is *not* created, mostly used for
101 * platforms using "operating-points-v2" property.
102 */
103static const struct of_device_id blacklist[] __initconst = {
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104 { .compatible = "calxeda,highbank", },
105 { .compatible = "calxeda,ecx-2000", },
106
e6abacab 107 { .compatible = "fsl,imx7d", },
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108 { .compatible = "fsl,imx8mq", },
109 { .compatible = "fsl,imx8mm", },
110
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111 { .compatible = "marvell,armadaxp", },
112
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113 { .compatible = "mediatek,mt2701", },
114 { .compatible = "mediatek,mt2712", },
115 { .compatible = "mediatek,mt7622", },
116 { .compatible = "mediatek,mt7623", },
117 { .compatible = "mediatek,mt817x", },
118 { .compatible = "mediatek,mt8173", },
119 { .compatible = "mediatek,mt8176", },
120
ff76898c 121 { .compatible = "nvidia,tegra124", },
43c36002 122 { .compatible = "nvidia,tegra210", },
ff76898c 123
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124 { .compatible = "qcom,apq8096", },
125 { .compatible = "qcom,msm8996", },
126
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127 { .compatible = "st,stih407", },
128 { .compatible = "st,stih410", },
129
130 { .compatible = "sigma,tango4", },
131
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132 { .compatible = "ti,am33xx", },
133 { .compatible = "ti,am43", },
134 { .compatible = "ti,dra7", },
135
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136 { }
137};
138
139static bool __init cpu0_node_has_opp_v2_prop(void)
140{
141 struct device_node *np = of_cpu_device_node_get(0);
142 bool ret = false;
143
144 if (of_get_property(np, "operating-points-v2", NULL))
145 ret = true;
146
147 of_node_put(np);
148 return ret;
149}
150
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151static int __init cpufreq_dt_platdev_init(void)
152{
153 struct device_node *np = of_find_node_by_path("/");
ca5eda5d 154 const struct of_device_id *match;
edeec420 155 const void *data = NULL;
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156
157 if (!np)
158 return -ENODEV;
159
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160 match = of_match_node(whitelist, np);
161 if (match) {
162 data = match->data;
163 goto create_pdev;
164 }
165
166 if (cpu0_node_has_opp_v2_prop() && !of_match_node(blacklist, np))
167 goto create_pdev;
168
ca5eda5d 169 of_node_put(np);
edeec420 170 return -ENODEV;
f56aad1d 171
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172create_pdev:
173 of_node_put(np);
297a6622 174 return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
edeec420 175 -1, data,
297a6622 176 sizeof(struct cpufreq_dt_platform_data)));
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177}
178device_initcall(cpufreq_dt_platdev_init);