Commit | Line | Data |
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5477fb3b AC |
1 | /* |
2 | * CPPC (Collaborative Processor Performance Control) driver for | |
3 | * interfacing with the CPUfreq layer and governors. See | |
4 | * cppc_acpi.c for CPPC specific methods. | |
5 | * | |
6 | * (C) Copyright 2014, 2015 Linaro Ltd. | |
7 | * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; version 2 | |
12 | * of the License. | |
13 | */ | |
14 | ||
15 | #define pr_fmt(fmt) "CPPC Cpufreq:" fmt | |
16 | ||
17 | #include <linux/kernel.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/cpu.h> | |
21 | #include <linux/cpufreq.h> | |
ad38677d | 22 | #include <linux/dmi.h> |
3d41386d | 23 | #include <linux/time.h> |
5477fb3b AC |
24 | #include <linux/vmalloc.h> |
25 | ||
ad38677d AS |
26 | #include <asm/unaligned.h> |
27 | ||
5477fb3b AC |
28 | #include <acpi/cppc_acpi.h> |
29 | ||
ad38677d AS |
30 | /* Minimum struct length needed for the DMI processor entry we want */ |
31 | #define DMI_ENTRY_PROCESSOR_MIN_LENGTH 48 | |
32 | ||
33 | /* Offest in the DMI processor structure for the max frequency */ | |
34 | #define DMI_PROCESSOR_MAX_SPEED 0x14 | |
35 | ||
5477fb3b AC |
36 | /* |
37 | * These structs contain information parsed from per CPU | |
38 | * ACPI _CPC structures. | |
39 | * e.g. For each CPU the highest, lowest supported | |
40 | * performance capabilities, desired performance level | |
41 | * requested etc. | |
42 | */ | |
41dd6403 | 43 | static struct cppc_cpudata **all_cpu_data; |
5477fb3b | 44 | |
ad38677d AS |
45 | /* Capture the max KHz from DMI */ |
46 | static u64 cppc_dmi_max_khz; | |
47 | ||
48 | /* Callback function used to retrieve the max frequency from DMI */ | |
49 | static void cppc_find_dmi_mhz(const struct dmi_header *dm, void *private) | |
50 | { | |
51 | const u8 *dmi_data = (const u8 *)dm; | |
52 | u16 *mhz = (u16 *)private; | |
53 | ||
54 | if (dm->type == DMI_ENTRY_PROCESSOR && | |
55 | dm->length >= DMI_ENTRY_PROCESSOR_MIN_LENGTH) { | |
56 | u16 val = (u16)get_unaligned((const u16 *) | |
57 | (dmi_data + DMI_PROCESSOR_MAX_SPEED)); | |
58 | *mhz = val > *mhz ? val : *mhz; | |
59 | } | |
60 | } | |
61 | ||
62 | /* Look up the max frequency in DMI */ | |
63 | static u64 cppc_get_dmi_max_khz(void) | |
64 | { | |
65 | u16 mhz = 0; | |
66 | ||
67 | dmi_walk(cppc_find_dmi_mhz, &mhz); | |
68 | ||
69 | /* | |
70 | * Real stupid fallback value, just in case there is no | |
71 | * actual value set. | |
72 | */ | |
73 | mhz = mhz ? mhz : 1; | |
74 | ||
75 | return (1000 * mhz); | |
76 | } | |
77 | ||
5477fb3b AC |
78 | static int cppc_cpufreq_set_target(struct cpufreq_policy *policy, |
79 | unsigned int target_freq, | |
80 | unsigned int relation) | |
81 | { | |
41dd6403 | 82 | struct cppc_cpudata *cpu; |
5477fb3b | 83 | struct cpufreq_freqs freqs; |
c197d758 | 84 | u32 desired_perf; |
5477fb3b AC |
85 | int ret = 0; |
86 | ||
87 | cpu = all_cpu_data[policy->cpu]; | |
88 | ||
c197d758 HT |
89 | desired_perf = (u64)target_freq * cpu->perf_caps.highest_perf / cppc_dmi_max_khz; |
90 | /* Return if it is exactly the same perf */ | |
91 | if (desired_perf == cpu->perf_ctrls.desired_perf) | |
92 | return ret; | |
93 | ||
94 | cpu->perf_ctrls.desired_perf = desired_perf; | |
5477fb3b AC |
95 | freqs.old = policy->cur; |
96 | freqs.new = target_freq; | |
97 | ||
98 | cpufreq_freq_transition_begin(policy, &freqs); | |
99 | ret = cppc_set_perf(cpu->cpu, &cpu->perf_ctrls); | |
100 | cpufreq_freq_transition_end(policy, &freqs, ret != 0); | |
101 | ||
102 | if (ret) | |
103 | pr_debug("Failed to set target on CPU:%d. ret:%d\n", | |
104 | cpu->cpu, ret); | |
105 | ||
106 | return ret; | |
107 | } | |
108 | ||
109 | static int cppc_verify_policy(struct cpufreq_policy *policy) | |
110 | { | |
111 | cpufreq_verify_within_cpu_limits(policy); | |
112 | return 0; | |
113 | } | |
114 | ||
115 | static void cppc_cpufreq_stop_cpu(struct cpufreq_policy *policy) | |
116 | { | |
117 | int cpu_num = policy->cpu; | |
41dd6403 | 118 | struct cppc_cpudata *cpu = all_cpu_data[cpu_num]; |
5477fb3b AC |
119 | int ret; |
120 | ||
121 | cpu->perf_ctrls.desired_perf = cpu->perf_caps.lowest_perf; | |
122 | ||
123 | ret = cppc_set_perf(cpu_num, &cpu->perf_ctrls); | |
124 | if (ret) | |
125 | pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n", | |
126 | cpu->perf_caps.lowest_perf, cpu_num, ret); | |
127 | } | |
128 | ||
d4f3388a PP |
129 | /* |
130 | * The PCC subspace describes the rate at which platform can accept commands | |
131 | * on the shared PCC channel (including READs which do not count towards freq | |
132 | * trasition requests), so ideally we need to use the PCC values as a fallback | |
133 | * if we don't have a platform specific transition_delay_us | |
134 | */ | |
135 | #ifdef CONFIG_ARM64 | |
136 | #include <asm/cputype.h> | |
137 | ||
138 | static unsigned int cppc_cpufreq_get_transition_delay_us(int cpu) | |
139 | { | |
140 | unsigned long implementor = read_cpuid_implementor(); | |
141 | unsigned long part_num = read_cpuid_part_number(); | |
142 | unsigned int delay_us = 0; | |
143 | ||
144 | switch (implementor) { | |
145 | case ARM_CPU_IMP_QCOM: | |
146 | switch (part_num) { | |
147 | case QCOM_CPU_PART_FALKOR_V1: | |
148 | case QCOM_CPU_PART_FALKOR: | |
149 | delay_us = 10000; | |
150 | break; | |
151 | default: | |
152 | delay_us = cppc_get_transition_latency(cpu) / NSEC_PER_USEC; | |
153 | break; | |
154 | } | |
155 | break; | |
156 | default: | |
157 | delay_us = cppc_get_transition_latency(cpu) / NSEC_PER_USEC; | |
158 | break; | |
159 | } | |
160 | ||
161 | return delay_us; | |
162 | } | |
163 | ||
164 | #else | |
165 | ||
166 | static unsigned int cppc_cpufreq_get_transition_delay_us(int cpu) | |
167 | { | |
168 | return cppc_get_transition_latency(cpu) / NSEC_PER_USEC; | |
169 | } | |
170 | #endif | |
171 | ||
5477fb3b AC |
172 | static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy) |
173 | { | |
41dd6403 | 174 | struct cppc_cpudata *cpu; |
5477fb3b AC |
175 | unsigned int cpu_num = policy->cpu; |
176 | int ret = 0; | |
177 | ||
178 | cpu = all_cpu_data[policy->cpu]; | |
179 | ||
180 | cpu->cpu = cpu_num; | |
181 | ret = cppc_get_perf_caps(policy->cpu, &cpu->perf_caps); | |
182 | ||
183 | if (ret) { | |
184 | pr_debug("Err reading CPU%d perf capabilities. ret:%d\n", | |
185 | cpu_num, ret); | |
186 | return ret; | |
187 | } | |
188 | ||
ad38677d AS |
189 | cppc_dmi_max_khz = cppc_get_dmi_max_khz(); |
190 | ||
73808d0f PP |
191 | /* |
192 | * Set min to lowest nonlinear perf to avoid any efficiency penalty (see | |
193 | * Section 8.4.7.1.1.5 of ACPI 6.1 spec) | |
194 | */ | |
195 | policy->min = cpu->perf_caps.lowest_nonlinear_perf * cppc_dmi_max_khz / | |
196 | cpu->perf_caps.highest_perf; | |
ad38677d | 197 | policy->max = cppc_dmi_max_khz; |
73808d0f PP |
198 | |
199 | /* | |
200 | * Set cpuinfo.min_freq to Lowest to make the full range of performance | |
201 | * available if userspace wants to use any perf between lowest & lowest | |
202 | * nonlinear perf | |
203 | */ | |
204 | policy->cpuinfo.min_freq = cpu->perf_caps.lowest_perf * cppc_dmi_max_khz / | |
205 | cpu->perf_caps.highest_perf; | |
206 | policy->cpuinfo.max_freq = cppc_dmi_max_khz; | |
207 | ||
d4f3388a | 208 | policy->transition_delay_us = cppc_cpufreq_get_transition_delay_us(cpu_num); |
9dc17917 | 209 | policy->shared_type = cpu->shared_type; |
5477fb3b | 210 | |
8913315e SY |
211 | if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { |
212 | int i; | |
213 | ||
5477fb3b | 214 | cpumask_copy(policy->cpus, cpu->shared_cpu_map); |
8913315e SY |
215 | |
216 | for_each_cpu(i, policy->cpus) { | |
217 | if (unlikely(i == policy->cpu)) | |
218 | continue; | |
219 | ||
220 | memcpy(&all_cpu_data[i]->perf_caps, &cpu->perf_caps, | |
221 | sizeof(cpu->perf_caps)); | |
222 | } | |
223 | } else if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL) { | |
5477fb3b AC |
224 | /* Support only SW_ANY for now. */ |
225 | pr_debug("Unsupported CPU co-ord type\n"); | |
226 | return -EFAULT; | |
227 | } | |
228 | ||
5477fb3b AC |
229 | cpu->cur_policy = policy; |
230 | ||
231 | /* Set policy->cur to max now. The governors will adjust later. */ | |
ad38677d AS |
232 | policy->cur = cppc_dmi_max_khz; |
233 | cpu->perf_ctrls.desired_perf = cpu->perf_caps.highest_perf; | |
5477fb3b AC |
234 | |
235 | ret = cppc_set_perf(cpu_num, &cpu->perf_ctrls); | |
236 | if (ret) | |
237 | pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n", | |
238 | cpu->perf_caps.highest_perf, cpu_num, ret); | |
239 | ||
240 | return ret; | |
241 | } | |
242 | ||
243 | static struct cpufreq_driver cppc_cpufreq_driver = { | |
244 | .flags = CPUFREQ_CONST_LOOPS, | |
245 | .verify = cppc_verify_policy, | |
246 | .target = cppc_cpufreq_set_target, | |
247 | .init = cppc_cpufreq_cpu_init, | |
248 | .stop_cpu = cppc_cpufreq_stop_cpu, | |
249 | .name = "cppc_cpufreq", | |
250 | }; | |
251 | ||
252 | static int __init cppc_cpufreq_init(void) | |
253 | { | |
254 | int i, ret = 0; | |
41dd6403 | 255 | struct cppc_cpudata *cpu; |
5477fb3b AC |
256 | |
257 | if (acpi_disabled) | |
258 | return -ENODEV; | |
259 | ||
260 | all_cpu_data = kzalloc(sizeof(void *) * num_possible_cpus(), GFP_KERNEL); | |
261 | if (!all_cpu_data) | |
262 | return -ENOMEM; | |
263 | ||
264 | for_each_possible_cpu(i) { | |
41dd6403 | 265 | all_cpu_data[i] = kzalloc(sizeof(struct cppc_cpudata), GFP_KERNEL); |
5477fb3b AC |
266 | if (!all_cpu_data[i]) |
267 | goto out; | |
268 | ||
269 | cpu = all_cpu_data[i]; | |
270 | if (!zalloc_cpumask_var(&cpu->shared_cpu_map, GFP_KERNEL)) | |
271 | goto out; | |
272 | } | |
273 | ||
274 | ret = acpi_get_psd_map(all_cpu_data); | |
275 | if (ret) { | |
276 | pr_debug("Error parsing PSD data. Aborting cpufreq registration.\n"); | |
277 | goto out; | |
278 | } | |
279 | ||
280 | ret = cpufreq_register_driver(&cppc_cpufreq_driver); | |
281 | if (ret) | |
282 | goto out; | |
283 | ||
284 | return ret; | |
285 | ||
286 | out: | |
55b55abc CH |
287 | for_each_possible_cpu(i) { |
288 | cpu = all_cpu_data[i]; | |
289 | if (!cpu) | |
290 | break; | |
291 | free_cpumask_var(cpu->shared_cpu_map); | |
292 | kfree(cpu); | |
293 | } | |
5477fb3b AC |
294 | |
295 | kfree(all_cpu_data); | |
296 | return -ENODEV; | |
297 | } | |
298 | ||
a29a1e76 AC |
299 | static void __exit cppc_cpufreq_exit(void) |
300 | { | |
41dd6403 | 301 | struct cppc_cpudata *cpu; |
a29a1e76 AC |
302 | int i; |
303 | ||
304 | cpufreq_unregister_driver(&cppc_cpufreq_driver); | |
305 | ||
306 | for_each_possible_cpu(i) { | |
307 | cpu = all_cpu_data[i]; | |
308 | free_cpumask_var(cpu->shared_cpu_map); | |
309 | kfree(cpu); | |
310 | } | |
311 | ||
312 | kfree(all_cpu_data); | |
313 | } | |
314 | ||
315 | module_exit(cppc_cpufreq_exit); | |
316 | MODULE_AUTHOR("Ashwin Chaugule"); | |
317 | MODULE_DESCRIPTION("CPUFreq driver based on the ACPI CPPC v5.0+ spec"); | |
318 | MODULE_LICENSE("GPL"); | |
319 | ||
5477fb3b | 320 | late_initcall(cppc_cpufreq_init); |
974f8649 PP |
321 | |
322 | static const struct acpi_device_id cppc_acpi_ids[] = { | |
323 | {ACPI_PROCESSOR_DEVICE_HID, }, | |
324 | {} | |
325 | }; | |
326 | ||
327 | MODULE_DEVICE_TABLE(acpi, cppc_acpi_ids); |