Merge tag 'pci-v6.16-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci
[linux-2.6-block.git] / drivers / cpufreq / acpi-cpufreq.c
CommitLineData
1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4 2/*
3a58df35 3 * acpi-cpufreq.c - ACPI Processor P-States Driver
1da177e4
LT
4 *
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
fe27cb35 8 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
1da177e4
LT
9 */
10
1c5864e2
JP
11#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
1da177e4
LT
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/init.h>
fe27cb35
VP
16#include <linux/smp.h>
17#include <linux/sched.h>
1da177e4 18#include <linux/cpufreq.h>
d395bf12 19#include <linux/compiler.h>
8adcc0c6 20#include <linux/dmi.h>
5a0e3ad6 21#include <linux/slab.h>
abdea5fc 22#include <linux/string_helpers.h>
cb6fe2ce 23#include <linux/platform_device.h>
1da177e4
LT
24
25#include <linux/acpi.h>
3a58df35
DJ
26#include <linux/io.h>
27#include <linux/delay.h>
28#include <linux/uaccess.h>
29
1da177e4 30#include <acpi/processor.h>
3c55e94c 31#include <acpi/cppc_acpi.h>
1da177e4 32
dde9f7ba 33#include <asm/msr.h>
fe27cb35
VP
34#include <asm/processor.h>
35#include <asm/cpufeature.h>
ba5bade4 36#include <asm/cpu_device_id.h>
fe27cb35 37
1da177e4
LT
38MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
39MODULE_DESCRIPTION("ACPI Processor P-States Driver");
40MODULE_LICENSE("GPL");
41
dde9f7ba
VP
42enum {
43 UNDEFINED_CAPABLE = 0,
44 SYSTEM_INTEL_MSR_CAPABLE,
3dc9a633 45 SYSTEM_AMD_MSR_CAPABLE,
dde9f7ba
VP
46 SYSTEM_IO_CAPABLE,
47};
48
49#define INTEL_MSR_RANGE (0xffff)
3dc9a633 50#define AMD_MSR_RANGE (0x7)
cc9690cf 51#define HYGON_MSR_RANGE (0x7)
dde9f7ba 52
fe27cb35 53struct acpi_cpufreq_data {
64be7eed
VP
54 unsigned int resume;
55 unsigned int cpu_feature;
8cfcfd39 56 unsigned int acpi_perf_cpu;
f4fd3797 57 cpumask_var_t freqdomain_cpus;
ed757a2c
RW
58 void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val);
59 u32 (*cpu_freq_read)(struct acpi_pct_register *reg);
1da177e4
LT
60};
61
50109292 62/* acpi_perf_data is a pointer to percpu data. */
3f6c4df7 63static struct acpi_processor_performance __percpu *acpi_perf_data;
1da177e4 64
3427616b
RW
65static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data)
66{
67 return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu);
68}
69
1da177e4
LT
70static struct cpufreq_driver acpi_cpufreq_driver;
71
d395bf12 72static unsigned int acpi_pstate_strict;
615b7300
AP
73
74static bool boost_state(unsigned int cpu)
75{
615b7300
AP
76 u64 msr;
77
78 switch (boot_cpu_data.x86_vendor) {
79 case X86_VENDOR_INTEL:
d6f89596
TW
80 case X86_VENDOR_CENTAUR:
81 case X86_VENDOR_ZHAOXIN:
d7484bab 82 rdmsrq_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &msr);
615b7300 83 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
cc9690cf 84 case X86_VENDOR_HYGON:
615b7300 85 case X86_VENDOR_AMD:
d7484bab 86 rdmsrq_on_cpu(cpu, MSR_K7_HWCR, &msr);
615b7300
AP
87 return !(msr & MSR_K7_HWCR_CPB_DIS);
88 }
89 return false;
90}
91
a3605c46 92static int boost_set_msr(bool enable)
615b7300 93{
615b7300 94 u32 msr_addr;
a3605c46 95 u64 msr_mask, val;
615b7300
AP
96
97 switch (boot_cpu_data.x86_vendor) {
98 case X86_VENDOR_INTEL:
d6f89596
TW
99 case X86_VENDOR_CENTAUR:
100 case X86_VENDOR_ZHAOXIN:
615b7300
AP
101 msr_addr = MSR_IA32_MISC_ENABLE;
102 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
103 break;
cc9690cf 104 case X86_VENDOR_HYGON:
615b7300
AP
105 case X86_VENDOR_AMD:
106 msr_addr = MSR_K7_HWCR;
107 msr_mask = MSR_K7_HWCR_CPB_DIS;
108 break;
109 default:
a3605c46 110 return -EINVAL;
615b7300
AP
111 }
112
c435e608 113 rdmsrq(msr_addr, val);
615b7300 114
a3605c46
SAS
115 if (enable)
116 val &= ~msr_mask;
117 else
118 val |= msr_mask;
615b7300 119
78255eb2 120 wrmsrq(msr_addr, val);
a3605c46
SAS
121 return 0;
122}
123
124static void boost_set_msr_each(void *p_en)
125{
126 bool enable = (bool) p_en;
127
128 boost_set_msr(enable);
615b7300
AP
129}
130
cf6fada7 131static int set_boost(struct cpufreq_policy *policy, int val)
615b7300 132{
cf6fada7
XW
133 on_each_cpu_mask(policy->cpus, boost_set_msr_each,
134 (void *)(long)val, 1);
abdea5fc
AS
135 pr_debug("CPU %*pbl: Core Boosting %s.\n",
136 cpumask_pr_args(policy->cpus), str_enabled_disabled(val));
615b7300 137
cfc9c8ed 138 return 0;
615b7300
AP
139}
140
f4fd3797
LT
141static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
142{
eb0b3e78 143 struct acpi_cpufreq_data *data = policy->driver_data;
f4fd3797 144
e2530367
SP
145 if (unlikely(!data))
146 return -ENODEV;
147
f4fd3797
LT
148 return cpufreq_show_cpus(data->freqdomain_cpus, buf);
149}
150
151cpufreq_freq_attr_ro(freqdomain_cpus);
152
11269ff5 153#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
17135782
RW
154static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
155 size_t count)
cfc9c8ed
LM
156{
157 int ret;
17135782 158 unsigned int val = 0;
cfc9c8ed 159
7a6c79f2 160 if (!acpi_cpufreq_driver.set_boost)
cfc9c8ed
LM
161 return -EINVAL;
162
17135782
RW
163 ret = kstrtouint(buf, 10, &val);
164 if (ret || val > 1)
cfc9c8ed
LM
165 return -EINVAL;
166
09681a07 167 cpus_read_lock();
cf6fada7 168 set_boost(policy, val);
09681a07 169 cpus_read_unlock();
cfc9c8ed
LM
170
171 return count;
172}
173
11269ff5
AP
174static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
175{
cfc9c8ed 176 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
11269ff5
AP
177}
178
59027d35 179cpufreq_freq_attr_rw(cpb);
11269ff5
AP
180#endif
181
dde9f7ba
VP
182static int check_est_cpu(unsigned int cpuid)
183{
92cb7612 184 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
dde9f7ba 185
0de51088 186 return cpu_has(cpu, X86_FEATURE_EST);
dde9f7ba
VP
187}
188
3dc9a633
MG
189static int check_amd_hwpstate_cpu(unsigned int cpuid)
190{
191 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
192
193 return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
194}
195
8cee1eed 196static unsigned extract_io(struct cpufreq_policy *policy, u32 value)
fe27cb35 197{
8cee1eed 198 struct acpi_cpufreq_data *data = policy->driver_data;
64be7eed
VP
199 struct acpi_processor_performance *perf;
200 int i;
fe27cb35 201
3427616b 202 perf = to_perf_data(data);
fe27cb35 203
3a58df35 204 for (i = 0; i < perf->state_count; i++) {
fe27cb35 205 if (value == perf->states[i].status)
8cee1eed 206 return policy->freq_table[i].frequency;
fe27cb35
VP
207 }
208 return 0;
209}
210
8cee1eed 211static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr)
dde9f7ba 212{
8cee1eed 213 struct acpi_cpufreq_data *data = policy->driver_data;
041526f9 214 struct cpufreq_frequency_table *pos;
a6f6e6e6 215 struct acpi_processor_performance *perf;
dde9f7ba 216
3dc9a633
MG
217 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
218 msr &= AMD_MSR_RANGE;
cc9690cf
PW
219 else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
220 msr &= HYGON_MSR_RANGE;
3dc9a633
MG
221 else
222 msr &= INTEL_MSR_RANGE;
223
3427616b 224 perf = to_perf_data(data);
a6f6e6e6 225
538b0188 226 cpufreq_for_each_entry(pos, policy->freq_table)
041526f9
SK
227 if (msr == perf->states[pos->driver_data].status)
228 return pos->frequency;
538b0188 229 return policy->freq_table[0].frequency;
dde9f7ba
VP
230}
231
8cee1eed 232static unsigned extract_freq(struct cpufreq_policy *policy, u32 val)
dde9f7ba 233{
8cee1eed
VK
234 struct acpi_cpufreq_data *data = policy->driver_data;
235
dde9f7ba 236 switch (data->cpu_feature) {
64be7eed 237 case SYSTEM_INTEL_MSR_CAPABLE:
3dc9a633 238 case SYSTEM_AMD_MSR_CAPABLE:
8cee1eed 239 return extract_msr(policy, val);
64be7eed 240 case SYSTEM_IO_CAPABLE:
8cee1eed 241 return extract_io(policy, val);
64be7eed 242 default:
dde9f7ba
VP
243 return 0;
244 }
245}
246
ac13b996 247static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used)
ed757a2c 248{
e1711f29 249 u32 val, dummy __always_unused;
dde9f7ba 250
ed757a2c
RW
251 rdmsr(MSR_IA32_PERF_CTL, val, dummy);
252 return val;
253}
254
ac13b996 255static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val)
ed757a2c
RW
256{
257 u32 lo, hi;
258
259 rdmsr(MSR_IA32_PERF_CTL, lo, hi);
260 lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE);
261 wrmsr(MSR_IA32_PERF_CTL, lo, hi);
262}
263
ac13b996 264static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used)
ed757a2c 265{
e1711f29 266 u32 val, dummy __always_unused;
ed757a2c
RW
267
268 rdmsr(MSR_AMD_PERF_CTL, val, dummy);
269 return val;
270}
271
ac13b996 272static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val)
ed757a2c
RW
273{
274 wrmsr(MSR_AMD_PERF_CTL, val, 0);
275}
276
ac13b996 277static u32 cpu_freq_read_io(struct acpi_pct_register *reg)
ed757a2c
RW
278{
279 u32 val;
280
281 acpi_os_read_port(reg->address, &val, reg->bit_width);
282 return val;
283}
284
ac13b996 285static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val)
ed757a2c
RW
286{
287 acpi_os_write_port(reg->address, val, reg->bit_width);
288}
fe27cb35
VP
289
290struct drv_cmd {
ed757a2c 291 struct acpi_pct_register *reg;
fe27cb35 292 u32 val;
ed757a2c
RW
293 union {
294 void (*write)(struct acpi_pct_register *reg, u32 val);
295 u32 (*read)(struct acpi_pct_register *reg);
296 } func;
fe27cb35
VP
297};
298
01599fca
AM
299/* Called via smp_call_function_single(), on the target CPU */
300static void do_drv_read(void *_cmd)
1da177e4 301{
72859081 302 struct drv_cmd *cmd = _cmd;
dde9f7ba 303
ed757a2c 304 cmd->val = cmd->func.read(cmd->reg);
fe27cb35 305}
1da177e4 306
ed757a2c 307static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask)
fe27cb35 308{
ed757a2c
RW
309 struct acpi_processor_performance *perf = to_perf_data(data);
310 struct drv_cmd cmd = {
311 .reg = &perf->control_register,
312 .func.read = data->cpu_freq_read,
313 };
314 int err;
dde9f7ba 315
ed757a2c
RW
316 err = smp_call_function_any(mask, do_drv_read, &cmd, 1);
317 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
318 return cmd.val;
fe27cb35 319}
1da177e4 320
ed757a2c
RW
321/* Called via smp_call_function_many(), on the target CPUs */
322static void do_drv_write(void *_cmd)
fe27cb35 323{
ed757a2c 324 struct drv_cmd *cmd = _cmd;
fe27cb35 325
ed757a2c 326 cmd->func.write(cmd->reg, cmd->val);
fe27cb35
VP
327}
328
ed757a2c
RW
329static void drv_write(struct acpi_cpufreq_data *data,
330 const struct cpumask *mask, u32 val)
fe27cb35 331{
ed757a2c
RW
332 struct acpi_processor_performance *perf = to_perf_data(data);
333 struct drv_cmd cmd = {
334 .reg = &perf->control_register,
335 .val = val,
336 .func.write = data->cpu_freq_write,
337 };
ea34f43a
LT
338 int this_cpu;
339
340 this_cpu = get_cpu();
ed757a2c
RW
341 if (cpumask_test_cpu(this_cpu, mask))
342 do_drv_write(&cmd);
343
344 smp_call_function_many(mask, do_drv_write, &cmd, 1);
ea34f43a 345 put_cpu();
fe27cb35 346}
1da177e4 347
ed757a2c 348static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data)
fe27cb35 349{
ed757a2c 350 u32 val;
1da177e4 351
4d8bb537 352 if (unlikely(cpumask_empty(mask)))
fe27cb35 353 return 0;
1da177e4 354
ed757a2c 355 val = drv_read(data, mask);
1da177e4 356
eae2ef0e 357 pr_debug("%s = %u\n", __func__, val);
fe27cb35 358
ed757a2c 359 return val;
fe27cb35 360}
1da177e4 361
fe27cb35
VP
362static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
363{
eb0b3e78
PX
364 struct acpi_cpufreq_data *data;
365 struct cpufreq_policy *policy;
64be7eed 366 unsigned int freq;
e56a727b 367 unsigned int cached_freq;
fe27cb35 368
eae2ef0e 369 pr_debug("%s (%d)\n", __func__, cpu);
fe27cb35 370
1f0bd44e 371 policy = cpufreq_cpu_get_raw(cpu);
eb0b3e78
PX
372 if (unlikely(!policy))
373 return 0;
374
375 data = policy->driver_data;
8cee1eed 376 if (unlikely(!data || !policy->freq_table))
fe27cb35 377 return 0;
1da177e4 378
538b0188 379 cached_freq = policy->freq_table[to_perf_data(data)->state].frequency;
8cee1eed 380 freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data));
e56a727b
VP
381 if (freq != cached_freq) {
382 /*
383 * The dreaded BIOS frequency change behind our back.
384 * Force set the frequency on next target call.
385 */
386 data->resume = 1;
387 }
388
2d06d8c4 389 pr_debug("cur freq = %u\n", freq);
1da177e4 390
fe27cb35 391 return freq;
1da177e4
LT
392}
393
8cee1eed
VK
394static unsigned int check_freqs(struct cpufreq_policy *policy,
395 const struct cpumask *mask, unsigned int freq)
fe27cb35 396{
8cee1eed 397 struct acpi_cpufreq_data *data = policy->driver_data;
64be7eed
VP
398 unsigned int cur_freq;
399 unsigned int i;
1da177e4 400
3a58df35 401 for (i = 0; i < 100; i++) {
8cee1eed 402 cur_freq = extract_freq(policy, get_cur_val(mask, data));
fe27cb35
VP
403 if (cur_freq == freq)
404 return 1;
405 udelay(10);
406 }
407 return 0;
408}
409
410static int acpi_cpufreq_target(struct cpufreq_policy *policy,
9c0ebcf7 411 unsigned int index)
1da177e4 412{
eb0b3e78 413 struct acpi_cpufreq_data *data = policy->driver_data;
64be7eed 414 struct acpi_processor_performance *perf;
ed757a2c 415 const struct cpumask *mask;
8edc59d9 416 unsigned int next_perf_state = 0; /* Index into perf table */
64be7eed 417 int result = 0;
fe27cb35 418
8cee1eed 419 if (unlikely(!data)) {
fe27cb35
VP
420 return -ENODEV;
421 }
1da177e4 422
3427616b 423 perf = to_perf_data(data);
8cee1eed 424 next_perf_state = policy->freq_table[index].driver_data;
7650b281 425 if (perf->state == next_perf_state) {
fe27cb35 426 if (unlikely(data->resume)) {
2d06d8c4 427 pr_debug("Called after resume, resetting to P%d\n",
64be7eed 428 next_perf_state);
fe27cb35
VP
429 data->resume = 0;
430 } else {
2d06d8c4 431 pr_debug("Already at target state (P%d)\n",
64be7eed 432 next_perf_state);
9a909a14 433 return 0;
fe27cb35 434 }
09b4d1ee
VP
435 }
436
ed757a2c
RW
437 /*
438 * The core won't allow CPUs to go away until the governor has been
439 * stopped, so we can rely on the stability of policy->cpus.
440 */
441 mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ?
442 cpumask_of(policy->cpu) : policy->cpus;
09b4d1ee 443
ed757a2c 444 drv_write(data, mask, perf->states[next_perf_state].control);
09b4d1ee 445
fe27cb35 446 if (acpi_pstate_strict) {
8cee1eed
VK
447 if (!check_freqs(policy, mask,
448 policy->freq_table[index].frequency)) {
eae2ef0e 449 pr_debug("%s (%d)\n", __func__, policy->cpu);
4d8bb537 450 result = -EAGAIN;
09b4d1ee
VP
451 }
452 }
453
e15d8309
VK
454 if (!result)
455 perf->state = next_perf_state;
fe27cb35
VP
456
457 return result;
1da177e4
LT
458}
459
08e9cc40
CIK
460static unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy,
461 unsigned int target_freq)
b7898fda
RW
462{
463 struct acpi_cpufreq_data *data = policy->driver_data;
464 struct acpi_processor_performance *perf;
465 struct cpufreq_frequency_table *entry;
82577360 466 unsigned int next_perf_state, next_freq, index;
b7898fda
RW
467
468 /*
469 * Find the closest frequency above target_freq.
b7898fda 470 */
5b6667c7
SM
471 if (policy->cached_target_freq == target_freq)
472 index = policy->cached_resolved_idx;
473 else
1f39fa0d
VD
474 index = cpufreq_table_find_index_dl(policy, target_freq,
475 false);
82577360
VK
476
477 entry = &policy->freq_table[index];
b7898fda
RW
478 next_freq = entry->frequency;
479 next_perf_state = entry->driver_data;
480
481 perf = to_perf_data(data);
482 if (perf->state == next_perf_state) {
483 if (unlikely(data->resume))
484 data->resume = 0;
485 else
486 return next_freq;
487 }
488
489 data->cpu_freq_write(&perf->control_register,
490 perf->states[next_perf_state].control);
491 perf->state = next_perf_state;
492 return next_freq;
493}
494
1da177e4 495static unsigned long
64be7eed 496acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
1da177e4 497{
3427616b 498 struct acpi_processor_performance *perf;
09b4d1ee 499
3427616b 500 perf = to_perf_data(data);
1da177e4
LT
501 if (cpu_khz) {
502 /* search the closest match to cpu_khz */
503 unsigned int i;
504 unsigned long freq;
09b4d1ee 505 unsigned long freqn = perf->states[0].core_frequency * 1000;
1da177e4 506
3a58df35 507 for (i = 0; i < (perf->state_count-1); i++) {
1da177e4 508 freq = freqn;
95dd7227 509 freqn = perf->states[i+1].core_frequency * 1000;
1da177e4 510 if ((2 * cpu_khz) > (freqn + freq)) {
09b4d1ee 511 perf->state = i;
64be7eed 512 return freq;
1da177e4
LT
513 }
514 }
95dd7227 515 perf->state = perf->state_count-1;
64be7eed 516 return freqn;
09b4d1ee 517 } else {
1da177e4 518 /* assume CPU is at P0... */
09b4d1ee
VP
519 perf->state = 0;
520 return perf->states[0].core_frequency * 1000;
521 }
1da177e4
LT
522}
523
2fdf66b4
RR
524static void free_acpi_perf_data(void)
525{
526 unsigned int i;
527
528 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
529 for_each_possible_cpu(i)
530 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
531 ->shared_cpu_map);
532 free_percpu(acpi_perf_data);
533}
534
4d66ddf2
SAS
535static int cpufreq_boost_down_prep(unsigned int cpu)
536{
4d66ddf2
SAS
537 /*
538 * Clear the boost-disable bit on the CPU_DOWN path so that
539 * this cpu cannot block the remaining ones from boosting.
540 */
a3605c46 541 return boost_set_msr(1);
615b7300
AP
542}
543
09b4d1ee
VP
544/*
545 * acpi_cpufreq_early_init - initialize ACPI P-States library
546 *
547 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
548 * in order to determine correct frequency and voltage pairings. We can
549 * do _PDC and _PSD and find out the processor dependency for the
550 * actual init that will happen later...
551 */
50109292 552static int __init acpi_cpufreq_early_init(void)
09b4d1ee 553{
2fdf66b4 554 unsigned int i;
eae2ef0e 555 pr_debug("%s\n", __func__);
09b4d1ee 556
50109292
FY
557 acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
558 if (!acpi_perf_data) {
2d06d8c4 559 pr_debug("Memory allocation error for acpi_perf_data.\n");
50109292 560 return -ENOMEM;
09b4d1ee 561 }
2fdf66b4 562 for_each_possible_cpu(i) {
eaa95840 563 if (!zalloc_cpumask_var_node(
80855f73
MT
564 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
565 GFP_KERNEL, cpu_to_node(i))) {
2fdf66b4
RR
566
567 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
568 free_acpi_perf_data();
569 return -ENOMEM;
570 }
571 }
09b4d1ee
VP
572
573 /* Do initialization in ACPI core */
fe27cb35
VP
574 acpi_processor_preregister_performance(acpi_perf_data);
575 return 0;
09b4d1ee
VP
576}
577
95625b8f 578#ifdef CONFIG_SMP
8adcc0c6
VP
579/*
580 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
581 * or do it in BIOS firmware and won't inform about it to OS. If not
582 * detected, this has a side effect of making CPU run at a different speed
583 * than OS intended it to run at. Detect it and handle it cleanly.
584 */
585static int bios_with_sw_any_bug;
586
1855256c 587static int sw_any_bug_found(const struct dmi_system_id *d)
8adcc0c6
VP
588{
589 bios_with_sw_any_bug = 1;
590 return 0;
591}
592
1855256c 593static const struct dmi_system_id sw_any_bug_dmi_table[] = {
8adcc0c6
VP
594 {
595 .callback = sw_any_bug_found,
596 .ident = "Supermicro Server X6DLP",
597 .matches = {
598 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
599 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
600 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
601 },
602 },
603 { }
604};
1a8e42fa
PB
605
606static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
607{
293afe44 608 /* Intel Xeon Processor 7100 Series Specification Update
8479eb82 609 * https://www.intel.com/Assets/PDF/specupdate/314554.pdf
1a8e42fa
PB
610 * AL30: A Machine Check Exception (MCE) Occurring during an
611 * Enhanced Intel SpeedStep Technology Ratio Change May Cause
293afe44 612 * Both Processor Cores to Lock Up. */
1a8e42fa
PB
613 if (c->x86_vendor == X86_VENDOR_INTEL) {
614 if ((c->x86 == 15) &&
615 (c->x86_model == 6) &&
b399151c 616 (c->x86_stepping == 8)) {
1c5864e2 617 pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n");
1a8e42fa 618 return -ENODEV;
293afe44 619 }
1a8e42fa
PB
620 }
621 return 0;
622}
95625b8f 623#endif
8adcc0c6 624
3c55e94c 625#ifdef CONFIG_ACPI_CPPC_LIB
08346675
GS
626/*
627 * get_max_boost_ratio: Computes the max_boost_ratio as the ratio
628 * between the highest_perf and the nominal_perf.
629 *
630 * Returns the max_boost_ratio for @cpu. Returns the CPPC nominal
631 * frequency via @nominal_freq if it is non-NULL pointer.
632 */
633static u64 get_max_boost_ratio(unsigned int cpu, u64 *nominal_freq)
3c55e94c
RW
634{
635 struct cppc_perf_caps perf_caps;
636 u64 highest_perf, nominal_perf;
637 int ret;
638
639 if (acpi_pstate_strict)
640 return 0;
641
642 ret = cppc_get_perf_caps(cpu, &perf_caps);
643 if (ret) {
644 pr_debug("CPU%d: Unable to get performance capabilities (%d)\n",
645 cpu, ret);
646 return 0;
647 }
648
6c09e3b4
ML
649 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
650 ret = amd_get_boost_ratio_numerator(cpu, &highest_perf);
651 if (ret) {
652 pr_debug("CPU%d: Unable to get boost ratio numerator (%d)\n",
653 cpu, ret);
654 return 0;
655 }
656 } else {
3743d55b 657 highest_perf = perf_caps.highest_perf;
6c09e3b4 658 }
3743d55b 659
3c55e94c
RW
660 nominal_perf = perf_caps.nominal_perf;
661
08346675 662 if (nominal_freq)
cb6a85f3 663 *nominal_freq = perf_caps.nominal_freq * 1000;
08346675 664
3c55e94c
RW
665 if (!highest_perf || !nominal_perf) {
666 pr_debug("CPU%d: highest or nominal performance missing\n", cpu);
667 return 0;
668 }
669
670 if (highest_perf < nominal_perf) {
671 pr_debug("CPU%d: nominal performance above highest\n", cpu);
672 return 0;
673 }
674
675 return div_u64(highest_perf << SCHED_CAPACITY_SHIFT, nominal_perf);
676}
08346675 677
3c55e94c 678#else
08346675
GS
679static inline u64 get_max_boost_ratio(unsigned int cpu, u64 *nominal_freq)
680{
681 return 0;
682}
3c55e94c
RW
683#endif
684
64be7eed 685static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
1da177e4 686{
3c55e94c
RW
687 struct cpufreq_frequency_table *freq_table;
688 struct acpi_processor_performance *perf;
64be7eed 689 struct acpi_cpufreq_data *data;
3c55e94c
RW
690 unsigned int cpu = policy->cpu;
691 struct cpuinfo_x86 *c = &cpu_data(cpu);
08346675 692 u64 max_boost_ratio, nominal_freq = 0;
3c55e94c 693 unsigned int valid_states = 0;
64be7eed 694 unsigned int result = 0;
3c55e94c 695 unsigned int i;
293afe44
JV
696#ifdef CONFIG_SMP
697 static int blacklisted;
698#endif
1da177e4 699
eae2ef0e 700 pr_debug("%s\n", __func__);
1da177e4 701
1a8e42fa 702#ifdef CONFIG_SMP
293afe44
JV
703 if (blacklisted)
704 return blacklisted;
705 blacklisted = acpi_cpufreq_blacklist(c);
706 if (blacklisted)
707 return blacklisted;
1a8e42fa
PB
708#endif
709
d5b73cd8 710 data = kzalloc(sizeof(*data), GFP_KERNEL);
1da177e4 711 if (!data)
64be7eed 712 return -ENOMEM;
1da177e4 713
f4fd3797
LT
714 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
715 result = -ENOMEM;
716 goto err_free;
717 }
718
3427616b 719 perf = per_cpu_ptr(acpi_perf_data, cpu);
8cfcfd39 720 data->acpi_perf_cpu = cpu;
eb0b3e78 721 policy->driver_data = data;
1da177e4 722
95dd7227 723 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
fe27cb35 724 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
1da177e4 725
3427616b 726 result = acpi_processor_register_performance(perf, cpu);
1da177e4 727 if (result)
f4fd3797 728 goto err_free_mask;
1da177e4 729
09b4d1ee 730 policy->shared_type = perf->shared_type;
95dd7227 731
46f18e3a 732 /*
95dd7227 733 * Will let policy->cpus know about dependency only when software
46f18e3a
VP
734 * coordination is required.
735 */
736 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
8adcc0c6 737 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
835481d9 738 cpumask_copy(policy->cpus, perf->shared_cpu_map);
8adcc0c6 739 }
f4fd3797 740 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
8adcc0c6
VP
741
742#ifdef CONFIG_SMP
743 dmi_check_system(sw_any_bug_dmi_table);
2624f90c 744 if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
8adcc0c6 745 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
3280c3c8 746 cpumask_copy(policy->cpus, topology_core_cpumask(cpu));
8adcc0c6 747 }
acd31624 748
5368512a
WH
749 if (check_amd_hwpstate_cpu(cpu) && boot_cpu_data.x86 < 0x19 &&
750 !acpi_pstate_strict) {
acd31624
AP
751 cpumask_clear(policy->cpus);
752 cpumask_set_cpu(cpu, policy->cpus);
3280c3c8
BG
753 cpumask_copy(data->freqdomain_cpus,
754 topology_sibling_cpumask(cpu));
acd31624 755 policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
1c5864e2 756 pr_info_once("overriding BIOS provided _PSD data\n");
acd31624 757 }
8adcc0c6 758#endif
09b4d1ee 759
1da177e4 760 /* capability check */
09b4d1ee 761 if (perf->state_count <= 1) {
2d06d8c4 762 pr_debug("No P-States\n");
1da177e4
LT
763 result = -ENODEV;
764 goto err_unreg;
765 }
09b4d1ee 766
fe27cb35
VP
767 if (perf->control_register.space_id != perf->status_register.space_id) {
768 result = -ENODEV;
769 goto err_unreg;
770 }
771
772 switch (perf->control_register.space_id) {
64be7eed 773 case ACPI_ADR_SPACE_SYSTEM_IO:
c40a4518
MG
774 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
775 boot_cpu_data.x86 == 0xf) {
776 pr_debug("AMD K8 systems must use native drivers.\n");
777 result = -ENODEV;
778 goto err_unreg;
779 }
2d06d8c4 780 pr_debug("SYSTEM IO addr space\n");
dde9f7ba 781 data->cpu_feature = SYSTEM_IO_CAPABLE;
ed757a2c
RW
782 data->cpu_freq_read = cpu_freq_read_io;
783 data->cpu_freq_write = cpu_freq_write_io;
dde9f7ba 784 break;
64be7eed 785 case ACPI_ADR_SPACE_FIXED_HARDWARE:
2d06d8c4 786 pr_debug("HARDWARE addr space\n");
3dc9a633
MG
787 if (check_est_cpu(cpu)) {
788 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
ed757a2c
RW
789 data->cpu_freq_read = cpu_freq_read_intel;
790 data->cpu_freq_write = cpu_freq_write_intel;
3dc9a633 791 break;
dde9f7ba 792 }
3dc9a633
MG
793 if (check_amd_hwpstate_cpu(cpu)) {
794 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
ed757a2c
RW
795 data->cpu_freq_read = cpu_freq_read_amd;
796 data->cpu_freq_write = cpu_freq_write_amd;
3dc9a633
MG
797 break;
798 }
799 result = -ENODEV;
800 goto err_unreg;
64be7eed 801 default:
2d06d8c4 802 pr_debug("Unknown addr space %d\n",
64be7eed 803 (u32) (perf->control_register.space_id));
1da177e4
LT
804 result = -ENODEV;
805 goto err_unreg;
806 }
807
538b0188
RW
808 freq_table = kcalloc(perf->state_count + 1, sizeof(*freq_table),
809 GFP_KERNEL);
8cee1eed 810 if (!freq_table) {
1da177e4
LT
811 result = -ENOMEM;
812 goto err_unreg;
813 }
814
815 /* detect transition latency */
816 policy->cpuinfo.transition_latency = 0;
3a58df35 817 for (i = 0; i < perf->state_count; i++) {
64be7eed
VP
818 if ((perf->states[i].transition_latency * 1000) >
819 policy->cpuinfo.transition_latency)
820 policy->cpuinfo.transition_latency =
821 perf->states[i].transition_latency * 1000;
1da177e4 822 }
1da177e4 823
a59d1637
PV
824 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
825 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
826 policy->cpuinfo.transition_latency > 20 * 1000) {
a59d1637 827 policy->cpuinfo.transition_latency = 20 * 1000;
b49c22a6 828 pr_info_once("P-state transition latency capped at 20 uS\n");
a59d1637
PV
829 }
830
1da177e4 831 /* table init */
3a58df35
DJ
832 for (i = 0; i < perf->state_count; i++) {
833 if (i > 0 && perf->states[i].core_frequency >=
8cee1eed 834 freq_table[valid_states-1].frequency / 1000)
fe27cb35
VP
835 continue;
836
8cee1eed
VK
837 freq_table[valid_states].driver_data = i;
838 freq_table[valid_states].frequency =
64be7eed 839 perf->states[i].core_frequency * 1000;
fe27cb35 840 valid_states++;
1da177e4 841 }
8cee1eed 842 freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
3c55e94c 843
08346675 844 max_boost_ratio = get_max_boost_ratio(cpu, &nominal_freq);
3c55e94c 845 if (max_boost_ratio) {
08346675 846 unsigned int freq = nominal_freq;
3c55e94c
RW
847
848 /*
08346675
GS
849 * The loop above sorts the freq_table entries in the
850 * descending order. If ACPI CPPC has not advertised
851 * the nominal frequency (this is possible in CPPC
852 * revisions prior to 3), then use the first entry in
853 * the pstate table as a proxy for nominal frequency.
3c55e94c 854 */
08346675
GS
855 if (!freq)
856 freq = freq_table[0].frequency;
857
538b0188
RW
858 policy->cpuinfo.max_freq = freq * max_boost_ratio >> SCHED_CAPACITY_SHIFT;
859 } else {
3c55e94c 860 /*
538b0188
RW
861 * If the maximum "boost" frequency is unknown, ask the arch
862 * scale-invariance code to use the "nominal" performance for
863 * CPU utilization scaling so as to prevent the schedutil
864 * governor from selecting inadequate CPU frequencies.
3c55e94c 865 */
538b0188 866 arch_set_max_freq_ratio(true);
3c55e94c
RW
867 }
868
1a186d9e 869 policy->freq_table = freq_table;
8edc59d9 870 perf->state = 0;
1da177e4 871
a507ac4b 872 switch (perf->control_register.space_id) {
64be7eed 873 case ACPI_ADR_SPACE_SYSTEM_IO:
1bab64d5
VK
874 /*
875 * The core will not set policy->cur, because
876 * cpufreq_driver->get is NULL, so we need to set it here.
877 * However, we have to guess it, because the current speed is
878 * unknown and not detectable via IO ports.
879 */
dde9f7ba
VP
880 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
881 break;
64be7eed 882 case ACPI_ADR_SPACE_FIXED_HARDWARE:
7650b281 883 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
dde9f7ba 884 break;
64be7eed 885 default:
dde9f7ba
VP
886 break;
887 }
888
1da177e4
LT
889 /* notify BIOS that we exist */
890 acpi_processor_notify_smm(THIS_MODULE);
891
2d06d8c4 892 pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
09b4d1ee 893 for (i = 0; i < perf->state_count; i++)
2d06d8c4 894 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
64be7eed 895 (i == perf->state ? '*' : ' '), i,
09b4d1ee
VP
896 (u32) perf->states[i].core_frequency,
897 (u32) perf->states[i].power,
898 (u32) perf->states[i].transition_latency);
1da177e4 899
4b31e774
DB
900 /*
901 * the first call to ->target() should result in us actually
902 * writing something to the appropriate registers.
903 */
904 data->resume = 1;
64be7eed 905
b7898fda
RW
906 policy->fast_switch_possible = !acpi_pstate_strict &&
907 !(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY);
908
692a3b9a
VK
909 if (perf->states[0].core_frequency * 1000 != freq_table[0].frequency)
910 pr_warn(FW_WARN "P-state 0 is not max freq\n");
911
3d592249
VK
912 if (acpi_cpufreq_driver.set_boost) {
913 if (policy->boost_supported) {
914 /*
915 * The firmware may have altered boost state while the
916 * CPU was offline (for example during a suspend-resume
917 * cycle).
918 */
919 if (policy->boost_enabled != boost_state(cpu))
920 set_boost(policy, policy->boost_enabled);
921 } else {
922 policy->boost_supported = true;
923 }
924 }
be6b8681 925
fe27cb35 926 return result;
1da177e4 927
95dd7227 928err_unreg:
b2f8dc4c 929 acpi_processor_unregister_performance(cpu);
f4fd3797
LT
930err_free_mask:
931 free_cpumask_var(data->freqdomain_cpus);
95dd7227 932err_free:
1da177e4 933 kfree(data);
eb0b3e78 934 policy->driver_data = NULL;
1da177e4 935
64be7eed 936 return result;
1da177e4
LT
937}
938
b4b1ddc9 939static void acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
1da177e4 940{
eb0b3e78 941 struct acpi_cpufreq_data *data = policy->driver_data;
1da177e4 942
eae2ef0e 943 pr_debug("%s\n", __func__);
1da177e4 944
13fdbc8b 945 cpufreq_boost_down_prep(policy->cpu);
9b55f55a
VK
946 policy->fast_switch_possible = false;
947 policy->driver_data = NULL;
948 acpi_processor_unregister_performance(data->acpi_perf_cpu);
949 free_cpumask_var(data->freqdomain_cpus);
8cee1eed 950 kfree(policy->freq_table);
9b55f55a 951 kfree(data);
1da177e4
LT
952}
953
64be7eed 954static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
1da177e4 955{
eb0b3e78 956 struct acpi_cpufreq_data *data = policy->driver_data;
1da177e4 957
eae2ef0e 958 pr_debug("%s\n", __func__);
1da177e4
LT
959
960 data->resume = 1;
961
64be7eed 962 return 0;
1da177e4
LT
963}
964
64be7eed 965static struct freq_attr *acpi_cpufreq_attr[] = {
f4fd3797 966 &freqdomain_cpus,
f56c50e3
RW
967#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
968 &cpb,
969#endif
1da177e4
LT
970 NULL,
971};
972
973static struct cpufreq_driver acpi_cpufreq_driver = {
db9be219 974 .verify = cpufreq_generic_frequency_table_verify,
9c0ebcf7 975 .target_index = acpi_cpufreq_target,
b7898fda 976 .fast_switch = acpi_cpufreq_fast_switch,
e2f74f35
TR
977 .bios_limit = acpi_processor_get_bios_limit,
978 .init = acpi_cpufreq_cpu_init,
979 .exit = acpi_cpufreq_cpu_exit,
980 .resume = acpi_cpufreq_resume,
981 .name = "acpi-cpufreq",
e2f74f35 982 .attr = acpi_cpufreq_attr,
1da177e4
LT
983};
984
615b7300
AP
985static void __init acpi_cpufreq_boost_init(void)
986{
1222d527
EV
987 if (!(boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA))) {
988 pr_debug("Boost capabilities not present in the processor\n");
4d66ddf2 989 return;
1222d527 990 }
0197fbd2 991
4d66ddf2
SAS
992 acpi_cpufreq_driver.set_boost = set_boost;
993 acpi_cpufreq_driver.boost_enabled = boost_state(0);
615b7300
AP
994}
995
691a6371 996static int __init acpi_cpufreq_probe(struct platform_device *pdev)
1da177e4 997{
50109292
FY
998 int ret;
999
75c07581
RW
1000 if (acpi_disabled)
1001 return -ENODEV;
1002
8a61e12e
YL
1003 /* don't keep reloading if cpufreq_driver exists */
1004 if (cpufreq_get_current_driver())
73c7f824 1005 return -ENODEV;
ee297533 1006
eae2ef0e 1007 pr_debug("%s\n", __func__);
1da177e4 1008
50109292
FY
1009 ret = acpi_cpufreq_early_init();
1010 if (ret)
1011 return ret;
09b4d1ee 1012
11269ff5
AP
1013#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
1014 /* this is a sysfs file with a strange name and an even stranger
1015 * semantic - per CPU instantiation, but system global effect.
1016 * Lets enable it only on AMD CPUs for compatibility reasons and
1017 * only if configured. This is considered legacy code, which
1018 * will probably be removed at some point in the future.
1019 */
f56c50e3
RW
1020 if (!check_amd_hwpstate_cpu(0)) {
1021 struct freq_attr **attr;
11269ff5 1022
f56c50e3 1023 pr_debug("CPB unsupported, do not expose it\n");
11269ff5 1024
f56c50e3
RW
1025 for (attr = acpi_cpufreq_attr; *attr; attr++)
1026 if (*attr == &cpb) {
1027 *attr = NULL;
1028 break;
1029 }
11269ff5
AP
1030 }
1031#endif
cfc9c8ed 1032 acpi_cpufreq_boost_init();
11269ff5 1033
847aef6f 1034 ret = cpufreq_register_driver(&acpi_cpufreq_driver);
eb8c68ef 1035 if (ret) {
2fdf66b4 1036 free_acpi_perf_data();
eb8c68ef 1037 }
847aef6f 1038 return ret;
1da177e4
LT
1039}
1040
1cd04adf 1041static void acpi_cpufreq_remove(struct platform_device *pdev)
1da177e4 1042{
eae2ef0e 1043 pr_debug("%s\n", __func__);
1da177e4
LT
1044
1045 cpufreq_unregister_driver(&acpi_cpufreq_driver);
1046
50f4ddd4 1047 free_acpi_perf_data();
691a6371
PP
1048}
1049
1050static struct platform_driver acpi_cpufreq_platdrv = {
1051 .driver = {
1052 .name = "acpi-cpufreq",
1053 },
a9dedaa0 1054 .remove = acpi_cpufreq_remove,
691a6371
PP
1055};
1056
1057static int __init acpi_cpufreq_init(void)
1058{
1059 return platform_driver_probe(&acpi_cpufreq_platdrv, acpi_cpufreq_probe);
1060}
1061
1062static void __exit acpi_cpufreq_exit(void)
1063{
1064 platform_driver_unregister(&acpi_cpufreq_platdrv);
1da177e4
LT
1065}
1066
d395bf12 1067module_param(acpi_pstate_strict, uint, 0644);
64be7eed 1068MODULE_PARM_DESC(acpi_pstate_strict,
95dd7227
DJ
1069 "value 0 or non-zero. non-zero -> strict ACPI checks are "
1070 "performed during frequency changes.");
1da177e4
LT
1071
1072late_initcall(acpi_cpufreq_init);
1073module_exit(acpi_cpufreq_exit);
1074
691a6371 1075MODULE_ALIAS("platform:acpi-cpufreq");