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f1189989 TF |
1 | /* |
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
3 | * http://www.samsung.com/ | |
4 | * | |
5 | * samsung - Common hr-timer support (s3c and s5p) | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/interrupt.h> | |
13 | #include <linux/irq.h> | |
14 | #include <linux/err.h> | |
15 | #include <linux/clk.h> | |
16 | #include <linux/clockchips.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/of.h> | |
20 | #include <linux/of_address.h> | |
21 | #include <linux/of_irq.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/slab.h> | |
24 | ||
25 | #include <clocksource/samsung_pwm.h> | |
26 | ||
27 | #include <asm/sched_clock.h> | |
28 | ||
29 | /* | |
30 | * Clocksource driver | |
31 | */ | |
32 | ||
33 | #define REG_TCFG0 0x00 | |
34 | #define REG_TCFG1 0x04 | |
35 | #define REG_TCON 0x08 | |
36 | #define REG_TINT_CSTAT 0x44 | |
37 | ||
38 | #define REG_TCNTB(chan) (0x0c + 12 * (chan)) | |
39 | #define REG_TCMPB(chan) (0x10 + 12 * (chan)) | |
40 | ||
41 | #define TCFG0_PRESCALER_MASK 0xff | |
42 | #define TCFG0_PRESCALER1_SHIFT 8 | |
43 | ||
44 | #define TCFG1_SHIFT(x) ((x) * 4) | |
45 | #define TCFG1_MUX_MASK 0xf | |
46 | ||
47 | #define TCON_START(chan) (1 << (4 * (chan) + 0)) | |
48 | #define TCON_MANUALUPDATE(chan) (1 << (4 * (chan) + 1)) | |
49 | #define TCON_INVERT(chan) (1 << (4 * (chan) + 2)) | |
50 | #define TCON_AUTORELOAD(chan) (1 << (4 * (chan) + 3)) | |
51 | ||
7aac482e TF |
52 | DEFINE_SPINLOCK(samsung_pwm_lock); |
53 | EXPORT_SYMBOL(samsung_pwm_lock); | |
54 | ||
030c2a1e TF |
55 | struct samsung_pwm_clocksource { |
56 | void __iomem *base; | |
57 | unsigned int irq[SAMSUNG_PWM_NUM]; | |
58 | struct samsung_pwm_variant variant; | |
59 | ||
60 | struct clk *timerclk; | |
61 | ||
f1189989 TF |
62 | unsigned int event_id; |
63 | unsigned int source_id; | |
64 | unsigned int tcnt_max; | |
65 | unsigned int tscaler_div; | |
66 | unsigned int tdiv; | |
030c2a1e TF |
67 | |
68 | unsigned long clock_count_per_tick; | |
f1189989 TF |
69 | }; |
70 | ||
030c2a1e | 71 | static struct samsung_pwm_clocksource pwm; |
f1189989 | 72 | |
030c2a1e | 73 | static void samsung_timer_set_prescale(unsigned int channel, u16 prescale) |
f1189989 TF |
74 | { |
75 | unsigned long flags; | |
76 | u8 shift = 0; | |
77 | u32 reg; | |
78 | ||
79 | if (channel >= 2) | |
80 | shift = TCFG0_PRESCALER1_SHIFT; | |
81 | ||
7aac482e | 82 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
f1189989 | 83 | |
030c2a1e | 84 | reg = readl(pwm.base + REG_TCFG0); |
f1189989 TF |
85 | reg &= ~(TCFG0_PRESCALER_MASK << shift); |
86 | reg |= (prescale - 1) << shift; | |
030c2a1e | 87 | writel(reg, pwm.base + REG_TCFG0); |
f1189989 | 88 | |
7aac482e | 89 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
f1189989 TF |
90 | } |
91 | ||
030c2a1e | 92 | static void samsung_timer_set_divisor(unsigned int channel, u8 divisor) |
f1189989 TF |
93 | { |
94 | u8 shift = TCFG1_SHIFT(channel); | |
95 | unsigned long flags; | |
96 | u32 reg; | |
97 | u8 bits; | |
98 | ||
030c2a1e | 99 | bits = (fls(divisor) - 1) - pwm.variant.div_base; |
f1189989 | 100 | |
7aac482e | 101 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
f1189989 | 102 | |
030c2a1e | 103 | reg = readl(pwm.base + REG_TCFG1); |
f1189989 TF |
104 | reg &= ~(TCFG1_MUX_MASK << shift); |
105 | reg |= bits << shift; | |
030c2a1e | 106 | writel(reg, pwm.base + REG_TCFG1); |
f1189989 | 107 | |
7aac482e | 108 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
f1189989 TF |
109 | } |
110 | ||
111 | static void samsung_time_stop(unsigned int channel) | |
112 | { | |
113 | unsigned long tcon; | |
114 | unsigned long flags; | |
115 | ||
116 | if (channel > 0) | |
117 | ++channel; | |
118 | ||
7aac482e | 119 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
f1189989 | 120 | |
030c2a1e | 121 | tcon = __raw_readl(pwm.base + REG_TCON); |
f1189989 | 122 | tcon &= ~TCON_START(channel); |
030c2a1e | 123 | __raw_writel(tcon, pwm.base + REG_TCON); |
f1189989 | 124 | |
7aac482e | 125 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
f1189989 TF |
126 | } |
127 | ||
128 | static void samsung_time_setup(unsigned int channel, unsigned long tcnt) | |
129 | { | |
130 | unsigned long tcon; | |
131 | unsigned long flags; | |
132 | unsigned int tcon_chan = channel; | |
133 | ||
134 | if (tcon_chan > 0) | |
135 | ++tcon_chan; | |
136 | ||
7aac482e | 137 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
f1189989 | 138 | |
030c2a1e | 139 | tcon = __raw_readl(pwm.base + REG_TCON); |
f1189989 TF |
140 | |
141 | tcnt--; | |
142 | ||
143 | tcon &= ~(TCON_START(tcon_chan) | TCON_AUTORELOAD(tcon_chan)); | |
144 | tcon |= TCON_MANUALUPDATE(tcon_chan); | |
145 | ||
030c2a1e TF |
146 | __raw_writel(tcnt, pwm.base + REG_TCNTB(channel)); |
147 | __raw_writel(tcnt, pwm.base + REG_TCMPB(channel)); | |
148 | __raw_writel(tcon, pwm.base + REG_TCON); | |
f1189989 | 149 | |
7aac482e | 150 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
f1189989 TF |
151 | } |
152 | ||
153 | static void samsung_time_start(unsigned int channel, bool periodic) | |
154 | { | |
155 | unsigned long tcon; | |
156 | unsigned long flags; | |
157 | ||
158 | if (channel > 0) | |
159 | ++channel; | |
160 | ||
7aac482e | 161 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
f1189989 | 162 | |
030c2a1e | 163 | tcon = __raw_readl(pwm.base + REG_TCON); |
f1189989 TF |
164 | |
165 | tcon &= ~TCON_MANUALUPDATE(channel); | |
166 | tcon |= TCON_START(channel); | |
167 | ||
168 | if (periodic) | |
169 | tcon |= TCON_AUTORELOAD(channel); | |
170 | else | |
171 | tcon &= ~TCON_AUTORELOAD(channel); | |
172 | ||
030c2a1e | 173 | __raw_writel(tcon, pwm.base + REG_TCON); |
f1189989 | 174 | |
7aac482e | 175 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
f1189989 TF |
176 | } |
177 | ||
178 | static int samsung_set_next_event(unsigned long cycles, | |
179 | struct clock_event_device *evt) | |
180 | { | |
030c2a1e TF |
181 | samsung_time_setup(pwm.event_id, cycles); |
182 | samsung_time_start(pwm.event_id, false); | |
f1189989 TF |
183 | |
184 | return 0; | |
185 | } | |
186 | ||
187 | static void samsung_timer_resume(void) | |
188 | { | |
189 | /* event timer restart */ | |
030c2a1e TF |
190 | samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick); |
191 | samsung_time_start(pwm.event_id, true); | |
f1189989 TF |
192 | |
193 | /* source timer restart */ | |
030c2a1e TF |
194 | samsung_time_setup(pwm.source_id, pwm.tcnt_max); |
195 | samsung_time_start(pwm.source_id, true); | |
f1189989 TF |
196 | } |
197 | ||
198 | static void samsung_set_mode(enum clock_event_mode mode, | |
199 | struct clock_event_device *evt) | |
200 | { | |
030c2a1e | 201 | samsung_time_stop(pwm.event_id); |
f1189989 TF |
202 | |
203 | switch (mode) { | |
204 | case CLOCK_EVT_MODE_PERIODIC: | |
030c2a1e TF |
205 | samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick); |
206 | samsung_time_start(pwm.event_id, true); | |
f1189989 TF |
207 | break; |
208 | ||
209 | case CLOCK_EVT_MODE_ONESHOT: | |
210 | break; | |
211 | ||
212 | case CLOCK_EVT_MODE_UNUSED: | |
213 | case CLOCK_EVT_MODE_SHUTDOWN: | |
214 | break; | |
215 | ||
216 | case CLOCK_EVT_MODE_RESUME: | |
217 | samsung_timer_resume(); | |
218 | break; | |
219 | } | |
220 | } | |
221 | ||
222 | static struct clock_event_device time_event_device = { | |
223 | .name = "samsung_event_timer", | |
224 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | |
225 | .rating = 200, | |
226 | .set_next_event = samsung_set_next_event, | |
227 | .set_mode = samsung_set_mode, | |
228 | }; | |
229 | ||
230 | static irqreturn_t samsung_clock_event_isr(int irq, void *dev_id) | |
231 | { | |
232 | struct clock_event_device *evt = dev_id; | |
233 | ||
030c2a1e TF |
234 | if (pwm.variant.has_tint_cstat) { |
235 | u32 mask = (1 << pwm.event_id); | |
236 | writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT); | |
f1189989 TF |
237 | } |
238 | ||
239 | evt->event_handler(evt); | |
240 | ||
241 | return IRQ_HANDLED; | |
242 | } | |
243 | ||
244 | static struct irqaction samsung_clock_event_irq = { | |
245 | .name = "samsung_time_irq", | |
246 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | |
247 | .handler = samsung_clock_event_isr, | |
248 | .dev_id = &time_event_device, | |
249 | }; | |
250 | ||
251 | static void __init samsung_clockevent_init(void) | |
252 | { | |
253 | unsigned long pclk; | |
254 | unsigned long clock_rate; | |
255 | unsigned int irq_number; | |
256 | ||
030c2a1e | 257 | pclk = clk_get_rate(pwm.timerclk); |
f1189989 | 258 | |
030c2a1e TF |
259 | samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div); |
260 | samsung_timer_set_divisor(pwm.event_id, pwm.tdiv); | |
f1189989 | 261 | |
030c2a1e TF |
262 | clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv); |
263 | pwm.clock_count_per_tick = clock_rate / HZ; | |
f1189989 TF |
264 | |
265 | time_event_device.cpumask = cpumask_of(0); | |
e9b852b8 TF |
266 | clockevents_config_and_register(&time_event_device, |
267 | clock_rate, 1, pwm.tcnt_max); | |
f1189989 | 268 | |
030c2a1e | 269 | irq_number = pwm.irq[pwm.event_id]; |
f1189989 TF |
270 | setup_irq(irq_number, &samsung_clock_event_irq); |
271 | ||
030c2a1e TF |
272 | if (pwm.variant.has_tint_cstat) { |
273 | u32 mask = (1 << pwm.event_id); | |
274 | writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT); | |
f1189989 TF |
275 | } |
276 | } | |
277 | ||
278 | static void __iomem *samsung_timer_reg(void) | |
279 | { | |
030c2a1e | 280 | switch (pwm.source_id) { |
f1189989 TF |
281 | case 0: |
282 | case 1: | |
283 | case 2: | |
284 | case 3: | |
030c2a1e | 285 | return pwm.base + pwm.source_id * 0x0c + 0x14; |
f1189989 TF |
286 | |
287 | case 4: | |
030c2a1e | 288 | return pwm.base + 0x40; |
f1189989 TF |
289 | |
290 | default: | |
291 | BUG(); | |
292 | } | |
293 | } | |
294 | ||
295 | /* | |
296 | * Override the global weak sched_clock symbol with this | |
297 | * local implementation which uses the clocksource to get some | |
298 | * better resolution when scheduling the kernel. We accept that | |
299 | * this wraps around for now, since it is just a relative time | |
300 | * stamp. (Inspired by U300 implementation.) | |
301 | */ | |
302 | static u32 notrace samsung_read_sched_clock(void) | |
303 | { | |
304 | void __iomem *reg = samsung_timer_reg(); | |
305 | ||
306 | if (!reg) | |
307 | return 0; | |
308 | ||
309 | return ~__raw_readl(reg); | |
310 | } | |
311 | ||
312 | static void __init samsung_clocksource_init(void) | |
313 | { | |
314 | void __iomem *reg = samsung_timer_reg(); | |
315 | unsigned long pclk; | |
316 | unsigned long clock_rate; | |
317 | int ret; | |
318 | ||
030c2a1e | 319 | pclk = clk_get_rate(pwm.timerclk); |
f1189989 | 320 | |
030c2a1e TF |
321 | samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div); |
322 | samsung_timer_set_divisor(pwm.source_id, pwm.tdiv); | |
f1189989 | 323 | |
030c2a1e | 324 | clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv); |
f1189989 | 325 | |
030c2a1e TF |
326 | samsung_time_setup(pwm.source_id, pwm.tcnt_max); |
327 | samsung_time_start(pwm.source_id, true); | |
f1189989 TF |
328 | |
329 | setup_sched_clock(samsung_read_sched_clock, | |
030c2a1e | 330 | pwm.variant.bits, clock_rate); |
f1189989 TF |
331 | |
332 | ret = clocksource_mmio_init(reg, "samsung_clocksource_timer", | |
030c2a1e | 333 | clock_rate, 250, pwm.variant.bits, |
f1189989 TF |
334 | clocksource_mmio_readl_down); |
335 | if (ret) | |
336 | panic("samsung_clocksource_timer: can't register clocksource\n"); | |
337 | } | |
338 | ||
339 | static void __init samsung_timer_resources(void) | |
340 | { | |
030c2a1e TF |
341 | pwm.timerclk = clk_get(NULL, "timers"); |
342 | if (IS_ERR(pwm.timerclk)) | |
f1189989 TF |
343 | panic("failed to get timers clock for timer"); |
344 | ||
030c2a1e | 345 | clk_prepare_enable(pwm.timerclk); |
f1189989 | 346 | |
030c2a1e TF |
347 | pwm.tcnt_max = (1UL << pwm.variant.bits) - 1; |
348 | if (pwm.variant.bits == 16) { | |
349 | pwm.tscaler_div = 25; | |
350 | pwm.tdiv = 2; | |
f1189989 | 351 | } else { |
030c2a1e TF |
352 | pwm.tscaler_div = 2; |
353 | pwm.tdiv = 1; | |
f1189989 TF |
354 | } |
355 | } | |
356 | ||
357 | /* | |
358 | * PWM master driver | |
359 | */ | |
f9bb48a2 | 360 | static void __init _samsung_pwm_clocksource_init(void) |
f1189989 TF |
361 | { |
362 | u8 mask; | |
363 | int channel; | |
364 | ||
030c2a1e | 365 | mask = ~pwm.variant.output_mask & ((1 << SAMSUNG_PWM_NUM) - 1); |
f1189989 TF |
366 | channel = fls(mask) - 1; |
367 | if (channel < 0) | |
368 | panic("failed to find PWM channel for clocksource"); | |
030c2a1e | 369 | pwm.source_id = channel; |
f1189989 TF |
370 | |
371 | mask &= ~(1 << channel); | |
372 | channel = fls(mask) - 1; | |
373 | if (channel < 0) | |
374 | panic("failed to find PWM channel for clock event"); | |
030c2a1e | 375 | pwm.event_id = channel; |
f1189989 TF |
376 | |
377 | samsung_timer_resources(); | |
378 | samsung_clockevent_init(); | |
379 | samsung_clocksource_init(); | |
380 | } | |
381 | ||
f9bb48a2 TF |
382 | void __init samsung_pwm_clocksource_init(void __iomem *base, |
383 | unsigned int *irqs, struct samsung_pwm_variant *variant) | |
384 | { | |
385 | pwm.base = base; | |
386 | memcpy(&pwm.variant, variant, sizeof(pwm.variant)); | |
387 | memcpy(pwm.irq, irqs, SAMSUNG_PWM_NUM * sizeof(*irqs)); | |
388 | ||
389 | _samsung_pwm_clocksource_init(); | |
390 | } | |
391 | ||
392 | #ifdef CONFIG_CLKSRC_OF | |
f1189989 TF |
393 | static void __init samsung_pwm_alloc(struct device_node *np, |
394 | const struct samsung_pwm_variant *variant) | |
395 | { | |
396 | struct resource res; | |
397 | struct property *prop; | |
398 | const __be32 *cur; | |
399 | u32 val; | |
400 | int i; | |
401 | ||
030c2a1e | 402 | memcpy(&pwm.variant, variant, sizeof(pwm.variant)); |
f1189989 | 403 | for (i = 0; i < SAMSUNG_PWM_NUM; ++i) |
030c2a1e | 404 | pwm.irq[i] = irq_of_parse_and_map(np, i); |
f1189989 TF |
405 | |
406 | of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) { | |
407 | if (val >= SAMSUNG_PWM_NUM) { | |
408 | pr_warning("%s: invalid channel index in samsung,pwm-outputs property\n", | |
409 | __func__); | |
410 | continue; | |
411 | } | |
030c2a1e | 412 | pwm.variant.output_mask |= 1 << val; |
f1189989 TF |
413 | } |
414 | ||
415 | of_address_to_resource(np, 0, &res); | |
416 | if (!request_mem_region(res.start, | |
417 | resource_size(&res), "samsung-pwm")) { | |
418 | pr_err("%s: failed to request IO mem region\n", __func__); | |
419 | return; | |
420 | } | |
421 | ||
030c2a1e TF |
422 | pwm.base = ioremap(res.start, resource_size(&res)); |
423 | if (!pwm.base) { | |
f1189989 TF |
424 | pr_err("%s: failed to map PWM registers\n", __func__); |
425 | release_mem_region(res.start, resource_size(&res)); | |
426 | return; | |
427 | } | |
428 | ||
f9bb48a2 | 429 | _samsung_pwm_clocksource_init(); |
f1189989 TF |
430 | } |
431 | ||
432 | static const struct samsung_pwm_variant s3c24xx_variant = { | |
433 | .bits = 16, | |
434 | .div_base = 1, | |
435 | .has_tint_cstat = false, | |
436 | .tclk_mask = (1 << 4), | |
437 | }; | |
438 | ||
439 | static void __init s3c2410_pwm_clocksource_init(struct device_node *np) | |
440 | { | |
441 | samsung_pwm_alloc(np, &s3c24xx_variant); | |
442 | } | |
443 | CLOCKSOURCE_OF_DECLARE(s3c2410_pwm, "samsung,s3c2410-pwm", s3c2410_pwm_clocksource_init); | |
444 | ||
445 | static const struct samsung_pwm_variant s3c64xx_variant = { | |
446 | .bits = 32, | |
447 | .div_base = 0, | |
448 | .has_tint_cstat = true, | |
449 | .tclk_mask = (1 << 7) | (1 << 6) | (1 << 5), | |
450 | }; | |
451 | ||
452 | static void __init s3c64xx_pwm_clocksource_init(struct device_node *np) | |
453 | { | |
454 | samsung_pwm_alloc(np, &s3c64xx_variant); | |
455 | } | |
456 | CLOCKSOURCE_OF_DECLARE(s3c6400_pwm, "samsung,s3c6400-pwm", s3c64xx_pwm_clocksource_init); | |
457 | ||
458 | static const struct samsung_pwm_variant s5p64x0_variant = { | |
459 | .bits = 32, | |
460 | .div_base = 0, | |
461 | .has_tint_cstat = true, | |
462 | .tclk_mask = 0, | |
463 | }; | |
464 | ||
465 | static void __init s5p64x0_pwm_clocksource_init(struct device_node *np) | |
466 | { | |
467 | samsung_pwm_alloc(np, &s5p64x0_variant); | |
468 | } | |
469 | CLOCKSOURCE_OF_DECLARE(s5p6440_pwm, "samsung,s5p6440-pwm", s5p64x0_pwm_clocksource_init); | |
470 | ||
471 | static const struct samsung_pwm_variant s5p_variant = { | |
472 | .bits = 32, | |
473 | .div_base = 0, | |
474 | .has_tint_cstat = true, | |
475 | .tclk_mask = (1 << 5), | |
476 | }; | |
477 | ||
478 | static void __init s5p_pwm_clocksource_init(struct device_node *np) | |
479 | { | |
480 | samsung_pwm_alloc(np, &s5p_variant); | |
481 | } | |
482 | CLOCKSOURCE_OF_DECLARE(s5pc100_pwm, "samsung,s5pc100-pwm", s5p_pwm_clocksource_init); | |
f9bb48a2 | 483 | #endif |