[linux-block.git] / drivers / clocksource / em_sti.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Emma Mobile Timer Support - STI
 *
 *  Copyright (C) 2012 Magnus Damm
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/irq.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/slab.h>
#include <linux/module.h>

enum { USER_CLOCKSOURCE, USER_CLOCKEVENT, USER_NR };

struct em_sti_priv {
	void __iomem *base;
	struct clk *clk;
	struct platform_device *pdev;
	unsigned int active[USER_NR];
	unsigned long rate;
	raw_spinlock_t lock;
	struct clock_event_device ced;
	struct clocksource cs;
};

#define STI_CONTROL 0x00
#define STI_COMPA_H 0x10
#define STI_COMPA_L 0x14
#define STI_COMPB_H 0x18
#define STI_COMPB_L 0x1c
#define STI_COUNT_H 0x20
#define STI_COUNT_L 0x24
#define STI_COUNT_RAW_H 0x28
#define STI_COUNT_RAW_L 0x2c
#define STI_SET_H 0x30
#define STI_SET_L 0x34
#define STI_INTSTATUS 0x40
#define STI_INTRAWSTATUS 0x44
#define STI_INTENSET 0x48
#define STI_INTENCLR 0x4c
#define STI_INTFFCLR 0x50

static inline unsigned long em_sti_read(struct em_sti_priv *p, int offs)
{
	return ioread32(p->base + offs);
}

static inline void em_sti_write(struct em_sti_priv *p, int offs,
				unsigned long value)
{
	iowrite32(value, p->base + offs);
}

static int em_sti_enable(struct em_sti_priv *p)
{
	int ret;

	/* enable clock */
	ret = clk_enable(p->clk);
	if (ret) {
		dev_err(&p->pdev->dev, "cannot enable clock\n");
		return ret;
	}

	/* reset the counter */
	em_sti_write(p, STI_SET_H, 0x40000000);
	em_sti_write(p, STI_SET_L, 0x00000000);

	/* mask and clear pending interrupts */
	em_sti_write(p, STI_INTENCLR, 3);
	em_sti_write(p, STI_INTFFCLR, 3);

	/* enable updates of counter registers */
	em_sti_write(p, STI_CONTROL, 1);

	return 0;
}

static void em_sti_disable(struct em_sti_priv *p)
{
	/* mask interrupts */
	em_sti_write(p, STI_INTENCLR, 3);

	/* stop clock */
	clk_disable(p->clk);
}

static u64 em_sti_count(struct em_sti_priv *p)
{
	u64 ticks;
	unsigned long flags;

	/* the STI hardware buffers the 48-bit count, but to
	 * break it out into two 32-bit access the registers
	 * must be accessed in a certain order.
	 * Always read STI_COUNT_H before STI_COUNT_L.
	 */
	raw_spin_lock_irqsave(&p->lock, flags);
	ticks = (u64)(em_sti_read(p, STI_COUNT_H) & 0xffff) << 32;
	ticks |= em_sti_read(p, STI_COUNT_L);
	raw_spin_unlock_irqrestore(&p->lock, flags);

	return ticks;
}

static u64 em_sti_set_next(struct em_sti_priv *p, u64 next)
{
	unsigned long flags;

	raw_spin_lock_irqsave(&p->lock, flags);

	/* mask compare A interrupt */
	em_sti_write(p, STI_INTENCLR, 1);

	/* update compare A value */
	em_sti_write(p, STI_COMPA_H, next >> 32);
	em_sti_write(p, STI_COMPA_L, next & 0xffffffff);

	/* clear compare A interrupt source */
	em_sti_write(p, STI_INTFFCLR, 1);

	/* unmask compare A interrupt */
	em_sti_write(p, STI_INTENSET, 1);

	raw_spin_unlock_irqrestore(&p->lock, flags);

	return next;
}

static irqreturn_t em_sti_interrupt(int irq, void *dev_id)
{
	struct em_sti_priv *p = dev_id;

	p->ced.event_handler(&p->ced);
	return IRQ_HANDLED;
}

static int em_sti_start(struct em_sti_priv *p, unsigned int user)
{
	unsigned long flags;
	int used_before;
	int ret = 0;

	raw_spin_lock_irqsave(&p->lock, flags);
	used_before = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
	if (!used_before)
		ret = em_sti_enable(p);

	if (!ret)
		p->active[user] = 1;
	raw_spin_unlock_irqrestore(&p->lock, flags);

	return ret;
}

static void em_sti_stop(struct em_sti_priv *p, unsigned int user)
{
	unsigned long flags;
	int used_before, used_after;

	raw_spin_lock_irqsave(&p->lock, flags);
	used_before = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
	p->active[user] = 0;
	used_after = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];

	if (used_before && !used_after)
		em_sti_disable(p);
	raw_spin_unlock_irqrestore(&p->lock, flags);
}

static struct em_sti_priv *cs_to_em_sti(struct clocksource *cs)
{
	return container_of(cs, struct em_sti_priv, cs);
}

static u64 em_sti_clocksource_read(struct clocksource *cs)
{
	return em_sti_count(cs_to_em_sti(cs));
}

static int em_sti_clocksource_enable(struct clocksource *cs)
{
	struct em_sti_priv *p = cs_to_em_sti(cs);

	return em_sti_start(p, USER_CLOCKSOURCE);
}

static void em_sti_clocksource_disable(struct clocksource *cs)
{
	em_sti_stop(cs_to_em_sti(cs), USER_CLOCKSOURCE);
}

static void em_sti_clocksource_resume(struct clocksource *cs)
{
	em_sti_clocksource_enable(cs);
}

static int em_sti_register_clocksource(struct em_sti_priv *p)
{
	struct clocksource *cs = &p->cs;

	cs->name = dev_name(&p->pdev->dev);
	cs->rating = 200;
	cs->read = em_sti_clocksource_read;
	cs->enable = em_sti_clocksource_enable;
	cs->disable = em_sti_clocksource_disable;
	cs->suspend = em_sti_clocksource_disable;
	cs->resume = em_sti_clocksource_resume;
	cs->mask = CLOCKSOURCE_MASK(48);
	cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;

	dev_info(&p->pdev->dev, "used as clock source\n");

	clocksource_register_hz(cs, p->rate);
	return 0;
}

static struct em_sti_priv *ced_to_em_sti(struct clock_event_device *ced)
{
	return container_of(ced, struct em_sti_priv, ced);
}

static int em_sti_clock_event_shutdown(struct clock_event_device *ced)
{
	struct em_sti_priv *p = ced_to_em_sti(ced);
	em_sti_stop(p, USER_CLOCKEVENT);
	return 0;
}

static int em_sti_clock_event_set_oneshot(struct clock_event_device *ced)
{
	struct em_sti_priv *p = ced_to_em_sti(ced);

	dev_info(&p->pdev->dev, "used for oneshot clock events\n");
	em_sti_start(p, USER_CLOCKEVENT);
	return 0;
}

static int em_sti_clock_event_next(unsigned long delta,
				   struct clock_event_device *ced)
{
	struct em_sti_priv *p = ced_to_em_sti(ced);
	u64 next;
	int safe;

	next = em_sti_set_next(p, em_sti_count(p) + delta);
	safe = em_sti_count(p) < (next - 1);

	return !safe;
}

static void em_sti_register_clockevent(struct em_sti_priv *p)
{
	struct clock_event_device *ced = &p->ced;

	ced->name = dev_name(&p->pdev->dev);
	ced->features = CLOCK_EVT_FEAT_ONESHOT;
	ced->rating = 200;
	ced->cpumask = cpu_possible_mask;
	ced->set_next_event = em_sti_clock_event_next;
	ced->set_state_shutdown = em_sti_clock_event_shutdown;
	ced->set_state_oneshot = em_sti_clock_event_set_oneshot;

	dev_info(&p->pdev->dev, "used for clock events\n");

	clockevents_config_and_register(ced, p->rate, 2, 0xffffffff);
}

static int em_sti_probe(struct platform_device *pdev)
{
	struct em_sti_priv *p;
	int irq, ret;

	p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
	if (p == NULL)
		return -ENOMEM;

	p->pdev = pdev;
	platform_set_drvdata(pdev, p);

	irq = platform_get_irq(pdev, 0);
	if (irq < 0)
		return irq;

	/* map memory, let base point to the STI instance */
	p->base = devm_platform_ioremap_resource(pdev, 0);
	if (IS_ERR(p->base))
		return PTR_ERR(p->base);

	ret = devm_request_irq(&pdev->dev, irq, em_sti_interrupt,
			       IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
			       dev_name(&pdev->dev), p);
	if (ret) {
		dev_err(&pdev->dev, "failed to request low IRQ\n");
		return ret;
	}

	/* get hold of clock */
	p->clk = devm_clk_get(&pdev->dev, "sclk");
	if (IS_ERR(p->clk)) {
		dev_err(&pdev->dev, "cannot get clock\n");
		return PTR_ERR(p->clk);
	}

	ret = clk_prepare(p->clk);
	if (ret < 0) {
		dev_err(&pdev->dev, "cannot prepare clock\n");
		return ret;
	}

	ret = clk_enable(p->clk);
	if (ret < 0) {
		dev_err(&p->pdev->dev, "cannot enable clock\n");
		clk_unprepare(p->clk);
		return ret;
	}
	p->rate = clk_get_rate(p->clk);
	clk_disable(p->clk);

	raw_spin_lock_init(&p->lock);
	em_sti_register_clockevent(p);
	em_sti_register_clocksource(p);
	return 0;
}

static const struct of_device_id em_sti_dt_ids[] = {
	{ .compatible = "renesas,em-sti", },
	{},
};
MODULE_DEVICE_TABLE(of, em_sti_dt_ids);

static struct platform_driver em_sti_device_driver = {
	.probe		= em_sti_probe,
	.driver		= {
		.name	= "em_sti",
		.of_match_table = em_sti_dt_ids,
		.suppress_bind_attrs = true,
	}
};

static int __init em_sti_init(void)
{
	return platform_driver_register(&em_sti_device_driver);
}

static void __exit em_sti_exit(void)
{
	platform_driver_unregister(&em_sti_device_driver);
}

subsys_initcall(em_sti_init);
module_exit(em_sti_exit);

MODULE_AUTHOR("Magnus Damm");
MODULE_DESCRIPTION("Renesas Emma Mobile STI Timer Driver");
Commit	Line	Data
0b712183	1	// SPDX-License-Identifier: GPL-2.0-only
b9dbf951 MD	2	/*
	3	* Emma Mobile Timer Support - STI
	4	*
	5	* Copyright (C) 2012 Magnus Damm
b9dbf951 MD	6	*/
	7
	8	#include <linux/init.h>
	9	#include <linux/platform_device.h>
	10	#include <linux/spinlock.h>
	11	#include <linux/interrupt.h>
	12	#include <linux/ioport.h>
	13	#include <linux/io.h>
	14	#include <linux/clk.h>
	15	#include <linux/irq.h>
	16	#include <linux/err.h>
	17	#include <linux/delay.h>
	18	#include <linux/clocksource.h>
	19	#include <linux/clockchips.h>
	20	#include <linux/slab.h>
	21	#include <linux/module.h>
	22
	23	enum { USER_CLOCKSOURCE, USER_CLOCKEVENT, USER_NR };
	24
	25	struct em_sti_priv {
	26	void __iomem *base;
	27	struct clk *clk;
	28	struct platform_device *pdev;
	29	unsigned int active[USER_NR];
	30	unsigned long rate;
	31	raw_spinlock_t lock;
	32	struct clock_event_device ced;
	33	struct clocksource cs;
	34	};
	35
	36	#define STI_CONTROL 0x00
	37	#define STI_COMPA_H 0x10
	38	#define STI_COMPA_L 0x14
	39	#define STI_COMPB_H 0x18
	40	#define STI_COMPB_L 0x1c
	41	#define STI_COUNT_H 0x20
	42	#define STI_COUNT_L 0x24
	43	#define STI_COUNT_RAW_H 0x28
	44	#define STI_COUNT_RAW_L 0x2c
	45	#define STI_SET_H 0x30
	46	#define STI_SET_L 0x34
	47	#define STI_INTSTATUS 0x40
	48	#define STI_INTRAWSTATUS 0x44
	49	#define STI_INTENSET 0x48
	50	#define STI_INTENCLR 0x4c
	51	#define STI_INTFFCLR 0x50
	52
	53	static inline unsigned long em_sti_read(struct em_sti_priv *p, int offs)
	54	{
	55	return ioread32(p->base + offs);
	56	}
	57
	58	static inline void em_sti_write(struct em_sti_priv *p, int offs,
	59	unsigned long value)
	60	{
	61	iowrite32(value, p->base + offs);
	62	}
	63
	64	static int em_sti_enable(struct em_sti_priv *p)
	65	{
	66	int ret;
	67
	68	/* enable clock */
3814ae09	69	ret = clk_enable(p->clk);
b9dbf951 MD	70	if (ret) {
	71	dev_err(&p->pdev->dev, "cannot enable clock\n");
	72	return ret;
	73	}
	74
b9dbf951 MD	75	/* reset the counter */
	76	em_sti_write(p, STI_SET_H, 0x40000000);
	77	em_sti_write(p, STI_SET_L, 0x00000000);
	78
	79	/* mask and clear pending interrupts */
	80	em_sti_write(p, STI_INTENCLR, 3);
	81	em_sti_write(p, STI_INTFFCLR, 3);
	82
	83	/* enable updates of counter registers */
	84	em_sti_write(p, STI_CONTROL, 1);
	85
	86	return 0;
	87	}
	88
	89	static void em_sti_disable(struct em_sti_priv *p)
	90	{
	91	/* mask interrupts */
	92	em_sti_write(p, STI_INTENCLR, 3);
	93
	94	/* stop clock */
3814ae09	95	clk_disable(p->clk);
b9dbf951 MD	96	}
b9dbf951 MD	97
a5a1d1c2	98	static u64 em_sti_count(struct em_sti_priv *p)
b9dbf951	99	{
a5a1d1c2	100	u64 ticks;
b9dbf951 MD	101	unsigned long flags;
	102
	103	/* the STI hardware buffers the 48-bit count, but to
	104	* break it out into two 32-bit access the registers
	105	* must be accessed in a certain order.
	106	* Always read STI_COUNT_H before STI_COUNT_L.
	107	*/
	108	raw_spin_lock_irqsave(&p->lock, flags);
a5a1d1c2	109	ticks = (u64)(em_sti_read(p, STI_COUNT_H) & 0xffff) << 32;
b9dbf951 MD	110	ticks \|= em_sti_read(p, STI_COUNT_L);
	111	raw_spin_unlock_irqrestore(&p->lock, flags);
	112
	113	return ticks;
	114	}
	115
a5a1d1c2	116	static u64 em_sti_set_next(struct em_sti_priv *p, u64 next)
b9dbf951 MD	117	{
	118	unsigned long flags;
	119
	120	raw_spin_lock_irqsave(&p->lock, flags);
	121
	122	/* mask compare A interrupt */
	123	em_sti_write(p, STI_INTENCLR, 1);
	124
	125	/* update compare A value */
	126	em_sti_write(p, STI_COMPA_H, next >> 32);
	127	em_sti_write(p, STI_COMPA_L, next & 0xffffffff);
	128
	129	/* clear compare A interrupt source */
	130	em_sti_write(p, STI_INTFFCLR, 1);
	131
	132	/* unmask compare A interrupt */
	133	em_sti_write(p, STI_INTENSET, 1);
	134
	135	raw_spin_unlock_irqrestore(&p->lock, flags);
	136
	137	return next;
	138	}
	139
	140	static irqreturn_t em_sti_interrupt(int irq, void *dev_id)
	141	{
	142	struct em_sti_priv *p = dev_id;
	143
	144	p->ced.event_handler(&p->ced);
	145	return IRQ_HANDLED;
	146	}
	147
	148	static int em_sti_start(struct em_sti_priv *p, unsigned int user)
	149	{
	150	unsigned long flags;
	151	int used_before;
	152	int ret = 0;
	153
	154	raw_spin_lock_irqsave(&p->lock, flags);
	155	used_before = p->active[USER_CLOCKSOURCE] \| p->active[USER_CLOCKEVENT];
	156	if (!used_before)
	157	ret = em_sti_enable(p);
	158
	159	if (!ret)
	160	p->active[user] = 1;
	161	raw_spin_unlock_irqrestore(&p->lock, flags);
	162
	163	return ret;
	164	}
	165
	166	static void em_sti_stop(struct em_sti_priv *p, unsigned int user)
	167	{
	168	unsigned long flags;
	169	int used_before, used_after;
	170
	171	raw_spin_lock_irqsave(&p->lock, flags);
	172	used_before = p->active[USER_CLOCKSOURCE] \| p->active[USER_CLOCKEVENT];
	173	p->active[user] = 0;
	174	used_after = p->active[USER_CLOCKSOURCE] \| p->active[USER_CLOCKEVENT];
	175
	176	if (used_before && !used_after)
	177	em_sti_disable(p);
	178	raw_spin_unlock_irqrestore(&p->lock, flags);
	179	}
	180
181	static struct em_sti_priv cs_to_em_sti(struct clocksource cs)
182	{
183	return container_of(cs, struct em_sti_priv, cs);
184	}
185
a5a1d1c2	186	static u64 em_sti_clocksource_read(struct clocksource *cs)
b9dbf951 MD	187	{
	188	return em_sti_count(cs_to_em_sti(cs));
	189	}
	190
	191	static int em_sti_clocksource_enable(struct clocksource *cs)
	192	{
b9dbf951 MD	193	struct em_sti_priv *p = cs_to_em_sti(cs);
b9dbf951 MD	194
4e53aa2f	195	return em_sti_start(p, USER_CLOCKSOURCE);
b9dbf951 MD	196	}
	197
	198	static void em_sti_clocksource_disable(struct clocksource *cs)
	199	{
	200	em_sti_stop(cs_to_em_sti(cs), USER_CLOCKSOURCE);
	201	}
	202
	203	static void em_sti_clocksource_resume(struct clocksource *cs)
	204	{
	205	em_sti_clocksource_enable(cs);
	206	}
	207
	208	static int em_sti_register_clocksource(struct em_sti_priv *p)
	209	{
	210	struct clocksource *cs = &p->cs;
	211
b9dbf951 MD	212	cs->name = dev_name(&p->pdev->dev);
	213	cs->rating = 200;
	214	cs->read = em_sti_clocksource_read;
	215	cs->enable = em_sti_clocksource_enable;
	216	cs->disable = em_sti_clocksource_disable;
	217	cs->suspend = em_sti_clocksource_disable;
	218	cs->resume = em_sti_clocksource_resume;
	219	cs->mask = CLOCKSOURCE_MASK(48);
	220	cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
	221
	222	dev_info(&p->pdev->dev, "used as clock source\n");
	223
4e53aa2f	224	clocksource_register_hz(cs, p->rate);
b9dbf951 MD	225	return 0;
	226	}
	227
	228	static struct em_sti_priv ced_to_em_sti(struct clock_event_device ced)
	229	{
	230	return container_of(ced, struct em_sti_priv, ced);
	231	}
	232
75f94061	233	static int em_sti_clock_event_shutdown(struct clock_event_device *ced)
b9dbf951 MD	234	{
b9dbf951 MD	235	struct em_sti_priv *p = ced_to_em_sti(ced);
75f94061 VK	236	em_sti_stop(p, USER_CLOCKEVENT);
	237	return 0;
	238	}
b9dbf951	239
75f94061 VK	240	static int em_sti_clock_event_set_oneshot(struct clock_event_device *ced)
	241	{
	242	struct em_sti_priv *p = ced_to_em_sti(ced);
b9dbf951	243
75f94061 VK	244	dev_info(&p->pdev->dev, "used for oneshot clock events\n");
75f94061 VK	245	em_sti_start(p, USER_CLOCKEVENT);
75f94061	246	return 0;
b9dbf951 MD	247	}
	248
	249	static int em_sti_clock_event_next(unsigned long delta,
	250	struct clock_event_device *ced)
	251	{
	252	struct em_sti_priv *p = ced_to_em_sti(ced);
a5a1d1c2	253	u64 next;
b9dbf951 MD	254	int safe;
	255
	256	next = em_sti_set_next(p, em_sti_count(p) + delta);
	257	safe = em_sti_count(p) < (next - 1);
	258
	259	return !safe;
	260	}
	261
	262	static void em_sti_register_clockevent(struct em_sti_priv *p)
	263	{
	264	struct clock_event_device *ced = &p->ced;
	265
b9dbf951 MD	266	ced->name = dev_name(&p->pdev->dev);
	267	ced->features = CLOCK_EVT_FEAT_ONESHOT;
	268	ced->rating = 200;
2199a557	269	ced->cpumask = cpu_possible_mask;
b9dbf951	270	ced->set_next_event = em_sti_clock_event_next;
75f94061 VK	271	ced->set_state_shutdown = em_sti_clock_event_shutdown;
75f94061 VK	272	ced->set_state_oneshot = em_sti_clock_event_set_oneshot;
b9dbf951 MD	273
	274	dev_info(&p->pdev->dev, "used for clock events\n");
	275
4e53aa2f	276	clockevents_config_and_register(ced, p->rate, 2, 0xffffffff);
b9dbf951 MD	277	}
b9dbf951 MD	278
1850514b	279	static int em_sti_probe(struct platform_device *pdev)
b9dbf951 MD	280	{
b9dbf951 MD	281	struct em_sti_priv *p;
ba25322e	282	int irq, ret;
b9dbf951	283
1745e696	284	p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
39dd5677	285	if (p == NULL)
1745e696	286	return -ENOMEM;
b9dbf951 MD	287
	288	p->pdev = pdev;
	289	platform_set_drvdata(pdev, p);
	290
b9dbf951	291	irq = platform_get_irq(pdev, 0);
9f475d08	292	if (irq < 0)
5c23a558	293	return irq;
b9dbf951 MD	294
b9dbf951 MD	295	/* map memory, let base point to the STI instance */
9a97b2fb	296	p->base = devm_platform_ioremap_resource(pdev, 0);
1745e696 LP	297	if (IS_ERR(p->base))
1745e696 LP	298	return PTR_ERR(p->base);
b9dbf951	299
5c23a558 GS	300	ret = devm_request_irq(&pdev->dev, irq, em_sti_interrupt,
	301	IRQF_TIMER \| IRQF_IRQPOLL \| IRQF_NOBALANCING,
	302	dev_name(&pdev->dev), p);
	303	if (ret) {
3814ae09	304	dev_err(&pdev->dev, "failed to request low IRQ\n");
5c23a558	305	return ret;
3814ae09 NS	306	}
3814ae09 NS	307
b9dbf951	308	/* get hold of clock */
1745e696	309	p->clk = devm_clk_get(&pdev->dev, "sclk");
b9dbf951 MD	310	if (IS_ERR(p->clk)) {
b9dbf951 MD	311	dev_err(&pdev->dev, "cannot get clock\n");
1745e696	312	return PTR_ERR(p->clk);
b9dbf951 MD	313	}
b9dbf951 MD	314
3814ae09 NS	315	ret = clk_prepare(p->clk);
	316	if (ret < 0) {
	317	dev_err(&pdev->dev, "cannot prepare clock\n");
	318	return ret;
b9dbf951 MD	319	}
b9dbf951 MD	320
4e53aa2f NS	321	ret = clk_enable(p->clk);
	322	if (ret < 0) {
	323	dev_err(&p->pdev->dev, "cannot enable clock\n");
	324	clk_unprepare(p->clk);
	325	return ret;
	326	}
	327	p->rate = clk_get_rate(p->clk);
	328	clk_disable(p->clk);
	329
b9dbf951 MD	330	raw_spin_lock_init(&p->lock);
	331	em_sti_register_clockevent(p);
	332	em_sti_register_clocksource(p);
	333	return 0;
b9dbf951 MD	334	}
b9dbf951 MD	335
1850514b	336	static const struct of_device_id em_sti_dt_ids[] = {
fc0830fe MD	337	{ .compatible = "renesas,em-sti", },
	338	{},
	339	};
	340	MODULE_DEVICE_TABLE(of, em_sti_dt_ids);
	341
b9dbf951 MD	342	static struct platform_driver em_sti_device_driver = {
b9dbf951 MD	343	.probe = em_sti_probe,
b9dbf951 MD	344	.driver = {
b9dbf951 MD	345	.name = "em_sti",
fc0830fe	346	.of_match_table = em_sti_dt_ids,
cf16f631	347	.suppress_bind_attrs = true,
b9dbf951 MD	348	}
	349	};
	350
09acc3a1 SH	351	static int __init em_sti_init(void)
	352	{
	353	return platform_driver_register(&em_sti_device_driver);
	354	}
	355
	356	static void __exit em_sti_exit(void)
	357	{
	358	platform_driver_unregister(&em_sti_device_driver);
	359	}
	360
	361	subsys_initcall(em_sti_init);
	362	module_exit(em_sti_exit);
b9dbf951 MD	363
	364	MODULE_AUTHOR("Magnus Damm");
	365	MODULE_DESCRIPTION("Renesas Emma Mobile STI Timer Driver");