[linux-2.6-block.git] / drivers / clocksource / em_sti.c

/*
 * Emma Mobile Timer Support - STI
 *
 *  Copyright (C) 2012 Magnus Damm
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/irq.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/slab.h>
#include <linux/module.h>

enum { USER_CLOCKSOURCE, USER_CLOCKEVENT, USER_NR };

struct em_sti_priv {
	void __iomem *base;
	struct clk *clk;
	struct platform_device *pdev;
	unsigned int active[USER_NR];
	unsigned long rate;
	raw_spinlock_t lock;
	struct clock_event_device ced;
	struct clocksource cs;
};

#define STI_CONTROL 0x00
#define STI_COMPA_H 0x10
#define STI_COMPA_L 0x14
#define STI_COMPB_H 0x18
#define STI_COMPB_L 0x1c
#define STI_COUNT_H 0x20
#define STI_COUNT_L 0x24
#define STI_COUNT_RAW_H 0x28
#define STI_COUNT_RAW_L 0x2c
#define STI_SET_H 0x30
#define STI_SET_L 0x34
#define STI_INTSTATUS 0x40
#define STI_INTRAWSTATUS 0x44
#define STI_INTENSET 0x48
#define STI_INTENCLR 0x4c
#define STI_INTFFCLR 0x50

static inline unsigned long em_sti_read(struct em_sti_priv *p, int offs)
{
	return ioread32(p->base + offs);
}

static inline void em_sti_write(struct em_sti_priv *p, int offs,
				unsigned long value)
{
	iowrite32(value, p->base + offs);
}

static int em_sti_enable(struct em_sti_priv *p)
{
	int ret;

	/* enable clock */
	ret = clk_prepare_enable(p->clk);
	if (ret) {
		dev_err(&p->pdev->dev, "cannot enable clock\n");
		return ret;
	}

	/* configure channel, periodic mode and maximum timeout */
	p->rate = clk_get_rate(p->clk);

	/* reset the counter */
	em_sti_write(p, STI_SET_H, 0x40000000);
	em_sti_write(p, STI_SET_L, 0x00000000);

	/* mask and clear pending interrupts */
	em_sti_write(p, STI_INTENCLR, 3);
	em_sti_write(p, STI_INTFFCLR, 3);

	/* enable updates of counter registers */
	em_sti_write(p, STI_CONTROL, 1);

	return 0;
}

static void em_sti_disable(struct em_sti_priv *p)
{
	/* mask interrupts */
	em_sti_write(p, STI_INTENCLR, 3);

	/* stop clock */
	clk_disable_unprepare(p->clk);
}

static cycle_t em_sti_count(struct em_sti_priv *p)
{
	cycle_t ticks;
	unsigned long flags;

	/* the STI hardware buffers the 48-bit count, but to
	 * break it out into two 32-bit access the registers
	 * must be accessed in a certain order.
	 * Always read STI_COUNT_H before STI_COUNT_L.
	 */
	raw_spin_lock_irqsave(&p->lock, flags);
	ticks = (cycle_t)(em_sti_read(p, STI_COUNT_H) & 0xffff) << 32;
	ticks |= em_sti_read(p, STI_COUNT_L);
	raw_spin_unlock_irqrestore(&p->lock, flags);

	return ticks;
}

static cycle_t em_sti_set_next(struct em_sti_priv *p, cycle_t next)
{
	unsigned long flags;

	raw_spin_lock_irqsave(&p->lock, flags);

	/* mask compare A interrupt */
	em_sti_write(p, STI_INTENCLR, 1);

	/* update compare A value */
	em_sti_write(p, STI_COMPA_H, next >> 32);
	em_sti_write(p, STI_COMPA_L, next & 0xffffffff);

	/* clear compare A interrupt source */
	em_sti_write(p, STI_INTFFCLR, 1);

	/* unmask compare A interrupt */
	em_sti_write(p, STI_INTENSET, 1);

	raw_spin_unlock_irqrestore(&p->lock, flags);

	return next;
}

static irqreturn_t em_sti_interrupt(int irq, void *dev_id)
{
	struct em_sti_priv *p = dev_id;

	p->ced.event_handler(&p->ced);
	return IRQ_HANDLED;
}

static int em_sti_start(struct em_sti_priv *p, unsigned int user)
{
	unsigned long flags;
	int used_before;
	int ret = 0;

	raw_spin_lock_irqsave(&p->lock, flags);
	used_before = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
	if (!used_before)
		ret = em_sti_enable(p);

	if (!ret)
		p->active[user] = 1;
	raw_spin_unlock_irqrestore(&p->lock, flags);

	return ret;
}

static void em_sti_stop(struct em_sti_priv *p, unsigned int user)
{
	unsigned long flags;
	int used_before, used_after;

	raw_spin_lock_irqsave(&p->lock, flags);
	used_before = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
	p->active[user] = 0;
	used_after = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];

	if (used_before && !used_after)
		em_sti_disable(p);
	raw_spin_unlock_irqrestore(&p->lock, flags);
}

static struct em_sti_priv *cs_to_em_sti(struct clocksource *cs)
{
	return container_of(cs, struct em_sti_priv, cs);
}

static cycle_t em_sti_clocksource_read(struct clocksource *cs)
{
	return em_sti_count(cs_to_em_sti(cs));
}

static int em_sti_clocksource_enable(struct clocksource *cs)
{
	int ret;
	struct em_sti_priv *p = cs_to_em_sti(cs);

	ret = em_sti_start(p, USER_CLOCKSOURCE);
	if (!ret)
		__clocksource_update_freq_hz(cs, p->rate);
	return ret;
}

static void em_sti_clocksource_disable(struct clocksource *cs)
{
	em_sti_stop(cs_to_em_sti(cs), USER_CLOCKSOURCE);
}

static void em_sti_clocksource_resume(struct clocksource *cs)
{
	em_sti_clocksource_enable(cs);
}

static int em_sti_register_clocksource(struct em_sti_priv *p)
{
	struct clocksource *cs = &p->cs;

	memset(cs, 0, sizeof(*cs));
	cs->name = dev_name(&p->pdev->dev);
	cs->rating = 200;
	cs->read = em_sti_clocksource_read;
	cs->enable = em_sti_clocksource_enable;
	cs->disable = em_sti_clocksource_disable;
	cs->suspend = em_sti_clocksource_disable;
	cs->resume = em_sti_clocksource_resume;
	cs->mask = CLOCKSOURCE_MASK(48);
	cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;

	dev_info(&p->pdev->dev, "used as clock source\n");

	/* Register with dummy 1 Hz value, gets updated in ->enable() */
	clocksource_register_hz(cs, 1);
	return 0;
}

static struct em_sti_priv *ced_to_em_sti(struct clock_event_device *ced)
{
	return container_of(ced, struct em_sti_priv, ced);
}

static int em_sti_clock_event_shutdown(struct clock_event_device *ced)
{
	struct em_sti_priv *p = ced_to_em_sti(ced);
	em_sti_stop(p, USER_CLOCKEVENT);
	return 0;
}

static int em_sti_clock_event_set_oneshot(struct clock_event_device *ced)
{
	struct em_sti_priv *p = ced_to_em_sti(ced);

	dev_info(&p->pdev->dev, "used for oneshot clock events\n");
	em_sti_start(p, USER_CLOCKEVENT);
	clockevents_config(&p->ced, p->rate);
	return 0;
}

static int em_sti_clock_event_next(unsigned long delta,
				   struct clock_event_device *ced)
{
	struct em_sti_priv *p = ced_to_em_sti(ced);
	cycle_t next;
	int safe;

	next = em_sti_set_next(p, em_sti_count(p) + delta);
	safe = em_sti_count(p) < (next - 1);

	return !safe;
}

static void em_sti_register_clockevent(struct em_sti_priv *p)
{
	struct clock_event_device *ced = &p->ced;

	memset(ced, 0, sizeof(*ced));
	ced->name = dev_name(&p->pdev->dev);
	ced->features = CLOCK_EVT_FEAT_ONESHOT;
	ced->rating = 200;
	ced->cpumask = cpu_possible_mask;
	ced->set_next_event = em_sti_clock_event_next;
	ced->set_state_shutdown = em_sti_clock_event_shutdown;
	ced->set_state_oneshot = em_sti_clock_event_set_oneshot;

	dev_info(&p->pdev->dev, "used for clock events\n");

	/* Register with dummy 1 Hz value, gets updated in ->set_state_oneshot() */
	clockevents_config_and_register(ced, 1, 2, 0xffffffff);
}

static int em_sti_probe(struct platform_device *pdev)
{
	struct em_sti_priv *p;
	struct resource *res;
	int irq;

	p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
	if (p == NULL)
		return -ENOMEM;

	p->pdev = pdev;
	platform_set_drvdata(pdev, p);

	irq = platform_get_irq(pdev, 0);
	if (irq < 0) {
		dev_err(&pdev->dev, "failed to get irq\n");
		return -EINVAL;
	}

	/* map memory, let base point to the STI instance */
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	p->base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(p->base))
		return PTR_ERR(p->base);

	/* get hold of clock */
	p->clk = devm_clk_get(&pdev->dev, "sclk");
	if (IS_ERR(p->clk)) {
		dev_err(&pdev->dev, "cannot get clock\n");
		return PTR_ERR(p->clk);
	}

	if (devm_request_irq(&pdev->dev, irq, em_sti_interrupt,
			     IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
			     dev_name(&pdev->dev), p)) {
		dev_err(&pdev->dev, "failed to request low IRQ\n");
		return -ENOENT;
	}

	raw_spin_lock_init(&p->lock);
	em_sti_register_clockevent(p);
	em_sti_register_clocksource(p);
	return 0;
}

static int em_sti_remove(struct platform_device *pdev)
{
	return -EBUSY; /* cannot unregister clockevent and clocksource */
}

static const struct of_device_id em_sti_dt_ids[] = {
	{ .compatible = "renesas,em-sti", },
	{},
};
MODULE_DEVICE_TABLE(of, em_sti_dt_ids);

static struct platform_driver em_sti_device_driver = {
	.probe		= em_sti_probe,
	.remove		= em_sti_remove,
	.driver		= {
		.name	= "em_sti",
		.of_match_table = em_sti_dt_ids,
	}
};

static int __init em_sti_init(void)
{
	return platform_driver_register(&em_sti_device_driver);
}

static void __exit em_sti_exit(void)
{
	platform_driver_unregister(&em_sti_device_driver);
}

subsys_initcall(em_sti_init);
module_exit(em_sti_exit);

MODULE_AUTHOR("Magnus Damm");
MODULE_DESCRIPTION("Renesas Emma Mobile STI Timer Driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
b9dbf951 MD	1	/*
	2	* Emma Mobile Timer Support - STI
	3	*
	4	* Copyright (C) 2012 Magnus Damm
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	18	*/
	19
	20	#include <linux/init.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/spinlock.h>
	23	#include <linux/interrupt.h>
	24	#include <linux/ioport.h>
	25	#include <linux/io.h>
	26	#include <linux/clk.h>
	27	#include <linux/irq.h>
	28	#include <linux/err.h>
	29	#include <linux/delay.h>
	30	#include <linux/clocksource.h>
	31	#include <linux/clockchips.h>
	32	#include <linux/slab.h>
	33	#include <linux/module.h>
	34
	35	enum { USER_CLOCKSOURCE, USER_CLOCKEVENT, USER_NR };
	36
	37	struct em_sti_priv {
	38	void __iomem *base;
	39	struct clk *clk;
	40	struct platform_device *pdev;
	41	unsigned int active[USER_NR];
	42	unsigned long rate;
	43	raw_spinlock_t lock;
	44	struct clock_event_device ced;
	45	struct clocksource cs;
	46	};
	47
	48	#define STI_CONTROL 0x00
	49	#define STI_COMPA_H 0x10
	50	#define STI_COMPA_L 0x14
	51	#define STI_COMPB_H 0x18
	52	#define STI_COMPB_L 0x1c
	53	#define STI_COUNT_H 0x20
	54	#define STI_COUNT_L 0x24
	55	#define STI_COUNT_RAW_H 0x28
	56	#define STI_COUNT_RAW_L 0x2c
	57	#define STI_SET_H 0x30
	58	#define STI_SET_L 0x34
	59	#define STI_INTSTATUS 0x40
	60	#define STI_INTRAWSTATUS 0x44
	61	#define STI_INTENSET 0x48
	62	#define STI_INTENCLR 0x4c
	63	#define STI_INTFFCLR 0x50
	64
65	static inline unsigned long em_sti_read(struct em_sti_priv *p, int offs)
66	{
67	return ioread32(p->base + offs);
68	}
69
70	static inline void em_sti_write(struct em_sti_priv *p, int offs,
71	unsigned long value)
72	{
73	iowrite32(value, p->base + offs);
74	}
75
76	static int em_sti_enable(struct em_sti_priv *p)
77	{
78	int ret;
79
80	/* enable clock */
fdfcab17	81	ret = clk_prepare_enable(p->clk);
b9dbf951 MD	82	if (ret) {
	83	dev_err(&p->pdev->dev, "cannot enable clock\n");
	84	return ret;
	85	}
	86
	87	/* configure channel, periodic mode and maximum timeout */
	88	p->rate = clk_get_rate(p->clk);
	89
	90	/* reset the counter */
	91	em_sti_write(p, STI_SET_H, 0x40000000);
	92	em_sti_write(p, STI_SET_L, 0x00000000);
	93
	94	/* mask and clear pending interrupts */
	95	em_sti_write(p, STI_INTENCLR, 3);
	96	em_sti_write(p, STI_INTFFCLR, 3);
	97
	98	/* enable updates of counter registers */
	99	em_sti_write(p, STI_CONTROL, 1);
	100
	101	return 0;
	102	}
	103
	104	static void em_sti_disable(struct em_sti_priv *p)
	105	{
	106	/* mask interrupts */
	107	em_sti_write(p, STI_INTENCLR, 3);
	108
	109	/* stop clock */
fdfcab17	110	clk_disable_unprepare(p->clk);
b9dbf951 MD	111	}
	112
	113	static cycle_t em_sti_count(struct em_sti_priv *p)
	114	{
	115	cycle_t ticks;
	116	unsigned long flags;
	117
	118	/* the STI hardware buffers the 48-bit count, but to
	119	* break it out into two 32-bit access the registers
	120	* must be accessed in a certain order.
	121	* Always read STI_COUNT_H before STI_COUNT_L.
	122	*/
	123	raw_spin_lock_irqsave(&p->lock, flags);
	124	ticks = (cycle_t)(em_sti_read(p, STI_COUNT_H) & 0xffff) << 32;
	125	ticks \|= em_sti_read(p, STI_COUNT_L);
	126	raw_spin_unlock_irqrestore(&p->lock, flags);
	127
	128	return ticks;
	129	}
	130
	131	static cycle_t em_sti_set_next(struct em_sti_priv *p, cycle_t next)
	132	{
	133	unsigned long flags;
	134
	135	raw_spin_lock_irqsave(&p->lock, flags);
	136
	137	/* mask compare A interrupt */
	138	em_sti_write(p, STI_INTENCLR, 1);
	139
	140	/* update compare A value */
	141	em_sti_write(p, STI_COMPA_H, next >> 32);
	142	em_sti_write(p, STI_COMPA_L, next & 0xffffffff);
	143
	144	/* clear compare A interrupt source */
	145	em_sti_write(p, STI_INTFFCLR, 1);
	146
	147	/* unmask compare A interrupt */
	148	em_sti_write(p, STI_INTENSET, 1);
	149
	150	raw_spin_unlock_irqrestore(&p->lock, flags);
	151
	152	return next;
	153	}
	154
	155	static irqreturn_t em_sti_interrupt(int irq, void *dev_id)
	156	{
	157	struct em_sti_priv *p = dev_id;
	158
	159	p->ced.event_handler(&p->ced);
	160	return IRQ_HANDLED;
	161	}
	162
	163	static int em_sti_start(struct em_sti_priv *p, unsigned int user)
	164	{
	165	unsigned long flags;
	166	int used_before;
	167	int ret = 0;
	168
	169	raw_spin_lock_irqsave(&p->lock, flags);
	170	used_before = p->active[USER_CLOCKSOURCE] \| p->active[USER_CLOCKEVENT];
	171	if (!used_before)
	172	ret = em_sti_enable(p);
	173
	174	if (!ret)
175	p->active[user] = 1;
176	raw_spin_unlock_irqrestore(&p->lock, flags);
177
178	return ret;
179	}
180
181	static void em_sti_stop(struct em_sti_priv *p, unsigned int user)
182	{
183	unsigned long flags;
184	int used_before, used_after;
185
186	raw_spin_lock_irqsave(&p->lock, flags);
187	used_before = p->active[USER_CLOCKSOURCE] \| p->active[USER_CLOCKEVENT];
188	p->active[user] = 0;
189	used_after = p->active[USER_CLOCKSOURCE] \| p->active[USER_CLOCKEVENT];
190
191	if (used_before && !used_after)
192	em_sti_disable(p);
193	raw_spin_unlock_irqrestore(&p->lock, flags);
194	}
195
196	static struct em_sti_priv cs_to_em_sti(struct clocksource cs)
197	{
198	return container_of(cs, struct em_sti_priv, cs);
199	}
200
201	static cycle_t em_sti_clocksource_read(struct clocksource *cs)
202	{
203	return em_sti_count(cs_to_em_sti(cs));
204	}
205
206	static int em_sti_clocksource_enable(struct clocksource *cs)
207	{
208	int ret;
209	struct em_sti_priv *p = cs_to_em_sti(cs);
210
211	ret = em_sti_start(p, USER_CLOCKSOURCE);
212	if (!ret)
fba9e072	213	__clocksource_update_freq_hz(cs, p->rate);
b9dbf951 MD	214	return ret;
	215	}
	216
	217	static void em_sti_clocksource_disable(struct clocksource *cs)
	218	{
	219	em_sti_stop(cs_to_em_sti(cs), USER_CLOCKSOURCE);
	220	}
	221
	222	static void em_sti_clocksource_resume(struct clocksource *cs)
	223	{
	224	em_sti_clocksource_enable(cs);
	225	}
	226
	227	static int em_sti_register_clocksource(struct em_sti_priv *p)
	228	{
	229	struct clocksource *cs = &p->cs;
	230
	231	memset(cs, 0, sizeof(*cs));
	232	cs->name = dev_name(&p->pdev->dev);
	233	cs->rating = 200;
	234	cs->read = em_sti_clocksource_read;
	235	cs->enable = em_sti_clocksource_enable;
	236	cs->disable = em_sti_clocksource_disable;
	237	cs->suspend = em_sti_clocksource_disable;
	238	cs->resume = em_sti_clocksource_resume;
	239	cs->mask = CLOCKSOURCE_MASK(48);
	240	cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
	241
	242	dev_info(&p->pdev->dev, "used as clock source\n");
	243
	244	/* Register with dummy 1 Hz value, gets updated in ->enable() */
	245	clocksource_register_hz(cs, 1);
	246	return 0;
	247	}
	248
	249	static struct em_sti_priv ced_to_em_sti(struct clock_event_device ced)
	250	{
	251	return container_of(ced, struct em_sti_priv, ced);
	252	}
	253
75f94061	254	static int em_sti_clock_event_shutdown(struct clock_event_device *ced)
b9dbf951 MD	255	{
b9dbf951 MD	256	struct em_sti_priv *p = ced_to_em_sti(ced);
75f94061 VK	257	em_sti_stop(p, USER_CLOCKEVENT);
	258	return 0;
	259	}
b9dbf951	260
75f94061 VK	261	static int em_sti_clock_event_set_oneshot(struct clock_event_device *ced)
	262	{
	263	struct em_sti_priv *p = ced_to_em_sti(ced);
b9dbf951	264
75f94061 VK	265	dev_info(&p->pdev->dev, "used for oneshot clock events\n");
	266	em_sti_start(p, USER_CLOCKEVENT);
	267	clockevents_config(&p->ced, p->rate);
	268	return 0;
b9dbf951 MD	269	}
	270
	271	static int em_sti_clock_event_next(unsigned long delta,
	272	struct clock_event_device *ced)
	273	{
	274	struct em_sti_priv *p = ced_to_em_sti(ced);
	275	cycle_t next;
	276	int safe;
	277
	278	next = em_sti_set_next(p, em_sti_count(p) + delta);
	279	safe = em_sti_count(p) < (next - 1);
	280
	281	return !safe;
	282	}
	283
	284	static void em_sti_register_clockevent(struct em_sti_priv *p)
	285	{
	286	struct clock_event_device *ced = &p->ced;
	287
	288	memset(ced, 0, sizeof(*ced));
	289	ced->name = dev_name(&p->pdev->dev);
	290	ced->features = CLOCK_EVT_FEAT_ONESHOT;
	291	ced->rating = 200;
2199a557	292	ced->cpumask = cpu_possible_mask;
b9dbf951	293	ced->set_next_event = em_sti_clock_event_next;
75f94061 VK	294	ced->set_state_shutdown = em_sti_clock_event_shutdown;
75f94061 VK	295	ced->set_state_oneshot = em_sti_clock_event_set_oneshot;
b9dbf951 MD	296
	297	dev_info(&p->pdev->dev, "used for clock events\n");
	298
75f94061	299	/* Register with dummy 1 Hz value, gets updated in ->set_state_oneshot() */
b9dbf951 MD	300	clockevents_config_and_register(ced, 1, 2, 0xffffffff);
	301	}
	302
1850514b	303	static int em_sti_probe(struct platform_device *pdev)
b9dbf951 MD	304	{
	305	struct em_sti_priv *p;
	306	struct resource *res;
1745e696	307	int irq;
b9dbf951	308
1745e696	309	p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
39dd5677	310	if (p == NULL)
1745e696	311	return -ENOMEM;
b9dbf951 MD	312
	313	p->pdev = pdev;
	314	platform_set_drvdata(pdev, p);
	315
b9dbf951 MD	316	irq = platform_get_irq(pdev, 0);
	317	if (irq < 0) {
	318	dev_err(&pdev->dev, "failed to get irq\n");
1745e696	319	return -EINVAL;
b9dbf951 MD	320	}
	321
	322	/* map memory, let base point to the STI instance */
1745e696 LP	323	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	324	p->base = devm_ioremap_resource(&pdev->dev, res);
	325	if (IS_ERR(p->base))
	326	return PTR_ERR(p->base);
b9dbf951 MD	327
b9dbf951 MD	328	/* get hold of clock */
1745e696	329	p->clk = devm_clk_get(&pdev->dev, "sclk");
b9dbf951 MD	330	if (IS_ERR(p->clk)) {
b9dbf951 MD	331	dev_err(&pdev->dev, "cannot get clock\n");
1745e696	332	return PTR_ERR(p->clk);
b9dbf951 MD	333	}
b9dbf951 MD	334
1745e696 LP	335	if (devm_request_irq(&pdev->dev, irq, em_sti_interrupt,
	336	IRQF_TIMER \| IRQF_IRQPOLL \| IRQF_NOBALANCING,
	337	dev_name(&pdev->dev), p)) {
b9dbf951	338	dev_err(&pdev->dev, "failed to request low IRQ\n");
1745e696	339	return -ENOENT;
b9dbf951 MD	340	}
	341
	342	raw_spin_lock_init(&p->lock);
	343	em_sti_register_clockevent(p);
	344	em_sti_register_clocksource(p);
	345	return 0;
b9dbf951 MD	346	}
b9dbf951 MD	347
1850514b	348	static int em_sti_remove(struct platform_device *pdev)
b9dbf951 MD	349	{
	350	return -EBUSY; /* cannot unregister clockevent and clocksource */
	351	}
	352
1850514b	353	static const struct of_device_id em_sti_dt_ids[] = {
fc0830fe MD	354	{ .compatible = "renesas,em-sti", },
	355	{},
	356	};
	357	MODULE_DEVICE_TABLE(of, em_sti_dt_ids);
	358
b9dbf951 MD	359	static struct platform_driver em_sti_device_driver = {
b9dbf951 MD	360	.probe = em_sti_probe,
1850514b	361	.remove = em_sti_remove,
b9dbf951 MD	362	.driver = {
b9dbf951 MD	363	.name = "em_sti",
fc0830fe	364	.of_match_table = em_sti_dt_ids,
b9dbf951 MD	365	}
	366	};
	367
09acc3a1 SH	368	static int __init em_sti_init(void)
	369	{
	370	return platform_driver_register(&em_sti_device_driver);
	371	}
	372
	373	static void __exit em_sti_exit(void)
	374	{
	375	platform_driver_unregister(&em_sti_device_driver);
	376	}
	377
	378	subsys_initcall(em_sti_init);
	379	module_exit(em_sti_exit);
b9dbf951 MD	380
	381	MODULE_AUTHOR("Magnus Damm");
	382	MODULE_DESCRIPTION("Renesas Emma Mobile STI Timer Driver");
	383	MODULE_LICENSE("GPL v2");