Commit | Line | Data |
---|---|---|
58394271 | 1 | menu "Clock Source drivers" |
2f8a26c1 | 2 | depends on GENERIC_CLOCKEVENTS |
58394271 | 3 | |
bb0eb050 | 4 | config TIMER_OF |
ae278a93 | 5 | bool |
bb0eb050 | 6 | select TIMER_PROBE |
aad83b15 | 7 | |
fa1bffab | 8 | config TIMER_ACPI |
aad83b15 | 9 | bool |
bb0eb050 | 10 | select TIMER_PROBE |
aad83b15 | 11 | |
bb0eb050 | 12 | config TIMER_PROBE |
aad83b15 | 13 | bool |
ae278a93 | 14 | |
89c0b8e2 RK |
15 | config CLKSRC_I8253 |
16 | bool | |
442c8176 | 17 | |
e6220bdc TG |
18 | config CLKEVT_I8253 |
19 | bool | |
20 | ||
15f304b6 RB |
21 | config I8253_LOCK |
22 | bool | |
23 | ||
af04aa85 K |
24 | config OMAP_DM_TIMER |
25 | bool | |
26 | ||
15f304b6 | 27 | config CLKBLD_I8253 |
e6220bdc | 28 | def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK |
15f304b6 | 29 | |
442c8176 RK |
30 | config CLKSRC_MMIO |
31 | bool | |
06c3df49 | 32 | |
2ea879a7 DL |
33 | config BCM2835_TIMER |
34 | bool "BCM2835 timer driver" if COMPILE_TEST | |
2ea879a7 DL |
35 | select CLKSRC_MMIO |
36 | help | |
37 | Enables the support for the BCM2835 timer driver. | |
38 | ||
1cad71e3 DL |
39 | config BCM_KONA_TIMER |
40 | bool "BCM mobile timer driver" if COMPILE_TEST | |
1cad71e3 DL |
41 | select CLKSRC_MMIO |
42 | help | |
43 | Enables the support for the BCM Kona mobile timer driver. | |
44 | ||
9b8bb773 | 45 | config DIGICOLOR_TIMER |
e6c1db13 | 46 | bool "Digicolor timer driver" if COMPILE_TEST |
2be6d9bf | 47 | select CLKSRC_MMIO |
d7023e62 | 48 | depends on HAS_IOMEM |
e6c1db13 DL |
49 | help |
50 | Enables the support for the digicolor timer driver. | |
9b8bb773 | 51 | |
06c3df49 | 52 | config DW_APB_TIMER |
5b097f6b DL |
53 | bool "DW APB timer driver" if COMPILE_TEST |
54 | help | |
55 | Enables the support for the dw_apb timer. | |
489bccea | 56 | |
cfda5901 DN |
57 | config DW_APB_TIMER_OF |
58 | bool | |
1b4eca0f | 59 | select DW_APB_TIMER |
bb0eb050 | 60 | select TIMER_OF |
cfda5901 | 61 | |
f5bf0ee4 LW |
62 | config FTTMR010_TIMER |
63 | bool "Faraday Technology timer driver" if COMPILE_TEST | |
4750535b LW |
64 | depends on HAS_IOMEM |
65 | select CLKSRC_MMIO | |
bb0eb050 | 66 | select TIMER_OF |
4750535b LW |
67 | select MFD_SYSCON |
68 | help | |
f5bf0ee4 LW |
69 | Enables support for the Faraday Technology timer block |
70 | FTTMR010. | |
4750535b | 71 | |
468b8c4c | 72 | config ROCKCHIP_TIMER |
40ada2aa DL |
73 | bool "Rockchip timer driver" if COMPILE_TEST |
74 | depends on ARM || ARM64 | |
bb0eb050 | 75 | select TIMER_OF |
5e0a39d0 | 76 | select CLKSRC_MMIO |
40ada2aa DL |
77 | help |
78 | Enables the support for the rockchip timer driver. | |
468b8c4c | 79 | |
6fe9cbd1 | 80 | config ARMADA_370_XP_TIMER |
9519e80c DL |
81 | bool "Armada 370 and XP timer driver" if COMPILE_TEST |
82 | depends on ARM | |
bb0eb050 | 83 | select TIMER_OF |
2be6d9bf | 84 | select CLKSRC_MMIO |
9519e80c DL |
85 | help |
86 | Enables the support for the Armada 370 and XP timer driver. | |
6fe9cbd1 | 87 | |
e4a6b378 | 88 | config MESON6_TIMER |
0b7a7bb7 | 89 | bool "Meson6 timer driver" if COMPILE_TEST |
7b6b0a45 | 90 | select CLKSRC_MMIO |
0b7a7bb7 DL |
91 | help |
92 | Enables the support for the Meson6 timer driver. | |
e4a6b378 | 93 | |
0c1dcfd5 | 94 | config ORION_TIMER |
c9165549 DL |
95 | bool "Orion timer driver" if COMPILE_TEST |
96 | depends on ARM | |
bb0eb050 | 97 | select TIMER_OF |
0c1dcfd5 | 98 | select CLKSRC_MMIO |
c9165549 DL |
99 | help |
100 | Enables the support for the Orion timer driver | |
0c1dcfd5 | 101 | |
4be78a86 AF |
102 | config OWL_TIMER |
103 | bool "Owl timer driver" if COMPILE_TEST | |
4be78a86 AF |
104 | select CLKSRC_MMIO |
105 | help | |
106 | Enables the support for the Actions Semi Owl timer driver. | |
107 | ||
119fd635 | 108 | config SUN4I_TIMER |
b4fcd48b | 109 | bool "Sun4i timer driver" if COMPILE_TEST |
d7023e62 | 110 | depends on HAS_IOMEM |
71c568c0 | 111 | select CLKSRC_MMIO |
239751ed | 112 | select TIMER_OF |
b4fcd48b DL |
113 | help |
114 | Enables support for the Sun4i timer. | |
b2ac5d75 | 115 | |
67905540 | 116 | config SUN5I_HSTIMER |
f0c5afb7 | 117 | bool "Sun5i timer driver" if COMPILE_TEST |
67905540 | 118 | select CLKSRC_MMIO |
f0c5afb7 DL |
119 | depends on COMMON_CLK |
120 | help | |
121 | Enables support the Sun5i timer. | |
67905540 | 122 | |
910978e7 | 123 | config TEGRA_TIMER |
adce4bc8 | 124 | bool "Tegra timer driver" if COMPILE_TEST |
2be6d9bf | 125 | select CLKSRC_MMIO |
adce4bc8 DL |
126 | depends on ARM |
127 | help | |
128 | Enables support for the Tegra driver. | |
910978e7 | 129 | |
ff7ec345 | 130 | config VT8500_TIMER |
b4bdf7ef | 131 | bool "VT8500 timer driver" if COMPILE_TEST |
d7023e62 | 132 | depends on HAS_IOMEM |
b4bdf7ef DL |
133 | help |
134 | Enables support for the VT8500 driver. | |
ff7ec345 | 135 | |
1c00289e TM |
136 | config NPCM7XX_TIMER |
137 | bool "NPCM7xx timer driver" if COMPILE_TEST | |
138 | depends on HAS_IOMEM | |
139 | select CLKSRC_MMIO | |
140 | help | |
141 | Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture, | |
142 | While TIMER0 serves as clockevent and TIMER1 serves as clocksource. | |
143 | ||
4f0f234f | 144 | config CADENCE_TTC_TIMER |
57f49318 DL |
145 | bool "Cadence TTC timer driver" if COMPILE_TEST |
146 | depends on COMMON_CLK | |
147 | help | |
148 | Enables support for the cadence ttc driver. | |
4f0f234f | 149 | |
a8b1b9fc | 150 | config ASM9260_TIMER |
b9755841 | 151 | bool "ASM9260 timer driver" if COMPILE_TEST |
a8b1b9fc | 152 | select CLKSRC_MMIO |
bb0eb050 | 153 | select TIMER_OF |
b9755841 DL |
154 | help |
155 | Enables support for the ASM9260 timer. | |
a8b1b9fc | 156 | |
694e33a7 | 157 | config CLKSRC_NOMADIK_MTU |
70329653 DL |
158 | bool "Nomakdik clocksource driver" if COMPILE_TEST |
159 | depends on ARM | |
694e33a7 LW |
160 | select CLKSRC_MMIO |
161 | help | |
162 | Support for Multi Timer Unit. MTU provides access | |
163 | to multiple interrupt generating programmable | |
164 | 32-bit free running decrementing counters. | |
165 | ||
166 | config CLKSRC_NOMADIK_MTU_SCHED_CLOCK | |
167 | bool | |
168 | depends on CLKSRC_NOMADIK_MTU | |
169 | help | |
170 | Use the Multi Timer Unit as the sched_clock. | |
171 | ||
489bccea | 172 | config CLKSRC_DBX500_PRCMU |
1becd6ed | 173 | bool "Clocksource PRCMU Timer" if COMPILE_TEST |
d7023e62 | 174 | depends on HAS_IOMEM |
489bccea MW |
175 | help |
176 | Use the always on PRCMU Timer as clocksource | |
177 | ||
ecf0efdc DL |
178 | config CLPS711X_TIMER |
179 | bool "Cirrus logic timer driver" if COMPILE_TEST | |
ecf0efdc DL |
180 | select CLKSRC_MMIO |
181 | help | |
182 | Enables support for the Cirrus Logic PS711 timer. | |
183 | ||
b56d5d21 DL |
184 | config ATLAS7_TIMER |
185 | bool "Atlas7 timer driver" if COMPILE_TEST | |
b56d5d21 DL |
186 | select CLKSRC_MMIO |
187 | help | |
188 | Enables support for the Atlas7 timer. | |
189 | ||
d81c50a0 DL |
190 | config MXS_TIMER |
191 | bool "Mxs timer driver" if COMPILE_TEST | |
d81c50a0 DL |
192 | select CLKSRC_MMIO |
193 | select STMP_DEVICE | |
194 | help | |
195 | Enables support for the Mxs timer. | |
196 | ||
f3550d49 DL |
197 | config PRIMA2_TIMER |
198 | bool "Prima2 timer driver" if COMPILE_TEST | |
f3550d49 DL |
199 | select CLKSRC_MMIO |
200 | help | |
201 | Enables support for the Prima2 timer. | |
202 | ||
85f98db4 DL |
203 | config U300_TIMER |
204 | bool "U300 timer driver" if COMPILE_TEST | |
85f98db4 DL |
205 | depends on ARM |
206 | select CLKSRC_MMIO | |
207 | help | |
208 | Enables support for the U300 timer. | |
209 | ||
d683b9dc DL |
210 | config NSPIRE_TIMER |
211 | bool "NSpire timer driver" if COMPILE_TEST | |
d683b9dc DL |
212 | select CLKSRC_MMIO |
213 | help | |
214 | Enables support for the Nspire timer. | |
215 | ||
c12547a0 DL |
216 | config KEYSTONE_TIMER |
217 | bool "Keystone timer driver" if COMPILE_TEST | |
c12547a0 DL |
218 | depends on ARM || ARM64 |
219 | select CLKSRC_MMIO | |
220 | help | |
221 | Enables support for the Keystone timer. | |
222 | ||
568c0342 DL |
223 | config INTEGRATOR_AP_TIMER |
224 | bool "Integrator-ap timer driver" if COMPILE_TEST | |
568c0342 DL |
225 | select CLKSRC_MMIO |
226 | help | |
227 | Enables support for the Integrator-ap timer. | |
228 | ||
489bccea MW |
229 | config CLKSRC_DBX500_PRCMU_SCHED_CLOCK |
230 | bool "Clocksource PRCMU Timer sched_clock" | |
694e33a7 | 231 | depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK) |
489bccea MW |
232 | default y |
233 | help | |
234 | Use the always on PRCMU Timer as sched_clock | |
985c0679 | 235 | |
9c9b7818 UKK |
236 | config CLKSRC_EFM32 |
237 | bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32 | |
238 | depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) | |
09ca2757 | 239 | select CLKSRC_MMIO |
9c9b7818 UKK |
240 | default ARCH_EFM32 |
241 | help | |
242 | Support to use the timers of EFM32 SoCs as clock source and clock | |
243 | event device. | |
244 | ||
050dd322 | 245 | config CLKSRC_LPC32XX |
ddcf48c7 | 246 | bool "Clocksource for LPC32XX" if COMPILE_TEST |
2f8a26c1 | 247 | depends on HAS_IOMEM |
1b18fd20 | 248 | depends on ARM |
050dd322 | 249 | select CLKSRC_MMIO |
bb0eb050 | 250 | select TIMER_OF |
ddcf48c7 DL |
251 | help |
252 | Support for the LPC32XX clocksource. | |
050dd322 | 253 | |
84583983 | 254 | config CLKSRC_PISTACHIO |
dfdb1652 | 255 | bool "Clocksource for Pistachio SoC" if COMPILE_TEST |
2f8a26c1 | 256 | depends on HAS_IOMEM |
bb0eb050 | 257 | select TIMER_OF |
dfdb1652 DL |
258 | help |
259 | Enables the clocksource for the Pistachio SoC. | |
84583983 | 260 | |
fe851f56 FB |
261 | config CLKSRC_TI_32K |
262 | bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST | |
dfedaf10 | 263 | depends on GENERIC_SCHED_CLOCK |
bb0eb050 | 264 | select TIMER_OF if OF |
fe851f56 FB |
265 | help |
266 | This option enables support for Texas Instruments 32.768 Hz clocksource | |
267 | available on many OMAP-like platforms. | |
268 | ||
a5322457 NC |
269 | config CLKSRC_NPS |
270 | bool "NPS400 clocksource driver" if COMPILE_TEST | |
271 | depends on !PHYS_ADDR_T_64BIT | |
272 | select CLKSRC_MMIO | |
bb0eb050 | 273 | select TIMER_OF if OF |
a5322457 NC |
274 | help |
275 | NPS400 clocksource support. | |
276 | Got 64 bit counter with update rate up to 1000MHz. | |
277 | This counter is accessed via couple of 32 bit memory mapped registers. | |
278 | ||
e37e4593 | 279 | config CLKSRC_STM32 |
1cb6c215 PG |
280 | bool "Clocksource for STM32 SoCs" if !ARCH_STM32 |
281 | depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST) | |
e37e4593 | 282 | select CLKSRC_MMIO |
d04af490 | 283 | select TIMER_OF |
e37e4593 | 284 | |
0302637f VM |
285 | config CLKSRC_MPS2 |
286 | bool "Clocksource for MPS2 SoCs" if COMPILE_TEST | |
287 | depends on GENERIC_SCHED_CLOCK | |
288 | select CLKSRC_MMIO | |
bb0eb050 | 289 | select TIMER_OF |
0302637f | 290 | |
c4c9a040 VG |
291 | config ARC_TIMERS |
292 | bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST | |
bb0eb050 | 293 | select TIMER_OF |
c4c9a040 VG |
294 | help |
295 | These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores | |
296 | (ARC700 as well as ARC HS38). | |
297 | TIMER0 serves as clockevent while TIMER1 provides clocksource | |
298 | ||
299 | config ARC_TIMERS_64BIT | |
300 | bool "Support for 64-bit counters in ARC HS38 cores" if COMPILE_TEST | |
c4c9a040 | 301 | depends on ARC_TIMERS |
bb0eb050 | 302 | select TIMER_OF |
c4c9a040 VG |
303 | help |
304 | This enables 2 different 64-bit timers: RTC (for UP) and GFRC (for SMP) | |
305 | RTC is implemented inside the core, while GFRC sits outside the core in | |
306 | ARConnect IP block. Driver automatically picks one of them for clocksource | |
307 | as appropriate. | |
308 | ||
8a4da6e3 MR |
309 | config ARM_ARCH_TIMER |
310 | bool | |
bb0eb050 | 311 | select TIMER_OF if OF |
fa1bffab | 312 | select TIMER_ACPI if ACPI |
a2c5d4ed | 313 | |
037f6377 | 314 | config ARM_ARCH_TIMER_EVTSTREAM |
46fd5c6b | 315 | bool "Enable ARM architected timer event stream generation by default" |
037f6377 | 316 | default y if ARM_ARCH_TIMER |
77f7ce9a | 317 | depends on ARM_ARCH_TIMER |
037f6377 | 318 | help |
46fd5c6b WD |
319 | This option enables support by default for event stream generation |
320 | based on the ARM architected timer. It is used for waking up CPUs | |
321 | executing the wfe instruction at a frequency represented as a | |
322 | power-of-2 divisor of the clock rate. The behaviour can also be | |
323 | overridden on the command line using the | |
324 | clocksource.arm_arch_timer.evtstream parameter. | |
037f6377 WD |
325 | The main use of the event stream is wfe-based timeouts of userspace |
326 | locking implementations. It might also be useful for imposing timeout | |
327 | on wfe to safeguard against any programming errors in case an expected | |
328 | event is not generated. | |
329 | This must be disabled for hardware validation purposes to detect any | |
330 | hardware anomalies of missing events. | |
331 | ||
16d10ef2 DT |
332 | config ARM_ARCH_TIMER_OOL_WORKAROUND |
333 | bool | |
334 | ||
f6dc1576 SW |
335 | config FSL_ERRATUM_A008585 |
336 | bool "Workaround for Freescale/NXP Erratum A-008585" | |
337 | default y | |
338 | depends on ARM_ARCH_TIMER && ARM64 | |
16d10ef2 | 339 | select ARM_ARCH_TIMER_OOL_WORKAROUND |
f6dc1576 SW |
340 | help |
341 | This option enables a workaround for Freescale/NXP Erratum | |
342 | A-008585 ("ARM generic timer may contain an erroneous | |
343 | value"). The workaround will only be active if the | |
344 | fsl,erratum-a008585 property is found in the timer node. | |
345 | ||
bb42ca47 DT |
346 | config HISILICON_ERRATUM_161010101 |
347 | bool "Workaround for Hisilicon Erratum 161010101" | |
348 | default y | |
349 | select ARM_ARCH_TIMER_OOL_WORKAROUND | |
350 | depends on ARM_ARCH_TIMER && ARM64 | |
351 | help | |
352 | This option enables a workaround for Hisilicon Erratum | |
353 | 161010101. The workaround will be active if the hisilicon,erratum-161010101 | |
354 | property is found in the timer node. | |
355 | ||
fa8d815f MZ |
356 | config ARM64_ERRATUM_858921 |
357 | bool "Workaround for Cortex-A73 erratum 858921" | |
358 | default y | |
359 | select ARM_ARCH_TIMER_OOL_WORKAROUND | |
360 | depends on ARM_ARCH_TIMER && ARM64 | |
361 | help | |
362 | This option enables a workaround applicable to Cortex-A73 | |
363 | (all versions), whose counter may return incorrect values. | |
364 | The workaround will be dynamically enabled when an affected | |
365 | core is detected. | |
366 | ||
c1b40e44 | 367 | config ARM_GLOBAL_TIMER |
67a87a43 | 368 | bool "Support for the ARM global timer" if COMPILE_TEST |
bb0eb050 | 369 | select TIMER_OF if OF |
67a87a43 | 370 | depends on ARM |
c1b40e44 SM |
371 | help |
372 | This options enables support for the ARM global timer unit | |
373 | ||
0b7402dc SH |
374 | config ARM_TIMER_SP804 |
375 | bool "Support for Dual Timer SP804 module" | |
002af195 | 376 | depends on GENERIC_SCHED_CLOCK && CLKDEV_LOOKUP |
0b7402dc | 377 | select CLKSRC_MMIO |
bb0eb050 | 378 | select TIMER_OF if OF |
0b7402dc | 379 | |
c1b40e44 SM |
380 | config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK |
381 | bool | |
382 | depends on ARM_GLOBAL_TIMER | |
383 | default y | |
384 | help | |
385 | Use ARM global timer clock source as sched_clock | |
386 | ||
4958ebb3 | 387 | config ARMV7M_SYSTICK |
e2146d86 | 388 | bool "Support for the ARMv7M system time" if COMPILE_TEST |
bb0eb050 | 389 | select TIMER_OF if OF |
4958ebb3 MC |
390 | select CLKSRC_MMIO |
391 | help | |
392 | This options enables support for the ARMv7M system timer unit | |
393 | ||
b052ff30 | 394 | config ATMEL_PIT |
bb0eb050 | 395 | select TIMER_OF if OF |
b052ff30 MR |
396 | def_bool SOC_AT91SAM9 || SOC_SAMA5 |
397 | ||
b53cdd03 | 398 | config ATMEL_ST |
b988d3f0 | 399 | bool "Atmel ST timer support" if COMPILE_TEST |
bd2746f0 | 400 | depends on HAS_IOMEM |
bb0eb050 | 401 | select TIMER_OF |
7ab7ef74 | 402 | select MFD_SYSCON |
b988d3f0 DL |
403 | help |
404 | Support for the Atmel ST timer. | |
b53cdd03 | 405 | |
6938d75a | 406 | config CLKSRC_EXYNOS_MCT |
39366ef4 | 407 | bool "Exynos multi core timer driver" if COMPILE_TEST |
f1a4c1f3 | 408 | depends on ARM || ARM64 |
6938d75a TA |
409 | help |
410 | Support for Multi Core Timer controller on Exynos SoCs. | |
241a9871 | 411 | |
f1189989 | 412 | config CLKSRC_SAMSUNG_PWM |
de37b0b5 | 413 | bool "PWM timer driver for Samsung S3C, S5P" if COMPILE_TEST |
d7023e62 | 414 | depends on HAS_IOMEM |
f1189989 TF |
415 | help |
416 | This is a new clocksource driver for the PWM timer found in | |
417 | Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver | |
418 | for all devicetree enabled platforms. This driver will be | |
419 | needed only on systems that do not have the Exynos MCT available. | |
c1967249 | 420 | |
2529c3a3 | 421 | config FSL_FTM_TIMER |
ef49336b | 422 | bool "Freescale FlexTimer Module driver" if COMPILE_TEST |
d7023e62 | 423 | depends on HAS_IOMEM |
03724ac3 | 424 | select CLKSRC_MMIO |
2529c3a3 XL |
425 | help |
426 | Support for Freescale FlexTimer Module (FTM) timer. | |
427 | ||
c1967249 JL |
428 | config VF_PIT_TIMER |
429 | bool | |
2be6d9bf | 430 | select CLKSRC_MMIO |
c1967249 JL |
431 | help |
432 | Support for Period Interrupt Timer on Freescale Vybrid Family SoCs. | |
fd3f1270 | 433 | |
89355274 NA |
434 | config OXNAS_RPS_TIMER |
435 | bool "Oxford Semiconductor OXNAS RPS Timers driver" if COMPILE_TEST | |
bb0eb050 | 436 | select TIMER_OF |
89355274 NA |
437 | select CLKSRC_MMIO |
438 | help | |
439 | This enables support for the Oxford Semiconductor OXNAS RPS timers. | |
440 | ||
fd3f1270 MD |
441 | config SYS_SUPPORTS_SH_CMT |
442 | bool | |
443 | ||
ecb3530d | 444 | config MTK_TIMER |
fbca9eab | 445 | bool "Mediatek timer driver" if COMPILE_TEST |
2f8a26c1 | 446 | depends on HAS_IOMEM |
bb0eb050 | 447 | select TIMER_OF |
ecb3530d | 448 | select CLKSRC_MMIO |
fbca9eab DL |
449 | help |
450 | Support for Mediatek timer driver. | |
ecb3530d | 451 | |
067bc914 | 452 | config SPRD_TIMER |
8a1ece26 | 453 | bool "Spreadtrum timer driver" if EXPERT |
067bc914 | 454 | depends on HAS_IOMEM |
8a1ece26 CZ |
455 | depends on (ARCH_SPRD || COMPILE_TEST) |
456 | default ARCH_SPRD | |
067bc914 BW |
457 | select TIMER_OF |
458 | help | |
459 | Enables support for the Spreadtrum timer driver. | |
460 | ||
fd3f1270 MD |
461 | config SYS_SUPPORTS_SH_MTU2 |
462 | bool | |
463 | ||
464 | config SYS_SUPPORTS_SH_TMU | |
465 | bool | |
466 | ||
467 | config SYS_SUPPORTS_EM_STI | |
468 | bool | |
469 | ||
9995f4f1 RF |
470 | config CLKSRC_JCORE_PIT |
471 | bool "J-Core PIT timer driver" if COMPILE_TEST | |
472 | depends on OF | |
9995f4f1 RF |
473 | depends on HAS_IOMEM |
474 | select CLKSRC_MMIO | |
475 | help | |
476 | This enables build of clocksource and clockevent driver for | |
477 | the integrated PIT in the J-Core synthesizable, open source SoC. | |
478 | ||
fd3f1270 MD |
479 | config SH_TIMER_CMT |
480 | bool "Renesas CMT timer driver" if COMPILE_TEST | |
11bc26fe | 481 | depends on HAS_IOMEM |
fd3f1270 MD |
482 | default SYS_SUPPORTS_SH_CMT |
483 | help | |
484 | This enables build of a clocksource and clockevent driver for | |
485 | the Compare Match Timer (CMT) hardware available in 16/32/48-bit | |
486 | variants on a wide range of Mobile and Automotive SoCs from Renesas. | |
487 | ||
488 | config SH_TIMER_MTU2 | |
489 | bool "Renesas MTU2 timer driver" if COMPILE_TEST | |
11bc26fe | 490 | depends on HAS_IOMEM |
fd3f1270 MD |
491 | default SYS_SUPPORTS_SH_MTU2 |
492 | help | |
493 | This enables build of a clockevent driver for the Multi-Function | |
7e139187 | 494 | Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas. |
fd3f1270 MD |
495 | This hardware comes with 16 bit-timer registers. |
496 | ||
fb6002a8 CB |
497 | config RENESAS_OSTM |
498 | bool "Renesas OSTM timer driver" if COMPILE_TEST | |
fb6002a8 CB |
499 | select CLKSRC_MMIO |
500 | help | |
501 | Enables the support for the Renesas OSTM. | |
502 | ||
fd3f1270 MD |
503 | config SH_TIMER_TMU |
504 | bool "Renesas TMU timer driver" if COMPILE_TEST | |
11bc26fe | 505 | depends on HAS_IOMEM |
fd3f1270 MD |
506 | default SYS_SUPPORTS_SH_TMU |
507 | help | |
508 | This enables build of a clocksource and clockevent driver for | |
509 | the 32-bit Timer Unit (TMU) hardware available on a wide range | |
510 | SoCs from Renesas. | |
511 | ||
512 | config EM_TIMER_STI | |
513 | bool "Renesas STI timer driver" if COMPILE_TEST | |
2f8a26c1 | 514 | depends on HAS_IOMEM |
fd3f1270 MD |
515 | default SYS_SUPPORTS_EM_STI |
516 | help | |
517 | This enables build of a clocksource and clockevent driver for | |
518 | the 48-bit System Timer (STI) hardware available on a SoCs | |
519 | such as EMEV2 from former NEC Electronics. | |
dfc25e45 | 520 | |
3f8e8cee | 521 | config CLKSRC_QCOM |
3dc0e9f6 DL |
522 | bool "Qualcomm MSM timer" if COMPILE_TEST |
523 | depends on ARM | |
bb0eb050 | 524 | select TIMER_OF |
3dc0e9f6 DL |
525 | help |
526 | This enables the clocksource and the per CPU clockevent driver for the | |
527 | Qualcomm SoCs. | |
220e2a8d PM |
528 | |
529 | config CLKSRC_VERSATILE | |
5cc87a4d DL |
530 | bool "ARM Versatile (Express) reference platforms clock source" if COMPILE_TEST |
531 | depends on GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET | |
bb0eb050 | 532 | select TIMER_OF |
220e2a8d PM |
533 | default y if MFD_VEXPRESS_SYSREG |
534 | help | |
535 | This option enables clock source based on free running | |
536 | counter available in the "System Registers" block of | |
537 | ARM Versatile, RealView and Versatile Express reference | |
538 | platforms. | |
58394271 | 539 | |
fa5635a2 AB |
540 | config CLKSRC_MIPS_GIC |
541 | bool | |
542 | depends on MIPS_GIC | |
bb0eb050 | 543 | select TIMER_OF |
fa5635a2 | 544 | |
ccd63ce4 | 545 | config CLKSRC_TANGO_XTAL |
5a7351f0 DL |
546 | bool "Clocksource for Tango SoC" if COMPILE_TEST |
547 | depends on ARM | |
bb0eb050 | 548 | select TIMER_OF |
0881841f | 549 | select CLKSRC_MMIO |
5a7351f0 DL |
550 | help |
551 | This enables the clocksource for Tango SoC | |
ccd63ce4 | 552 | |
e074ff86 | 553 | config CLKSRC_PXA |
5ae996cb | 554 | bool "Clocksource for PXA or SA-11x0 platform" if COMPILE_TEST |
d7023e62 | 555 | depends on HAS_IOMEM |
5ae996cb | 556 | select CLKSRC_MMIO |
e074ff86 DES |
557 | help |
558 | This enables OST0 support available on PXA and SA-11x0 | |
559 | platforms. | |
618b902d | 560 | |
97a23beb | 561 | config H8300_TMR8 |
46e7c3c6 | 562 | bool "Clockevent timer for the H8300 platform" if COMPILE_TEST |
2f8a26c1 | 563 | depends on HAS_IOMEM |
46e7c3c6 DL |
564 | help |
565 | This enables the 8 bits timer for the H8300 platform. | |
97a23beb | 566 | |
618b902d | 567 | config H8300_TMR16 |
46e7c3c6 | 568 | bool "Clockevent timer for the H83069 platform" if COMPILE_TEST |
2f8a26c1 | 569 | depends on HAS_IOMEM |
46e7c3c6 DL |
570 | help |
571 | This enables the 16 bits timer for the H8300 platform with the | |
572 | H83069 cpu. | |
618b902d YS |
573 | |
574 | config H8300_TPU | |
46e7c3c6 | 575 | bool "Clocksource for the H8300 platform" if COMPILE_TEST |
2f8a26c1 | 576 | depends on HAS_IOMEM |
46e7c3c6 DL |
577 | help |
578 | This enables the clocksource for the H8300 platform with the | |
579 | H8S2678 cpu. | |
618b902d | 580 | |
bea5af41 SG |
581 | config CLKSRC_IMX_GPT |
582 | bool "Clocksource using i.MX GPT" if COMPILE_TEST | |
583 | depends on ARM && CLKDEV_LOOKUP | |
584 | select CLKSRC_MMIO | |
585 | ||
059ab7b8 DA |
586 | config CLKSRC_IMX_TPM |
587 | bool "Clocksource using i.MX TPM" if COMPILE_TEST | |
2f8a26c1 | 588 | depends on ARM && CLKDEV_LOOKUP |
059ab7b8 DA |
589 | select CLKSRC_MMIO |
590 | help | |
591 | Enable this option to use IMX Timer/PWM Module (TPM) timer as | |
592 | clocksource. | |
593 | ||
70bef01c | 594 | config CLKSRC_ST_LPC |
baacaf83 | 595 | bool "Low power clocksource found in the LPC" if COMPILE_TEST |
bb0eb050 | 596 | select TIMER_OF if OF |
863ee050 | 597 | depends on HAS_IOMEM |
2be6d9bf | 598 | select CLKSRC_MMIO |
70bef01c LJ |
599 | help |
600 | Enable this option to use the Low Power controller timer | |
601 | as clocksource. | |
602 | ||
35dbb74a RC |
603 | config ATCPIT100_TIMER |
604 | bool "ATCPIT100 timer driver" | |
605 | depends on NDS32 || COMPILE_TEST | |
606 | depends on HAS_IOMEM | |
607 | select TIMER_OF | |
608 | default NDS32 | |
609 | help | |
610 | This option enables support for the Andestech ATCPIT100 timers. | |
611 | ||
62b01943 PD |
612 | config RISCV_TIMER |
613 | bool "Timer for the RISC-V platform" | |
614 | depends on RISCV | |
615 | default y | |
616 | select TIMER_PROBE | |
617 | select TIMER_OF | |
618 | help | |
619 | This enables the per-hart timer built into all RISC-V systems, which | |
620 | is accessed via both the SBI and the rdcycle instruction. This is | |
621 | required for all RISC-V systems. | |
622 | ||
a7ad38b0 GR |
623 | config CSKY_MP_TIMER |
624 | bool "SMP Timer for the C-SKY platform" if COMPILE_TEST | |
625 | depends on CSKY | |
626 | select TIMER_OF | |
627 | help | |
628 | Say yes here to enable C-SKY SMP timer driver used for C-SKY SMP | |
629 | system. | |
630 | csky,mptimer is not only used in SMP system, it also could be used | |
631 | single core system. It's not a mmio reg and it use mtcr/mfcr instruction. | |
632 | ||
58394271 | 633 | endmenu |