Commit | Line | Data |
---|---|---|
ae278a93 SW |
1 | config CLKSRC_OF |
2 | bool | |
3 | ||
89c0b8e2 RK |
4 | config CLKSRC_I8253 |
5 | bool | |
442c8176 | 6 | |
e6220bdc TG |
7 | config CLKEVT_I8253 |
8 | bool | |
9 | ||
15f304b6 RB |
10 | config I8253_LOCK |
11 | bool | |
12 | ||
13 | config CLKBLD_I8253 | |
e6220bdc | 14 | def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK |
15f304b6 | 15 | |
442c8176 RK |
16 | config CLKSRC_MMIO |
17 | bool | |
06c3df49 JI |
18 | |
19 | config DW_APB_TIMER | |
20 | bool | |
489bccea | 21 | |
cfda5901 DN |
22 | config DW_APB_TIMER_OF |
23 | bool | |
24 | ||
6fe9cbd1 GC |
25 | config ARMADA_370_XP_TIMER |
26 | bool | |
27 | ||
0c1dcfd5 SH |
28 | config ORION_TIMER |
29 | select CLKSRC_OF | |
30 | select CLKSRC_MMIO | |
31 | bool | |
32 | ||
119fd635 | 33 | config SUN4I_TIMER |
b2ac5d75 MR |
34 | bool |
35 | ||
ff7ec345 TP |
36 | config VT8500_TIMER |
37 | bool | |
38 | ||
4f0f234f MS |
39 | config CADENCE_TTC_TIMER |
40 | bool | |
41 | ||
694e33a7 LW |
42 | config CLKSRC_NOMADIK_MTU |
43 | bool | |
44 | depends on (ARCH_NOMADIK || ARCH_U8500) | |
45 | select CLKSRC_MMIO | |
46 | help | |
47 | Support for Multi Timer Unit. MTU provides access | |
48 | to multiple interrupt generating programmable | |
49 | 32-bit free running decrementing counters. | |
50 | ||
51 | config CLKSRC_NOMADIK_MTU_SCHED_CLOCK | |
52 | bool | |
53 | depends on CLKSRC_NOMADIK_MTU | |
54 | help | |
55 | Use the Multi Timer Unit as the sched_clock. | |
56 | ||
489bccea MW |
57 | config CLKSRC_DBX500_PRCMU |
58 | bool "Clocksource PRCMU Timer" | |
29746f48 | 59 | depends on UX500_SOC_DB8500 |
489bccea MW |
60 | default y |
61 | help | |
62 | Use the always on PRCMU Timer as clocksource | |
63 | ||
64 | config CLKSRC_DBX500_PRCMU_SCHED_CLOCK | |
65 | bool "Clocksource PRCMU Timer sched_clock" | |
694e33a7 | 66 | depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK) |
489bccea MW |
67 | default y |
68 | help | |
69 | Use the always on PRCMU Timer as sched_clock | |
985c0679 | 70 | |
8a4da6e3 MR |
71 | config ARM_ARCH_TIMER |
72 | bool | |
0583fe47 | 73 | select CLKSRC_OF if OF |
a2c5d4ed JH |
74 | |
75 | config CLKSRC_METAG_GENERIC | |
76 | def_bool y if METAG | |
77 | help | |
78 | This option enables support for the Meta per-thread timers. | |
6938d75a TA |
79 | |
80 | config CLKSRC_EXYNOS_MCT | |
81 | def_bool y if ARCH_EXYNOS | |
82 | help | |
83 | Support for Multi Core Timer controller on Exynos SoCs. | |
241a9871 | 84 | |
f1189989 | 85 | config CLKSRC_SAMSUNG_PWM |
77d84434 | 86 | bool |
f1189989 TF |
87 | select CLKSRC_MMIO |
88 | help | |
89 | This is a new clocksource driver for the PWM timer found in | |
90 | Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver | |
91 | for all devicetree enabled platforms. This driver will be | |
92 | needed only on systems that do not have the Exynos MCT available. | |
c1967249 JL |
93 | |
94 | config VF_PIT_TIMER | |
95 | bool | |
96 | help | |
97 | Support for Period Interrupt Timer on Freescale Vybrid Family SoCs. |