Commit | Line | Data |
---|---|---|
ae278a93 SW |
1 | config CLKSRC_OF |
2 | bool | |
3 | ||
89c0b8e2 RK |
4 | config CLKSRC_I8253 |
5 | bool | |
442c8176 | 6 | |
e6220bdc TG |
7 | config CLKEVT_I8253 |
8 | bool | |
9 | ||
15f304b6 RB |
10 | config I8253_LOCK |
11 | bool | |
12 | ||
13 | config CLKBLD_I8253 | |
e6220bdc | 14 | def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK |
15f304b6 | 15 | |
442c8176 RK |
16 | config CLKSRC_MMIO |
17 | bool | |
06c3df49 JI |
18 | |
19 | config DW_APB_TIMER | |
20 | bool | |
489bccea | 21 | |
cfda5901 DN |
22 | config DW_APB_TIMER_OF |
23 | bool | |
1b4eca0f | 24 | select DW_APB_TIMER |
10021488 | 25 | select CLKSRC_OF |
cfda5901 | 26 | |
6fe9cbd1 GC |
27 | config ARMADA_370_XP_TIMER |
28 | bool | |
7b0dd72a | 29 | select CLKSRC_OF |
6fe9cbd1 | 30 | |
0c1dcfd5 SH |
31 | config ORION_TIMER |
32 | select CLKSRC_OF | |
33 | select CLKSRC_MMIO | |
34 | bool | |
35 | ||
119fd635 | 36 | config SUN4I_TIMER |
b2ac5d75 MR |
37 | bool |
38 | ||
ff7ec345 TP |
39 | config VT8500_TIMER |
40 | bool | |
41 | ||
4f0f234f MS |
42 | config CADENCE_TTC_TIMER |
43 | bool | |
44 | ||
694e33a7 LW |
45 | config CLKSRC_NOMADIK_MTU |
46 | bool | |
47 | depends on (ARCH_NOMADIK || ARCH_U8500) | |
48 | select CLKSRC_MMIO | |
49 | help | |
50 | Support for Multi Timer Unit. MTU provides access | |
51 | to multiple interrupt generating programmable | |
52 | 32-bit free running decrementing counters. | |
53 | ||
54 | config CLKSRC_NOMADIK_MTU_SCHED_CLOCK | |
55 | bool | |
56 | depends on CLKSRC_NOMADIK_MTU | |
57 | help | |
58 | Use the Multi Timer Unit as the sched_clock. | |
59 | ||
489bccea MW |
60 | config CLKSRC_DBX500_PRCMU |
61 | bool "Clocksource PRCMU Timer" | |
29746f48 | 62 | depends on UX500_SOC_DB8500 |
489bccea MW |
63 | default y |
64 | help | |
65 | Use the always on PRCMU Timer as clocksource | |
66 | ||
67 | config CLKSRC_DBX500_PRCMU_SCHED_CLOCK | |
68 | bool "Clocksource PRCMU Timer sched_clock" | |
694e33a7 | 69 | depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK) |
489bccea MW |
70 | default y |
71 | help | |
72 | Use the always on PRCMU Timer as sched_clock | |
985c0679 | 73 | |
8a4da6e3 MR |
74 | config ARM_ARCH_TIMER |
75 | bool | |
0583fe47 | 76 | select CLKSRC_OF if OF |
a2c5d4ed | 77 | |
c1b40e44 SM |
78 | config ARM_GLOBAL_TIMER |
79 | bool | |
80 | select CLKSRC_OF if OF | |
81 | help | |
82 | This options enables support for the ARM global timer unit | |
83 | ||
84 | config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK | |
85 | bool | |
86 | depends on ARM_GLOBAL_TIMER | |
87 | default y | |
88 | help | |
89 | Use ARM global timer clock source as sched_clock | |
90 | ||
a2c5d4ed JH |
91 | config CLKSRC_METAG_GENERIC |
92 | def_bool y if METAG | |
93 | help | |
94 | This option enables support for the Meta per-thread timers. | |
6938d75a TA |
95 | |
96 | config CLKSRC_EXYNOS_MCT | |
97 | def_bool y if ARCH_EXYNOS | |
98 | help | |
99 | Support for Multi Core Timer controller on Exynos SoCs. | |
241a9871 | 100 | |
f1189989 | 101 | config CLKSRC_SAMSUNG_PWM |
77d84434 | 102 | bool |
f1189989 TF |
103 | help |
104 | This is a new clocksource driver for the PWM timer found in | |
105 | Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver | |
106 | for all devicetree enabled platforms. This driver will be | |
107 | needed only on systems that do not have the Exynos MCT available. | |
c1967249 JL |
108 | |
109 | config VF_PIT_TIMER | |
110 | bool | |
111 | help | |
112 | Support for Period Interrupt Timer on Freescale Vybrid Family SoCs. |