[linux-2.6-block.git] / drivers / clk / ux500 / clk-prcc.c

/*
 * PRCC clock implementation for ux500 platform.
 *
 * Copyright (C) 2012 ST-Ericsson SA
 * Author: Ulf Hansson <ulf.hansson@linaro.org>
 *
 * License terms: GNU General Public License (GPL) version 2
 */

#include <linux/clk-provider.h>
#include <linux/clk-private.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/types.h>
#include <mach/hardware.h>

#include "clk.h"

#define PRCC_PCKEN			0x000
#define PRCC_PCKDIS			0x004
#define PRCC_KCKEN			0x008
#define PRCC_KCKDIS			0x00C
#define PRCC_PCKSR			0x010
#define PRCC_KCKSR			0x014

#define to_clk_prcc(_hw) container_of(_hw, struct clk_prcc, hw)

struct clk_prcc {
	struct clk_hw hw;
	void __iomem *base;
	u32 cg_sel;
	int is_enabled;
};

/* PRCC clock operations. */

static int clk_prcc_pclk_enable(struct clk_hw *hw)
{
	struct clk_prcc *clk = to_clk_prcc(hw);

	writel(clk->cg_sel, (clk->base + PRCC_PCKEN));
	while (!(readl(clk->base + PRCC_PCKSR) & clk->cg_sel))
		cpu_relax();

	clk->is_enabled = 1;
	return 0;
}

static void clk_prcc_pclk_disable(struct clk_hw *hw)
{
	struct clk_prcc *clk = to_clk_prcc(hw);

	writel(clk->cg_sel, (clk->base + PRCC_PCKDIS));
	clk->is_enabled = 0;
}

static int clk_prcc_kclk_enable(struct clk_hw *hw)
{
	struct clk_prcc *clk = to_clk_prcc(hw);

	writel(clk->cg_sel, (clk->base + PRCC_KCKEN));
	while (!(readl(clk->base + PRCC_KCKSR) & clk->cg_sel))
		cpu_relax();

	clk->is_enabled = 1;
	return 0;
}

static void clk_prcc_kclk_disable(struct clk_hw *hw)
{
	struct clk_prcc *clk = to_clk_prcc(hw);

	writel(clk->cg_sel, (clk->base + PRCC_KCKDIS));
	clk->is_enabled = 0;
}

static int clk_prcc_is_enabled(struct clk_hw *hw)
{
	struct clk_prcc *clk = to_clk_prcc(hw);
	return clk->is_enabled;
}

static struct clk_ops clk_prcc_pclk_ops = {
	.enable = clk_prcc_pclk_enable,
	.disable = clk_prcc_pclk_disable,
	.is_enabled = clk_prcc_is_enabled,
};

static struct clk_ops clk_prcc_kclk_ops = {
	.enable = clk_prcc_kclk_enable,
	.disable = clk_prcc_kclk_disable,
	.is_enabled = clk_prcc_is_enabled,
};

static struct clk *clk_reg_prcc(const char *name,
				const char *parent_name,
				resource_size_t phy_base,
				u32 cg_sel,
				unsigned long flags,
				struct clk_ops *clk_prcc_ops)
{
	struct clk_prcc *clk;
	struct clk_init_data clk_prcc_init;
	struct clk *clk_reg;

	if (!name) {
		pr_err("clk_prcc: %s invalid arguments passed\n", __func__);
		return ERR_PTR(-EINVAL);
	}

	clk = kzalloc(sizeof(struct clk_prcc), GFP_KERNEL);
	if (!clk) {
		pr_err("clk_prcc: %s could not allocate clk\n", __func__);
		return ERR_PTR(-ENOMEM);
	}

	clk->base = ioremap(phy_base, SZ_4K);
	if (!clk->base)
		goto free_clk;

	clk->cg_sel = cg_sel;
	clk->is_enabled = 1;

	clk_prcc_init.name = name;
	clk_prcc_init.ops = clk_prcc_ops;
	clk_prcc_init.flags = flags;
	clk_prcc_init.parent_names = (parent_name ? &parent_name : NULL);
	clk_prcc_init.num_parents = (parent_name ? 1 : 0);
	clk->hw.init = &clk_prcc_init;

	clk_reg = clk_register(NULL, &clk->hw);
	if (IS_ERR_OR_NULL(clk_reg))
		goto unmap_clk;

	return clk_reg;

unmap_clk:
	iounmap(clk->base);
free_clk:
	kfree(clk);
	pr_err("clk_prcc: %s failed to register clk\n", __func__);
	return ERR_PTR(-ENOMEM);
}

struct clk *clk_reg_prcc_pclk(const char *name,
			      const char *parent_name,
			      resource_size_t phy_base,
			      u32 cg_sel,
			      unsigned long flags)
{
	return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags,
			&clk_prcc_pclk_ops);
}

struct clk *clk_reg_prcc_kclk(const char *name,
			      const char *parent_name,
			      resource_size_t phy_base,
			      u32 cg_sel,
			      unsigned long flags)
{
	return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags,
			&clk_prcc_kclk_ops);
}
Commit	Line	Data
3b01f87b UH	1	/*
	2	* PRCC clock implementation for ux500 platform.
	3	*
	4	* Copyright (C) 2012 ST-Ericsson SA
	5	* Author: Ulf Hansson <ulf.hansson@linaro.org>
	6	*
	7	* License terms: GNU General Public License (GPL) version 2
	8	*/
	9
	10	#include <linux/clk-provider.h>
	11	#include <linux/clk-private.h>
	12	#include <linux/slab.h>
	13	#include <linux/io.h>
	14	#include <linux/err.h>
	15	#include <linux/types.h>
	16	#include <mach/hardware.h>
	17
	18	#include "clk.h"
	19
	20	#define PRCC_PCKEN 0x000
	21	#define PRCC_PCKDIS 0x004
	22	#define PRCC_KCKEN 0x008
	23	#define PRCC_KCKDIS 0x00C
	24	#define PRCC_PCKSR 0x010
	25	#define PRCC_KCKSR 0x014
	26
	27	#define to_clk_prcc(_hw) container_of(_hw, struct clk_prcc, hw)
	28
	29	struct clk_prcc {
	30	struct clk_hw hw;
	31	void __iomem *base;
	32	u32 cg_sel;
	33	int is_enabled;
	34	};
	35
	36	/* PRCC clock operations. */
	37
	38	static int clk_prcc_pclk_enable(struct clk_hw *hw)
	39	{
	40	struct clk_prcc *clk = to_clk_prcc(hw);
	41
	42	writel(clk->cg_sel, (clk->base + PRCC_PCKEN));
	43	while (!(readl(clk->base + PRCC_PCKSR) & clk->cg_sel))
	44	cpu_relax();
	45
	46	clk->is_enabled = 1;
	47	return 0;
	48	}
	49
	50	static void clk_prcc_pclk_disable(struct clk_hw *hw)
	51	{
	52	struct clk_prcc *clk = to_clk_prcc(hw);
	53
	54	writel(clk->cg_sel, (clk->base + PRCC_PCKDIS));
	55	clk->is_enabled = 0;
	56	}
	57
	58	static int clk_prcc_kclk_enable(struct clk_hw *hw)
	59	{
	60	struct clk_prcc *clk = to_clk_prcc(hw);
	61
	62	writel(clk->cg_sel, (clk->base + PRCC_KCKEN));
	63	while (!(readl(clk->base + PRCC_KCKSR) & clk->cg_sel))
	64	cpu_relax();
65
66	clk->is_enabled = 1;
67	return 0;
68	}
69
70	static void clk_prcc_kclk_disable(struct clk_hw *hw)
71	{
72	struct clk_prcc *clk = to_clk_prcc(hw);
73
74	writel(clk->cg_sel, (clk->base + PRCC_KCKDIS));
75	clk->is_enabled = 0;
76	}
77
78	static int clk_prcc_is_enabled(struct clk_hw *hw)
79	{
80	struct clk_prcc *clk = to_clk_prcc(hw);
81	return clk->is_enabled;
82	}
83
84	static struct clk_ops clk_prcc_pclk_ops = {
85	.enable = clk_prcc_pclk_enable,
86	.disable = clk_prcc_pclk_disable,
87	.is_enabled = clk_prcc_is_enabled,
88	};
89
90	static struct clk_ops clk_prcc_kclk_ops = {
91	.enable = clk_prcc_kclk_enable,
92	.disable = clk_prcc_kclk_disable,
93	.is_enabled = clk_prcc_is_enabled,
94	};
95
96	static struct clk clk_reg_prcc(const char name,
97	const char *parent_name,
98	resource_size_t phy_base,
99	u32 cg_sel,
100	unsigned long flags,
101	struct clk_ops *clk_prcc_ops)
102	{
103	struct clk_prcc *clk;
104	struct clk_init_data clk_prcc_init;
105	struct clk *clk_reg;
106
107	if (!name) {
108	pr_err("clk_prcc: %s invalid arguments passed\n", __func__);
109	return ERR_PTR(-EINVAL);
110	}
111
112	clk = kzalloc(sizeof(struct clk_prcc), GFP_KERNEL);
113	if (!clk) {
114	pr_err("clk_prcc: %s could not allocate clk\n", __func__);
115	return ERR_PTR(-ENOMEM);
116	}
117
118	clk->base = ioremap(phy_base, SZ_4K);
119	if (!clk->base)
120	goto free_clk;
121
122	clk->cg_sel = cg_sel;
123	clk->is_enabled = 1;
124
125	clk_prcc_init.name = name;
126	clk_prcc_init.ops = clk_prcc_ops;
127	clk_prcc_init.flags = flags;
128	clk_prcc_init.parent_names = (parent_name ? &parent_name : NULL);
129	clk_prcc_init.num_parents = (parent_name ? 1 : 0);
130	clk->hw.init = &clk_prcc_init;
131
132	clk_reg = clk_register(NULL, &clk->hw);
133	if (IS_ERR_OR_NULL(clk_reg))
134	goto unmap_clk;
135
136	return clk_reg;
137
138	unmap_clk:
139	iounmap(clk->base);
140	free_clk:
141	kfree(clk);
142	pr_err("clk_prcc: %s failed to register clk\n", __func__);
143	return ERR_PTR(-ENOMEM);
144	}
145
146	struct clk clk_reg_prcc_pclk(const char name,
147	const char *parent_name,
148	resource_size_t phy_base,
149	u32 cg_sel,
150	unsigned long flags)
151	{
152	return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags,
153	&clk_prcc_pclk_ops);
154	}
155
156	struct clk clk_reg_prcc_kclk(const char name,
157	const char *parent_name,
158	resource_size_t phy_base,
159	u32 cg_sel,
160	unsigned long flags)
161	{
162	return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags,
163	&clk_prcc_kclk_ops);
164	}