[linux-block.git] / drivers / clk / ux500 / clk-prcc.c

/*
 * PRCC clock implementation for ux500 platform.
 *
 * Copyright (C) 2012 ST-Ericsson SA
 * Author: Ulf Hansson <ulf.hansson@linaro.org>
 *
 * License terms: GNU General Public License (GPL) version 2
 */

#include <linux/clk-provider.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/types.h>

#include "clk.h"

#define PRCC_PCKEN			0x000
#define PRCC_PCKDIS			0x004
#define PRCC_KCKEN			0x008
#define PRCC_KCKDIS			0x00C
#define PRCC_PCKSR			0x010
#define PRCC_KCKSR			0x014

#define to_clk_prcc(_hw) container_of(_hw, struct clk_prcc, hw)

struct clk_prcc {
	struct clk_hw hw;
	void __iomem *base;
	u32 cg_sel;
	int is_enabled;
};

/* PRCC clock operations. */

static int clk_prcc_pclk_enable(struct clk_hw *hw)
{
	struct clk_prcc *clk = to_clk_prcc(hw);

	writel(clk->cg_sel, (clk->base + PRCC_PCKEN));
	while (!(readl(clk->base + PRCC_PCKSR) & clk->cg_sel))
		cpu_relax();

	clk->is_enabled = 1;
	return 0;
}

static void clk_prcc_pclk_disable(struct clk_hw *hw)
{
	struct clk_prcc *clk = to_clk_prcc(hw);

	writel(clk->cg_sel, (clk->base + PRCC_PCKDIS));
	clk->is_enabled = 0;
}

static int clk_prcc_kclk_enable(struct clk_hw *hw)
{
	struct clk_prcc *clk = to_clk_prcc(hw);

	writel(clk->cg_sel, (clk->base + PRCC_KCKEN));
	while (!(readl(clk->base + PRCC_KCKSR) & clk->cg_sel))
		cpu_relax();

	clk->is_enabled = 1;
	return 0;
}

static void clk_prcc_kclk_disable(struct clk_hw *hw)
{
	struct clk_prcc *clk = to_clk_prcc(hw);

	writel(clk->cg_sel, (clk->base + PRCC_KCKDIS));
	clk->is_enabled = 0;
}

static int clk_prcc_is_enabled(struct clk_hw *hw)
{
	struct clk_prcc *clk = to_clk_prcc(hw);
	return clk->is_enabled;
}

static const struct clk_ops clk_prcc_pclk_ops = {
	.enable = clk_prcc_pclk_enable,
	.disable = clk_prcc_pclk_disable,
	.is_enabled = clk_prcc_is_enabled,
};

static const struct clk_ops clk_prcc_kclk_ops = {
	.enable = clk_prcc_kclk_enable,
	.disable = clk_prcc_kclk_disable,
	.is_enabled = clk_prcc_is_enabled,
};

static struct clk *clk_reg_prcc(const char *name,
				const char *parent_name,
				resource_size_t phy_base,
				u32 cg_sel,
				unsigned long flags,
				const struct clk_ops *clk_prcc_ops)
{
	struct clk_prcc *clk;
	struct clk_init_data clk_prcc_init;
	struct clk *clk_reg;

	if (!name) {
		pr_err("clk_prcc: %s invalid arguments passed\n", __func__);
		return ERR_PTR(-EINVAL);
	}

	clk = kzalloc(sizeof(*clk), GFP_KERNEL);
	if (!clk)
		return ERR_PTR(-ENOMEM);

	clk->base = ioremap(phy_base, SZ_4K);
	if (!clk->base)
		goto free_clk;

	clk->cg_sel = cg_sel;
	clk->is_enabled = 1;

	clk_prcc_init.name = name;
	clk_prcc_init.ops = clk_prcc_ops;
	clk_prcc_init.flags = flags;
	clk_prcc_init.parent_names = (parent_name ? &parent_name : NULL);
	clk_prcc_init.num_parents = (parent_name ? 1 : 0);
	clk->hw.init = &clk_prcc_init;

	clk_reg = clk_register(NULL, &clk->hw);
	if (IS_ERR_OR_NULL(clk_reg))
		goto unmap_clk;

	return clk_reg;

unmap_clk:
	iounmap(clk->base);
free_clk:
	kfree(clk);
	pr_err("clk_prcc: %s failed to register clk\n", __func__);
	return ERR_PTR(-ENOMEM);
}

struct clk *clk_reg_prcc_pclk(const char *name,
			      const char *parent_name,
			      resource_size_t phy_base,
			      u32 cg_sel,
			      unsigned long flags)
{
	return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags,
			&clk_prcc_pclk_ops);
}

struct clk *clk_reg_prcc_kclk(const char *name,
			      const char *parent_name,
			      resource_size_t phy_base,
			      u32 cg_sel,
			      unsigned long flags)
{
	return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags,
			&clk_prcc_kclk_ops);
}
Commit	Line	Data
3b01f87b UH	1	/*
	2	* PRCC clock implementation for ux500 platform.
	3	*
	4	* Copyright (C) 2012 ST-Ericsson SA
	5	* Author: Ulf Hansson <ulf.hansson@linaro.org>
	6	*
	7	* License terms: GNU General Public License (GPL) version 2
	8	*/
	9
	10	#include <linux/clk-provider.h>
3b01f87b UH	11	#include <linux/slab.h>
	12	#include <linux/io.h>
	13	#include <linux/err.h>
	14	#include <linux/types.h>
3b01f87b UH	15
	16	#include "clk.h"
	17
	18	#define PRCC_PCKEN 0x000
	19	#define PRCC_PCKDIS 0x004
	20	#define PRCC_KCKEN 0x008
	21	#define PRCC_KCKDIS 0x00C
	22	#define PRCC_PCKSR 0x010
	23	#define PRCC_KCKSR 0x014
	24
	25	#define to_clk_prcc(_hw) container_of(_hw, struct clk_prcc, hw)
	26
	27	struct clk_prcc {
	28	struct clk_hw hw;
	29	void __iomem *base;
	30	u32 cg_sel;
	31	int is_enabled;
	32	};
	33
	34	/* PRCC clock operations. */
	35
	36	static int clk_prcc_pclk_enable(struct clk_hw *hw)
	37	{
	38	struct clk_prcc *clk = to_clk_prcc(hw);
	39
	40	writel(clk->cg_sel, (clk->base + PRCC_PCKEN));
	41	while (!(readl(clk->base + PRCC_PCKSR) & clk->cg_sel))
	42	cpu_relax();
	43
	44	clk->is_enabled = 1;
	45	return 0;
	46	}
	47
	48	static void clk_prcc_pclk_disable(struct clk_hw *hw)
	49	{
	50	struct clk_prcc *clk = to_clk_prcc(hw);
	51
	52	writel(clk->cg_sel, (clk->base + PRCC_PCKDIS));
	53	clk->is_enabled = 0;
	54	}
	55
	56	static int clk_prcc_kclk_enable(struct clk_hw *hw)
	57	{
	58	struct clk_prcc *clk = to_clk_prcc(hw);
	59
	60	writel(clk->cg_sel, (clk->base + PRCC_KCKEN));
	61	while (!(readl(clk->base + PRCC_KCKSR) & clk->cg_sel))
	62	cpu_relax();
	63
	64	clk->is_enabled = 1;
	65	return 0;
	66	}
	67
	68	static void clk_prcc_kclk_disable(struct clk_hw *hw)
	69	{
	70	struct clk_prcc *clk = to_clk_prcc(hw);
	71
	72	writel(clk->cg_sel, (clk->base + PRCC_KCKDIS));
	73	clk->is_enabled = 0;
	74	}
	75
	76	static int clk_prcc_is_enabled(struct clk_hw *hw)
	77	{
	78	struct clk_prcc *clk = to_clk_prcc(hw);
79	return clk->is_enabled;
80	}
81
56d87776	82	static const struct clk_ops clk_prcc_pclk_ops = {
3b01f87b UH	83	.enable = clk_prcc_pclk_enable,
	84	.disable = clk_prcc_pclk_disable,
	85	.is_enabled = clk_prcc_is_enabled,
	86	};
	87
56d87776	88	static const struct clk_ops clk_prcc_kclk_ops = {
3b01f87b UH	89	.enable = clk_prcc_kclk_enable,
	90	.disable = clk_prcc_kclk_disable,
	91	.is_enabled = clk_prcc_is_enabled,
	92	};
	93
	94	static struct clk clk_reg_prcc(const char name,
	95	const char *parent_name,
	96	resource_size_t phy_base,
	97	u32 cg_sel,
	98	unsigned long flags,
56d87776	99	const struct clk_ops *clk_prcc_ops)
3b01f87b UH	100	{
	101	struct clk_prcc *clk;
	102	struct clk_init_data clk_prcc_init;
	103	struct clk *clk_reg;
	104
	105	if (!name) {
	106	pr_err("clk_prcc: %s invalid arguments passed\n", __func__);
	107	return ERR_PTR(-EINVAL);
	108	}
	109
0b10adba	110	clk = kzalloc(sizeof(*clk), GFP_KERNEL);
7a294dc6	111	if (!clk)
3b01f87b	112	return ERR_PTR(-ENOMEM);
3b01f87b UH	113
	114	clk->base = ioremap(phy_base, SZ_4K);
	115	if (!clk->base)
	116	goto free_clk;
	117
	118	clk->cg_sel = cg_sel;
	119	clk->is_enabled = 1;
	120
	121	clk_prcc_init.name = name;
	122	clk_prcc_init.ops = clk_prcc_ops;
	123	clk_prcc_init.flags = flags;
	124	clk_prcc_init.parent_names = (parent_name ? &parent_name : NULL);
	125	clk_prcc_init.num_parents = (parent_name ? 1 : 0);
	126	clk->hw.init = &clk_prcc_init;
	127
	128	clk_reg = clk_register(NULL, &clk->hw);
	129	if (IS_ERR_OR_NULL(clk_reg))
	130	goto unmap_clk;
	131
	132	return clk_reg;
	133
	134	unmap_clk:
	135	iounmap(clk->base);
	136	free_clk:
	137	kfree(clk);
	138	pr_err("clk_prcc: %s failed to register clk\n", __func__);
	139	return ERR_PTR(-ENOMEM);
	140	}
	141
	142	struct clk clk_reg_prcc_pclk(const char name,
	143	const char *parent_name,
	144	resource_size_t phy_base,
	145	u32 cg_sel,
	146	unsigned long flags)
	147	{
	148	return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags,
	149	&clk_prcc_pclk_ops);
	150	}
	151
	152	struct clk clk_reg_prcc_kclk(const char name,
	153	const char *parent_name,
	154	resource_size_t phy_base,
	155	u32 cg_sel,
	156	unsigned long flags)
	157	{
	158	return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags,
	159	&clk_prcc_kclk_ops);
	160	}