[linux-2.6-block.git] / drivers / clk / ti / clkt_iclk.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * OMAP2/3 interface clock control
 *
 * Copyright (C) 2011 Nokia Corporation
 * Paul Walmsley
 */
#undef DEBUG

#include <linux/kernel.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
#include <linux/clk/ti.h>

#include "clock.h"

/* Register offsets */
#define OMAP24XX_CM_FCLKEN2		0x04
#define CM_AUTOIDLE			0x30
#define CM_ICLKEN			0x10
#define CM_IDLEST			0x20

#define OMAP24XX_CM_IDLEST_VAL		0

/* Private functions */

/* XXX */
void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk)
{
	u32 v;
	struct clk_omap_reg r;

	memcpy(&r, &clk->enable_reg, sizeof(r));
	r.offset ^= (CM_AUTOIDLE ^ CM_ICLKEN);

	v = ti_clk_ll_ops->clk_readl(&r);
	v |= (1 << clk->enable_bit);
	ti_clk_ll_ops->clk_writel(v, &r);
}

/* XXX */
void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk)
{
	u32 v;
	struct clk_omap_reg r;

	memcpy(&r, &clk->enable_reg, sizeof(r));

	r.offset ^= (CM_AUTOIDLE ^ CM_ICLKEN);

	v = ti_clk_ll_ops->clk_readl(&r);
	v &= ~(1 << clk->enable_bit);
	ti_clk_ll_ops->clk_writel(v, &r);
}

/**
 * omap2430_clk_i2chs_find_idlest - return CM_IDLEST info for 2430 I2CHS
 * @clk: struct clk * being enabled
 * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
 * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
 * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
 *
 * OMAP2430 I2CHS CM_IDLEST bits are in CM_IDLEST1_CORE, but the
 * CM_*CLKEN bits are in CM_{I,F}CLKEN2_CORE.  This custom function
 * passes back the correct CM_IDLEST register address for I2CHS
 * modules.  No return value.
 */
static void omap2430_clk_i2chs_find_idlest(struct clk_hw_omap *clk,
					   struct clk_omap_reg *idlest_reg,
					   u8 *idlest_bit,
					   u8 *idlest_val)
{
	memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg));
	idlest_reg->offset ^= (OMAP24XX_CM_FCLKEN2 ^ CM_IDLEST);
	*idlest_bit = clk->enable_bit;
	*idlest_val = OMAP24XX_CM_IDLEST_VAL;
}

/* Public data */

const struct clk_hw_omap_ops clkhwops_iclk = {
	.allow_idle	= omap2_clkt_iclk_allow_idle,
	.deny_idle	= omap2_clkt_iclk_deny_idle,
};

const struct clk_hw_omap_ops clkhwops_iclk_wait = {
	.allow_idle	= omap2_clkt_iclk_allow_idle,
	.deny_idle	= omap2_clkt_iclk_deny_idle,
	.find_idlest	= omap2_clk_dflt_find_idlest,
	.find_companion	= omap2_clk_dflt_find_companion,
};

/* 2430 I2CHS has non-standard IDLEST register */
const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait = {
	.find_idlest	= omap2430_clk_i2chs_find_idlest,
	.find_companion	= omap2_clk_dflt_find_companion,
};
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
530e544f PW	2	/*
	3	* OMAP2/3 interface clock control
	4	*
	5	* Copyright (C) 2011 Nokia Corporation
	6	* Paul Walmsley
530e544f PW	7	*/
	8	#undef DEBUG
	9
	10	#include <linux/kernel.h>
32cc0021	11	#include <linux/clk-provider.h>
530e544f	12	#include <linux/io.h>
ef14db09	13	#include <linux/clk/ti.h>
530e544f	14
530e544f	15	#include "clock.h"
acd052bb TK	16
acd052bb TK	17	/* Register offsets */
d5a04ddd	18	#define OMAP24XX_CM_FCLKEN2 0x04
acd052bb TK	19	#define CM_AUTOIDLE 0x30
acd052bb TK	20	#define CM_ICLKEN 0x10
d5a04ddd TK	21	#define CM_IDLEST 0x20
	22
	23	#define OMAP24XX_CM_IDLEST_VAL 0
530e544f PW	24
	25	/* Private functions */
	26
	27	/* XXX */
b4777a21	28	void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk)
530e544f	29	{
519ab8b2	30	u32 v;
6c0afb50	31	struct clk_omap_reg r;
530e544f	32
6c0afb50 TK	33	memcpy(&r, &clk->enable_reg, sizeof(r));
6c0afb50 TK	34	r.offset ^= (CM_AUTOIDLE ^ CM_ICLKEN);
530e544f	35
6c0afb50	36	v = ti_clk_ll_ops->clk_readl(&r);
530e544f	37	v \|= (1 << clk->enable_bit);
6c0afb50	38	ti_clk_ll_ops->clk_writel(v, &r);
530e544f PW	39	}
	40
	41	/* XXX */
b4777a21	42	void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk)
530e544f	43	{
519ab8b2	44	u32 v;
6c0afb50	45	struct clk_omap_reg r;
530e544f	46
6c0afb50	47	memcpy(&r, &clk->enable_reg, sizeof(r));
530e544f	48
6c0afb50 TK	49	r.offset ^= (CM_AUTOIDLE ^ CM_ICLKEN);
	50
	51	v = ti_clk_ll_ops->clk_readl(&r);
530e544f	52	v &= ~(1 << clk->enable_bit);
6c0afb50	53	ti_clk_ll_ops->clk_writel(v, &r);
530e544f PW	54	}
530e544f PW	55
d5a04ddd TK	56	/**
	57	* omap2430_clk_i2chs_find_idlest - return CM_IDLEST info for 2430 I2CHS
	58	* @clk: struct clk * being enabled
	59	* @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
	60	* @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
	61	* @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
	62	*
	63	* OMAP2430 I2CHS CM_IDLEST bits are in CM_IDLEST1_CORE, but the
	64	* CM_*CLKEN bits are in CM_{I,F}CLKEN2_CORE. This custom function
	65	* passes back the correct CM_IDLEST register address for I2CHS
	66	* modules. No return value.
	67	*/
	68	static void omap2430_clk_i2chs_find_idlest(struct clk_hw_omap *clk,
6c0afb50	69	struct clk_omap_reg *idlest_reg,
d5a04ddd TK	70	u8 *idlest_bit,
	71	u8 *idlest_val)
	72	{
6c0afb50 TK	73	memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg));
6c0afb50 TK	74	idlest_reg->offset ^= (OMAP24XX_CM_FCLKEN2 ^ CM_IDLEST);
d5a04ddd TK	75	*idlest_bit = clk->enable_bit;
	76	*idlest_val = OMAP24XX_CM_IDLEST_VAL;
	77	}
	78
530e544f PW	79	/* Public data */
530e544f PW	80
b4777a21 RN	81	const struct clk_hw_omap_ops clkhwops_iclk = {
	82	.allow_idle = omap2_clkt_iclk_allow_idle,
	83	.deny_idle = omap2_clkt_iclk_deny_idle,
	84	};
	85
32cc0021 MT	86	const struct clk_hw_omap_ops clkhwops_iclk_wait = {
	87	.allow_idle = omap2_clkt_iclk_allow_idle,
	88	.deny_idle = omap2_clkt_iclk_deny_idle,
	89	.find_idlest = omap2_clk_dflt_find_idlest,
	90	.find_companion = omap2_clk_dflt_find_companion,
	91	};
d5a04ddd TK	92
	93	/* 2430 I2CHS has non-standard IDLEST register */
	94	const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait = {
	95	.find_idlest = omap2430_clk_i2chs_find_idlest,
	96	.find_companion = omap2_clk_dflt_find_companion,
	97	};