[linux-2.6-block.git] / drivers / clk / ti / clk-43xx.c

/*
 * AM43XX Clock init
 *
 * Copyright (C) 2013 Texas Instruments, Inc
 *     Tero Kristo (t-kristo@ti.com)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 */

#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clk/ti.h>

#include "clock.h"

static struct ti_dt_clk am43xx_clks[] = {
	DT_CLK(NULL, "timer_32k_ck", "clkdiv32k_ick"),
	DT_CLK(NULL, "timer_sys_ck", "sys_clkin_ck"),
	{ .node_name = NULL },
};

int __init am43xx_dt_clk_init(void)
{
	struct clk *clk1, *clk2;

	ti_dt_clocks_register(am43xx_clks);

	omap2_clk_disable_autoidle_all();

	ti_clk_add_aliases();

	/*
	 * cpsw_cpts_rft_clk  has got the choice of 3 clocksources
	 * dpll_core_m4_ck, dpll_core_m5_ck and dpll_disp_m2_ck.
	 * By default dpll_core_m4_ck is selected, witn this as clock
	 * source the CPTS doesnot work properly. It gives clockcheck errors
	 * while running PTP.
	 * clockcheck: clock jumped backward or running slower than expected!
	 * By selecting dpll_core_m5_ck as the clocksource fixes this issue.
	 * In AM335x dpll_core_m5_ck is the default clocksource.
	 */
	clk1 = clk_get_sys(NULL, "cpsw_cpts_rft_clk");
	clk2 = clk_get_sys(NULL, "dpll_core_m5_ck");
	clk_set_parent(clk1, clk2);

	return 0;
}
Commit	Line	Data
ffab2399 TK	1	/*
	2	* AM43XX Clock init
	3	*
	4	* Copyright (C) 2013 Texas Instruments, Inc
	5	* Tero Kristo (t-kristo@ti.com)
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License as
	9	* published by the Free Software Foundation version 2.
	10	*
	11	* This program is distributed "as is" WITHOUT ANY WARRANTY of any
	12	* kind, whether express or implied; without even the implied warranty
	13	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*/
	16
	17	#include <linux/kernel.h>
	18	#include <linux/list.h>
1b29e601	19	#include <linux/clk.h>
ffab2399 TK	20	#include <linux/clk-provider.h>
	21	#include <linux/clk/ti.h>
	22
a3314e9c TK	23	#include "clock.h"
a3314e9c TK	24
ffab2399	25	static struct ti_dt_clk am43xx_clks[] = {
ffab2399 TK	26	DT_CLK(NULL, "timer_32k_ck", "clkdiv32k_ick"),
ffab2399 TK	27	DT_CLK(NULL, "timer_sys_ck", "sys_clkin_ck"),
ffab2399 TK	28	{ .node_name = NULL },
	29	};
	30
	31	int __init am43xx_dt_clk_init(void)
	32	{
f9786f41 GC	33	struct clk clk1, clk2;
f9786f41 GC	34
ffab2399 TK	35	ti_dt_clocks_register(am43xx_clks);
	36
	37	omap2_clk_disable_autoidle_all();
	38
78aac800 TK	39	ti_clk_add_aliases();
78aac800 TK	40
f9786f41 GC	41	/*
	42	* cpsw_cpts_rft_clk has got the choice of 3 clocksources
	43	* dpll_core_m4_ck, dpll_core_m5_ck and dpll_disp_m2_ck.
	44	* By default dpll_core_m4_ck is selected, witn this as clock
	45	* source the CPTS doesnot work properly. It gives clockcheck errors
	46	* while running PTP.
	47	* clockcheck: clock jumped backward or running slower than expected!
	48	* By selecting dpll_core_m5_ck as the clocksource fixes this issue.
	49	* In AM335x dpll_core_m5_ck is the default clocksource.
	50	*/
	51	clk1 = clk_get_sys(NULL, "cpsw_cpts_rft_clk");
	52	clk2 = clk_get_sys(NULL, "dpll_core_m5_ck");
	53	clk_set_parent(clk1, clk2);
	54
ffab2399 TK	55	return 0;
ffab2399 TK	56	}