projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| d41f59fd CZ |
1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | // | |
| 3 | // Spreadtrum clock infrastructure | |
| 4 | // | |
| 5 | // Copyright (C) 2017 Spreadtrum, Inc. | |
| 6 | // Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com> | |
| 7 | ||
| 8 | #include <linux/mfd/syscon.h> | |
| 9 | #include <linux/module.h> | |
| 10 | #include <linux/of_address.h> | |
| 11 | #include <linux/of_platform.h> | |
| 12 | #include <linux/regmap.h> | |
| 13 | ||
| 14 | #include "common.h" | |
| 15 | ||
| 16 | static const struct regmap_config sprdclk_regmap_config = { | |
| 17 | .reg_bits = 32, | |
| 18 | .reg_stride = 4, | |
| 19 | .val_bits = 32, | |
| 20 | .max_register = 0xffff, | |
| 21 | .fast_io = true, | |
| 22 | }; | |
| 23 | ||
| 24 | static void sprd_clk_set_regmap(const struct sprd_clk_desc *desc, | |
| 25 | struct regmap *regmap) | |
| 26 | { | |
| 27 | int i; | |
| 28 | struct sprd_clk_common *cclk; | |
| 29 | ||
| 30 | for (i = 0; i < desc->num_clk_clks; i++) { | |
| 31 | cclk = desc->clk_clks[i]; | |
| 32 | if (!cclk) | |
| 33 | continue; | |
| 34 | ||
| 35 | cclk->regmap = regmap; | |
| 36 | } | |
| 37 | } | |
| 38 | ||
| 39 | int sprd_clk_regmap_init(struct platform_device *pdev, | |
| 40 | const struct sprd_clk_desc *desc) | |
| 41 | { | |
| 42 | void __iomem *base; | |
| f95e8c79 | 43 | struct device *dev = &pdev->dev; |
| 91e6455b | 44 | struct device_node *node = dev->of_node, *np; |
| d41f59fd CZ |
45 | struct regmap *regmap; |
| 46 | ||
| 47 | if (of_find_property(node, "sprd,syscon", NULL)) { | |
| 48 | regmap = syscon_regmap_lookup_by_phandle(node, "sprd,syscon"); | |
| 9629dbda | 49 | if (IS_ERR(regmap)) { |
| d41f59fd CZ |
50 | pr_err("%s: failed to get syscon regmap\n", __func__); |
| 51 | return PTR_ERR(regmap); | |
| 52 | } | |
| 91e6455b LH |
53 | } else if (of_device_is_compatible(np = of_get_parent(node), "syscon") || |
| 54 | (of_node_put(np), 0)) { | |
| 55 | regmap = device_node_to_regmap(np); | |
| 56 | of_node_put(np); | |
| f95e8c79 CZ |
57 | if (IS_ERR(regmap)) { |
| 58 | dev_err(dev, "failed to get regmap from its parent.\n"); | |
| 59 | return PTR_ERR(regmap); | |
| 60 | } | |
| d41f59fd | 61 | } else { |
| 793ee798 | 62 | base = devm_platform_ioremap_resource(pdev, 0); |
| 69b39d25 CZ |
63 | if (IS_ERR(base)) |
| 64 | return PTR_ERR(base); | |
| 65 | ||
| d41f59fd CZ |
66 | regmap = devm_regmap_init_mmio(&pdev->dev, base, |
| 67 | &sprdclk_regmap_config); | |
| 78f52969 | 68 | if (IS_ERR(regmap)) { |
| d41f59fd CZ |
69 | pr_err("failed to init regmap\n"); |
| 70 | return PTR_ERR(regmap); | |
| 71 | } | |
| 72 | } | |
| 73 | ||
| 74 | sprd_clk_set_regmap(desc, regmap); | |
| 75 | ||
| 76 | return 0; | |
| 77 | } | |
| 78 | EXPORT_SYMBOL_GPL(sprd_clk_regmap_init); | |
| 79 | ||
| 80 | int sprd_clk_probe(struct device *dev, struct clk_hw_onecell_data *clkhw) | |
| 81 | { | |
| 82 | int i, ret; | |
| 83 | struct clk_hw *hw; | |
| 84 | ||
| 85 | for (i = 0; i < clkhw->num; i++) { | |
| f6c90df8 | 86 | const char *name; |
| d41f59fd CZ |
87 | |
| 88 | hw = clkhw->hws[i]; | |
| d41f59fd CZ |
89 | if (!hw) |
| 90 | continue; | |
| 91 | ||
| f6c90df8 | 92 | name = hw->init->name; |
| d41f59fd CZ |
93 | ret = devm_clk_hw_register(dev, hw); |
| 94 | if (ret) { | |
| 95 | dev_err(dev, "Couldn't register clock %d - %s\n", | |
| f6c90df8 | 96 | i, name); |
| d41f59fd CZ |
97 | return ret; |
| 98 | } | |
| 99 | } | |
| 100 | ||
| 101 | ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, clkhw); | |
| 102 | if (ret) | |
| 103 | dev_err(dev, "Failed to add clock provider\n"); | |
| 104 | ||
| 105 | return ret; | |
| 106 | } | |
| 107 | EXPORT_SYMBOL_GPL(sprd_clk_probe); | |
| 108 | ||
| 109 | MODULE_LICENSE("GPL v2"); |