[linux-block.git] / drivers / clk / sprd / common.c

// SPDX-License-Identifier: GPL-2.0
//
// Spreadtrum clock infrastructure
//
// Copyright (C) 2017 Spreadtrum, Inc.
// Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com>

#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>

#include "common.h"

static const struct regmap_config sprdclk_regmap_config = {
	.reg_bits	= 32,
	.reg_stride	= 4,
	.val_bits	= 32,
	.fast_io	= true,
};

static void sprd_clk_set_regmap(const struct sprd_clk_desc *desc,
			 struct regmap *regmap)
{
	int i;
	struct sprd_clk_common *cclk;

	for (i = 0; i < desc->num_clk_clks; i++) {
		cclk = desc->clk_clks[i];
		if (!cclk)
			continue;

		cclk->regmap = regmap;
	}
}

int sprd_clk_regmap_init(struct platform_device *pdev,
			 const struct sprd_clk_desc *desc)
{
	void __iomem *base;
	struct device *dev = &pdev->dev;
	struct device_node *node = dev->of_node, *np;
	struct regmap *regmap;
	struct resource *res;
	struct regmap_config reg_config = sprdclk_regmap_config;

	if (of_property_present(node, "sprd,syscon")) {
		regmap = syscon_regmap_lookup_by_phandle(node, "sprd,syscon");
		if (IS_ERR(regmap)) {
			pr_err("%s: failed to get syscon regmap\n", __func__);
			return PTR_ERR(regmap);
		}
	} else if (of_device_is_compatible(np =	of_get_parent(node), "syscon") ||
		   (of_node_put(np), 0)) {
		regmap = device_node_to_regmap(np);
		of_node_put(np);
		if (IS_ERR(regmap)) {
			dev_err(dev, "failed to get regmap from its parent.\n");
			return PTR_ERR(regmap);
		}
	} else {
		base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
		if (IS_ERR(base))
			return PTR_ERR(base);

		reg_config.max_register = resource_size(res) - reg_config.reg_stride;

		regmap = devm_regmap_init_mmio(&pdev->dev, base,
					       &reg_config);
		if (IS_ERR(regmap)) {
			pr_err("failed to init regmap\n");
			return PTR_ERR(regmap);
		}
	}

	sprd_clk_set_regmap(desc, regmap);

	return 0;
}
EXPORT_SYMBOL_GPL(sprd_clk_regmap_init);

int sprd_clk_probe(struct device *dev, struct clk_hw_onecell_data *clkhw)
{
	int i, ret;
	struct clk_hw *hw;

	for (i = 0; i < clkhw->num; i++) {
		const char *name;

		hw = clkhw->hws[i];
		if (!hw)
			continue;

		name = hw->init->name;
		ret = devm_clk_hw_register(dev, hw);
		if (ret) {
			dev_err(dev, "Couldn't register clock %d - %s\n",
				i, name);
			return ret;
		}
	}

	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, clkhw);
	if (ret)
		dev_err(dev, "Failed to add clock provider\n");

	return ret;
}
EXPORT_SYMBOL_GPL(sprd_clk_probe);

MODULE_LICENSE("GPL v2");
Commit	Line	Data
d41f59fd CZ	1	// SPDX-License-Identifier: GPL-2.0
	2	//
	3	// Spreadtrum clock infrastructure
	4	//
	5	// Copyright (C) 2017 Spreadtrum, Inc.
	6	// Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
	7
	8	#include <linux/mfd/syscon.h>
	9	#include <linux/module.h>
	10	#include <linux/of_address.h>
a96cbb14	11	#include <linux/platform_device.h>
d41f59fd CZ	12	#include <linux/regmap.h>
	13
	14	#include "common.h"
	15
	16	static const struct regmap_config sprdclk_regmap_config = {
	17	.reg_bits = 32,
	18	.reg_stride = 4,
	19	.val_bits = 32,
d41f59fd CZ	20	.fast_io = true,
	21	};
	22
	23	static void sprd_clk_set_regmap(const struct sprd_clk_desc *desc,
	24	struct regmap *regmap)
	25	{
	26	int i;
	27	struct sprd_clk_common *cclk;
	28
	29	for (i = 0; i < desc->num_clk_clks; i++) {
	30	cclk = desc->clk_clks[i];
	31	if (!cclk)
	32	continue;
	33
	34	cclk->regmap = regmap;
	35	}
	36	}
	37
	38	int sprd_clk_regmap_init(struct platform_device *pdev,
	39	const struct sprd_clk_desc *desc)
	40	{
	41	void __iomem *base;
f95e8c79	42	struct device *dev = &pdev->dev;
91e6455b	43	struct device_node node = dev->of_node, np;
d41f59fd	44	struct regmap *regmap;
47d43086 CZ	45	struct resource *res;
47d43086 CZ	46	struct regmap_config reg_config = sprdclk_regmap_config;
d41f59fd	47
d02fddf2	48	if (of_property_present(node, "sprd,syscon")) {
d41f59fd	49	regmap = syscon_regmap_lookup_by_phandle(node, "sprd,syscon");
9629dbda	50	if (IS_ERR(regmap)) {
d41f59fd CZ	51	pr_err("%s: failed to get syscon regmap\n", __func__);
	52	return PTR_ERR(regmap);
	53	}
91e6455b LH	54	} else if (of_device_is_compatible(np = of_get_parent(node), "syscon") \|\|
	55	(of_node_put(np), 0)) {
	56	regmap = device_node_to_regmap(np);
	57	of_node_put(np);
f95e8c79 CZ	58	if (IS_ERR(regmap)) {
	59	dev_err(dev, "failed to get regmap from its parent.\n");
	60	return PTR_ERR(regmap);
	61	}
d41f59fd	62	} else {
47d43086	63	base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
69b39d25 CZ	64	if (IS_ERR(base))
	65	return PTR_ERR(base);
	66
47d43086 CZ	67	reg_config.max_register = resource_size(res) - reg_config.reg_stride;
47d43086 CZ	68
d41f59fd	69	regmap = devm_regmap_init_mmio(&pdev->dev, base,
47d43086	70	&reg_config);
78f52969	71	if (IS_ERR(regmap)) {
d41f59fd CZ	72	pr_err("failed to init regmap\n");
	73	return PTR_ERR(regmap);
	74	}
	75	}
	76
	77	sprd_clk_set_regmap(desc, regmap);
	78
	79	return 0;
	80	}
	81	EXPORT_SYMBOL_GPL(sprd_clk_regmap_init);
	82
	83	int sprd_clk_probe(struct device dev, struct clk_hw_onecell_data clkhw)
	84	{
	85	int i, ret;
	86	struct clk_hw *hw;
	87
	88	for (i = 0; i < clkhw->num; i++) {
f6c90df8	89	const char *name;
d41f59fd CZ	90
d41f59fd CZ	91	hw = clkhw->hws[i];
d41f59fd CZ	92	if (!hw)
	93	continue;
	94
f6c90df8	95	name = hw->init->name;
d41f59fd CZ	96	ret = devm_clk_hw_register(dev, hw);
	97	if (ret) {
	98	dev_err(dev, "Couldn't register clock %d - %s\n",
f6c90df8	99	i, name);
d41f59fd CZ	100	return ret;
	101	}
	102	}
	103
	104	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, clkhw);
	105	if (ret)
	106	dev_err(dev, "Failed to add clock provider\n");
	107
	108	return ret;
	109	}
	110	EXPORT_SYMBOL_GPL(sprd_clk_probe);
	111
	112	MODULE_LICENSE("GPL v2");