projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 646572c7 HS |
2 | # |
| 3 | # Rockchip Clock specific Makefile | |
| 4 | # | |
| 5 | ||
| 4d98ed1e | 6 | obj-$(CONFIG_COMMON_CLK_ROCKCHIP) += clk-rockchip.o |
| 2c14736c | 7 | |
| 4d98ed1e EZ |
8 | clk-rockchip-y += clk.o |
| 9 | clk-rockchip-y += clk-pll.o | |
| 10 | clk-rockchip-y += clk-cpu.o | |
| 11 | clk-rockchip-y += clk-half-divider.o | |
| 12 | clk-rockchip-y += clk-inverter.o | |
| 13 | clk-rockchip-y += clk-mmc-phase.o | |
| 14 | clk-rockchip-y += clk-muxgrf.o | |
| 15 | clk-rockchip-y += clk-ddr.o | |
| 16 | clk-rockchip-$(CONFIG_RESET_CONTROLLER) += softrst.o | |
| 17 | ||
| 18 | obj-$(CONFIG_CLK_PX30) += clk-px30.o | |
| 19 | obj-$(CONFIG_CLK_RV110X) += clk-rv1108.o | |
| 2408ab5a | 20 | obj-$(CONFIG_CLK_RV1126) += clk-rv1126.o |
| 4d98ed1e EZ |
21 | obj-$(CONFIG_CLK_RK3036) += clk-rk3036.o |
| 22 | obj-$(CONFIG_CLK_RK312X) += clk-rk3128.o | |
| 23 | obj-$(CONFIG_CLK_RK3188) += clk-rk3188.o | |
| 24 | obj-$(CONFIG_CLK_RK322X) += clk-rk3228.o | |
| 25 | obj-$(CONFIG_CLK_RK3288) += clk-rk3288.o | |
| 26 | obj-$(CONFIG_CLK_RK3308) += clk-rk3308.o | |
| 27 | obj-$(CONFIG_CLK_RK3328) += clk-rk3328.o | |
| 28 | obj-$(CONFIG_CLK_RK3368) += clk-rk3368.o | |
| 29 | obj-$(CONFIG_CLK_RK3399) += clk-rk3399.o | |
| cf911d89 | 30 | obj-$(CONFIG_CLK_RK3568) += clk-rk3568.o |
| f1c506d1 | 31 | obj-$(CONFIG_CLK_RK3588) += clk-rk3588.o rst-rk3588.o |