Commit | Line | Data |
---|---|---|
b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
80978a4b GU |
2 | # SoC |
3 | obj-$(CONFIG_CLK_EMEV2) += clk-emev2.o | |
4 | obj-$(CONFIG_CLK_RZA1) += clk-rz.o | |
5 | obj-$(CONFIG_CLK_R8A73A4) += clk-r8a73a4.o | |
6 | obj-$(CONFIG_CLK_R8A7740) += clk-r8a7740.o | |
7 | obj-$(CONFIG_CLK_R8A7743) += r8a7743-cpg-mssr.o | |
8 | obj-$(CONFIG_CLK_R8A7745) += r8a7745-cpg-mssr.o | |
9 | obj-$(CONFIG_CLK_R8A7778) += clk-r8a7778.o | |
10 | obj-$(CONFIG_CLK_R8A7779) += clk-r8a7779.o | |
d4e59f10 | 11 | obj-$(CONFIG_CLK_R8A7790) += r8a7790-cpg-mssr.o |
6449ab81 | 12 | obj-$(CONFIG_CLK_R8A7791) += r8a7791-cpg-mssr.o |
fd3c2f38 | 13 | obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o |
2d75588a | 14 | obj-$(CONFIG_CLK_R8A7794) += r8a7794-cpg-mssr.o |
80978a4b GU |
15 | obj-$(CONFIG_CLK_R8A7795) += r8a7795-cpg-mssr.o |
16 | obj-$(CONFIG_CLK_R8A7796) += r8a7796-cpg-mssr.o | |
d71e851d | 17 | obj-$(CONFIG_CLK_R8A77995) += r8a77995-cpg-mssr.o |
80978a4b | 18 | obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o |
a5bd7f7a | 19 | |
80978a4b GU |
20 | # Family |
21 | obj-$(CONFIG_CLK_RCAR_GEN2) += clk-rcar-gen2.o | |
22 | obj-$(CONFIG_CLK_RCAR_GEN2_CPG) += rcar-gen2-cpg.o | |
23 | obj-$(CONFIG_CLK_RCAR_GEN3_CPG) += rcar-gen3-cpg.o | |
311accb6 | 24 | obj-$(CONFIG_CLK_RCAR_USB2_CLOCK_SEL) += rcar-usb2-clock-sel.o |
80978a4b GU |
25 | |
26 | # Generic | |
27 | obj-$(CONFIG_CLK_RENESAS_CPG_MSSR) += renesas-cpg-mssr.o | |
a5bd7f7a | 28 | obj-$(CONFIG_CLK_RENESAS_CPG_MSTP) += clk-mstp.o |
80978a4b | 29 | obj-$(CONFIG_CLK_RENESAS_DIV6) += clk-div6.o |