clk: qcom: apcs-msm8916: Flag a53mux instead of a53pll as critical
[linux-2.6-block.git] / drivers / clk / qcom / apcs-msm8916.c
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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Qualcomm APCS clock controller driver
4 *
5 * Copyright (c) 2017, Linaro Limited
6 * Author: Georgi Djakov <georgi.djakov@linaro.org>
7 */
8
9#include <linux/clk.h>
10#include <linux/clk-provider.h>
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/slab.h>
14#include <linux/platform_device.h>
15#include <linux/regmap.h>
16
17#include "clk-regmap.h"
18#include "clk-regmap-mux-div.h"
19
20static const u32 gpll0_a53cc_map[] = { 4, 5 };
21
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22static const struct clk_parent_data pdata[] = {
23 { .fw_name = "aux", .name = "gpll0_vote", },
24 { .fw_name = "pll", .name = "a53pll", },
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25};
26
27/*
28 * We use the notifier function for switching to a temporary safe configuration
29 * (mux and divider), while the A53 PLL is reconfigured.
30 */
31static int a53cc_notifier_cb(struct notifier_block *nb, unsigned long event,
32 void *data)
33{
34 int ret = 0;
35 struct clk_regmap_mux_div *md = container_of(nb,
36 struct clk_regmap_mux_div,
37 clk_nb);
38 if (event == PRE_RATE_CHANGE)
39 /* set the mux and divider to safe frequency (400mhz) */
40 ret = mux_div_set_src_div(md, 4, 3);
41
42 return notifier_from_errno(ret);
43}
44
45static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
46{
47 struct device *dev = &pdev->dev;
48 struct device *parent = dev->parent;
49 struct clk_regmap_mux_div *a53cc;
50 struct regmap *regmap;
51 struct clk_init_data init = { };
55c19eee 52 int ret = -ENODEV;
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53
54 regmap = dev_get_regmap(parent, NULL);
55c19eee 55 if (!regmap) {
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56 dev_err(dev, "failed to get regmap: %d\n", ret);
57 return ret;
58 }
59
60 a53cc = devm_kzalloc(dev, sizeof(*a53cc), GFP_KERNEL);
61 if (!a53cc)
62 return -ENOMEM;
63
64 init.name = "a53mux";
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65 init.parent_data = pdata;
66 init.num_parents = ARRAY_SIZE(pdata);
81ac3884 67 init.ops = &clk_regmap_mux_div_ops;
0dfe9bf9 68 init.flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT;
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69
70 a53cc->clkr.hw.init = &init;
71 a53cc->clkr.regmap = regmap;
72 a53cc->reg_offset = 0x50;
73 a53cc->hid_width = 5;
74 a53cc->hid_shift = 0;
75 a53cc->src_width = 3;
76 a53cc->src_shift = 8;
77 a53cc->parent_map = gpll0_a53cc_map;
78
79 a53cc->pclk = devm_clk_get(parent, NULL);
80 if (IS_ERR(a53cc->pclk)) {
81 ret = PTR_ERR(a53cc->pclk);
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82 if (ret != -EPROBE_DEFER)
83 dev_err(dev, "failed to get clk: %d\n", ret);
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84 return ret;
85 }
86
87 a53cc->clk_nb.notifier_call = a53cc_notifier_cb;
88 ret = clk_notifier_register(a53cc->pclk, &a53cc->clk_nb);
89 if (ret) {
90 dev_err(dev, "failed to register clock notifier: %d\n", ret);
91 return ret;
92 }
93
94 ret = devm_clk_register_regmap(dev, &a53cc->clkr);
95 if (ret) {
96 dev_err(dev, "failed to register regmap clock: %d\n", ret);
97 goto err;
98 }
99
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100 ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
101 &a53cc->clkr.hw);
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102 if (ret) {
103 dev_err(dev, "failed to add clock provider: %d\n", ret);
104 goto err;
105 }
106
107 platform_set_drvdata(pdev, a53cc);
108
109 return 0;
110
111err:
112 clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb);
113 return ret;
114}
115
116static int qcom_apcs_msm8916_clk_remove(struct platform_device *pdev)
117{
118 struct clk_regmap_mux_div *a53cc = platform_get_drvdata(pdev);
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119
120 clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb);
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121
122 return 0;
123}
124
125static struct platform_driver qcom_apcs_msm8916_clk_driver = {
126 .probe = qcom_apcs_msm8916_clk_probe,
127 .remove = qcom_apcs_msm8916_clk_remove,
128 .driver = {
129 .name = "qcom-apcs-msm8916-clk",
130 },
131};
132module_platform_driver(qcom_apcs_msm8916_clk_driver);
133
134MODULE_AUTHOR("Georgi Djakov <georgi.djakov@linaro.org>");
135MODULE_LICENSE("GPL v2");
136MODULE_DESCRIPTION("Qualcomm MSM8916 APCS clock driver");