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aad739f9 DL |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
3 | * PSC clock descriptions for TI DaVinci DM646x | |
4 | * | |
5 | * Copyright (C) 2018 David Lechner <david@lechnology.com> | |
6 | */ | |
7 | ||
8 | #include <linux/clk-provider.h> | |
043eaa70 | 9 | #include <linux/clk/davinci.h> |
aad739f9 DL |
10 | #include <linux/clk.h> |
11 | #include <linux/clkdev.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/types.h> | |
15 | ||
16 | #include "psc.h" | |
17 | ||
18 | LPSC_CLKDEV1(ide_clkdev, NULL, "palm_bk3710"); | |
19 | LPSC_CLKDEV2(emac_clkdev, NULL, "davinci_emac.1", | |
20 | "fck", "davinci_mdio.0"); | |
b910f74a BG |
21 | LPSC_CLKDEV2(aemif_clkdev, "aemif", NULL, |
22 | NULL, "ti-aemif"); | |
aad739f9 DL |
23 | LPSC_CLKDEV1(mcasp0_clkdev, NULL, "davinci-mcasp.0"); |
24 | LPSC_CLKDEV1(mcasp1_clkdev, NULL, "davinci-mcasp.1"); | |
25 | LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0"); | |
26 | LPSC_CLKDEV1(uart1_clkdev, NULL, "serial8250.1"); | |
27 | LPSC_CLKDEV1(uart2_clkdev, NULL, "serial8250.2"); | |
28 | LPSC_CLKDEV1(i2c_clkdev, NULL, "i2c_davinci.1"); | |
29 | /* REVISIT: gpio-davinci.c should be modified to drop con_id */ | |
30 | LPSC_CLKDEV1(gpio_clkdev, "gpio", NULL); | |
31 | LPSC_CLKDEV1(timer0_clkdev, "timer0", NULL); | |
32 | ||
33 | static const struct davinci_lpsc_clk_info dm646x_psc_info[] = { | |
34 | LPSC(0, 0, arm, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED), | |
35 | /* REVISIT how to disable? */ | |
36 | LPSC(1, 0, dsp, pll1_sysclk1, NULL, LPSC_ALWAYS_ENABLED), | |
37 | LPSC(4, 0, edma_cc, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED), | |
38 | LPSC(5, 0, edma_tc0, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED), | |
39 | LPSC(6, 0, edma_tc1, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED), | |
40 | LPSC(7, 0, edma_tc2, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED), | |
41 | LPSC(8, 0, edma_tc3, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED), | |
42 | LPSC(10, 0, ide, pll1_sysclk4, ide_clkdev, 0), | |
43 | LPSC(14, 0, emac, pll1_sysclk3, emac_clkdev, 0), | |
44 | LPSC(16, 0, vpif0, ref_clk, NULL, LPSC_ALWAYS_ENABLED), | |
45 | LPSC(17, 0, vpif1, ref_clk, NULL, LPSC_ALWAYS_ENABLED), | |
46 | LPSC(21, 0, aemif, pll1_sysclk3, aemif_clkdev, LPSC_ALWAYS_ENABLED), | |
47 | LPSC(22, 0, mcasp0, pll1_sysclk3, mcasp0_clkdev, 0), | |
48 | LPSC(23, 0, mcasp1, pll1_sysclk3, mcasp1_clkdev, 0), | |
49 | LPSC(26, 0, uart0, aux_clkin, uart0_clkdev, 0), | |
50 | LPSC(27, 0, uart1, aux_clkin, uart1_clkdev, 0), | |
51 | LPSC(28, 0, uart2, aux_clkin, uart2_clkdev, 0), | |
52 | /* REVIST: disabling hangs system */ | |
53 | LPSC(29, 0, pwm0, pll1_sysclk3, NULL, LPSC_ALWAYS_ENABLED), | |
54 | /* REVIST: disabling hangs system */ | |
55 | LPSC(30, 0, pwm1, pll1_sysclk3, NULL, LPSC_ALWAYS_ENABLED), | |
56 | LPSC(31, 0, i2c, pll1_sysclk3, i2c_clkdev, 0), | |
57 | LPSC(33, 0, gpio, pll1_sysclk3, gpio_clkdev, 0), | |
58 | LPSC(34, 0, timer0, pll1_sysclk3, timer0_clkdev, LPSC_ALWAYS_ENABLED), | |
59 | LPSC(35, 0, timer1, pll1_sysclk3, NULL, 0), | |
60 | { } | |
61 | }; | |
62 | ||
043eaa70 | 63 | int dm646x_psc_init(struct device *dev, void __iomem *base) |
aad739f9 DL |
64 | { |
65 | return davinci_psc_register_clocks(dev, dm646x_psc_info, 46, base); | |
66 | } | |
67 | ||
68 | static struct clk_bulk_data dm646x_psc_parent_clks[] = { | |
69 | { .id = "ref_clk" }, | |
70 | { .id = "aux_clkin" }, | |
71 | { .id = "pll1_sysclk1" }, | |
72 | { .id = "pll1_sysclk2" }, | |
73 | { .id = "pll1_sysclk3" }, | |
74 | { .id = "pll1_sysclk4" }, | |
75 | { .id = "pll1_sysclk5" }, | |
76 | }; | |
77 | ||
78 | const struct davinci_psc_init_data dm646x_psc_init_data = { | |
79 | .parent_clks = dm646x_psc_parent_clks, | |
80 | .num_parent_clks = ARRAY_SIZE(dm646x_psc_parent_clks), | |
81 | .psc_init = &dm646x_psc_init, | |
82 | }; |