Merge tag 'usb-4.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
[linux-2.6-block.git] / drivers / clk / clk.c
CommitLineData
b2476490
MT
1/*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Standard functionality for the common clock API. See Documentation/clk.txt
10 */
11
3c373117 12#include <linux/clk.h>
b09d6d99 13#include <linux/clk-provider.h>
86be408b 14#include <linux/clk/clk-conf.h>
b2476490
MT
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/spinlock.h>
18#include <linux/err.h>
19#include <linux/list.h>
20#include <linux/slab.h>
766e6a4e 21#include <linux/of.h>
46c8773a 22#include <linux/device.h>
f2f6c255 23#include <linux/init.h>
533ddeb1 24#include <linux/sched.h>
562ef0b0 25#include <linux/clkdev.h>
b2476490 26
d6782c26
SN
27#include "clk.h"
28
b2476490
MT
29static DEFINE_SPINLOCK(enable_lock);
30static DEFINE_MUTEX(prepare_lock);
31
533ddeb1
MT
32static struct task_struct *prepare_owner;
33static struct task_struct *enable_owner;
34
35static int prepare_refcnt;
36static int enable_refcnt;
37
b2476490
MT
38static HLIST_HEAD(clk_root_list);
39static HLIST_HEAD(clk_orphan_list);
40static LIST_HEAD(clk_notifier_list);
41
b09d6d99
MT
42/*** private data structures ***/
43
44struct clk_core {
45 const char *name;
46 const struct clk_ops *ops;
47 struct clk_hw *hw;
48 struct module *owner;
49 struct clk_core *parent;
50 const char **parent_names;
51 struct clk_core **parents;
52 u8 num_parents;
53 u8 new_parent_index;
54 unsigned long rate;
1c8e6004 55 unsigned long req_rate;
b09d6d99
MT
56 unsigned long new_rate;
57 struct clk_core *new_parent;
58 struct clk_core *new_child;
59 unsigned long flags;
e6500344 60 bool orphan;
b09d6d99
MT
61 unsigned int enable_count;
62 unsigned int prepare_count;
9783c0d9
SB
63 unsigned long min_rate;
64 unsigned long max_rate;
b09d6d99
MT
65 unsigned long accuracy;
66 int phase;
67 struct hlist_head children;
68 struct hlist_node child_node;
1c8e6004 69 struct hlist_head clks;
b09d6d99
MT
70 unsigned int notifier_count;
71#ifdef CONFIG_DEBUG_FS
72 struct dentry *dentry;
8c9a8a8f 73 struct hlist_node debug_node;
b09d6d99
MT
74#endif
75 struct kref ref;
76};
77
dfc202ea
SB
78#define CREATE_TRACE_POINTS
79#include <trace/events/clk.h>
80
b09d6d99
MT
81struct clk {
82 struct clk_core *core;
83 const char *dev_id;
84 const char *con_id;
1c8e6004
TV
85 unsigned long min_rate;
86 unsigned long max_rate;
50595f8b 87 struct hlist_node clks_node;
b09d6d99
MT
88};
89
eab89f69
MT
90/*** locking ***/
91static void clk_prepare_lock(void)
92{
533ddeb1
MT
93 if (!mutex_trylock(&prepare_lock)) {
94 if (prepare_owner == current) {
95 prepare_refcnt++;
96 return;
97 }
98 mutex_lock(&prepare_lock);
99 }
100 WARN_ON_ONCE(prepare_owner != NULL);
101 WARN_ON_ONCE(prepare_refcnt != 0);
102 prepare_owner = current;
103 prepare_refcnt = 1;
eab89f69
MT
104}
105
106static void clk_prepare_unlock(void)
107{
533ddeb1
MT
108 WARN_ON_ONCE(prepare_owner != current);
109 WARN_ON_ONCE(prepare_refcnt == 0);
110
111 if (--prepare_refcnt)
112 return;
113 prepare_owner = NULL;
eab89f69
MT
114 mutex_unlock(&prepare_lock);
115}
116
117static unsigned long clk_enable_lock(void)
a57aa185 118 __acquires(enable_lock)
eab89f69
MT
119{
120 unsigned long flags;
533ddeb1
MT
121
122 if (!spin_trylock_irqsave(&enable_lock, flags)) {
123 if (enable_owner == current) {
124 enable_refcnt++;
a57aa185 125 __acquire(enable_lock);
533ddeb1
MT
126 return flags;
127 }
128 spin_lock_irqsave(&enable_lock, flags);
129 }
130 WARN_ON_ONCE(enable_owner != NULL);
131 WARN_ON_ONCE(enable_refcnt != 0);
132 enable_owner = current;
133 enable_refcnt = 1;
eab89f69
MT
134 return flags;
135}
136
137static void clk_enable_unlock(unsigned long flags)
a57aa185 138 __releases(enable_lock)
eab89f69 139{
533ddeb1
MT
140 WARN_ON_ONCE(enable_owner != current);
141 WARN_ON_ONCE(enable_refcnt == 0);
142
a57aa185
SB
143 if (--enable_refcnt) {
144 __release(enable_lock);
533ddeb1 145 return;
a57aa185 146 }
533ddeb1 147 enable_owner = NULL;
eab89f69
MT
148 spin_unlock_irqrestore(&enable_lock, flags);
149}
150
4dff95dc
SB
151static bool clk_core_is_prepared(struct clk_core *core)
152{
153 /*
154 * .is_prepared is optional for clocks that can prepare
155 * fall back to software usage counter if it is missing
156 */
157 if (!core->ops->is_prepared)
158 return core->prepare_count;
b2476490 159
4dff95dc
SB
160 return core->ops->is_prepared(core->hw);
161}
b2476490 162
4dff95dc
SB
163static bool clk_core_is_enabled(struct clk_core *core)
164{
165 /*
166 * .is_enabled is only mandatory for clocks that gate
167 * fall back to software usage counter if .is_enabled is missing
168 */
169 if (!core->ops->is_enabled)
170 return core->enable_count;
6b44c854 171
4dff95dc
SB
172 return core->ops->is_enabled(core->hw);
173}
6b44c854 174
4dff95dc 175static void clk_unprepare_unused_subtree(struct clk_core *core)
1af599df 176{
4dff95dc
SB
177 struct clk_core *child;
178
179 lockdep_assert_held(&prepare_lock);
180
181 hlist_for_each_entry(child, &core->children, child_node)
182 clk_unprepare_unused_subtree(child);
183
184 if (core->prepare_count)
1af599df
PG
185 return;
186
4dff95dc
SB
187 if (core->flags & CLK_IGNORE_UNUSED)
188 return;
189
190 if (clk_core_is_prepared(core)) {
191 trace_clk_unprepare(core);
192 if (core->ops->unprepare_unused)
193 core->ops->unprepare_unused(core->hw);
194 else if (core->ops->unprepare)
195 core->ops->unprepare(core->hw);
196 trace_clk_unprepare_complete(core);
197 }
1af599df
PG
198}
199
4dff95dc 200static void clk_disable_unused_subtree(struct clk_core *core)
1af599df 201{
035a61c3 202 struct clk_core *child;
4dff95dc 203 unsigned long flags;
1af599df 204
4dff95dc 205 lockdep_assert_held(&prepare_lock);
1af599df 206
4dff95dc
SB
207 hlist_for_each_entry(child, &core->children, child_node)
208 clk_disable_unused_subtree(child);
1af599df 209
4dff95dc
SB
210 flags = clk_enable_lock();
211
212 if (core->enable_count)
213 goto unlock_out;
214
215 if (core->flags & CLK_IGNORE_UNUSED)
216 goto unlock_out;
217
218 /*
219 * some gate clocks have special needs during the disable-unused
220 * sequence. call .disable_unused if available, otherwise fall
221 * back to .disable
222 */
223 if (clk_core_is_enabled(core)) {
224 trace_clk_disable(core);
225 if (core->ops->disable_unused)
226 core->ops->disable_unused(core->hw);
227 else if (core->ops->disable)
228 core->ops->disable(core->hw);
229 trace_clk_disable_complete(core);
230 }
231
232unlock_out:
233 clk_enable_unlock(flags);
1af599df
PG
234}
235
4dff95dc
SB
236static bool clk_ignore_unused;
237static int __init clk_ignore_unused_setup(char *__unused)
1af599df 238{
4dff95dc
SB
239 clk_ignore_unused = true;
240 return 1;
241}
242__setup("clk_ignore_unused", clk_ignore_unused_setup);
1af599df 243
4dff95dc
SB
244static int clk_disable_unused(void)
245{
246 struct clk_core *core;
247
248 if (clk_ignore_unused) {
249 pr_warn("clk: Not disabling unused clocks\n");
250 return 0;
251 }
1af599df 252
eab89f69 253 clk_prepare_lock();
1af599df 254
4dff95dc
SB
255 hlist_for_each_entry(core, &clk_root_list, child_node)
256 clk_disable_unused_subtree(core);
257
258 hlist_for_each_entry(core, &clk_orphan_list, child_node)
259 clk_disable_unused_subtree(core);
260
261 hlist_for_each_entry(core, &clk_root_list, child_node)
262 clk_unprepare_unused_subtree(core);
263
264 hlist_for_each_entry(core, &clk_orphan_list, child_node)
265 clk_unprepare_unused_subtree(core);
1af599df 266
eab89f69 267 clk_prepare_unlock();
1af599df
PG
268
269 return 0;
270}
4dff95dc 271late_initcall_sync(clk_disable_unused);
1af599df 272
4dff95dc 273/*** helper functions ***/
1af599df 274
4dff95dc 275const char *__clk_get_name(struct clk *clk)
1af599df 276{
4dff95dc 277 return !clk ? NULL : clk->core->name;
1af599df 278}
4dff95dc 279EXPORT_SYMBOL_GPL(__clk_get_name);
1af599df 280
e7df6f6e 281const char *clk_hw_get_name(const struct clk_hw *hw)
1a9c069c
SB
282{
283 return hw->core->name;
284}
285EXPORT_SYMBOL_GPL(clk_hw_get_name);
286
4dff95dc
SB
287struct clk_hw *__clk_get_hw(struct clk *clk)
288{
289 return !clk ? NULL : clk->core->hw;
290}
291EXPORT_SYMBOL_GPL(__clk_get_hw);
1af599df 292
e7df6f6e 293unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
1a9c069c
SB
294{
295 return hw->core->num_parents;
296}
297EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
298
e7df6f6e 299struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw)
1a9c069c
SB
300{
301 return hw->core->parent ? hw->core->parent->hw : NULL;
302}
303EXPORT_SYMBOL_GPL(clk_hw_get_parent);
304
4dff95dc
SB
305static struct clk_core *__clk_lookup_subtree(const char *name,
306 struct clk_core *core)
bddca894 307{
035a61c3 308 struct clk_core *child;
4dff95dc 309 struct clk_core *ret;
bddca894 310
4dff95dc
SB
311 if (!strcmp(core->name, name))
312 return core;
bddca894 313
4dff95dc
SB
314 hlist_for_each_entry(child, &core->children, child_node) {
315 ret = __clk_lookup_subtree(name, child);
316 if (ret)
317 return ret;
bddca894
PG
318 }
319
4dff95dc 320 return NULL;
bddca894
PG
321}
322
4dff95dc 323static struct clk_core *clk_core_lookup(const char *name)
bddca894 324{
4dff95dc
SB
325 struct clk_core *root_clk;
326 struct clk_core *ret;
bddca894 327
4dff95dc
SB
328 if (!name)
329 return NULL;
bddca894 330
4dff95dc
SB
331 /* search the 'proper' clk tree first */
332 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
333 ret = __clk_lookup_subtree(name, root_clk);
334 if (ret)
335 return ret;
bddca894
PG
336 }
337
4dff95dc
SB
338 /* if not found, then search the orphan tree */
339 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
340 ret = __clk_lookup_subtree(name, root_clk);
341 if (ret)
342 return ret;
343 }
bddca894 344
4dff95dc 345 return NULL;
bddca894
PG
346}
347
4dff95dc
SB
348static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
349 u8 index)
bddca894 350{
4dff95dc
SB
351 if (!core || index >= core->num_parents)
352 return NULL;
353 else if (!core->parents)
354 return clk_core_lookup(core->parent_names[index]);
355 else if (!core->parents[index])
356 return core->parents[index] =
357 clk_core_lookup(core->parent_names[index]);
358 else
359 return core->parents[index];
bddca894
PG
360}
361
e7df6f6e
SB
362struct clk_hw *
363clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
1a9c069c
SB
364{
365 struct clk_core *parent;
366
367 parent = clk_core_get_parent_by_index(hw->core, index);
368
369 return !parent ? NULL : parent->hw;
370}
371EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
372
4dff95dc
SB
373unsigned int __clk_get_enable_count(struct clk *clk)
374{
375 return !clk ? 0 : clk->core->enable_count;
376}
b2476490 377
4dff95dc
SB
378static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
379{
380 unsigned long ret;
b2476490 381
4dff95dc
SB
382 if (!core) {
383 ret = 0;
384 goto out;
385 }
b2476490 386
4dff95dc 387 ret = core->rate;
b2476490 388
4dff95dc
SB
389 if (core->flags & CLK_IS_ROOT)
390 goto out;
c646cbf1 391
4dff95dc
SB
392 if (!core->parent)
393 ret = 0;
b2476490 394
b2476490
MT
395out:
396 return ret;
397}
398
e7df6f6e 399unsigned long clk_hw_get_rate(const struct clk_hw *hw)
1a9c069c
SB
400{
401 return clk_core_get_rate_nolock(hw->core);
402}
403EXPORT_SYMBOL_GPL(clk_hw_get_rate);
404
4dff95dc
SB
405static unsigned long __clk_get_accuracy(struct clk_core *core)
406{
407 if (!core)
408 return 0;
b2476490 409
4dff95dc 410 return core->accuracy;
b2476490
MT
411}
412
4dff95dc 413unsigned long __clk_get_flags(struct clk *clk)
fcb0ee6a 414{
4dff95dc 415 return !clk ? 0 : clk->core->flags;
fcb0ee6a 416}
4dff95dc 417EXPORT_SYMBOL_GPL(__clk_get_flags);
fcb0ee6a 418
e7df6f6e 419unsigned long clk_hw_get_flags(const struct clk_hw *hw)
1a9c069c
SB
420{
421 return hw->core->flags;
422}
423EXPORT_SYMBOL_GPL(clk_hw_get_flags);
424
e7df6f6e 425bool clk_hw_is_prepared(const struct clk_hw *hw)
1a9c069c
SB
426{
427 return clk_core_is_prepared(hw->core);
428}
429
4dff95dc 430bool __clk_is_enabled(struct clk *clk)
b2476490 431{
4dff95dc
SB
432 if (!clk)
433 return false;
b2476490 434
4dff95dc
SB
435 return clk_core_is_enabled(clk->core);
436}
437EXPORT_SYMBOL_GPL(__clk_is_enabled);
b2476490 438
4dff95dc
SB
439static bool mux_is_better_rate(unsigned long rate, unsigned long now,
440 unsigned long best, unsigned long flags)
441{
442 if (flags & CLK_MUX_ROUND_CLOSEST)
443 return abs(now - rate) < abs(best - rate);
1af599df 444
4dff95dc
SB
445 return now <= rate && now > best;
446}
bddca894 447
0817b62c
BB
448static int
449clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req,
4dff95dc
SB
450 unsigned long flags)
451{
452 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
0817b62c
BB
453 int i, num_parents, ret;
454 unsigned long best = 0;
455 struct clk_rate_request parent_req = *req;
b2476490 456
4dff95dc
SB
457 /* if NO_REPARENT flag set, pass through to current parent */
458 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
459 parent = core->parent;
0817b62c
BB
460 if (core->flags & CLK_SET_RATE_PARENT) {
461 ret = __clk_determine_rate(parent ? parent->hw : NULL,
462 &parent_req);
463 if (ret)
464 return ret;
465
466 best = parent_req.rate;
467 } else if (parent) {
4dff95dc 468 best = clk_core_get_rate_nolock(parent);
0817b62c 469 } else {
4dff95dc 470 best = clk_core_get_rate_nolock(core);
0817b62c
BB
471 }
472
4dff95dc
SB
473 goto out;
474 }
b2476490 475
4dff95dc
SB
476 /* find the parent that can provide the fastest rate <= rate */
477 num_parents = core->num_parents;
478 for (i = 0; i < num_parents; i++) {
479 parent = clk_core_get_parent_by_index(core, i);
480 if (!parent)
481 continue;
0817b62c
BB
482
483 if (core->flags & CLK_SET_RATE_PARENT) {
484 parent_req = *req;
485 ret = __clk_determine_rate(parent->hw, &parent_req);
486 if (ret)
487 continue;
488 } else {
489 parent_req.rate = clk_core_get_rate_nolock(parent);
490 }
491
492 if (mux_is_better_rate(req->rate, parent_req.rate,
493 best, flags)) {
4dff95dc 494 best_parent = parent;
0817b62c 495 best = parent_req.rate;
4dff95dc
SB
496 }
497 }
b2476490 498
57d866e6
BB
499 if (!best_parent)
500 return -EINVAL;
501
4dff95dc
SB
502out:
503 if (best_parent)
0817b62c
BB
504 req->best_parent_hw = best_parent->hw;
505 req->best_parent_rate = best;
506 req->rate = best;
b2476490 507
0817b62c 508 return 0;
b33d212f 509}
4dff95dc
SB
510
511struct clk *__clk_lookup(const char *name)
fcb0ee6a 512{
4dff95dc
SB
513 struct clk_core *core = clk_core_lookup(name);
514
515 return !core ? NULL : core->hw->clk;
fcb0ee6a 516}
b2476490 517
4dff95dc
SB
518static void clk_core_get_boundaries(struct clk_core *core,
519 unsigned long *min_rate,
520 unsigned long *max_rate)
1c155b3d 521{
4dff95dc 522 struct clk *clk_user;
1c155b3d 523
9783c0d9
SB
524 *min_rate = core->min_rate;
525 *max_rate = core->max_rate;
496eadf8 526
4dff95dc
SB
527 hlist_for_each_entry(clk_user, &core->clks, clks_node)
528 *min_rate = max(*min_rate, clk_user->min_rate);
1c155b3d 529
4dff95dc
SB
530 hlist_for_each_entry(clk_user, &core->clks, clks_node)
531 *max_rate = min(*max_rate, clk_user->max_rate);
532}
1c155b3d 533
9783c0d9
SB
534void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
535 unsigned long max_rate)
536{
537 hw->core->min_rate = min_rate;
538 hw->core->max_rate = max_rate;
539}
540EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
541
4dff95dc
SB
542/*
543 * Helper for finding best parent to provide a given frequency. This can be used
544 * directly as a determine_rate callback (e.g. for a mux), or from a more
545 * complex clock that may combine a mux with other operations.
546 */
0817b62c
BB
547int __clk_mux_determine_rate(struct clk_hw *hw,
548 struct clk_rate_request *req)
4dff95dc 549{
0817b62c 550 return clk_mux_determine_rate_flags(hw, req, 0);
1c155b3d 551}
4dff95dc 552EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
1c155b3d 553
0817b62c
BB
554int __clk_mux_determine_rate_closest(struct clk_hw *hw,
555 struct clk_rate_request *req)
b2476490 556{
0817b62c 557 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
4dff95dc
SB
558}
559EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
b2476490 560
4dff95dc 561/*** clk api ***/
496eadf8 562
4dff95dc
SB
563static void clk_core_unprepare(struct clk_core *core)
564{
a6334725
SB
565 lockdep_assert_held(&prepare_lock);
566
4dff95dc
SB
567 if (!core)
568 return;
b2476490 569
4dff95dc
SB
570 if (WARN_ON(core->prepare_count == 0))
571 return;
b2476490 572
4dff95dc
SB
573 if (--core->prepare_count > 0)
574 return;
b2476490 575
4dff95dc 576 WARN_ON(core->enable_count > 0);
b2476490 577
4dff95dc 578 trace_clk_unprepare(core);
b2476490 579
4dff95dc
SB
580 if (core->ops->unprepare)
581 core->ops->unprepare(core->hw);
582
583 trace_clk_unprepare_complete(core);
584 clk_core_unprepare(core->parent);
b2476490
MT
585}
586
4dff95dc
SB
587/**
588 * clk_unprepare - undo preparation of a clock source
589 * @clk: the clk being unprepared
590 *
591 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
592 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
593 * if the operation may sleep. One example is a clk which is accessed over
594 * I2c. In the complex case a clk gate operation may require a fast and a slow
595 * part. It is this reason that clk_unprepare and clk_disable are not mutually
596 * exclusive. In fact clk_disable must be called before clk_unprepare.
597 */
598void clk_unprepare(struct clk *clk)
1e435256 599{
4dff95dc
SB
600 if (IS_ERR_OR_NULL(clk))
601 return;
602
603 clk_prepare_lock();
604 clk_core_unprepare(clk->core);
605 clk_prepare_unlock();
1e435256 606}
4dff95dc 607EXPORT_SYMBOL_GPL(clk_unprepare);
1e435256 608
4dff95dc 609static int clk_core_prepare(struct clk_core *core)
b2476490 610{
4dff95dc 611 int ret = 0;
b2476490 612
a6334725
SB
613 lockdep_assert_held(&prepare_lock);
614
4dff95dc 615 if (!core)
1e435256 616 return 0;
1e435256 617
4dff95dc
SB
618 if (core->prepare_count == 0) {
619 ret = clk_core_prepare(core->parent);
620 if (ret)
621 return ret;
b2476490 622
4dff95dc 623 trace_clk_prepare(core);
b2476490 624
4dff95dc
SB
625 if (core->ops->prepare)
626 ret = core->ops->prepare(core->hw);
b2476490 627
4dff95dc 628 trace_clk_prepare_complete(core);
1c155b3d 629
4dff95dc
SB
630 if (ret) {
631 clk_core_unprepare(core->parent);
632 return ret;
633 }
634 }
1c155b3d 635
4dff95dc 636 core->prepare_count++;
b2476490
MT
637
638 return 0;
639}
b2476490 640
4dff95dc
SB
641/**
642 * clk_prepare - prepare a clock source
643 * @clk: the clk being prepared
644 *
645 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
646 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
647 * operation may sleep. One example is a clk which is accessed over I2c. In
648 * the complex case a clk ungate operation may require a fast and a slow part.
649 * It is this reason that clk_prepare and clk_enable are not mutually
650 * exclusive. In fact clk_prepare must be called before clk_enable.
651 * Returns 0 on success, -EERROR otherwise.
652 */
653int clk_prepare(struct clk *clk)
b2476490 654{
4dff95dc 655 int ret;
b2476490 656
4dff95dc
SB
657 if (!clk)
658 return 0;
b2476490 659
4dff95dc
SB
660 clk_prepare_lock();
661 ret = clk_core_prepare(clk->core);
662 clk_prepare_unlock();
663
664 return ret;
b2476490 665}
4dff95dc 666EXPORT_SYMBOL_GPL(clk_prepare);
b2476490 667
4dff95dc 668static void clk_core_disable(struct clk_core *core)
b2476490 669{
a6334725
SB
670 lockdep_assert_held(&enable_lock);
671
4dff95dc
SB
672 if (!core)
673 return;
035a61c3 674
4dff95dc
SB
675 if (WARN_ON(core->enable_count == 0))
676 return;
b2476490 677
4dff95dc
SB
678 if (--core->enable_count > 0)
679 return;
035a61c3 680
4dff95dc 681 trace_clk_disable(core);
035a61c3 682
4dff95dc
SB
683 if (core->ops->disable)
684 core->ops->disable(core->hw);
035a61c3 685
4dff95dc 686 trace_clk_disable_complete(core);
035a61c3 687
4dff95dc 688 clk_core_disable(core->parent);
035a61c3 689}
7ef3dcc8 690
4dff95dc
SB
691/**
692 * clk_disable - gate a clock
693 * @clk: the clk being gated
694 *
695 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
696 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
697 * clk if the operation is fast and will never sleep. One example is a
698 * SoC-internal clk which is controlled via simple register writes. In the
699 * complex case a clk gate operation may require a fast and a slow part. It is
700 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
701 * In fact clk_disable must be called before clk_unprepare.
702 */
703void clk_disable(struct clk *clk)
b2476490 704{
4dff95dc
SB
705 unsigned long flags;
706
707 if (IS_ERR_OR_NULL(clk))
708 return;
709
710 flags = clk_enable_lock();
711 clk_core_disable(clk->core);
712 clk_enable_unlock(flags);
b2476490 713}
4dff95dc 714EXPORT_SYMBOL_GPL(clk_disable);
b2476490 715
4dff95dc 716static int clk_core_enable(struct clk_core *core)
b2476490 717{
4dff95dc 718 int ret = 0;
b2476490 719
a6334725
SB
720 lockdep_assert_held(&enable_lock);
721
4dff95dc
SB
722 if (!core)
723 return 0;
b2476490 724
4dff95dc
SB
725 if (WARN_ON(core->prepare_count == 0))
726 return -ESHUTDOWN;
b2476490 727
4dff95dc
SB
728 if (core->enable_count == 0) {
729 ret = clk_core_enable(core->parent);
b2476490 730
4dff95dc
SB
731 if (ret)
732 return ret;
b2476490 733
4dff95dc 734 trace_clk_enable(core);
035a61c3 735
4dff95dc
SB
736 if (core->ops->enable)
737 ret = core->ops->enable(core->hw);
035a61c3 738
4dff95dc
SB
739 trace_clk_enable_complete(core);
740
741 if (ret) {
742 clk_core_disable(core->parent);
743 return ret;
744 }
745 }
746
747 core->enable_count++;
748 return 0;
035a61c3 749}
b2476490 750
4dff95dc
SB
751/**
752 * clk_enable - ungate a clock
753 * @clk: the clk being ungated
754 *
755 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
756 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
757 * if the operation will never sleep. One example is a SoC-internal clk which
758 * is controlled via simple register writes. In the complex case a clk ungate
759 * operation may require a fast and a slow part. It is this reason that
760 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
761 * must be called before clk_enable. Returns 0 on success, -EERROR
762 * otherwise.
763 */
764int clk_enable(struct clk *clk)
5279fc40 765{
4dff95dc
SB
766 unsigned long flags;
767 int ret;
768
769 if (!clk)
5279fc40
BB
770 return 0;
771
4dff95dc
SB
772 flags = clk_enable_lock();
773 ret = clk_core_enable(clk->core);
774 clk_enable_unlock(flags);
5279fc40 775
4dff95dc 776 return ret;
b2476490 777}
4dff95dc 778EXPORT_SYMBOL_GPL(clk_enable);
b2476490 779
0817b62c
BB
780static int clk_core_round_rate_nolock(struct clk_core *core,
781 struct clk_rate_request *req)
3d6ee287 782{
4dff95dc 783 struct clk_core *parent;
0817b62c 784 long rate;
4dff95dc
SB
785
786 lockdep_assert_held(&prepare_lock);
3d6ee287 787
d6968fca 788 if (!core)
4dff95dc 789 return 0;
3d6ee287 790
4dff95dc 791 parent = core->parent;
0817b62c
BB
792 if (parent) {
793 req->best_parent_hw = parent->hw;
794 req->best_parent_rate = parent->rate;
795 } else {
796 req->best_parent_hw = NULL;
797 req->best_parent_rate = 0;
798 }
3d6ee287 799
4dff95dc 800 if (core->ops->determine_rate) {
0817b62c
BB
801 return core->ops->determine_rate(core->hw, req);
802 } else if (core->ops->round_rate) {
803 rate = core->ops->round_rate(core->hw, req->rate,
804 &req->best_parent_rate);
805 if (rate < 0)
806 return rate;
807
808 req->rate = rate;
809 } else if (core->flags & CLK_SET_RATE_PARENT) {
810 return clk_core_round_rate_nolock(parent, req);
811 } else {
812 req->rate = core->rate;
813 }
814
815 return 0;
3d6ee287
UH
816}
817
4dff95dc
SB
818/**
819 * __clk_determine_rate - get the closest rate actually supported by a clock
820 * @hw: determine the rate of this clock
821 * @rate: target rate
822 * @min_rate: returned rate must be greater than this rate
823 * @max_rate: returned rate must be less than this rate
824 *
6e5ab41b 825 * Useful for clk_ops such as .set_rate and .determine_rate.
4dff95dc 826 */
0817b62c 827int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
035a61c3 828{
0817b62c
BB
829 if (!hw) {
830 req->rate = 0;
4dff95dc 831 return 0;
0817b62c 832 }
035a61c3 833
0817b62c 834 return clk_core_round_rate_nolock(hw->core, req);
035a61c3 835}
4dff95dc 836EXPORT_SYMBOL_GPL(__clk_determine_rate);
035a61c3 837
1a9c069c
SB
838unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
839{
840 int ret;
841 struct clk_rate_request req;
842
843 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
844 req.rate = rate;
845
846 ret = clk_core_round_rate_nolock(hw->core, &req);
847 if (ret)
848 return 0;
849
850 return req.rate;
851}
852EXPORT_SYMBOL_GPL(clk_hw_round_rate);
853
4dff95dc
SB
854/**
855 * clk_round_rate - round the given rate for a clk
856 * @clk: the clk for which we are rounding a rate
857 * @rate: the rate which is to be rounded
858 *
859 * Takes in a rate as input and rounds it to a rate that the clk can actually
860 * use which is then returned. If clk doesn't support round_rate operation
861 * then the parent rate is returned.
862 */
863long clk_round_rate(struct clk *clk, unsigned long rate)
035a61c3 864{
fc4a05d4
SB
865 struct clk_rate_request req;
866 int ret;
4dff95dc 867
035a61c3 868 if (!clk)
4dff95dc 869 return 0;
035a61c3 870
4dff95dc 871 clk_prepare_lock();
fc4a05d4
SB
872
873 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
874 req.rate = rate;
875
876 ret = clk_core_round_rate_nolock(clk->core, &req);
4dff95dc
SB
877 clk_prepare_unlock();
878
fc4a05d4
SB
879 if (ret)
880 return ret;
881
882 return req.rate;
035a61c3 883}
4dff95dc 884EXPORT_SYMBOL_GPL(clk_round_rate);
b2476490 885
4dff95dc
SB
886/**
887 * __clk_notify - call clk notifier chain
888 * @core: clk that is changing rate
889 * @msg: clk notifier type (see include/linux/clk.h)
890 * @old_rate: old clk rate
891 * @new_rate: new clk rate
892 *
893 * Triggers a notifier call chain on the clk rate-change notification
894 * for 'clk'. Passes a pointer to the struct clk and the previous
895 * and current rates to the notifier callback. Intended to be called by
896 * internal clock code only. Returns NOTIFY_DONE from the last driver
897 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
898 * a driver returns that.
899 */
900static int __clk_notify(struct clk_core *core, unsigned long msg,
901 unsigned long old_rate, unsigned long new_rate)
b2476490 902{
4dff95dc
SB
903 struct clk_notifier *cn;
904 struct clk_notifier_data cnd;
905 int ret = NOTIFY_DONE;
b2476490 906
4dff95dc
SB
907 cnd.old_rate = old_rate;
908 cnd.new_rate = new_rate;
b2476490 909
4dff95dc
SB
910 list_for_each_entry(cn, &clk_notifier_list, node) {
911 if (cn->clk->core == core) {
912 cnd.clk = cn->clk;
913 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
914 &cnd);
915 }
b2476490
MT
916 }
917
4dff95dc 918 return ret;
b2476490
MT
919}
920
4dff95dc
SB
921/**
922 * __clk_recalc_accuracies
923 * @core: first clk in the subtree
924 *
925 * Walks the subtree of clks starting with clk and recalculates accuracies as
926 * it goes. Note that if a clk does not implement the .recalc_accuracy
6e5ab41b 927 * callback then it is assumed that the clock will take on the accuracy of its
4dff95dc 928 * parent.
4dff95dc
SB
929 */
930static void __clk_recalc_accuracies(struct clk_core *core)
b2476490 931{
4dff95dc
SB
932 unsigned long parent_accuracy = 0;
933 struct clk_core *child;
b2476490 934
4dff95dc 935 lockdep_assert_held(&prepare_lock);
b2476490 936
4dff95dc
SB
937 if (core->parent)
938 parent_accuracy = core->parent->accuracy;
b2476490 939
4dff95dc
SB
940 if (core->ops->recalc_accuracy)
941 core->accuracy = core->ops->recalc_accuracy(core->hw,
942 parent_accuracy);
943 else
944 core->accuracy = parent_accuracy;
b2476490 945
4dff95dc
SB
946 hlist_for_each_entry(child, &core->children, child_node)
947 __clk_recalc_accuracies(child);
b2476490
MT
948}
949
4dff95dc 950static long clk_core_get_accuracy(struct clk_core *core)
e366fdd7 951{
4dff95dc 952 unsigned long accuracy;
15a02c1f 953
4dff95dc
SB
954 clk_prepare_lock();
955 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
956 __clk_recalc_accuracies(core);
15a02c1f 957
4dff95dc
SB
958 accuracy = __clk_get_accuracy(core);
959 clk_prepare_unlock();
e366fdd7 960
4dff95dc 961 return accuracy;
e366fdd7 962}
15a02c1f 963
4dff95dc
SB
964/**
965 * clk_get_accuracy - return the accuracy of clk
966 * @clk: the clk whose accuracy is being returned
967 *
968 * Simply returns the cached accuracy of the clk, unless
969 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
970 * issued.
971 * If clk is NULL then returns 0.
972 */
973long clk_get_accuracy(struct clk *clk)
035a61c3 974{
4dff95dc
SB
975 if (!clk)
976 return 0;
035a61c3 977
4dff95dc 978 return clk_core_get_accuracy(clk->core);
035a61c3 979}
4dff95dc 980EXPORT_SYMBOL_GPL(clk_get_accuracy);
035a61c3 981
4dff95dc
SB
982static unsigned long clk_recalc(struct clk_core *core,
983 unsigned long parent_rate)
1c8e6004 984{
4dff95dc
SB
985 if (core->ops->recalc_rate)
986 return core->ops->recalc_rate(core->hw, parent_rate);
987 return parent_rate;
1c8e6004
TV
988}
989
4dff95dc
SB
990/**
991 * __clk_recalc_rates
992 * @core: first clk in the subtree
993 * @msg: notification type (see include/linux/clk.h)
994 *
995 * Walks the subtree of clks starting with clk and recalculates rates as it
996 * goes. Note that if a clk does not implement the .recalc_rate callback then
997 * it is assumed that the clock will take on the rate of its parent.
998 *
999 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1000 * if necessary.
15a02c1f 1001 */
4dff95dc 1002static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
15a02c1f 1003{
4dff95dc
SB
1004 unsigned long old_rate;
1005 unsigned long parent_rate = 0;
1006 struct clk_core *child;
e366fdd7 1007
4dff95dc 1008 lockdep_assert_held(&prepare_lock);
15a02c1f 1009
4dff95dc 1010 old_rate = core->rate;
b2476490 1011
4dff95dc
SB
1012 if (core->parent)
1013 parent_rate = core->parent->rate;
b2476490 1014
4dff95dc 1015 core->rate = clk_recalc(core, parent_rate);
b2476490 1016
4dff95dc
SB
1017 /*
1018 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1019 * & ABORT_RATE_CHANGE notifiers
1020 */
1021 if (core->notifier_count && msg)
1022 __clk_notify(core, msg, old_rate, core->rate);
b2476490 1023
4dff95dc
SB
1024 hlist_for_each_entry(child, &core->children, child_node)
1025 __clk_recalc_rates(child, msg);
1026}
b2476490 1027
4dff95dc
SB
1028static unsigned long clk_core_get_rate(struct clk_core *core)
1029{
1030 unsigned long rate;
dfc202ea 1031
4dff95dc 1032 clk_prepare_lock();
b2476490 1033
4dff95dc
SB
1034 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1035 __clk_recalc_rates(core, 0);
1036
1037 rate = clk_core_get_rate_nolock(core);
1038 clk_prepare_unlock();
1039
1040 return rate;
b2476490
MT
1041}
1042
1043/**
4dff95dc
SB
1044 * clk_get_rate - return the rate of clk
1045 * @clk: the clk whose rate is being returned
b2476490 1046 *
4dff95dc
SB
1047 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1048 * is set, which means a recalc_rate will be issued.
1049 * If clk is NULL then returns 0.
b2476490 1050 */
4dff95dc 1051unsigned long clk_get_rate(struct clk *clk)
b2476490 1052{
4dff95dc
SB
1053 if (!clk)
1054 return 0;
63589e92 1055
4dff95dc 1056 return clk_core_get_rate(clk->core);
b2476490 1057}
4dff95dc 1058EXPORT_SYMBOL_GPL(clk_get_rate);
b2476490 1059
4dff95dc
SB
1060static int clk_fetch_parent_index(struct clk_core *core,
1061 struct clk_core *parent)
b2476490 1062{
4dff95dc 1063 int i;
b2476490 1064
4dff95dc
SB
1065 if (!core->parents) {
1066 core->parents = kcalloc(core->num_parents,
1067 sizeof(struct clk *), GFP_KERNEL);
1068 if (!core->parents)
1069 return -ENOMEM;
1070 }
dfc202ea 1071
4dff95dc
SB
1072 /*
1073 * find index of new parent clock using cached parent ptrs,
1074 * or if not yet cached, use string name comparison and cache
1075 * them now to avoid future calls to clk_core_lookup.
1076 */
1077 for (i = 0; i < core->num_parents; i++) {
1078 if (core->parents[i] == parent)
1079 return i;
dfc202ea 1080
4dff95dc
SB
1081 if (core->parents[i])
1082 continue;
dfc202ea 1083
4dff95dc
SB
1084 if (!strcmp(core->parent_names[i], parent->name)) {
1085 core->parents[i] = clk_core_lookup(parent->name);
1086 return i;
b2476490
MT
1087 }
1088 }
1089
4dff95dc 1090 return -EINVAL;
b2476490
MT
1091}
1092
e6500344
HS
1093/*
1094 * Update the orphan status of @core and all its children.
1095 */
1096static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
1097{
1098 struct clk_core *child;
1099
1100 core->orphan = is_orphan;
1101
1102 hlist_for_each_entry(child, &core->children, child_node)
1103 clk_core_update_orphan_status(child, is_orphan);
1104}
1105
4dff95dc 1106static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
b2476490 1107{
e6500344
HS
1108 bool was_orphan = core->orphan;
1109
4dff95dc 1110 hlist_del(&core->child_node);
035a61c3 1111
4dff95dc 1112 if (new_parent) {
e6500344
HS
1113 bool becomes_orphan = new_parent->orphan;
1114
4dff95dc
SB
1115 /* avoid duplicate POST_RATE_CHANGE notifications */
1116 if (new_parent->new_child == core)
1117 new_parent->new_child = NULL;
b2476490 1118
4dff95dc 1119 hlist_add_head(&core->child_node, &new_parent->children);
e6500344
HS
1120
1121 if (was_orphan != becomes_orphan)
1122 clk_core_update_orphan_status(core, becomes_orphan);
4dff95dc
SB
1123 } else {
1124 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
1125 if (!was_orphan)
1126 clk_core_update_orphan_status(core, true);
4dff95dc 1127 }
dfc202ea 1128
4dff95dc 1129 core->parent = new_parent;
035a61c3
TV
1130}
1131
4dff95dc
SB
1132static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1133 struct clk_core *parent)
b2476490
MT
1134{
1135 unsigned long flags;
4dff95dc 1136 struct clk_core *old_parent = core->parent;
b2476490 1137
4dff95dc
SB
1138 /*
1139 * Migrate prepare state between parents and prevent race with
1140 * clk_enable().
1141 *
1142 * If the clock is not prepared, then a race with
1143 * clk_enable/disable() is impossible since we already have the
1144 * prepare lock (future calls to clk_enable() need to be preceded by
1145 * a clk_prepare()).
1146 *
1147 * If the clock is prepared, migrate the prepared state to the new
1148 * parent and also protect against a race with clk_enable() by
1149 * forcing the clock and the new parent on. This ensures that all
1150 * future calls to clk_enable() are practically NOPs with respect to
1151 * hardware and software states.
1152 *
1153 * See also: Comment for clk_set_parent() below.
1154 */
1155 if (core->prepare_count) {
1156 clk_core_prepare(parent);
d2a5d46b 1157 flags = clk_enable_lock();
4dff95dc
SB
1158 clk_core_enable(parent);
1159 clk_core_enable(core);
d2a5d46b 1160 clk_enable_unlock(flags);
4dff95dc 1161 }
63589e92 1162
4dff95dc 1163 /* update the clk tree topology */
eab89f69 1164 flags = clk_enable_lock();
4dff95dc 1165 clk_reparent(core, parent);
eab89f69 1166 clk_enable_unlock(flags);
4dff95dc
SB
1167
1168 return old_parent;
b2476490 1169}
b2476490 1170
4dff95dc
SB
1171static void __clk_set_parent_after(struct clk_core *core,
1172 struct clk_core *parent,
1173 struct clk_core *old_parent)
b2476490 1174{
d2a5d46b
DA
1175 unsigned long flags;
1176
4dff95dc
SB
1177 /*
1178 * Finish the migration of prepare state and undo the changes done
1179 * for preventing a race with clk_enable().
1180 */
1181 if (core->prepare_count) {
d2a5d46b 1182 flags = clk_enable_lock();
4dff95dc
SB
1183 clk_core_disable(core);
1184 clk_core_disable(old_parent);
d2a5d46b 1185 clk_enable_unlock(flags);
4dff95dc
SB
1186 clk_core_unprepare(old_parent);
1187 }
1188}
b2476490 1189
4dff95dc
SB
1190static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1191 u8 p_index)
1192{
1193 unsigned long flags;
1194 int ret = 0;
1195 struct clk_core *old_parent;
b2476490 1196
4dff95dc 1197 old_parent = __clk_set_parent_before(core, parent);
b2476490 1198
4dff95dc 1199 trace_clk_set_parent(core, parent);
b2476490 1200
4dff95dc
SB
1201 /* change clock input source */
1202 if (parent && core->ops->set_parent)
1203 ret = core->ops->set_parent(core->hw, p_index);
dfc202ea 1204
4dff95dc 1205 trace_clk_set_parent_complete(core, parent);
dfc202ea 1206
4dff95dc
SB
1207 if (ret) {
1208 flags = clk_enable_lock();
1209 clk_reparent(core, old_parent);
1210 clk_enable_unlock(flags);
c660b2eb 1211 __clk_set_parent_after(core, old_parent, parent);
dfc202ea 1212
4dff95dc 1213 return ret;
b2476490
MT
1214 }
1215
4dff95dc
SB
1216 __clk_set_parent_after(core, parent, old_parent);
1217
b2476490
MT
1218 return 0;
1219}
1220
1221/**
4dff95dc
SB
1222 * __clk_speculate_rates
1223 * @core: first clk in the subtree
1224 * @parent_rate: the "future" rate of clk's parent
b2476490 1225 *
4dff95dc
SB
1226 * Walks the subtree of clks starting with clk, speculating rates as it
1227 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1228 *
1229 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1230 * pre-rate change notifications and returns early if no clks in the
1231 * subtree have subscribed to the notifications. Note that if a clk does not
1232 * implement the .recalc_rate callback then it is assumed that the clock will
1233 * take on the rate of its parent.
b2476490 1234 */
4dff95dc
SB
1235static int __clk_speculate_rates(struct clk_core *core,
1236 unsigned long parent_rate)
b2476490 1237{
4dff95dc
SB
1238 struct clk_core *child;
1239 unsigned long new_rate;
1240 int ret = NOTIFY_DONE;
b2476490 1241
4dff95dc 1242 lockdep_assert_held(&prepare_lock);
864e160a 1243
4dff95dc
SB
1244 new_rate = clk_recalc(core, parent_rate);
1245
1246 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1247 if (core->notifier_count)
1248 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1249
1250 if (ret & NOTIFY_STOP_MASK) {
1251 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1252 __func__, core->name, ret);
1253 goto out;
1254 }
1255
1256 hlist_for_each_entry(child, &core->children, child_node) {
1257 ret = __clk_speculate_rates(child, new_rate);
1258 if (ret & NOTIFY_STOP_MASK)
1259 break;
1260 }
b2476490 1261
4dff95dc 1262out:
b2476490
MT
1263 return ret;
1264}
b2476490 1265
4dff95dc
SB
1266static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1267 struct clk_core *new_parent, u8 p_index)
b2476490 1268{
4dff95dc 1269 struct clk_core *child;
b2476490 1270
4dff95dc
SB
1271 core->new_rate = new_rate;
1272 core->new_parent = new_parent;
1273 core->new_parent_index = p_index;
1274 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1275 core->new_child = NULL;
1276 if (new_parent && new_parent != core->parent)
1277 new_parent->new_child = core;
496eadf8 1278
4dff95dc
SB
1279 hlist_for_each_entry(child, &core->children, child_node) {
1280 child->new_rate = clk_recalc(child, new_rate);
1281 clk_calc_subtree(child, child->new_rate, NULL, 0);
1282 }
1283}
b2476490 1284
4dff95dc
SB
1285/*
1286 * calculate the new rates returning the topmost clock that has to be
1287 * changed.
1288 */
1289static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1290 unsigned long rate)
1291{
1292 struct clk_core *top = core;
1293 struct clk_core *old_parent, *parent;
4dff95dc
SB
1294 unsigned long best_parent_rate = 0;
1295 unsigned long new_rate;
1296 unsigned long min_rate;
1297 unsigned long max_rate;
1298 int p_index = 0;
1299 long ret;
1300
1301 /* sanity */
1302 if (IS_ERR_OR_NULL(core))
1303 return NULL;
1304
1305 /* save parent rate, if it exists */
1306 parent = old_parent = core->parent;
71472c0c 1307 if (parent)
4dff95dc 1308 best_parent_rate = parent->rate;
71472c0c 1309
4dff95dc
SB
1310 clk_core_get_boundaries(core, &min_rate, &max_rate);
1311
1312 /* find the closest rate and parent clk/rate */
d6968fca 1313 if (core->ops->determine_rate) {
0817b62c
BB
1314 struct clk_rate_request req;
1315
1316 req.rate = rate;
1317 req.min_rate = min_rate;
1318 req.max_rate = max_rate;
1319 if (parent) {
1320 req.best_parent_hw = parent->hw;
1321 req.best_parent_rate = parent->rate;
1322 } else {
1323 req.best_parent_hw = NULL;
1324 req.best_parent_rate = 0;
1325 }
1326
1327 ret = core->ops->determine_rate(core->hw, &req);
4dff95dc
SB
1328 if (ret < 0)
1329 return NULL;
1c8e6004 1330
0817b62c
BB
1331 best_parent_rate = req.best_parent_rate;
1332 new_rate = req.rate;
1333 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
4dff95dc
SB
1334 } else if (core->ops->round_rate) {
1335 ret = core->ops->round_rate(core->hw, rate,
0817b62c 1336 &best_parent_rate);
4dff95dc
SB
1337 if (ret < 0)
1338 return NULL;
035a61c3 1339
4dff95dc
SB
1340 new_rate = ret;
1341 if (new_rate < min_rate || new_rate > max_rate)
1342 return NULL;
1343 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1344 /* pass-through clock without adjustable parent */
1345 core->new_rate = core->rate;
1346 return NULL;
1347 } else {
1348 /* pass-through clock with adjustable parent */
1349 top = clk_calc_new_rates(parent, rate);
1350 new_rate = parent->new_rate;
1351 goto out;
1352 }
1c8e6004 1353
4dff95dc
SB
1354 /* some clocks must be gated to change parent */
1355 if (parent != old_parent &&
1356 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1357 pr_debug("%s: %s not gated but wants to reparent\n",
1358 __func__, core->name);
1359 return NULL;
1360 }
b2476490 1361
4dff95dc
SB
1362 /* try finding the new parent index */
1363 if (parent && core->num_parents > 1) {
1364 p_index = clk_fetch_parent_index(core, parent);
1365 if (p_index < 0) {
1366 pr_debug("%s: clk %s can not be parent of clk %s\n",
1367 __func__, parent->name, core->name);
1368 return NULL;
1369 }
1370 }
b2476490 1371
4dff95dc
SB
1372 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
1373 best_parent_rate != parent->rate)
1374 top = clk_calc_new_rates(parent, best_parent_rate);
035a61c3 1375
4dff95dc
SB
1376out:
1377 clk_calc_subtree(core, new_rate, parent, p_index);
b2476490 1378
4dff95dc 1379 return top;
b2476490 1380}
b2476490 1381
4dff95dc
SB
1382/*
1383 * Notify about rate changes in a subtree. Always walk down the whole tree
1384 * so that in case of an error we can walk down the whole tree again and
1385 * abort the change.
b2476490 1386 */
4dff95dc
SB
1387static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
1388 unsigned long event)
b2476490 1389{
4dff95dc 1390 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
b2476490
MT
1391 int ret = NOTIFY_DONE;
1392
4dff95dc
SB
1393 if (core->rate == core->new_rate)
1394 return NULL;
b2476490 1395
4dff95dc
SB
1396 if (core->notifier_count) {
1397 ret = __clk_notify(core, event, core->rate, core->new_rate);
1398 if (ret & NOTIFY_STOP_MASK)
1399 fail_clk = core;
b2476490
MT
1400 }
1401
4dff95dc
SB
1402 hlist_for_each_entry(child, &core->children, child_node) {
1403 /* Skip children who will be reparented to another clock */
1404 if (child->new_parent && child->new_parent != core)
1405 continue;
1406 tmp_clk = clk_propagate_rate_change(child, event);
1407 if (tmp_clk)
1408 fail_clk = tmp_clk;
1409 }
5279fc40 1410
4dff95dc
SB
1411 /* handle the new child who might not be in core->children yet */
1412 if (core->new_child) {
1413 tmp_clk = clk_propagate_rate_change(core->new_child, event);
1414 if (tmp_clk)
1415 fail_clk = tmp_clk;
1416 }
5279fc40 1417
4dff95dc 1418 return fail_clk;
5279fc40
BB
1419}
1420
4dff95dc
SB
1421/*
1422 * walk down a subtree and set the new rates notifying the rate
1423 * change on the way
1424 */
1425static void clk_change_rate(struct clk_core *core)
035a61c3 1426{
4dff95dc
SB
1427 struct clk_core *child;
1428 struct hlist_node *tmp;
1429 unsigned long old_rate;
1430 unsigned long best_parent_rate = 0;
1431 bool skip_set_rate = false;
1432 struct clk_core *old_parent;
035a61c3 1433
4dff95dc 1434 old_rate = core->rate;
035a61c3 1435
4dff95dc
SB
1436 if (core->new_parent)
1437 best_parent_rate = core->new_parent->rate;
1438 else if (core->parent)
1439 best_parent_rate = core->parent->rate;
035a61c3 1440
4dff95dc
SB
1441 if (core->new_parent && core->new_parent != core->parent) {
1442 old_parent = __clk_set_parent_before(core, core->new_parent);
1443 trace_clk_set_parent(core, core->new_parent);
5279fc40 1444
4dff95dc
SB
1445 if (core->ops->set_rate_and_parent) {
1446 skip_set_rate = true;
1447 core->ops->set_rate_and_parent(core->hw, core->new_rate,
1448 best_parent_rate,
1449 core->new_parent_index);
1450 } else if (core->ops->set_parent) {
1451 core->ops->set_parent(core->hw, core->new_parent_index);
1452 }
5279fc40 1453
4dff95dc
SB
1454 trace_clk_set_parent_complete(core, core->new_parent);
1455 __clk_set_parent_after(core, core->new_parent, old_parent);
1456 }
8f2c2db1 1457
4dff95dc 1458 trace_clk_set_rate(core, core->new_rate);
b2476490 1459
4dff95dc
SB
1460 if (!skip_set_rate && core->ops->set_rate)
1461 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
496eadf8 1462
4dff95dc 1463 trace_clk_set_rate_complete(core, core->new_rate);
b2476490 1464
4dff95dc 1465 core->rate = clk_recalc(core, best_parent_rate);
b2476490 1466
4dff95dc
SB
1467 if (core->notifier_count && old_rate != core->rate)
1468 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
b2476490 1469
85e88fab
MT
1470 if (core->flags & CLK_RECALC_NEW_RATES)
1471 (void)clk_calc_new_rates(core, core->new_rate);
d8d91987 1472
b2476490 1473 /*
4dff95dc
SB
1474 * Use safe iteration, as change_rate can actually swap parents
1475 * for certain clock types.
b2476490 1476 */
4dff95dc
SB
1477 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
1478 /* Skip children who will be reparented to another clock */
1479 if (child->new_parent && child->new_parent != core)
1480 continue;
1481 clk_change_rate(child);
1482 }
b2476490 1483
4dff95dc
SB
1484 /* handle the new child who might not be in core->children yet */
1485 if (core->new_child)
1486 clk_change_rate(core->new_child);
b2476490
MT
1487}
1488
4dff95dc
SB
1489static int clk_core_set_rate_nolock(struct clk_core *core,
1490 unsigned long req_rate)
a093bde2 1491{
4dff95dc
SB
1492 struct clk_core *top, *fail_clk;
1493 unsigned long rate = req_rate;
1494 int ret = 0;
a093bde2 1495
4dff95dc
SB
1496 if (!core)
1497 return 0;
a093bde2 1498
4dff95dc
SB
1499 /* bail early if nothing to do */
1500 if (rate == clk_core_get_rate_nolock(core))
1501 return 0;
a093bde2 1502
4dff95dc
SB
1503 if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count)
1504 return -EBUSY;
a093bde2 1505
4dff95dc
SB
1506 /* calculate new rates and get the topmost changed clock */
1507 top = clk_calc_new_rates(core, rate);
1508 if (!top)
1509 return -EINVAL;
1510
1511 /* notify that we are about to change rates */
1512 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
1513 if (fail_clk) {
1514 pr_debug("%s: failed to set %s rate\n", __func__,
1515 fail_clk->name);
1516 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
1517 return -EBUSY;
1518 }
1519
1520 /* change the rates */
1521 clk_change_rate(top);
1522
1523 core->req_rate = req_rate;
1524
1525 return ret;
a093bde2 1526}
035a61c3
TV
1527
1528/**
4dff95dc
SB
1529 * clk_set_rate - specify a new rate for clk
1530 * @clk: the clk whose rate is being changed
1531 * @rate: the new rate for clk
035a61c3 1532 *
4dff95dc
SB
1533 * In the simplest case clk_set_rate will only adjust the rate of clk.
1534 *
1535 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
1536 * propagate up to clk's parent; whether or not this happens depends on the
1537 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
1538 * after calling .round_rate then upstream parent propagation is ignored. If
1539 * *parent_rate comes back with a new rate for clk's parent then we propagate
1540 * up to clk's parent and set its rate. Upward propagation will continue
1541 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
1542 * .round_rate stops requesting changes to clk's parent_rate.
1543 *
1544 * Rate changes are accomplished via tree traversal that also recalculates the
1545 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
1546 *
1547 * Returns 0 on success, -EERROR otherwise.
035a61c3 1548 */
4dff95dc 1549int clk_set_rate(struct clk *clk, unsigned long rate)
035a61c3 1550{
4dff95dc
SB
1551 int ret;
1552
035a61c3
TV
1553 if (!clk)
1554 return 0;
1555
4dff95dc
SB
1556 /* prevent racing with updates to the clock topology */
1557 clk_prepare_lock();
da0f0b2c 1558
4dff95dc 1559 ret = clk_core_set_rate_nolock(clk->core, rate);
da0f0b2c 1560
4dff95dc 1561 clk_prepare_unlock();
4935b22c 1562
4dff95dc 1563 return ret;
4935b22c 1564}
4dff95dc 1565EXPORT_SYMBOL_GPL(clk_set_rate);
4935b22c 1566
4dff95dc
SB
1567/**
1568 * clk_set_rate_range - set a rate range for a clock source
1569 * @clk: clock source
1570 * @min: desired minimum clock rate in Hz, inclusive
1571 * @max: desired maximum clock rate in Hz, inclusive
1572 *
1573 * Returns success (0) or negative errno.
1574 */
1575int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
4935b22c 1576{
4dff95dc 1577 int ret = 0;
4935b22c 1578
4dff95dc
SB
1579 if (!clk)
1580 return 0;
903efc55 1581
4dff95dc
SB
1582 if (min > max) {
1583 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
1584 __func__, clk->core->name, clk->dev_id, clk->con_id,
1585 min, max);
1586 return -EINVAL;
903efc55 1587 }
4935b22c 1588
4dff95dc 1589 clk_prepare_lock();
4935b22c 1590
4dff95dc
SB
1591 if (min != clk->min_rate || max != clk->max_rate) {
1592 clk->min_rate = min;
1593 clk->max_rate = max;
1594 ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
4935b22c
JH
1595 }
1596
4dff95dc 1597 clk_prepare_unlock();
4935b22c 1598
4dff95dc 1599 return ret;
3fa2252b 1600}
4dff95dc 1601EXPORT_SYMBOL_GPL(clk_set_rate_range);
3fa2252b 1602
4dff95dc
SB
1603/**
1604 * clk_set_min_rate - set a minimum clock rate for a clock source
1605 * @clk: clock source
1606 * @rate: desired minimum clock rate in Hz, inclusive
1607 *
1608 * Returns success (0) or negative errno.
1609 */
1610int clk_set_min_rate(struct clk *clk, unsigned long rate)
3fa2252b 1611{
4dff95dc
SB
1612 if (!clk)
1613 return 0;
1614
1615 return clk_set_rate_range(clk, rate, clk->max_rate);
3fa2252b 1616}
4dff95dc 1617EXPORT_SYMBOL_GPL(clk_set_min_rate);
3fa2252b 1618
4dff95dc
SB
1619/**
1620 * clk_set_max_rate - set a maximum clock rate for a clock source
1621 * @clk: clock source
1622 * @rate: desired maximum clock rate in Hz, inclusive
1623 *
1624 * Returns success (0) or negative errno.
1625 */
1626int clk_set_max_rate(struct clk *clk, unsigned long rate)
3fa2252b 1627{
4dff95dc
SB
1628 if (!clk)
1629 return 0;
4935b22c 1630
4dff95dc 1631 return clk_set_rate_range(clk, clk->min_rate, rate);
4935b22c 1632}
4dff95dc 1633EXPORT_SYMBOL_GPL(clk_set_max_rate);
4935b22c 1634
b2476490 1635/**
4dff95dc
SB
1636 * clk_get_parent - return the parent of a clk
1637 * @clk: the clk whose parent gets returned
b2476490 1638 *
4dff95dc 1639 * Simply returns clk->parent. Returns NULL if clk is NULL.
b2476490 1640 */
4dff95dc 1641struct clk *clk_get_parent(struct clk *clk)
b2476490 1642{
4dff95dc 1643 struct clk *parent;
b2476490 1644
fc4a05d4
SB
1645 if (!clk)
1646 return NULL;
1647
4dff95dc 1648 clk_prepare_lock();
fc4a05d4
SB
1649 /* TODO: Create a per-user clk and change callers to call clk_put */
1650 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
4dff95dc 1651 clk_prepare_unlock();
496eadf8 1652
4dff95dc
SB
1653 return parent;
1654}
1655EXPORT_SYMBOL_GPL(clk_get_parent);
b2476490 1656
4dff95dc
SB
1657/*
1658 * .get_parent is mandatory for clocks with multiple possible parents. It is
1659 * optional for single-parent clocks. Always call .get_parent if it is
1660 * available and WARN if it is missing for multi-parent clocks.
1661 *
1662 * For single-parent clocks without .get_parent, first check to see if the
1663 * .parents array exists, and if so use it to avoid an expensive tree
1664 * traversal. If .parents does not exist then walk the tree.
1665 */
1666static struct clk_core *__clk_init_parent(struct clk_core *core)
1667{
1668 struct clk_core *ret = NULL;
1669 u8 index;
b2476490 1670
4dff95dc
SB
1671 /* handle the trivial cases */
1672
1673 if (!core->num_parents)
b2476490
MT
1674 goto out;
1675
4dff95dc
SB
1676 if (core->num_parents == 1) {
1677 if (IS_ERR_OR_NULL(core->parent))
1678 core->parent = clk_core_lookup(core->parent_names[0]);
1679 ret = core->parent;
1680 goto out;
b2476490
MT
1681 }
1682
4dff95dc
SB
1683 if (!core->ops->get_parent) {
1684 WARN(!core->ops->get_parent,
1685 "%s: multi-parent clocks must implement .get_parent\n",
1686 __func__);
1687 goto out;
1688 };
1689
1690 /*
1691 * Do our best to cache parent clocks in core->parents. This prevents
1692 * unnecessary and expensive lookups. We don't set core->parent here;
1693 * that is done by the calling function.
1694 */
1695
1696 index = core->ops->get_parent(core->hw);
1697
1698 if (!core->parents)
1699 core->parents =
1700 kcalloc(core->num_parents, sizeof(struct clk *),
1701 GFP_KERNEL);
1702
1703 ret = clk_core_get_parent_by_index(core, index);
1704
b2476490
MT
1705out:
1706 return ret;
1707}
1708
4dff95dc
SB
1709static void clk_core_reparent(struct clk_core *core,
1710 struct clk_core *new_parent)
b2476490 1711{
4dff95dc
SB
1712 clk_reparent(core, new_parent);
1713 __clk_recalc_accuracies(core);
1714 __clk_recalc_rates(core, POST_RATE_CHANGE);
b2476490
MT
1715}
1716
42c86547
TV
1717void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
1718{
1719 if (!hw)
1720 return;
1721
1722 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
1723}
1724
4dff95dc
SB
1725/**
1726 * clk_has_parent - check if a clock is a possible parent for another
1727 * @clk: clock source
1728 * @parent: parent clock source
1729 *
1730 * This function can be used in drivers that need to check that a clock can be
1731 * the parent of another without actually changing the parent.
1732 *
1733 * Returns true if @parent is a possible parent for @clk, false otherwise.
b2476490 1734 */
4dff95dc 1735bool clk_has_parent(struct clk *clk, struct clk *parent)
b2476490 1736{
4dff95dc
SB
1737 struct clk_core *core, *parent_core;
1738 unsigned int i;
b2476490 1739
4dff95dc
SB
1740 /* NULL clocks should be nops, so return success if either is NULL. */
1741 if (!clk || !parent)
1742 return true;
7452b219 1743
4dff95dc
SB
1744 core = clk->core;
1745 parent_core = parent->core;
71472c0c 1746
4dff95dc
SB
1747 /* Optimize for the case where the parent is already the parent. */
1748 if (core->parent == parent_core)
1749 return true;
1c8e6004 1750
4dff95dc
SB
1751 for (i = 0; i < core->num_parents; i++)
1752 if (strcmp(core->parent_names[i], parent_core->name) == 0)
1753 return true;
03bc10ab 1754
4dff95dc
SB
1755 return false;
1756}
1757EXPORT_SYMBOL_GPL(clk_has_parent);
03bc10ab 1758
4dff95dc
SB
1759static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent)
1760{
1761 int ret = 0;
1762 int p_index = 0;
1763 unsigned long p_rate = 0;
1764
1765 if (!core)
1766 return 0;
1767
1768 /* prevent racing with updates to the clock topology */
1769 clk_prepare_lock();
1770
1771 if (core->parent == parent)
1772 goto out;
1773
1774 /* verify ops for for multi-parent clks */
1775 if ((core->num_parents > 1) && (!core->ops->set_parent)) {
1776 ret = -ENOSYS;
63f5c3b2 1777 goto out;
7452b219
MT
1778 }
1779
4dff95dc
SB
1780 /* check that we are allowed to re-parent if the clock is in use */
1781 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1782 ret = -EBUSY;
1783 goto out;
b2476490
MT
1784 }
1785
71472c0c 1786 /* try finding the new parent index */
4dff95dc 1787 if (parent) {
d6968fca 1788 p_index = clk_fetch_parent_index(core, parent);
4dff95dc 1789 p_rate = parent->rate;
f1c8b2ed 1790 if (p_index < 0) {
71472c0c 1791 pr_debug("%s: clk %s can not be parent of clk %s\n",
4dff95dc
SB
1792 __func__, parent->name, core->name);
1793 ret = p_index;
1794 goto out;
71472c0c 1795 }
b2476490
MT
1796 }
1797
4dff95dc
SB
1798 /* propagate PRE_RATE_CHANGE notifications */
1799 ret = __clk_speculate_rates(core, p_rate);
b2476490 1800
4dff95dc
SB
1801 /* abort if a driver objects */
1802 if (ret & NOTIFY_STOP_MASK)
1803 goto out;
b2476490 1804
4dff95dc
SB
1805 /* do the re-parent */
1806 ret = __clk_set_parent(core, parent, p_index);
b2476490 1807
4dff95dc
SB
1808 /* propagate rate an accuracy recalculation accordingly */
1809 if (ret) {
1810 __clk_recalc_rates(core, ABORT_RATE_CHANGE);
1811 } else {
1812 __clk_recalc_rates(core, POST_RATE_CHANGE);
1813 __clk_recalc_accuracies(core);
b2476490
MT
1814 }
1815
4dff95dc
SB
1816out:
1817 clk_prepare_unlock();
71472c0c 1818
4dff95dc
SB
1819 return ret;
1820}
b2476490 1821
4dff95dc
SB
1822/**
1823 * clk_set_parent - switch the parent of a mux clk
1824 * @clk: the mux clk whose input we are switching
1825 * @parent: the new input to clk
1826 *
1827 * Re-parent clk to use parent as its new input source. If clk is in
1828 * prepared state, the clk will get enabled for the duration of this call. If
1829 * that's not acceptable for a specific clk (Eg: the consumer can't handle
1830 * that, the reparenting is glitchy in hardware, etc), use the
1831 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
1832 *
1833 * After successfully changing clk's parent clk_set_parent will update the
1834 * clk topology, sysfs topology and propagate rate recalculation via
1835 * __clk_recalc_rates.
1836 *
1837 * Returns 0 on success, -EERROR otherwise.
1838 */
1839int clk_set_parent(struct clk *clk, struct clk *parent)
1840{
1841 if (!clk)
1842 return 0;
1843
1844 return clk_core_set_parent(clk->core, parent ? parent->core : NULL);
b2476490 1845}
4dff95dc 1846EXPORT_SYMBOL_GPL(clk_set_parent);
b2476490 1847
4dff95dc
SB
1848/**
1849 * clk_set_phase - adjust the phase shift of a clock signal
1850 * @clk: clock signal source
1851 * @degrees: number of degrees the signal is shifted
1852 *
1853 * Shifts the phase of a clock signal by the specified
1854 * degrees. Returns 0 on success, -EERROR otherwise.
1855 *
1856 * This function makes no distinction about the input or reference
1857 * signal that we adjust the clock signal phase against. For example
1858 * phase locked-loop clock signal generators we may shift phase with
1859 * respect to feedback clock signal input, but for other cases the
1860 * clock phase may be shifted with respect to some other, unspecified
1861 * signal.
1862 *
1863 * Additionally the concept of phase shift does not propagate through
1864 * the clock tree hierarchy, which sets it apart from clock rates and
1865 * clock accuracy. A parent clock phase attribute does not have an
1866 * impact on the phase attribute of a child clock.
b2476490 1867 */
4dff95dc 1868int clk_set_phase(struct clk *clk, int degrees)
b2476490 1869{
4dff95dc 1870 int ret = -EINVAL;
b2476490 1871
4dff95dc
SB
1872 if (!clk)
1873 return 0;
b2476490 1874
4dff95dc
SB
1875 /* sanity check degrees */
1876 degrees %= 360;
1877 if (degrees < 0)
1878 degrees += 360;
bf47b4fd 1879
4dff95dc 1880 clk_prepare_lock();
3fa2252b 1881
4dff95dc 1882 trace_clk_set_phase(clk->core, degrees);
3fa2252b 1883
4dff95dc
SB
1884 if (clk->core->ops->set_phase)
1885 ret = clk->core->ops->set_phase(clk->core->hw, degrees);
3fa2252b 1886
4dff95dc 1887 trace_clk_set_phase_complete(clk->core, degrees);
dfc202ea 1888
4dff95dc
SB
1889 if (!ret)
1890 clk->core->phase = degrees;
b2476490 1891
4dff95dc 1892 clk_prepare_unlock();
dfc202ea 1893
4dff95dc
SB
1894 return ret;
1895}
1896EXPORT_SYMBOL_GPL(clk_set_phase);
b2476490 1897
4dff95dc
SB
1898static int clk_core_get_phase(struct clk_core *core)
1899{
1900 int ret;
b2476490 1901
4dff95dc
SB
1902 clk_prepare_lock();
1903 ret = core->phase;
1904 clk_prepare_unlock();
71472c0c 1905
4dff95dc 1906 return ret;
b2476490
MT
1907}
1908
4dff95dc
SB
1909/**
1910 * clk_get_phase - return the phase shift of a clock signal
1911 * @clk: clock signal source
1912 *
1913 * Returns the phase shift of a clock node in degrees, otherwise returns
1914 * -EERROR.
1915 */
1916int clk_get_phase(struct clk *clk)
1c8e6004 1917{
4dff95dc 1918 if (!clk)
1c8e6004
TV
1919 return 0;
1920
4dff95dc
SB
1921 return clk_core_get_phase(clk->core);
1922}
1923EXPORT_SYMBOL_GPL(clk_get_phase);
1c8e6004 1924
4dff95dc
SB
1925/**
1926 * clk_is_match - check if two clk's point to the same hardware clock
1927 * @p: clk compared against q
1928 * @q: clk compared against p
1929 *
1930 * Returns true if the two struct clk pointers both point to the same hardware
1931 * clock node. Put differently, returns true if struct clk *p and struct clk *q
1932 * share the same struct clk_core object.
1933 *
1934 * Returns false otherwise. Note that two NULL clks are treated as matching.
1935 */
1936bool clk_is_match(const struct clk *p, const struct clk *q)
1937{
1938 /* trivial case: identical struct clk's or both NULL */
1939 if (p == q)
1940 return true;
1c8e6004 1941
4dff95dc
SB
1942 /* true if clk->core pointers match. Avoid derefing garbage */
1943 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
1944 if (p->core == q->core)
1945 return true;
1c8e6004 1946
4dff95dc
SB
1947 return false;
1948}
1949EXPORT_SYMBOL_GPL(clk_is_match);
1c8e6004 1950
4dff95dc 1951/*** debugfs support ***/
1c8e6004 1952
4dff95dc
SB
1953#ifdef CONFIG_DEBUG_FS
1954#include <linux/debugfs.h>
1c8e6004 1955
4dff95dc
SB
1956static struct dentry *rootdir;
1957static int inited = 0;
1958static DEFINE_MUTEX(clk_debug_lock);
1959static HLIST_HEAD(clk_debug_list);
1c8e6004 1960
4dff95dc
SB
1961static struct hlist_head *all_lists[] = {
1962 &clk_root_list,
1963 &clk_orphan_list,
1964 NULL,
1965};
1966
1967static struct hlist_head *orphan_list[] = {
1968 &clk_orphan_list,
1969 NULL,
1970};
1971
1972static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
1973 int level)
b2476490 1974{
4dff95dc
SB
1975 if (!c)
1976 return;
b2476490 1977
4dff95dc
SB
1978 seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n",
1979 level * 3 + 1, "",
1980 30 - level * 3, c->name,
1981 c->enable_count, c->prepare_count, clk_core_get_rate(c),
1982 clk_core_get_accuracy(c), clk_core_get_phase(c));
1983}
89ac8d7a 1984
4dff95dc
SB
1985static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
1986 int level)
1987{
1988 struct clk_core *child;
b2476490 1989
4dff95dc
SB
1990 if (!c)
1991 return;
b2476490 1992
4dff95dc 1993 clk_summary_show_one(s, c, level);
0e1c0301 1994
4dff95dc
SB
1995 hlist_for_each_entry(child, &c->children, child_node)
1996 clk_summary_show_subtree(s, child, level + 1);
1c8e6004 1997}
b2476490 1998
4dff95dc 1999static int clk_summary_show(struct seq_file *s, void *data)
1c8e6004 2000{
4dff95dc
SB
2001 struct clk_core *c;
2002 struct hlist_head **lists = (struct hlist_head **)s->private;
1c8e6004 2003
4dff95dc
SB
2004 seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n");
2005 seq_puts(s, "----------------------------------------------------------------------------------------\n");
b2476490 2006
1c8e6004
TV
2007 clk_prepare_lock();
2008
4dff95dc
SB
2009 for (; *lists; lists++)
2010 hlist_for_each_entry(c, *lists, child_node)
2011 clk_summary_show_subtree(s, c, 0);
b2476490 2012
eab89f69 2013 clk_prepare_unlock();
b2476490 2014
4dff95dc 2015 return 0;
b2476490 2016}
1c8e6004 2017
1c8e6004 2018
4dff95dc 2019static int clk_summary_open(struct inode *inode, struct file *file)
1c8e6004 2020{
4dff95dc 2021 return single_open(file, clk_summary_show, inode->i_private);
1c8e6004 2022}
b2476490 2023
4dff95dc
SB
2024static const struct file_operations clk_summary_fops = {
2025 .open = clk_summary_open,
2026 .read = seq_read,
2027 .llseek = seq_lseek,
2028 .release = single_release,
2029};
b2476490 2030
4dff95dc
SB
2031static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
2032{
2033 if (!c)
2034 return;
b2476490 2035
7cb81136 2036 /* This should be JSON format, i.e. elements separated with a comma */
4dff95dc
SB
2037 seq_printf(s, "\"%s\": { ", c->name);
2038 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
2039 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
7cb81136
SW
2040 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c));
2041 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c));
4dff95dc 2042 seq_printf(s, "\"phase\": %d", clk_core_get_phase(c));
b2476490 2043}
b2476490 2044
4dff95dc 2045static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
b2476490 2046{
4dff95dc 2047 struct clk_core *child;
b2476490 2048
4dff95dc
SB
2049 if (!c)
2050 return;
b2476490 2051
4dff95dc 2052 clk_dump_one(s, c, level);
b2476490 2053
4dff95dc
SB
2054 hlist_for_each_entry(child, &c->children, child_node) {
2055 seq_printf(s, ",");
2056 clk_dump_subtree(s, child, level + 1);
b2476490
MT
2057 }
2058
4dff95dc 2059 seq_printf(s, "}");
b2476490
MT
2060}
2061
4dff95dc 2062static int clk_dump(struct seq_file *s, void *data)
4e88f3de 2063{
4dff95dc
SB
2064 struct clk_core *c;
2065 bool first_node = true;
2066 struct hlist_head **lists = (struct hlist_head **)s->private;
4e88f3de 2067
4dff95dc 2068 seq_printf(s, "{");
4e88f3de 2069
4dff95dc 2070 clk_prepare_lock();
035a61c3 2071
4dff95dc
SB
2072 for (; *lists; lists++) {
2073 hlist_for_each_entry(c, *lists, child_node) {
2074 if (!first_node)
2075 seq_puts(s, ",");
2076 first_node = false;
2077 clk_dump_subtree(s, c, 0);
2078 }
2079 }
4e88f3de 2080
4dff95dc 2081 clk_prepare_unlock();
4e88f3de 2082
70e9f4dd 2083 seq_puts(s, "}\n");
4dff95dc 2084 return 0;
4e88f3de 2085}
4e88f3de 2086
4dff95dc
SB
2087
2088static int clk_dump_open(struct inode *inode, struct file *file)
b2476490 2089{
4dff95dc
SB
2090 return single_open(file, clk_dump, inode->i_private);
2091}
b2476490 2092
4dff95dc
SB
2093static const struct file_operations clk_dump_fops = {
2094 .open = clk_dump_open,
2095 .read = seq_read,
2096 .llseek = seq_lseek,
2097 .release = single_release,
2098};
89ac8d7a 2099
4dff95dc
SB
2100static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
2101{
2102 struct dentry *d;
2103 int ret = -ENOMEM;
b2476490 2104
4dff95dc
SB
2105 if (!core || !pdentry) {
2106 ret = -EINVAL;
b2476490 2107 goto out;
4dff95dc 2108 }
b2476490 2109
4dff95dc
SB
2110 d = debugfs_create_dir(core->name, pdentry);
2111 if (!d)
b61c43c0 2112 goto out;
b61c43c0 2113
4dff95dc
SB
2114 core->dentry = d;
2115
2116 d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry,
2117 (u32 *)&core->rate);
2118 if (!d)
2119 goto err_out;
2120
2121 d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry,
2122 (u32 *)&core->accuracy);
2123 if (!d)
2124 goto err_out;
2125
2126 d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry,
2127 (u32 *)&core->phase);
2128 if (!d)
2129 goto err_out;
031dcc9b 2130
4dff95dc
SB
2131 d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry,
2132 (u32 *)&core->flags);
2133 if (!d)
2134 goto err_out;
031dcc9b 2135
4dff95dc
SB
2136 d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry,
2137 (u32 *)&core->prepare_count);
2138 if (!d)
2139 goto err_out;
b2476490 2140
4dff95dc
SB
2141 d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry,
2142 (u32 *)&core->enable_count);
2143 if (!d)
2144 goto err_out;
b2476490 2145
4dff95dc
SB
2146 d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry,
2147 (u32 *)&core->notifier_count);
2148 if (!d)
2149 goto err_out;
b2476490 2150
4dff95dc
SB
2151 if (core->ops->debug_init) {
2152 ret = core->ops->debug_init(core->hw, core->dentry);
2153 if (ret)
2154 goto err_out;
5279fc40 2155 }
b2476490 2156
4dff95dc
SB
2157 ret = 0;
2158 goto out;
b2476490 2159
4dff95dc
SB
2160err_out:
2161 debugfs_remove_recursive(core->dentry);
2162 core->dentry = NULL;
2163out:
b2476490
MT
2164 return ret;
2165}
035a61c3
TV
2166
2167/**
6e5ab41b
SB
2168 * clk_debug_register - add a clk node to the debugfs clk directory
2169 * @core: the clk being added to the debugfs clk directory
035a61c3 2170 *
6e5ab41b
SB
2171 * Dynamically adds a clk to the debugfs clk directory if debugfs has been
2172 * initialized. Otherwise it bails out early since the debugfs clk directory
4dff95dc 2173 * will be created lazily by clk_debug_init as part of a late_initcall.
035a61c3 2174 */
4dff95dc 2175static int clk_debug_register(struct clk_core *core)
035a61c3 2176{
4dff95dc 2177 int ret = 0;
035a61c3 2178
4dff95dc
SB
2179 mutex_lock(&clk_debug_lock);
2180 hlist_add_head(&core->debug_node, &clk_debug_list);
2181
2182 if (!inited)
2183 goto unlock;
2184
2185 ret = clk_debug_create_one(core, rootdir);
2186unlock:
2187 mutex_unlock(&clk_debug_lock);
2188
2189 return ret;
035a61c3 2190}
b2476490 2191
4dff95dc 2192 /**
6e5ab41b
SB
2193 * clk_debug_unregister - remove a clk node from the debugfs clk directory
2194 * @core: the clk being removed from the debugfs clk directory
e59c5371 2195 *
6e5ab41b
SB
2196 * Dynamically removes a clk and all its child nodes from the
2197 * debugfs clk directory if clk->dentry points to debugfs created by
4dff95dc 2198 * clk_debug_register in __clk_init.
e59c5371 2199 */
4dff95dc 2200static void clk_debug_unregister(struct clk_core *core)
e59c5371 2201{
4dff95dc
SB
2202 mutex_lock(&clk_debug_lock);
2203 hlist_del_init(&core->debug_node);
2204 debugfs_remove_recursive(core->dentry);
2205 core->dentry = NULL;
2206 mutex_unlock(&clk_debug_lock);
2207}
e59c5371 2208
4dff95dc
SB
2209struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode,
2210 void *data, const struct file_operations *fops)
2211{
2212 struct dentry *d = NULL;
e59c5371 2213
4dff95dc
SB
2214 if (hw->core->dentry)
2215 d = debugfs_create_file(name, mode, hw->core->dentry, data,
2216 fops);
e59c5371 2217
4dff95dc
SB
2218 return d;
2219}
2220EXPORT_SYMBOL_GPL(clk_debugfs_add_file);
e59c5371 2221
4dff95dc 2222/**
6e5ab41b 2223 * clk_debug_init - lazily populate the debugfs clk directory
4dff95dc 2224 *
6e5ab41b
SB
2225 * clks are often initialized very early during boot before memory can be
2226 * dynamically allocated and well before debugfs is setup. This function
2227 * populates the debugfs clk directory once at boot-time when we know that
2228 * debugfs is setup. It should only be called once at boot-time, all other clks
2229 * added dynamically will be done so with clk_debug_register.
4dff95dc
SB
2230 */
2231static int __init clk_debug_init(void)
2232{
2233 struct clk_core *core;
2234 struct dentry *d;
dfc202ea 2235
4dff95dc 2236 rootdir = debugfs_create_dir("clk", NULL);
e59c5371 2237
4dff95dc
SB
2238 if (!rootdir)
2239 return -ENOMEM;
dfc202ea 2240
4dff95dc
SB
2241 d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists,
2242 &clk_summary_fops);
2243 if (!d)
2244 return -ENOMEM;
e59c5371 2245
4dff95dc
SB
2246 d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists,
2247 &clk_dump_fops);
2248 if (!d)
2249 return -ENOMEM;
e59c5371 2250
4dff95dc
SB
2251 d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir,
2252 &orphan_list, &clk_summary_fops);
2253 if (!d)
2254 return -ENOMEM;
e59c5371 2255
4dff95dc
SB
2256 d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir,
2257 &orphan_list, &clk_dump_fops);
2258 if (!d)
2259 return -ENOMEM;
e59c5371 2260
4dff95dc
SB
2261 mutex_lock(&clk_debug_lock);
2262 hlist_for_each_entry(core, &clk_debug_list, debug_node)
2263 clk_debug_create_one(core, rootdir);
e59c5371 2264
4dff95dc
SB
2265 inited = 1;
2266 mutex_unlock(&clk_debug_lock);
e59c5371 2267
4dff95dc
SB
2268 return 0;
2269}
2270late_initcall(clk_debug_init);
2271#else
2272static inline int clk_debug_register(struct clk_core *core) { return 0; }
2273static inline void clk_debug_reparent(struct clk_core *core,
2274 struct clk_core *new_parent)
035a61c3 2275{
035a61c3 2276}
4dff95dc 2277static inline void clk_debug_unregister(struct clk_core *core)
3d3801ef 2278{
3d3801ef 2279}
4dff95dc 2280#endif
3d3801ef 2281
b2476490
MT
2282/**
2283 * __clk_init - initialize the data structures in a struct clk
2284 * @dev: device initializing this clk, placeholder for now
2285 * @clk: clk being initialized
2286 *
035a61c3 2287 * Initializes the lists in struct clk_core, queries the hardware for the
b2476490 2288 * parent and rate and sets them both.
b2476490 2289 */
b09d6d99 2290static int __clk_init(struct device *dev, struct clk *clk_user)
b2476490 2291{
d1302a36 2292 int i, ret = 0;
035a61c3 2293 struct clk_core *orphan;
b67bfe0d 2294 struct hlist_node *tmp2;
d6968fca 2295 struct clk_core *core;
1c8e6004 2296 unsigned long rate;
b2476490 2297
035a61c3 2298 if (!clk_user)
d1302a36 2299 return -EINVAL;
b2476490 2300
d6968fca 2301 core = clk_user->core;
035a61c3 2302
eab89f69 2303 clk_prepare_lock();
b2476490
MT
2304
2305 /* check to see if a clock with this name is already registered */
d6968fca 2306 if (clk_core_lookup(core->name)) {
d1302a36 2307 pr_debug("%s: clk %s already initialized\n",
d6968fca 2308 __func__, core->name);
d1302a36 2309 ret = -EEXIST;
b2476490 2310 goto out;
d1302a36 2311 }
b2476490 2312
d4d7e3dd 2313 /* check that clk_ops are sane. See Documentation/clk.txt */
d6968fca
SB
2314 if (core->ops->set_rate &&
2315 !((core->ops->round_rate || core->ops->determine_rate) &&
2316 core->ops->recalc_rate)) {
71472c0c 2317 pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
d6968fca 2318 __func__, core->name);
d1302a36 2319 ret = -EINVAL;
d4d7e3dd
MT
2320 goto out;
2321 }
2322
d6968fca 2323 if (core->ops->set_parent && !core->ops->get_parent) {
d4d7e3dd 2324 pr_warning("%s: %s must implement .get_parent & .set_parent\n",
d6968fca 2325 __func__, core->name);
d1302a36 2326 ret = -EINVAL;
d4d7e3dd
MT
2327 goto out;
2328 }
2329
d6968fca
SB
2330 if (core->ops->set_rate_and_parent &&
2331 !(core->ops->set_parent && core->ops->set_rate)) {
3fa2252b 2332 pr_warn("%s: %s must implement .set_parent & .set_rate\n",
d6968fca 2333 __func__, core->name);
3fa2252b
SB
2334 ret = -EINVAL;
2335 goto out;
2336 }
2337
b2476490 2338 /* throw a WARN if any entries in parent_names are NULL */
d6968fca
SB
2339 for (i = 0; i < core->num_parents; i++)
2340 WARN(!core->parent_names[i],
b2476490 2341 "%s: invalid NULL in %s's .parent_names\n",
d6968fca 2342 __func__, core->name);
b2476490
MT
2343
2344 /*
2345 * Allocate an array of struct clk *'s to avoid unnecessary string
2346 * look-ups of clk's possible parents. This can fail for clocks passed
d6968fca 2347 * in to clk_init during early boot; thus any access to core->parents[]
b2476490
MT
2348 * must always check for a NULL pointer and try to populate it if
2349 * necessary.
2350 *
d6968fca
SB
2351 * If core->parents is not NULL we skip this entire block. This allows
2352 * for clock drivers to statically initialize core->parents.
b2476490 2353 */
d6968fca
SB
2354 if (core->num_parents > 1 && !core->parents) {
2355 core->parents = kcalloc(core->num_parents, sizeof(struct clk *),
96a7ed90 2356 GFP_KERNEL);
b2476490 2357 /*
035a61c3 2358 * clk_core_lookup returns NULL for parents that have not been
b2476490
MT
2359 * clk_init'd; thus any access to clk->parents[] must check
2360 * for a NULL pointer. We can always perform lazy lookups for
2361 * missing parents later on.
2362 */
d6968fca
SB
2363 if (core->parents)
2364 for (i = 0; i < core->num_parents; i++)
2365 core->parents[i] =
2366 clk_core_lookup(core->parent_names[i]);
b2476490
MT
2367 }
2368
d6968fca 2369 core->parent = __clk_init_parent(core);
b2476490
MT
2370
2371 /*
d6968fca 2372 * Populate core->parent if parent has already been __clk_init'd. If
b2476490
MT
2373 * parent has not yet been __clk_init'd then place clk in the orphan
2374 * list. If clk has set the CLK_IS_ROOT flag then place it in the root
2375 * clk list.
2376 *
2377 * Every time a new clk is clk_init'd then we walk the list of orphan
2378 * clocks and re-parent any that are children of the clock currently
2379 * being clk_init'd.
2380 */
e6500344 2381 if (core->parent) {
d6968fca
SB
2382 hlist_add_head(&core->child_node,
2383 &core->parent->children);
e6500344
HS
2384 core->orphan = core->parent->orphan;
2385 } else if (core->flags & CLK_IS_ROOT) {
d6968fca 2386 hlist_add_head(&core->child_node, &clk_root_list);
e6500344
HS
2387 core->orphan = false;
2388 } else {
d6968fca 2389 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
2390 core->orphan = true;
2391 }
b2476490 2392
5279fc40
BB
2393 /*
2394 * Set clk's accuracy. The preferred method is to use
2395 * .recalc_accuracy. For simple clocks and lazy developers the default
2396 * fallback is to use the parent's accuracy. If a clock doesn't have a
2397 * parent (or is orphaned) then accuracy is set to zero (perfect
2398 * clock).
2399 */
d6968fca
SB
2400 if (core->ops->recalc_accuracy)
2401 core->accuracy = core->ops->recalc_accuracy(core->hw,
2402 __clk_get_accuracy(core->parent));
2403 else if (core->parent)
2404 core->accuracy = core->parent->accuracy;
5279fc40 2405 else
d6968fca 2406 core->accuracy = 0;
5279fc40 2407
9824cf73
MR
2408 /*
2409 * Set clk's phase.
2410 * Since a phase is by definition relative to its parent, just
2411 * query the current clock phase, or just assume it's in phase.
2412 */
d6968fca
SB
2413 if (core->ops->get_phase)
2414 core->phase = core->ops->get_phase(core->hw);
9824cf73 2415 else
d6968fca 2416 core->phase = 0;
9824cf73 2417
b2476490
MT
2418 /*
2419 * Set clk's rate. The preferred method is to use .recalc_rate. For
2420 * simple clocks and lazy developers the default fallback is to use the
2421 * parent's rate. If a clock doesn't have a parent (or is orphaned)
2422 * then rate is set to zero.
2423 */
d6968fca
SB
2424 if (core->ops->recalc_rate)
2425 rate = core->ops->recalc_rate(core->hw,
2426 clk_core_get_rate_nolock(core->parent));
2427 else if (core->parent)
2428 rate = core->parent->rate;
b2476490 2429 else
1c8e6004 2430 rate = 0;
d6968fca 2431 core->rate = core->req_rate = rate;
b2476490
MT
2432
2433 /*
2434 * walk the list of orphan clocks and reparent any that are children of
2435 * this clock
2436 */
b67bfe0d 2437 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
12d29886 2438 if (orphan->num_parents && orphan->ops->get_parent) {
1f61e5f1 2439 i = orphan->ops->get_parent(orphan->hw);
9054a31d
MR
2440 if (i >= 0 && i < orphan->num_parents &&
2441 !strcmp(core->name, orphan->parent_names[i]))
d6968fca 2442 clk_core_reparent(orphan, core);
1f61e5f1
MF
2443 continue;
2444 }
2445
b2476490 2446 for (i = 0; i < orphan->num_parents; i++)
d6968fca
SB
2447 if (!strcmp(core->name, orphan->parent_names[i])) {
2448 clk_core_reparent(orphan, core);
b2476490
MT
2449 break;
2450 }
1f61e5f1 2451 }
b2476490
MT
2452
2453 /*
2454 * optional platform-specific magic
2455 *
2456 * The .init callback is not used by any of the basic clock types, but
2457 * exists for weird hardware that must perform initialization magic.
2458 * Please consider other ways of solving initialization problems before
24ee1a08 2459 * using this callback, as its use is discouraged.
b2476490 2460 */
d6968fca
SB
2461 if (core->ops->init)
2462 core->ops->init(core->hw);
b2476490 2463
d6968fca 2464 kref_init(&core->ref);
b2476490 2465out:
eab89f69 2466 clk_prepare_unlock();
b2476490 2467
89f7e9de 2468 if (!ret)
d6968fca 2469 clk_debug_register(core);
89f7e9de 2470
d1302a36 2471 return ret;
b2476490
MT
2472}
2473
035a61c3
TV
2474struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
2475 const char *con_id)
0197b3ea 2476{
0197b3ea
SK
2477 struct clk *clk;
2478
035a61c3
TV
2479 /* This is to allow this function to be chained to others */
2480 if (!hw || IS_ERR(hw))
2481 return (struct clk *) hw;
0197b3ea 2482
035a61c3
TV
2483 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2484 if (!clk)
2485 return ERR_PTR(-ENOMEM);
2486
2487 clk->core = hw->core;
2488 clk->dev_id = dev_id;
2489 clk->con_id = con_id;
1c8e6004
TV
2490 clk->max_rate = ULONG_MAX;
2491
2492 clk_prepare_lock();
50595f8b 2493 hlist_add_head(&clk->clks_node, &hw->core->clks);
1c8e6004 2494 clk_prepare_unlock();
0197b3ea
SK
2495
2496 return clk;
2497}
035a61c3 2498
73e0e496 2499void __clk_free_clk(struct clk *clk)
1c8e6004
TV
2500{
2501 clk_prepare_lock();
50595f8b 2502 hlist_del(&clk->clks_node);
1c8e6004
TV
2503 clk_prepare_unlock();
2504
2505 kfree(clk);
2506}
0197b3ea 2507
293ba3b4
SB
2508/**
2509 * clk_register - allocate a new clock, register it and return an opaque cookie
2510 * @dev: device that is registering this clock
2511 * @hw: link to hardware-specific clock data
2512 *
2513 * clk_register is the primary interface for populating the clock tree with new
2514 * clock nodes. It returns a pointer to the newly allocated struct clk which
a59a5163 2515 * cannot be dereferenced by driver code but may be used in conjunction with the
293ba3b4
SB
2516 * rest of the clock API. In the event of an error clk_register will return an
2517 * error code; drivers must test for an error code after calling clk_register.
2518 */
2519struct clk *clk_register(struct device *dev, struct clk_hw *hw)
b2476490 2520{
d1302a36 2521 int i, ret;
d6968fca 2522 struct clk_core *core;
293ba3b4 2523
d6968fca
SB
2524 core = kzalloc(sizeof(*core), GFP_KERNEL);
2525 if (!core) {
293ba3b4
SB
2526 ret = -ENOMEM;
2527 goto fail_out;
2528 }
b2476490 2529
d6968fca
SB
2530 core->name = kstrdup_const(hw->init->name, GFP_KERNEL);
2531 if (!core->name) {
0197b3ea
SK
2532 ret = -ENOMEM;
2533 goto fail_name;
2534 }
d6968fca 2535 core->ops = hw->init->ops;
ac2df527 2536 if (dev && dev->driver)
d6968fca
SB
2537 core->owner = dev->driver->owner;
2538 core->hw = hw;
2539 core->flags = hw->init->flags;
2540 core->num_parents = hw->init->num_parents;
9783c0d9
SB
2541 core->min_rate = 0;
2542 core->max_rate = ULONG_MAX;
d6968fca 2543 hw->core = core;
b2476490 2544
d1302a36 2545 /* allocate local copy in case parent_names is __initdata */
d6968fca 2546 core->parent_names = kcalloc(core->num_parents, sizeof(char *),
96a7ed90 2547 GFP_KERNEL);
d1302a36 2548
d6968fca 2549 if (!core->parent_names) {
d1302a36
MT
2550 ret = -ENOMEM;
2551 goto fail_parent_names;
2552 }
2553
2554
2555 /* copy each string name in case parent_names is __initdata */
d6968fca
SB
2556 for (i = 0; i < core->num_parents; i++) {
2557 core->parent_names[i] = kstrdup_const(hw->init->parent_names[i],
0197b3ea 2558 GFP_KERNEL);
d6968fca 2559 if (!core->parent_names[i]) {
d1302a36
MT
2560 ret = -ENOMEM;
2561 goto fail_parent_names_copy;
2562 }
2563 }
2564
d6968fca 2565 INIT_HLIST_HEAD(&core->clks);
1c8e6004 2566
035a61c3
TV
2567 hw->clk = __clk_create_clk(hw, NULL, NULL);
2568 if (IS_ERR(hw->clk)) {
035a61c3
TV
2569 ret = PTR_ERR(hw->clk);
2570 goto fail_parent_names_copy;
2571 }
2572
2573 ret = __clk_init(dev, hw->clk);
d1302a36 2574 if (!ret)
035a61c3 2575 return hw->clk;
b2476490 2576
1c8e6004 2577 __clk_free_clk(hw->clk);
035a61c3 2578 hw->clk = NULL;
b2476490 2579
d1302a36
MT
2580fail_parent_names_copy:
2581 while (--i >= 0)
d6968fca
SB
2582 kfree_const(core->parent_names[i]);
2583 kfree(core->parent_names);
d1302a36 2584fail_parent_names:
d6968fca 2585 kfree_const(core->name);
0197b3ea 2586fail_name:
d6968fca 2587 kfree(core);
d1302a36
MT
2588fail_out:
2589 return ERR_PTR(ret);
b2476490
MT
2590}
2591EXPORT_SYMBOL_GPL(clk_register);
2592
6e5ab41b 2593/* Free memory allocated for a clock. */
fcb0ee6a
SN
2594static void __clk_release(struct kref *ref)
2595{
d6968fca
SB
2596 struct clk_core *core = container_of(ref, struct clk_core, ref);
2597 int i = core->num_parents;
fcb0ee6a 2598
496eadf8
KK
2599 lockdep_assert_held(&prepare_lock);
2600
d6968fca 2601 kfree(core->parents);
fcb0ee6a 2602 while (--i >= 0)
d6968fca 2603 kfree_const(core->parent_names[i]);
fcb0ee6a 2604
d6968fca
SB
2605 kfree(core->parent_names);
2606 kfree_const(core->name);
2607 kfree(core);
fcb0ee6a
SN
2608}
2609
2610/*
2611 * Empty clk_ops for unregistered clocks. These are used temporarily
2612 * after clk_unregister() was called on a clock and until last clock
2613 * consumer calls clk_put() and the struct clk object is freed.
2614 */
2615static int clk_nodrv_prepare_enable(struct clk_hw *hw)
2616{
2617 return -ENXIO;
2618}
2619
2620static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
2621{
2622 WARN_ON_ONCE(1);
2623}
2624
2625static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
2626 unsigned long parent_rate)
2627{
2628 return -ENXIO;
2629}
2630
2631static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
2632{
2633 return -ENXIO;
2634}
2635
2636static const struct clk_ops clk_nodrv_ops = {
2637 .enable = clk_nodrv_prepare_enable,
2638 .disable = clk_nodrv_disable_unprepare,
2639 .prepare = clk_nodrv_prepare_enable,
2640 .unprepare = clk_nodrv_disable_unprepare,
2641 .set_rate = clk_nodrv_set_rate,
2642 .set_parent = clk_nodrv_set_parent,
2643};
2644
1df5c939
MB
2645/**
2646 * clk_unregister - unregister a currently registered clock
2647 * @clk: clock to unregister
1df5c939 2648 */
fcb0ee6a
SN
2649void clk_unregister(struct clk *clk)
2650{
2651 unsigned long flags;
2652
6314b679
SB
2653 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
2654 return;
2655
035a61c3 2656 clk_debug_unregister(clk->core);
fcb0ee6a
SN
2657
2658 clk_prepare_lock();
2659
035a61c3
TV
2660 if (clk->core->ops == &clk_nodrv_ops) {
2661 pr_err("%s: unregistered clock: %s\n", __func__,
2662 clk->core->name);
6314b679 2663 return;
fcb0ee6a
SN
2664 }
2665 /*
2666 * Assign empty clock ops for consumers that might still hold
2667 * a reference to this clock.
2668 */
2669 flags = clk_enable_lock();
035a61c3 2670 clk->core->ops = &clk_nodrv_ops;
fcb0ee6a
SN
2671 clk_enable_unlock(flags);
2672
035a61c3
TV
2673 if (!hlist_empty(&clk->core->children)) {
2674 struct clk_core *child;
874f224c 2675 struct hlist_node *t;
fcb0ee6a
SN
2676
2677 /* Reparent all children to the orphan list. */
035a61c3
TV
2678 hlist_for_each_entry_safe(child, t, &clk->core->children,
2679 child_node)
2680 clk_core_set_parent(child, NULL);
fcb0ee6a
SN
2681 }
2682
035a61c3 2683 hlist_del_init(&clk->core->child_node);
fcb0ee6a 2684
035a61c3 2685 if (clk->core->prepare_count)
fcb0ee6a 2686 pr_warn("%s: unregistering prepared clock: %s\n",
035a61c3
TV
2687 __func__, clk->core->name);
2688 kref_put(&clk->core->ref, __clk_release);
6314b679 2689
fcb0ee6a
SN
2690 clk_prepare_unlock();
2691}
1df5c939
MB
2692EXPORT_SYMBOL_GPL(clk_unregister);
2693
46c8773a
SB
2694static void devm_clk_release(struct device *dev, void *res)
2695{
293ba3b4 2696 clk_unregister(*(struct clk **)res);
46c8773a
SB
2697}
2698
2699/**
2700 * devm_clk_register - resource managed clk_register()
2701 * @dev: device that is registering this clock
2702 * @hw: link to hardware-specific clock data
2703 *
2704 * Managed clk_register(). Clocks returned from this function are
2705 * automatically clk_unregister()ed on driver detach. See clk_register() for
2706 * more information.
2707 */
2708struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
2709{
2710 struct clk *clk;
293ba3b4 2711 struct clk **clkp;
46c8773a 2712
293ba3b4
SB
2713 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
2714 if (!clkp)
46c8773a
SB
2715 return ERR_PTR(-ENOMEM);
2716
293ba3b4
SB
2717 clk = clk_register(dev, hw);
2718 if (!IS_ERR(clk)) {
2719 *clkp = clk;
2720 devres_add(dev, clkp);
46c8773a 2721 } else {
293ba3b4 2722 devres_free(clkp);
46c8773a
SB
2723 }
2724
2725 return clk;
2726}
2727EXPORT_SYMBOL_GPL(devm_clk_register);
2728
2729static int devm_clk_match(struct device *dev, void *res, void *data)
2730{
2731 struct clk *c = res;
2732 if (WARN_ON(!c))
2733 return 0;
2734 return c == data;
2735}
2736
2737/**
2738 * devm_clk_unregister - resource managed clk_unregister()
2739 * @clk: clock to unregister
2740 *
2741 * Deallocate a clock allocated with devm_clk_register(). Normally
2742 * this function will not need to be called and the resource management
2743 * code will ensure that the resource is freed.
2744 */
2745void devm_clk_unregister(struct device *dev, struct clk *clk)
2746{
2747 WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
2748}
2749EXPORT_SYMBOL_GPL(devm_clk_unregister);
2750
ac2df527
SN
2751/*
2752 * clkdev helpers
2753 */
2754int __clk_get(struct clk *clk)
2755{
035a61c3
TV
2756 struct clk_core *core = !clk ? NULL : clk->core;
2757
2758 if (core) {
2759 if (!try_module_get(core->owner))
00efcb1c 2760 return 0;
ac2df527 2761
035a61c3 2762 kref_get(&core->ref);
00efcb1c 2763 }
ac2df527
SN
2764 return 1;
2765}
2766
2767void __clk_put(struct clk *clk)
2768{
10cdfe54
TV
2769 struct module *owner;
2770
00efcb1c 2771 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
ac2df527
SN
2772 return;
2773
fcb0ee6a 2774 clk_prepare_lock();
1c8e6004 2775
50595f8b 2776 hlist_del(&clk->clks_node);
ec02ace8
TV
2777 if (clk->min_rate > clk->core->req_rate ||
2778 clk->max_rate < clk->core->req_rate)
2779 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
2780
1c8e6004
TV
2781 owner = clk->core->owner;
2782 kref_put(&clk->core->ref, __clk_release);
2783
fcb0ee6a
SN
2784 clk_prepare_unlock();
2785
10cdfe54 2786 module_put(owner);
035a61c3 2787
035a61c3 2788 kfree(clk);
ac2df527
SN
2789}
2790
b2476490
MT
2791/*** clk rate change notifiers ***/
2792
2793/**
2794 * clk_notifier_register - add a clk rate change notifier
2795 * @clk: struct clk * to watch
2796 * @nb: struct notifier_block * with callback info
2797 *
2798 * Request notification when clk's rate changes. This uses an SRCU
2799 * notifier because we want it to block and notifier unregistrations are
2800 * uncommon. The callbacks associated with the notifier must not
2801 * re-enter into the clk framework by calling any top-level clk APIs;
2802 * this will cause a nested prepare_lock mutex.
2803 *
5324fda7
SB
2804 * In all notification cases cases (pre, post and abort rate change) the
2805 * original clock rate is passed to the callback via struct
2806 * clk_notifier_data.old_rate and the new frequency is passed via struct
b2476490
MT
2807 * clk_notifier_data.new_rate.
2808 *
b2476490
MT
2809 * clk_notifier_register() must be called from non-atomic context.
2810 * Returns -EINVAL if called with null arguments, -ENOMEM upon
2811 * allocation failure; otherwise, passes along the return value of
2812 * srcu_notifier_chain_register().
2813 */
2814int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
2815{
2816 struct clk_notifier *cn;
2817 int ret = -ENOMEM;
2818
2819 if (!clk || !nb)
2820 return -EINVAL;
2821
eab89f69 2822 clk_prepare_lock();
b2476490
MT
2823
2824 /* search the list of notifiers for this clk */
2825 list_for_each_entry(cn, &clk_notifier_list, node)
2826 if (cn->clk == clk)
2827 break;
2828
2829 /* if clk wasn't in the notifier list, allocate new clk_notifier */
2830 if (cn->clk != clk) {
2831 cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL);
2832 if (!cn)
2833 goto out;
2834
2835 cn->clk = clk;
2836 srcu_init_notifier_head(&cn->notifier_head);
2837
2838 list_add(&cn->node, &clk_notifier_list);
2839 }
2840
2841 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
2842
035a61c3 2843 clk->core->notifier_count++;
b2476490
MT
2844
2845out:
eab89f69 2846 clk_prepare_unlock();
b2476490
MT
2847
2848 return ret;
2849}
2850EXPORT_SYMBOL_GPL(clk_notifier_register);
2851
2852/**
2853 * clk_notifier_unregister - remove a clk rate change notifier
2854 * @clk: struct clk *
2855 * @nb: struct notifier_block * with callback info
2856 *
2857 * Request no further notification for changes to 'clk' and frees memory
2858 * allocated in clk_notifier_register.
2859 *
2860 * Returns -EINVAL if called with null arguments; otherwise, passes
2861 * along the return value of srcu_notifier_chain_unregister().
2862 */
2863int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
2864{
2865 struct clk_notifier *cn = NULL;
2866 int ret = -EINVAL;
2867
2868 if (!clk || !nb)
2869 return -EINVAL;
2870
eab89f69 2871 clk_prepare_lock();
b2476490
MT
2872
2873 list_for_each_entry(cn, &clk_notifier_list, node)
2874 if (cn->clk == clk)
2875 break;
2876
2877 if (cn->clk == clk) {
2878 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
2879
035a61c3 2880 clk->core->notifier_count--;
b2476490
MT
2881
2882 /* XXX the notifier code should handle this better */
2883 if (!cn->notifier_head.head) {
2884 srcu_cleanup_notifier_head(&cn->notifier_head);
72b5322f 2885 list_del(&cn->node);
b2476490
MT
2886 kfree(cn);
2887 }
2888
2889 } else {
2890 ret = -ENOENT;
2891 }
2892
eab89f69 2893 clk_prepare_unlock();
b2476490
MT
2894
2895 return ret;
2896}
2897EXPORT_SYMBOL_GPL(clk_notifier_unregister);
766e6a4e
GL
2898
2899#ifdef CONFIG_OF
2900/**
2901 * struct of_clk_provider - Clock provider registration structure
2902 * @link: Entry in global list of clock providers
2903 * @node: Pointer to device tree node of clock provider
2904 * @get: Get clock callback. Returns NULL or a struct clk for the
2905 * given clock specifier
2906 * @data: context pointer to be passed into @get callback
2907 */
2908struct of_clk_provider {
2909 struct list_head link;
2910
2911 struct device_node *node;
2912 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
2913 void *data;
2914};
2915
f2f6c255
PG
2916static const struct of_device_id __clk_of_table_sentinel
2917 __used __section(__clk_of_table_end);
2918
766e6a4e 2919static LIST_HEAD(of_clk_providers);
d6782c26
SN
2920static DEFINE_MUTEX(of_clk_mutex);
2921
766e6a4e
GL
2922struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
2923 void *data)
2924{
2925 return data;
2926}
2927EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
2928
494bfec9
SG
2929struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
2930{
2931 struct clk_onecell_data *clk_data = data;
2932 unsigned int idx = clkspec->args[0];
2933
2934 if (idx >= clk_data->clk_num) {
2935 pr_err("%s: invalid clock index %d\n", __func__, idx);
2936 return ERR_PTR(-EINVAL);
2937 }
2938
2939 return clk_data->clks[idx];
2940}
2941EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
2942
766e6a4e
GL
2943/**
2944 * of_clk_add_provider() - Register a clock provider for a node
2945 * @np: Device node pointer associated with clock provider
2946 * @clk_src_get: callback for decoding clock
2947 * @data: context pointer for @clk_src_get callback.
2948 */
2949int of_clk_add_provider(struct device_node *np,
2950 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
2951 void *data),
2952 void *data)
2953{
2954 struct of_clk_provider *cp;
86be408b 2955 int ret;
766e6a4e
GL
2956
2957 cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL);
2958 if (!cp)
2959 return -ENOMEM;
2960
2961 cp->node = of_node_get(np);
2962 cp->data = data;
2963 cp->get = clk_src_get;
2964
d6782c26 2965 mutex_lock(&of_clk_mutex);
766e6a4e 2966 list_add(&cp->link, &of_clk_providers);
d6782c26 2967 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2968 pr_debug("Added clock from %s\n", np->full_name);
2969
86be408b
SN
2970 ret = of_clk_set_defaults(np, true);
2971 if (ret < 0)
2972 of_clk_del_provider(np);
2973
2974 return ret;
766e6a4e
GL
2975}
2976EXPORT_SYMBOL_GPL(of_clk_add_provider);
2977
2978/**
2979 * of_clk_del_provider() - Remove a previously registered clock provider
2980 * @np: Device node pointer associated with clock provider
2981 */
2982void of_clk_del_provider(struct device_node *np)
2983{
2984 struct of_clk_provider *cp;
2985
d6782c26 2986 mutex_lock(&of_clk_mutex);
766e6a4e
GL
2987 list_for_each_entry(cp, &of_clk_providers, link) {
2988 if (cp->node == np) {
2989 list_del(&cp->link);
2990 of_node_put(cp->node);
2991 kfree(cp);
2992 break;
2993 }
2994 }
d6782c26 2995 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2996}
2997EXPORT_SYMBOL_GPL(of_clk_del_provider);
2998
73e0e496
SB
2999struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
3000 const char *dev_id, const char *con_id)
766e6a4e
GL
3001{
3002 struct of_clk_provider *provider;
a34cd466 3003 struct clk *clk = ERR_PTR(-EPROBE_DEFER);
766e6a4e 3004
306c342f
SB
3005 if (!clkspec)
3006 return ERR_PTR(-EINVAL);
3007
766e6a4e 3008 /* Check if we have such a provider in our array */
306c342f 3009 mutex_lock(&of_clk_mutex);
766e6a4e
GL
3010 list_for_each_entry(provider, &of_clk_providers, link) {
3011 if (provider->node == clkspec->np)
3012 clk = provider->get(clkspec, provider->data);
73e0e496
SB
3013 if (!IS_ERR(clk)) {
3014 clk = __clk_create_clk(__clk_get_hw(clk), dev_id,
3015 con_id);
3016
3017 if (!IS_ERR(clk) && !__clk_get(clk)) {
3018 __clk_free_clk(clk);
3019 clk = ERR_PTR(-ENOENT);
3020 }
3021
766e6a4e 3022 break;
73e0e496 3023 }
766e6a4e 3024 }
306c342f 3025 mutex_unlock(&of_clk_mutex);
d6782c26
SN
3026
3027 return clk;
3028}
3029
306c342f
SB
3030/**
3031 * of_clk_get_from_provider() - Lookup a clock from a clock provider
3032 * @clkspec: pointer to a clock specifier data structure
3033 *
3034 * This function looks up a struct clk from the registered list of clock
3035 * providers, an input is a clock specifier data structure as returned
3036 * from the of_parse_phandle_with_args() function call.
3037 */
d6782c26
SN
3038struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
3039{
306c342f 3040 return __of_clk_get_from_provider(clkspec, NULL, __func__);
766e6a4e
GL
3041}
3042
f6102742
MT
3043int of_clk_get_parent_count(struct device_node *np)
3044{
3045 return of_count_phandle_with_args(np, "clocks", "#clock-cells");
3046}
3047EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
3048
766e6a4e
GL
3049const char *of_clk_get_parent_name(struct device_node *np, int index)
3050{
3051 struct of_phandle_args clkspec;
7a0fc1a3 3052 struct property *prop;
766e6a4e 3053 const char *clk_name;
7a0fc1a3
BD
3054 const __be32 *vp;
3055 u32 pv;
766e6a4e 3056 int rc;
7a0fc1a3 3057 int count;
766e6a4e
GL
3058
3059 if (index < 0)
3060 return NULL;
3061
3062 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
3063 &clkspec);
3064 if (rc)
3065 return NULL;
3066
7a0fc1a3
BD
3067 index = clkspec.args_count ? clkspec.args[0] : 0;
3068 count = 0;
3069
3070 /* if there is an indices property, use it to transfer the index
3071 * specified into an array offset for the clock-output-names property.
3072 */
3073 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
3074 if (index == pv) {
3075 index = count;
3076 break;
3077 }
3078 count++;
3079 }
3080
766e6a4e 3081 if (of_property_read_string_index(clkspec.np, "clock-output-names",
7a0fc1a3 3082 index,
766e6a4e
GL
3083 &clk_name) < 0)
3084 clk_name = clkspec.np->name;
3085
3086 of_node_put(clkspec.np);
3087 return clk_name;
3088}
3089EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
3090
2e61dfb3
DN
3091/**
3092 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
3093 * number of parents
3094 * @np: Device node pointer associated with clock provider
3095 * @parents: pointer to char array that hold the parents' names
3096 * @size: size of the @parents array
3097 *
3098 * Return: number of parents for the clock node.
3099 */
3100int of_clk_parent_fill(struct device_node *np, const char **parents,
3101 unsigned int size)
3102{
3103 unsigned int i = 0;
3104
3105 while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
3106 i++;
3107
3108 return i;
3109}
3110EXPORT_SYMBOL_GPL(of_clk_parent_fill);
3111
1771b10d
GC
3112struct clock_provider {
3113 of_clk_init_cb_t clk_init_cb;
3114 struct device_node *np;
3115 struct list_head node;
3116};
3117
1771b10d
GC
3118/*
3119 * This function looks for a parent clock. If there is one, then it
3120 * checks that the provider for this parent clock was initialized, in
3121 * this case the parent clock will be ready.
3122 */
3123static int parent_ready(struct device_node *np)
3124{
3125 int i = 0;
3126
3127 while (true) {
3128 struct clk *clk = of_clk_get(np, i);
3129
3130 /* this parent is ready we can check the next one */
3131 if (!IS_ERR(clk)) {
3132 clk_put(clk);
3133 i++;
3134 continue;
3135 }
3136
3137 /* at least one parent is not ready, we exit now */
3138 if (PTR_ERR(clk) == -EPROBE_DEFER)
3139 return 0;
3140
3141 /*
3142 * Here we make assumption that the device tree is
3143 * written correctly. So an error means that there is
3144 * no more parent. As we didn't exit yet, then the
3145 * previous parent are ready. If there is no clock
3146 * parent, no need to wait for them, then we can
3147 * consider their absence as being ready
3148 */
3149 return 1;
3150 }
3151}
3152
766e6a4e
GL
3153/**
3154 * of_clk_init() - Scan and init clock providers from the DT
3155 * @matches: array of compatible values and init functions for providers.
3156 *
1771b10d 3157 * This function scans the device tree for matching clock providers
e5ca8fb4 3158 * and calls their initialization functions. It also does it by trying
1771b10d 3159 * to follow the dependencies.
766e6a4e
GL
3160 */
3161void __init of_clk_init(const struct of_device_id *matches)
3162{
7f7ed584 3163 const struct of_device_id *match;
766e6a4e 3164 struct device_node *np;
1771b10d
GC
3165 struct clock_provider *clk_provider, *next;
3166 bool is_init_done;
3167 bool force = false;
2573a02a 3168 LIST_HEAD(clk_provider_list);
766e6a4e 3169
f2f6c255 3170 if (!matches)
819b4861 3171 matches = &__clk_of_table;
f2f6c255 3172
1771b10d 3173 /* First prepare the list of the clocks providers */
7f7ed584 3174 for_each_matching_node_and_match(np, matches, &match) {
2e3b19f1
SB
3175 struct clock_provider *parent;
3176
3177 parent = kzalloc(sizeof(*parent), GFP_KERNEL);
3178 if (!parent) {
3179 list_for_each_entry_safe(clk_provider, next,
3180 &clk_provider_list, node) {
3181 list_del(&clk_provider->node);
3182 kfree(clk_provider);
3183 }
3184 return;
3185 }
1771b10d
GC
3186
3187 parent->clk_init_cb = match->data;
3188 parent->np = np;
3f6d439f 3189 list_add_tail(&parent->node, &clk_provider_list);
1771b10d
GC
3190 }
3191
3192 while (!list_empty(&clk_provider_list)) {
3193 is_init_done = false;
3194 list_for_each_entry_safe(clk_provider, next,
3195 &clk_provider_list, node) {
3196 if (force || parent_ready(clk_provider->np)) {
86be408b 3197
1771b10d 3198 clk_provider->clk_init_cb(clk_provider->np);
86be408b
SN
3199 of_clk_set_defaults(clk_provider->np, true);
3200
1771b10d
GC
3201 list_del(&clk_provider->node);
3202 kfree(clk_provider);
3203 is_init_done = true;
3204 }
3205 }
3206
3207 /*
e5ca8fb4 3208 * We didn't manage to initialize any of the
1771b10d
GC
3209 * remaining providers during the last loop, so now we
3210 * initialize all the remaining ones unconditionally
3211 * in case the clock parent was not mandatory
3212 */
3213 if (!is_init_done)
3214 force = true;
766e6a4e
GL
3215 }
3216}
3217#endif