Commit | Line | Data |
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b2476490 MT |
1 | /* |
2 | * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> | |
3 | * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * Standard functionality for the common clock API. See Documentation/clk.txt | |
10 | */ | |
11 | ||
3c373117 | 12 | #include <linux/clk.h> |
b09d6d99 | 13 | #include <linux/clk-provider.h> |
86be408b | 14 | #include <linux/clk/clk-conf.h> |
b2476490 MT |
15 | #include <linux/module.h> |
16 | #include <linux/mutex.h> | |
17 | #include <linux/spinlock.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/list.h> | |
20 | #include <linux/slab.h> | |
766e6a4e | 21 | #include <linux/of.h> |
46c8773a | 22 | #include <linux/device.h> |
f2f6c255 | 23 | #include <linux/init.h> |
9a34b453 | 24 | #include <linux/pm_runtime.h> |
533ddeb1 | 25 | #include <linux/sched.h> |
562ef0b0 | 26 | #include <linux/clkdev.h> |
b2476490 | 27 | |
d6782c26 SN |
28 | #include "clk.h" |
29 | ||
b2476490 MT |
30 | static DEFINE_SPINLOCK(enable_lock); |
31 | static DEFINE_MUTEX(prepare_lock); | |
32 | ||
533ddeb1 MT |
33 | static struct task_struct *prepare_owner; |
34 | static struct task_struct *enable_owner; | |
35 | ||
36 | static int prepare_refcnt; | |
37 | static int enable_refcnt; | |
38 | ||
b2476490 MT |
39 | static HLIST_HEAD(clk_root_list); |
40 | static HLIST_HEAD(clk_orphan_list); | |
41 | static LIST_HEAD(clk_notifier_list); | |
42 | ||
b09d6d99 MT |
43 | /*** private data structures ***/ |
44 | ||
45 | struct clk_core { | |
46 | const char *name; | |
47 | const struct clk_ops *ops; | |
48 | struct clk_hw *hw; | |
49 | struct module *owner; | |
9a34b453 | 50 | struct device *dev; |
b09d6d99 MT |
51 | struct clk_core *parent; |
52 | const char **parent_names; | |
53 | struct clk_core **parents; | |
54 | u8 num_parents; | |
55 | u8 new_parent_index; | |
56 | unsigned long rate; | |
1c8e6004 | 57 | unsigned long req_rate; |
b09d6d99 MT |
58 | unsigned long new_rate; |
59 | struct clk_core *new_parent; | |
60 | struct clk_core *new_child; | |
61 | unsigned long flags; | |
e6500344 | 62 | bool orphan; |
b09d6d99 MT |
63 | unsigned int enable_count; |
64 | unsigned int prepare_count; | |
9783c0d9 SB |
65 | unsigned long min_rate; |
66 | unsigned long max_rate; | |
b09d6d99 MT |
67 | unsigned long accuracy; |
68 | int phase; | |
69 | struct hlist_head children; | |
70 | struct hlist_node child_node; | |
1c8e6004 | 71 | struct hlist_head clks; |
b09d6d99 MT |
72 | unsigned int notifier_count; |
73 | #ifdef CONFIG_DEBUG_FS | |
74 | struct dentry *dentry; | |
8c9a8a8f | 75 | struct hlist_node debug_node; |
b09d6d99 MT |
76 | #endif |
77 | struct kref ref; | |
78 | }; | |
79 | ||
dfc202ea SB |
80 | #define CREATE_TRACE_POINTS |
81 | #include <trace/events/clk.h> | |
82 | ||
b09d6d99 MT |
83 | struct clk { |
84 | struct clk_core *core; | |
85 | const char *dev_id; | |
86 | const char *con_id; | |
1c8e6004 TV |
87 | unsigned long min_rate; |
88 | unsigned long max_rate; | |
50595f8b | 89 | struct hlist_node clks_node; |
b09d6d99 MT |
90 | }; |
91 | ||
9a34b453 MS |
92 | /*** runtime pm ***/ |
93 | static int clk_pm_runtime_get(struct clk_core *core) | |
94 | { | |
95 | int ret = 0; | |
96 | ||
97 | if (!core->dev) | |
98 | return 0; | |
99 | ||
100 | ret = pm_runtime_get_sync(core->dev); | |
101 | return ret < 0 ? ret : 0; | |
102 | } | |
103 | ||
104 | static void clk_pm_runtime_put(struct clk_core *core) | |
105 | { | |
106 | if (!core->dev) | |
107 | return; | |
108 | ||
109 | pm_runtime_put_sync(core->dev); | |
110 | } | |
111 | ||
eab89f69 MT |
112 | /*** locking ***/ |
113 | static void clk_prepare_lock(void) | |
114 | { | |
533ddeb1 MT |
115 | if (!mutex_trylock(&prepare_lock)) { |
116 | if (prepare_owner == current) { | |
117 | prepare_refcnt++; | |
118 | return; | |
119 | } | |
120 | mutex_lock(&prepare_lock); | |
121 | } | |
122 | WARN_ON_ONCE(prepare_owner != NULL); | |
123 | WARN_ON_ONCE(prepare_refcnt != 0); | |
124 | prepare_owner = current; | |
125 | prepare_refcnt = 1; | |
eab89f69 MT |
126 | } |
127 | ||
128 | static void clk_prepare_unlock(void) | |
129 | { | |
533ddeb1 MT |
130 | WARN_ON_ONCE(prepare_owner != current); |
131 | WARN_ON_ONCE(prepare_refcnt == 0); | |
132 | ||
133 | if (--prepare_refcnt) | |
134 | return; | |
135 | prepare_owner = NULL; | |
eab89f69 MT |
136 | mutex_unlock(&prepare_lock); |
137 | } | |
138 | ||
139 | static unsigned long clk_enable_lock(void) | |
a57aa185 | 140 | __acquires(enable_lock) |
eab89f69 MT |
141 | { |
142 | unsigned long flags; | |
533ddeb1 MT |
143 | |
144 | if (!spin_trylock_irqsave(&enable_lock, flags)) { | |
145 | if (enable_owner == current) { | |
146 | enable_refcnt++; | |
a57aa185 | 147 | __acquire(enable_lock); |
533ddeb1 MT |
148 | return flags; |
149 | } | |
150 | spin_lock_irqsave(&enable_lock, flags); | |
151 | } | |
152 | WARN_ON_ONCE(enable_owner != NULL); | |
153 | WARN_ON_ONCE(enable_refcnt != 0); | |
154 | enable_owner = current; | |
155 | enable_refcnt = 1; | |
eab89f69 MT |
156 | return flags; |
157 | } | |
158 | ||
159 | static void clk_enable_unlock(unsigned long flags) | |
a57aa185 | 160 | __releases(enable_lock) |
eab89f69 | 161 | { |
533ddeb1 MT |
162 | WARN_ON_ONCE(enable_owner != current); |
163 | WARN_ON_ONCE(enable_refcnt == 0); | |
164 | ||
a57aa185 SB |
165 | if (--enable_refcnt) { |
166 | __release(enable_lock); | |
533ddeb1 | 167 | return; |
a57aa185 | 168 | } |
533ddeb1 | 169 | enable_owner = NULL; |
eab89f69 MT |
170 | spin_unlock_irqrestore(&enable_lock, flags); |
171 | } | |
172 | ||
4dff95dc SB |
173 | static bool clk_core_is_prepared(struct clk_core *core) |
174 | { | |
9a34b453 MS |
175 | bool ret = false; |
176 | ||
4dff95dc SB |
177 | /* |
178 | * .is_prepared is optional for clocks that can prepare | |
179 | * fall back to software usage counter if it is missing | |
180 | */ | |
181 | if (!core->ops->is_prepared) | |
182 | return core->prepare_count; | |
b2476490 | 183 | |
9a34b453 MS |
184 | if (!clk_pm_runtime_get(core)) { |
185 | ret = core->ops->is_prepared(core->hw); | |
186 | clk_pm_runtime_put(core); | |
187 | } | |
188 | ||
189 | return ret; | |
4dff95dc | 190 | } |
b2476490 | 191 | |
4dff95dc SB |
192 | static bool clk_core_is_enabled(struct clk_core *core) |
193 | { | |
9a34b453 MS |
194 | bool ret = false; |
195 | ||
4dff95dc SB |
196 | /* |
197 | * .is_enabled is only mandatory for clocks that gate | |
198 | * fall back to software usage counter if .is_enabled is missing | |
199 | */ | |
200 | if (!core->ops->is_enabled) | |
201 | return core->enable_count; | |
6b44c854 | 202 | |
9a34b453 MS |
203 | /* |
204 | * Check if clock controller's device is runtime active before | |
205 | * calling .is_enabled callback. If not, assume that clock is | |
206 | * disabled, because we might be called from atomic context, from | |
207 | * which pm_runtime_get() is not allowed. | |
208 | * This function is called mainly from clk_disable_unused_subtree, | |
209 | * which ensures proper runtime pm activation of controller before | |
210 | * taking enable spinlock, but the below check is needed if one tries | |
211 | * to call it from other places. | |
212 | */ | |
213 | if (core->dev) { | |
214 | pm_runtime_get_noresume(core->dev); | |
215 | if (!pm_runtime_active(core->dev)) { | |
216 | ret = false; | |
217 | goto done; | |
218 | } | |
219 | } | |
220 | ||
221 | ret = core->ops->is_enabled(core->hw); | |
222 | done: | |
756efe13 DA |
223 | if (core->dev) |
224 | pm_runtime_put(core->dev); | |
9a34b453 MS |
225 | |
226 | return ret; | |
4dff95dc | 227 | } |
6b44c854 | 228 | |
4dff95dc | 229 | /*** helper functions ***/ |
1af599df | 230 | |
b76281cb | 231 | const char *__clk_get_name(const struct clk *clk) |
1af599df | 232 | { |
4dff95dc | 233 | return !clk ? NULL : clk->core->name; |
1af599df | 234 | } |
4dff95dc | 235 | EXPORT_SYMBOL_GPL(__clk_get_name); |
1af599df | 236 | |
e7df6f6e | 237 | const char *clk_hw_get_name(const struct clk_hw *hw) |
1a9c069c SB |
238 | { |
239 | return hw->core->name; | |
240 | } | |
241 | EXPORT_SYMBOL_GPL(clk_hw_get_name); | |
242 | ||
4dff95dc SB |
243 | struct clk_hw *__clk_get_hw(struct clk *clk) |
244 | { | |
245 | return !clk ? NULL : clk->core->hw; | |
246 | } | |
247 | EXPORT_SYMBOL_GPL(__clk_get_hw); | |
1af599df | 248 | |
e7df6f6e | 249 | unsigned int clk_hw_get_num_parents(const struct clk_hw *hw) |
1a9c069c SB |
250 | { |
251 | return hw->core->num_parents; | |
252 | } | |
253 | EXPORT_SYMBOL_GPL(clk_hw_get_num_parents); | |
254 | ||
e7df6f6e | 255 | struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw) |
1a9c069c SB |
256 | { |
257 | return hw->core->parent ? hw->core->parent->hw : NULL; | |
258 | } | |
259 | EXPORT_SYMBOL_GPL(clk_hw_get_parent); | |
260 | ||
4dff95dc SB |
261 | static struct clk_core *__clk_lookup_subtree(const char *name, |
262 | struct clk_core *core) | |
bddca894 | 263 | { |
035a61c3 | 264 | struct clk_core *child; |
4dff95dc | 265 | struct clk_core *ret; |
bddca894 | 266 | |
4dff95dc SB |
267 | if (!strcmp(core->name, name)) |
268 | return core; | |
bddca894 | 269 | |
4dff95dc SB |
270 | hlist_for_each_entry(child, &core->children, child_node) { |
271 | ret = __clk_lookup_subtree(name, child); | |
272 | if (ret) | |
273 | return ret; | |
bddca894 PG |
274 | } |
275 | ||
4dff95dc | 276 | return NULL; |
bddca894 PG |
277 | } |
278 | ||
4dff95dc | 279 | static struct clk_core *clk_core_lookup(const char *name) |
bddca894 | 280 | { |
4dff95dc SB |
281 | struct clk_core *root_clk; |
282 | struct clk_core *ret; | |
bddca894 | 283 | |
4dff95dc SB |
284 | if (!name) |
285 | return NULL; | |
bddca894 | 286 | |
4dff95dc SB |
287 | /* search the 'proper' clk tree first */ |
288 | hlist_for_each_entry(root_clk, &clk_root_list, child_node) { | |
289 | ret = __clk_lookup_subtree(name, root_clk); | |
290 | if (ret) | |
291 | return ret; | |
bddca894 PG |
292 | } |
293 | ||
4dff95dc SB |
294 | /* if not found, then search the orphan tree */ |
295 | hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) { | |
296 | ret = __clk_lookup_subtree(name, root_clk); | |
297 | if (ret) | |
298 | return ret; | |
299 | } | |
bddca894 | 300 | |
4dff95dc | 301 | return NULL; |
bddca894 PG |
302 | } |
303 | ||
4dff95dc SB |
304 | static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core, |
305 | u8 index) | |
bddca894 | 306 | { |
4dff95dc SB |
307 | if (!core || index >= core->num_parents) |
308 | return NULL; | |
88cfbef2 MY |
309 | |
310 | if (!core->parents[index]) | |
311 | core->parents[index] = | |
312 | clk_core_lookup(core->parent_names[index]); | |
313 | ||
314 | return core->parents[index]; | |
bddca894 PG |
315 | } |
316 | ||
e7df6f6e SB |
317 | struct clk_hw * |
318 | clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index) | |
1a9c069c SB |
319 | { |
320 | struct clk_core *parent; | |
321 | ||
322 | parent = clk_core_get_parent_by_index(hw->core, index); | |
323 | ||
324 | return !parent ? NULL : parent->hw; | |
325 | } | |
326 | EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index); | |
327 | ||
4dff95dc SB |
328 | unsigned int __clk_get_enable_count(struct clk *clk) |
329 | { | |
330 | return !clk ? 0 : clk->core->enable_count; | |
331 | } | |
b2476490 | 332 | |
4dff95dc SB |
333 | static unsigned long clk_core_get_rate_nolock(struct clk_core *core) |
334 | { | |
335 | unsigned long ret; | |
b2476490 | 336 | |
4dff95dc SB |
337 | if (!core) { |
338 | ret = 0; | |
339 | goto out; | |
340 | } | |
b2476490 | 341 | |
4dff95dc | 342 | ret = core->rate; |
b2476490 | 343 | |
47b0eeb3 | 344 | if (!core->num_parents) |
4dff95dc | 345 | goto out; |
c646cbf1 | 346 | |
4dff95dc SB |
347 | if (!core->parent) |
348 | ret = 0; | |
b2476490 | 349 | |
b2476490 MT |
350 | out: |
351 | return ret; | |
352 | } | |
353 | ||
e7df6f6e | 354 | unsigned long clk_hw_get_rate(const struct clk_hw *hw) |
1a9c069c SB |
355 | { |
356 | return clk_core_get_rate_nolock(hw->core); | |
357 | } | |
358 | EXPORT_SYMBOL_GPL(clk_hw_get_rate); | |
359 | ||
4dff95dc SB |
360 | static unsigned long __clk_get_accuracy(struct clk_core *core) |
361 | { | |
362 | if (!core) | |
363 | return 0; | |
b2476490 | 364 | |
4dff95dc | 365 | return core->accuracy; |
b2476490 MT |
366 | } |
367 | ||
4dff95dc | 368 | unsigned long __clk_get_flags(struct clk *clk) |
fcb0ee6a | 369 | { |
4dff95dc | 370 | return !clk ? 0 : clk->core->flags; |
fcb0ee6a | 371 | } |
4dff95dc | 372 | EXPORT_SYMBOL_GPL(__clk_get_flags); |
fcb0ee6a | 373 | |
e7df6f6e | 374 | unsigned long clk_hw_get_flags(const struct clk_hw *hw) |
1a9c069c SB |
375 | { |
376 | return hw->core->flags; | |
377 | } | |
378 | EXPORT_SYMBOL_GPL(clk_hw_get_flags); | |
379 | ||
e7df6f6e | 380 | bool clk_hw_is_prepared(const struct clk_hw *hw) |
1a9c069c SB |
381 | { |
382 | return clk_core_is_prepared(hw->core); | |
383 | } | |
384 | ||
be68bf88 JE |
385 | bool clk_hw_is_enabled(const struct clk_hw *hw) |
386 | { | |
387 | return clk_core_is_enabled(hw->core); | |
388 | } | |
389 | ||
4dff95dc | 390 | bool __clk_is_enabled(struct clk *clk) |
b2476490 | 391 | { |
4dff95dc SB |
392 | if (!clk) |
393 | return false; | |
b2476490 | 394 | |
4dff95dc SB |
395 | return clk_core_is_enabled(clk->core); |
396 | } | |
397 | EXPORT_SYMBOL_GPL(__clk_is_enabled); | |
b2476490 | 398 | |
4dff95dc SB |
399 | static bool mux_is_better_rate(unsigned long rate, unsigned long now, |
400 | unsigned long best, unsigned long flags) | |
401 | { | |
402 | if (flags & CLK_MUX_ROUND_CLOSEST) | |
403 | return abs(now - rate) < abs(best - rate); | |
1af599df | 404 | |
4dff95dc SB |
405 | return now <= rate && now > best; |
406 | } | |
bddca894 | 407 | |
0817b62c BB |
408 | static int |
409 | clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req, | |
4dff95dc SB |
410 | unsigned long flags) |
411 | { | |
412 | struct clk_core *core = hw->core, *parent, *best_parent = NULL; | |
0817b62c BB |
413 | int i, num_parents, ret; |
414 | unsigned long best = 0; | |
415 | struct clk_rate_request parent_req = *req; | |
b2476490 | 416 | |
4dff95dc SB |
417 | /* if NO_REPARENT flag set, pass through to current parent */ |
418 | if (core->flags & CLK_SET_RATE_NO_REPARENT) { | |
419 | parent = core->parent; | |
0817b62c BB |
420 | if (core->flags & CLK_SET_RATE_PARENT) { |
421 | ret = __clk_determine_rate(parent ? parent->hw : NULL, | |
422 | &parent_req); | |
423 | if (ret) | |
424 | return ret; | |
425 | ||
426 | best = parent_req.rate; | |
427 | } else if (parent) { | |
4dff95dc | 428 | best = clk_core_get_rate_nolock(parent); |
0817b62c | 429 | } else { |
4dff95dc | 430 | best = clk_core_get_rate_nolock(core); |
0817b62c BB |
431 | } |
432 | ||
4dff95dc SB |
433 | goto out; |
434 | } | |
b2476490 | 435 | |
4dff95dc SB |
436 | /* find the parent that can provide the fastest rate <= rate */ |
437 | num_parents = core->num_parents; | |
438 | for (i = 0; i < num_parents; i++) { | |
439 | parent = clk_core_get_parent_by_index(core, i); | |
440 | if (!parent) | |
441 | continue; | |
0817b62c BB |
442 | |
443 | if (core->flags & CLK_SET_RATE_PARENT) { | |
444 | parent_req = *req; | |
445 | ret = __clk_determine_rate(parent->hw, &parent_req); | |
446 | if (ret) | |
447 | continue; | |
448 | } else { | |
449 | parent_req.rate = clk_core_get_rate_nolock(parent); | |
450 | } | |
451 | ||
452 | if (mux_is_better_rate(req->rate, parent_req.rate, | |
453 | best, flags)) { | |
4dff95dc | 454 | best_parent = parent; |
0817b62c | 455 | best = parent_req.rate; |
4dff95dc SB |
456 | } |
457 | } | |
b2476490 | 458 | |
57d866e6 BB |
459 | if (!best_parent) |
460 | return -EINVAL; | |
461 | ||
4dff95dc SB |
462 | out: |
463 | if (best_parent) | |
0817b62c BB |
464 | req->best_parent_hw = best_parent->hw; |
465 | req->best_parent_rate = best; | |
466 | req->rate = best; | |
b2476490 | 467 | |
0817b62c | 468 | return 0; |
b33d212f | 469 | } |
4dff95dc SB |
470 | |
471 | struct clk *__clk_lookup(const char *name) | |
fcb0ee6a | 472 | { |
4dff95dc SB |
473 | struct clk_core *core = clk_core_lookup(name); |
474 | ||
475 | return !core ? NULL : core->hw->clk; | |
fcb0ee6a | 476 | } |
b2476490 | 477 | |
4dff95dc SB |
478 | static void clk_core_get_boundaries(struct clk_core *core, |
479 | unsigned long *min_rate, | |
480 | unsigned long *max_rate) | |
1c155b3d | 481 | { |
4dff95dc | 482 | struct clk *clk_user; |
1c155b3d | 483 | |
9783c0d9 SB |
484 | *min_rate = core->min_rate; |
485 | *max_rate = core->max_rate; | |
496eadf8 | 486 | |
4dff95dc SB |
487 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
488 | *min_rate = max(*min_rate, clk_user->min_rate); | |
1c155b3d | 489 | |
4dff95dc SB |
490 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
491 | *max_rate = min(*max_rate, clk_user->max_rate); | |
492 | } | |
1c155b3d | 493 | |
9783c0d9 SB |
494 | void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate, |
495 | unsigned long max_rate) | |
496 | { | |
497 | hw->core->min_rate = min_rate; | |
498 | hw->core->max_rate = max_rate; | |
499 | } | |
500 | EXPORT_SYMBOL_GPL(clk_hw_set_rate_range); | |
501 | ||
4dff95dc SB |
502 | /* |
503 | * Helper for finding best parent to provide a given frequency. This can be used | |
504 | * directly as a determine_rate callback (e.g. for a mux), or from a more | |
505 | * complex clock that may combine a mux with other operations. | |
506 | */ | |
0817b62c BB |
507 | int __clk_mux_determine_rate(struct clk_hw *hw, |
508 | struct clk_rate_request *req) | |
4dff95dc | 509 | { |
0817b62c | 510 | return clk_mux_determine_rate_flags(hw, req, 0); |
1c155b3d | 511 | } |
4dff95dc | 512 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); |
1c155b3d | 513 | |
0817b62c BB |
514 | int __clk_mux_determine_rate_closest(struct clk_hw *hw, |
515 | struct clk_rate_request *req) | |
b2476490 | 516 | { |
0817b62c | 517 | return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST); |
4dff95dc SB |
518 | } |
519 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); | |
b2476490 | 520 | |
4dff95dc | 521 | /*** clk api ***/ |
496eadf8 | 522 | |
4dff95dc SB |
523 | static void clk_core_unprepare(struct clk_core *core) |
524 | { | |
a6334725 SB |
525 | lockdep_assert_held(&prepare_lock); |
526 | ||
4dff95dc SB |
527 | if (!core) |
528 | return; | |
b2476490 | 529 | |
4dff95dc SB |
530 | if (WARN_ON(core->prepare_count == 0)) |
531 | return; | |
b2476490 | 532 | |
2e20fbf5 LJ |
533 | if (WARN_ON(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL)) |
534 | return; | |
535 | ||
4dff95dc SB |
536 | if (--core->prepare_count > 0) |
537 | return; | |
b2476490 | 538 | |
4dff95dc | 539 | WARN_ON(core->enable_count > 0); |
b2476490 | 540 | |
4dff95dc | 541 | trace_clk_unprepare(core); |
b2476490 | 542 | |
4dff95dc SB |
543 | if (core->ops->unprepare) |
544 | core->ops->unprepare(core->hw); | |
545 | ||
9a34b453 MS |
546 | clk_pm_runtime_put(core); |
547 | ||
4dff95dc SB |
548 | trace_clk_unprepare_complete(core); |
549 | clk_core_unprepare(core->parent); | |
b2476490 MT |
550 | } |
551 | ||
a6adc30b DA |
552 | static void clk_core_unprepare_lock(struct clk_core *core) |
553 | { | |
554 | clk_prepare_lock(); | |
555 | clk_core_unprepare(core); | |
556 | clk_prepare_unlock(); | |
557 | } | |
558 | ||
4dff95dc SB |
559 | /** |
560 | * clk_unprepare - undo preparation of a clock source | |
561 | * @clk: the clk being unprepared | |
562 | * | |
563 | * clk_unprepare may sleep, which differentiates it from clk_disable. In a | |
564 | * simple case, clk_unprepare can be used instead of clk_disable to gate a clk | |
565 | * if the operation may sleep. One example is a clk which is accessed over | |
566 | * I2c. In the complex case a clk gate operation may require a fast and a slow | |
567 | * part. It is this reason that clk_unprepare and clk_disable are not mutually | |
568 | * exclusive. In fact clk_disable must be called before clk_unprepare. | |
569 | */ | |
570 | void clk_unprepare(struct clk *clk) | |
1e435256 | 571 | { |
4dff95dc SB |
572 | if (IS_ERR_OR_NULL(clk)) |
573 | return; | |
574 | ||
a6adc30b | 575 | clk_core_unprepare_lock(clk->core); |
1e435256 | 576 | } |
4dff95dc | 577 | EXPORT_SYMBOL_GPL(clk_unprepare); |
1e435256 | 578 | |
4dff95dc | 579 | static int clk_core_prepare(struct clk_core *core) |
b2476490 | 580 | { |
4dff95dc | 581 | int ret = 0; |
b2476490 | 582 | |
a6334725 SB |
583 | lockdep_assert_held(&prepare_lock); |
584 | ||
4dff95dc | 585 | if (!core) |
1e435256 | 586 | return 0; |
1e435256 | 587 | |
4dff95dc | 588 | if (core->prepare_count == 0) { |
9a34b453 | 589 | ret = clk_pm_runtime_get(core); |
4dff95dc SB |
590 | if (ret) |
591 | return ret; | |
b2476490 | 592 | |
9a34b453 MS |
593 | ret = clk_core_prepare(core->parent); |
594 | if (ret) | |
595 | goto runtime_put; | |
596 | ||
4dff95dc | 597 | trace_clk_prepare(core); |
b2476490 | 598 | |
4dff95dc SB |
599 | if (core->ops->prepare) |
600 | ret = core->ops->prepare(core->hw); | |
b2476490 | 601 | |
4dff95dc | 602 | trace_clk_prepare_complete(core); |
1c155b3d | 603 | |
9a34b453 MS |
604 | if (ret) |
605 | goto unprepare; | |
4dff95dc | 606 | } |
1c155b3d | 607 | |
4dff95dc | 608 | core->prepare_count++; |
b2476490 MT |
609 | |
610 | return 0; | |
9a34b453 MS |
611 | unprepare: |
612 | clk_core_unprepare(core->parent); | |
613 | runtime_put: | |
614 | clk_pm_runtime_put(core); | |
615 | return ret; | |
b2476490 | 616 | } |
b2476490 | 617 | |
a6adc30b DA |
618 | static int clk_core_prepare_lock(struct clk_core *core) |
619 | { | |
620 | int ret; | |
621 | ||
622 | clk_prepare_lock(); | |
623 | ret = clk_core_prepare(core); | |
624 | clk_prepare_unlock(); | |
625 | ||
626 | return ret; | |
627 | } | |
628 | ||
4dff95dc SB |
629 | /** |
630 | * clk_prepare - prepare a clock source | |
631 | * @clk: the clk being prepared | |
632 | * | |
633 | * clk_prepare may sleep, which differentiates it from clk_enable. In a simple | |
634 | * case, clk_prepare can be used instead of clk_enable to ungate a clk if the | |
635 | * operation may sleep. One example is a clk which is accessed over I2c. In | |
636 | * the complex case a clk ungate operation may require a fast and a slow part. | |
637 | * It is this reason that clk_prepare and clk_enable are not mutually | |
638 | * exclusive. In fact clk_prepare must be called before clk_enable. | |
639 | * Returns 0 on success, -EERROR otherwise. | |
640 | */ | |
641 | int clk_prepare(struct clk *clk) | |
b2476490 | 642 | { |
4dff95dc SB |
643 | if (!clk) |
644 | return 0; | |
b2476490 | 645 | |
a6adc30b | 646 | return clk_core_prepare_lock(clk->core); |
b2476490 | 647 | } |
4dff95dc | 648 | EXPORT_SYMBOL_GPL(clk_prepare); |
b2476490 | 649 | |
4dff95dc | 650 | static void clk_core_disable(struct clk_core *core) |
b2476490 | 651 | { |
a6334725 SB |
652 | lockdep_assert_held(&enable_lock); |
653 | ||
4dff95dc SB |
654 | if (!core) |
655 | return; | |
035a61c3 | 656 | |
4dff95dc SB |
657 | if (WARN_ON(core->enable_count == 0)) |
658 | return; | |
b2476490 | 659 | |
2e20fbf5 LJ |
660 | if (WARN_ON(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL)) |
661 | return; | |
662 | ||
4dff95dc SB |
663 | if (--core->enable_count > 0) |
664 | return; | |
035a61c3 | 665 | |
2f87a6ea | 666 | trace_clk_disable_rcuidle(core); |
035a61c3 | 667 | |
4dff95dc SB |
668 | if (core->ops->disable) |
669 | core->ops->disable(core->hw); | |
035a61c3 | 670 | |
2f87a6ea | 671 | trace_clk_disable_complete_rcuidle(core); |
035a61c3 | 672 | |
4dff95dc | 673 | clk_core_disable(core->parent); |
035a61c3 | 674 | } |
7ef3dcc8 | 675 | |
a6adc30b DA |
676 | static void clk_core_disable_lock(struct clk_core *core) |
677 | { | |
678 | unsigned long flags; | |
679 | ||
680 | flags = clk_enable_lock(); | |
681 | clk_core_disable(core); | |
682 | clk_enable_unlock(flags); | |
683 | } | |
684 | ||
4dff95dc SB |
685 | /** |
686 | * clk_disable - gate a clock | |
687 | * @clk: the clk being gated | |
688 | * | |
689 | * clk_disable must not sleep, which differentiates it from clk_unprepare. In | |
690 | * a simple case, clk_disable can be used instead of clk_unprepare to gate a | |
691 | * clk if the operation is fast and will never sleep. One example is a | |
692 | * SoC-internal clk which is controlled via simple register writes. In the | |
693 | * complex case a clk gate operation may require a fast and a slow part. It is | |
694 | * this reason that clk_unprepare and clk_disable are not mutually exclusive. | |
695 | * In fact clk_disable must be called before clk_unprepare. | |
696 | */ | |
697 | void clk_disable(struct clk *clk) | |
b2476490 | 698 | { |
4dff95dc SB |
699 | if (IS_ERR_OR_NULL(clk)) |
700 | return; | |
701 | ||
a6adc30b | 702 | clk_core_disable_lock(clk->core); |
b2476490 | 703 | } |
4dff95dc | 704 | EXPORT_SYMBOL_GPL(clk_disable); |
b2476490 | 705 | |
4dff95dc | 706 | static int clk_core_enable(struct clk_core *core) |
b2476490 | 707 | { |
4dff95dc | 708 | int ret = 0; |
b2476490 | 709 | |
a6334725 SB |
710 | lockdep_assert_held(&enable_lock); |
711 | ||
4dff95dc SB |
712 | if (!core) |
713 | return 0; | |
b2476490 | 714 | |
4dff95dc SB |
715 | if (WARN_ON(core->prepare_count == 0)) |
716 | return -ESHUTDOWN; | |
b2476490 | 717 | |
4dff95dc SB |
718 | if (core->enable_count == 0) { |
719 | ret = clk_core_enable(core->parent); | |
b2476490 | 720 | |
4dff95dc SB |
721 | if (ret) |
722 | return ret; | |
b2476490 | 723 | |
f17a0dd1 | 724 | trace_clk_enable_rcuidle(core); |
035a61c3 | 725 | |
4dff95dc SB |
726 | if (core->ops->enable) |
727 | ret = core->ops->enable(core->hw); | |
035a61c3 | 728 | |
f17a0dd1 | 729 | trace_clk_enable_complete_rcuidle(core); |
4dff95dc SB |
730 | |
731 | if (ret) { | |
732 | clk_core_disable(core->parent); | |
733 | return ret; | |
734 | } | |
735 | } | |
736 | ||
737 | core->enable_count++; | |
738 | return 0; | |
035a61c3 | 739 | } |
b2476490 | 740 | |
a6adc30b DA |
741 | static int clk_core_enable_lock(struct clk_core *core) |
742 | { | |
743 | unsigned long flags; | |
744 | int ret; | |
745 | ||
746 | flags = clk_enable_lock(); | |
747 | ret = clk_core_enable(core); | |
748 | clk_enable_unlock(flags); | |
749 | ||
750 | return ret; | |
751 | } | |
752 | ||
4dff95dc SB |
753 | /** |
754 | * clk_enable - ungate a clock | |
755 | * @clk: the clk being ungated | |
756 | * | |
757 | * clk_enable must not sleep, which differentiates it from clk_prepare. In a | |
758 | * simple case, clk_enable can be used instead of clk_prepare to ungate a clk | |
759 | * if the operation will never sleep. One example is a SoC-internal clk which | |
760 | * is controlled via simple register writes. In the complex case a clk ungate | |
761 | * operation may require a fast and a slow part. It is this reason that | |
762 | * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare | |
763 | * must be called before clk_enable. Returns 0 on success, -EERROR | |
764 | * otherwise. | |
765 | */ | |
766 | int clk_enable(struct clk *clk) | |
5279fc40 | 767 | { |
4dff95dc | 768 | if (!clk) |
5279fc40 BB |
769 | return 0; |
770 | ||
a6adc30b DA |
771 | return clk_core_enable_lock(clk->core); |
772 | } | |
773 | EXPORT_SYMBOL_GPL(clk_enable); | |
774 | ||
775 | static int clk_core_prepare_enable(struct clk_core *core) | |
776 | { | |
777 | int ret; | |
778 | ||
779 | ret = clk_core_prepare_lock(core); | |
780 | if (ret) | |
781 | return ret; | |
782 | ||
783 | ret = clk_core_enable_lock(core); | |
784 | if (ret) | |
785 | clk_core_unprepare_lock(core); | |
5279fc40 | 786 | |
4dff95dc | 787 | return ret; |
b2476490 | 788 | } |
a6adc30b DA |
789 | |
790 | static void clk_core_disable_unprepare(struct clk_core *core) | |
791 | { | |
792 | clk_core_disable_lock(core); | |
793 | clk_core_unprepare_lock(core); | |
794 | } | |
b2476490 | 795 | |
7ec986ef DA |
796 | static void clk_unprepare_unused_subtree(struct clk_core *core) |
797 | { | |
798 | struct clk_core *child; | |
799 | ||
800 | lockdep_assert_held(&prepare_lock); | |
801 | ||
802 | hlist_for_each_entry(child, &core->children, child_node) | |
803 | clk_unprepare_unused_subtree(child); | |
804 | ||
805 | if (core->prepare_count) | |
806 | return; | |
807 | ||
808 | if (core->flags & CLK_IGNORE_UNUSED) | |
809 | return; | |
810 | ||
9a34b453 MS |
811 | if (clk_pm_runtime_get(core)) |
812 | return; | |
813 | ||
7ec986ef DA |
814 | if (clk_core_is_prepared(core)) { |
815 | trace_clk_unprepare(core); | |
816 | if (core->ops->unprepare_unused) | |
817 | core->ops->unprepare_unused(core->hw); | |
818 | else if (core->ops->unprepare) | |
819 | core->ops->unprepare(core->hw); | |
820 | trace_clk_unprepare_complete(core); | |
821 | } | |
9a34b453 MS |
822 | |
823 | clk_pm_runtime_put(core); | |
7ec986ef DA |
824 | } |
825 | ||
826 | static void clk_disable_unused_subtree(struct clk_core *core) | |
827 | { | |
828 | struct clk_core *child; | |
829 | unsigned long flags; | |
830 | ||
831 | lockdep_assert_held(&prepare_lock); | |
832 | ||
833 | hlist_for_each_entry(child, &core->children, child_node) | |
834 | clk_disable_unused_subtree(child); | |
835 | ||
a4b3518d DA |
836 | if (core->flags & CLK_OPS_PARENT_ENABLE) |
837 | clk_core_prepare_enable(core->parent); | |
838 | ||
9a34b453 MS |
839 | if (clk_pm_runtime_get(core)) |
840 | goto unprepare_out; | |
841 | ||
7ec986ef DA |
842 | flags = clk_enable_lock(); |
843 | ||
844 | if (core->enable_count) | |
845 | goto unlock_out; | |
846 | ||
847 | if (core->flags & CLK_IGNORE_UNUSED) | |
848 | goto unlock_out; | |
849 | ||
850 | /* | |
851 | * some gate clocks have special needs during the disable-unused | |
852 | * sequence. call .disable_unused if available, otherwise fall | |
853 | * back to .disable | |
854 | */ | |
855 | if (clk_core_is_enabled(core)) { | |
856 | trace_clk_disable(core); | |
857 | if (core->ops->disable_unused) | |
858 | core->ops->disable_unused(core->hw); | |
859 | else if (core->ops->disable) | |
860 | core->ops->disable(core->hw); | |
861 | trace_clk_disable_complete(core); | |
862 | } | |
863 | ||
864 | unlock_out: | |
865 | clk_enable_unlock(flags); | |
9a34b453 MS |
866 | clk_pm_runtime_put(core); |
867 | unprepare_out: | |
a4b3518d DA |
868 | if (core->flags & CLK_OPS_PARENT_ENABLE) |
869 | clk_core_disable_unprepare(core->parent); | |
7ec986ef DA |
870 | } |
871 | ||
872 | static bool clk_ignore_unused; | |
873 | static int __init clk_ignore_unused_setup(char *__unused) | |
874 | { | |
875 | clk_ignore_unused = true; | |
876 | return 1; | |
877 | } | |
878 | __setup("clk_ignore_unused", clk_ignore_unused_setup); | |
879 | ||
880 | static int clk_disable_unused(void) | |
881 | { | |
882 | struct clk_core *core; | |
883 | ||
884 | if (clk_ignore_unused) { | |
885 | pr_warn("clk: Not disabling unused clocks\n"); | |
886 | return 0; | |
887 | } | |
888 | ||
889 | clk_prepare_lock(); | |
890 | ||
891 | hlist_for_each_entry(core, &clk_root_list, child_node) | |
892 | clk_disable_unused_subtree(core); | |
893 | ||
894 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
895 | clk_disable_unused_subtree(core); | |
896 | ||
897 | hlist_for_each_entry(core, &clk_root_list, child_node) | |
898 | clk_unprepare_unused_subtree(core); | |
899 | ||
900 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
901 | clk_unprepare_unused_subtree(core); | |
902 | ||
903 | clk_prepare_unlock(); | |
904 | ||
905 | return 0; | |
906 | } | |
907 | late_initcall_sync(clk_disable_unused); | |
908 | ||
0817b62c BB |
909 | static int clk_core_round_rate_nolock(struct clk_core *core, |
910 | struct clk_rate_request *req) | |
3d6ee287 | 911 | { |
4dff95dc | 912 | struct clk_core *parent; |
0817b62c | 913 | long rate; |
4dff95dc SB |
914 | |
915 | lockdep_assert_held(&prepare_lock); | |
3d6ee287 | 916 | |
d6968fca | 917 | if (!core) |
4dff95dc | 918 | return 0; |
3d6ee287 | 919 | |
4dff95dc | 920 | parent = core->parent; |
0817b62c BB |
921 | if (parent) { |
922 | req->best_parent_hw = parent->hw; | |
923 | req->best_parent_rate = parent->rate; | |
924 | } else { | |
925 | req->best_parent_hw = NULL; | |
926 | req->best_parent_rate = 0; | |
927 | } | |
3d6ee287 | 928 | |
4dff95dc | 929 | if (core->ops->determine_rate) { |
0817b62c BB |
930 | return core->ops->determine_rate(core->hw, req); |
931 | } else if (core->ops->round_rate) { | |
932 | rate = core->ops->round_rate(core->hw, req->rate, | |
933 | &req->best_parent_rate); | |
934 | if (rate < 0) | |
935 | return rate; | |
936 | ||
937 | req->rate = rate; | |
938 | } else if (core->flags & CLK_SET_RATE_PARENT) { | |
939 | return clk_core_round_rate_nolock(parent, req); | |
940 | } else { | |
941 | req->rate = core->rate; | |
942 | } | |
943 | ||
944 | return 0; | |
3d6ee287 UH |
945 | } |
946 | ||
4dff95dc SB |
947 | /** |
948 | * __clk_determine_rate - get the closest rate actually supported by a clock | |
949 | * @hw: determine the rate of this clock | |
2d5b520c | 950 | * @req: target rate request |
4dff95dc | 951 | * |
6e5ab41b | 952 | * Useful for clk_ops such as .set_rate and .determine_rate. |
4dff95dc | 953 | */ |
0817b62c | 954 | int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) |
035a61c3 | 955 | { |
0817b62c BB |
956 | if (!hw) { |
957 | req->rate = 0; | |
4dff95dc | 958 | return 0; |
0817b62c | 959 | } |
035a61c3 | 960 | |
0817b62c | 961 | return clk_core_round_rate_nolock(hw->core, req); |
035a61c3 | 962 | } |
4dff95dc | 963 | EXPORT_SYMBOL_GPL(__clk_determine_rate); |
035a61c3 | 964 | |
1a9c069c SB |
965 | unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate) |
966 | { | |
967 | int ret; | |
968 | struct clk_rate_request req; | |
969 | ||
970 | clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate); | |
971 | req.rate = rate; | |
972 | ||
973 | ret = clk_core_round_rate_nolock(hw->core, &req); | |
974 | if (ret) | |
975 | return 0; | |
976 | ||
977 | return req.rate; | |
978 | } | |
979 | EXPORT_SYMBOL_GPL(clk_hw_round_rate); | |
980 | ||
4dff95dc SB |
981 | /** |
982 | * clk_round_rate - round the given rate for a clk | |
983 | * @clk: the clk for which we are rounding a rate | |
984 | * @rate: the rate which is to be rounded | |
985 | * | |
986 | * Takes in a rate as input and rounds it to a rate that the clk can actually | |
987 | * use which is then returned. If clk doesn't support round_rate operation | |
988 | * then the parent rate is returned. | |
989 | */ | |
990 | long clk_round_rate(struct clk *clk, unsigned long rate) | |
035a61c3 | 991 | { |
fc4a05d4 SB |
992 | struct clk_rate_request req; |
993 | int ret; | |
4dff95dc | 994 | |
035a61c3 | 995 | if (!clk) |
4dff95dc | 996 | return 0; |
035a61c3 | 997 | |
4dff95dc | 998 | clk_prepare_lock(); |
fc4a05d4 SB |
999 | |
1000 | clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate); | |
1001 | req.rate = rate; | |
1002 | ||
1003 | ret = clk_core_round_rate_nolock(clk->core, &req); | |
4dff95dc SB |
1004 | clk_prepare_unlock(); |
1005 | ||
fc4a05d4 SB |
1006 | if (ret) |
1007 | return ret; | |
1008 | ||
1009 | return req.rate; | |
035a61c3 | 1010 | } |
4dff95dc | 1011 | EXPORT_SYMBOL_GPL(clk_round_rate); |
b2476490 | 1012 | |
4dff95dc SB |
1013 | /** |
1014 | * __clk_notify - call clk notifier chain | |
1015 | * @core: clk that is changing rate | |
1016 | * @msg: clk notifier type (see include/linux/clk.h) | |
1017 | * @old_rate: old clk rate | |
1018 | * @new_rate: new clk rate | |
1019 | * | |
1020 | * Triggers a notifier call chain on the clk rate-change notification | |
1021 | * for 'clk'. Passes a pointer to the struct clk and the previous | |
1022 | * and current rates to the notifier callback. Intended to be called by | |
1023 | * internal clock code only. Returns NOTIFY_DONE from the last driver | |
1024 | * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if | |
1025 | * a driver returns that. | |
1026 | */ | |
1027 | static int __clk_notify(struct clk_core *core, unsigned long msg, | |
1028 | unsigned long old_rate, unsigned long new_rate) | |
b2476490 | 1029 | { |
4dff95dc SB |
1030 | struct clk_notifier *cn; |
1031 | struct clk_notifier_data cnd; | |
1032 | int ret = NOTIFY_DONE; | |
b2476490 | 1033 | |
4dff95dc SB |
1034 | cnd.old_rate = old_rate; |
1035 | cnd.new_rate = new_rate; | |
b2476490 | 1036 | |
4dff95dc SB |
1037 | list_for_each_entry(cn, &clk_notifier_list, node) { |
1038 | if (cn->clk->core == core) { | |
1039 | cnd.clk = cn->clk; | |
1040 | ret = srcu_notifier_call_chain(&cn->notifier_head, msg, | |
1041 | &cnd); | |
17c34c56 PDS |
1042 | if (ret & NOTIFY_STOP_MASK) |
1043 | return ret; | |
4dff95dc | 1044 | } |
b2476490 MT |
1045 | } |
1046 | ||
4dff95dc | 1047 | return ret; |
b2476490 MT |
1048 | } |
1049 | ||
4dff95dc SB |
1050 | /** |
1051 | * __clk_recalc_accuracies | |
1052 | * @core: first clk in the subtree | |
1053 | * | |
1054 | * Walks the subtree of clks starting with clk and recalculates accuracies as | |
1055 | * it goes. Note that if a clk does not implement the .recalc_accuracy | |
6e5ab41b | 1056 | * callback then it is assumed that the clock will take on the accuracy of its |
4dff95dc | 1057 | * parent. |
4dff95dc SB |
1058 | */ |
1059 | static void __clk_recalc_accuracies(struct clk_core *core) | |
b2476490 | 1060 | { |
4dff95dc SB |
1061 | unsigned long parent_accuracy = 0; |
1062 | struct clk_core *child; | |
b2476490 | 1063 | |
4dff95dc | 1064 | lockdep_assert_held(&prepare_lock); |
b2476490 | 1065 | |
4dff95dc SB |
1066 | if (core->parent) |
1067 | parent_accuracy = core->parent->accuracy; | |
b2476490 | 1068 | |
4dff95dc SB |
1069 | if (core->ops->recalc_accuracy) |
1070 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
1071 | parent_accuracy); | |
1072 | else | |
1073 | core->accuracy = parent_accuracy; | |
b2476490 | 1074 | |
4dff95dc SB |
1075 | hlist_for_each_entry(child, &core->children, child_node) |
1076 | __clk_recalc_accuracies(child); | |
b2476490 MT |
1077 | } |
1078 | ||
4dff95dc | 1079 | static long clk_core_get_accuracy(struct clk_core *core) |
e366fdd7 | 1080 | { |
4dff95dc | 1081 | unsigned long accuracy; |
15a02c1f | 1082 | |
4dff95dc SB |
1083 | clk_prepare_lock(); |
1084 | if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE)) | |
1085 | __clk_recalc_accuracies(core); | |
15a02c1f | 1086 | |
4dff95dc SB |
1087 | accuracy = __clk_get_accuracy(core); |
1088 | clk_prepare_unlock(); | |
e366fdd7 | 1089 | |
4dff95dc | 1090 | return accuracy; |
e366fdd7 | 1091 | } |
15a02c1f | 1092 | |
4dff95dc SB |
1093 | /** |
1094 | * clk_get_accuracy - return the accuracy of clk | |
1095 | * @clk: the clk whose accuracy is being returned | |
1096 | * | |
1097 | * Simply returns the cached accuracy of the clk, unless | |
1098 | * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be | |
1099 | * issued. | |
1100 | * If clk is NULL then returns 0. | |
1101 | */ | |
1102 | long clk_get_accuracy(struct clk *clk) | |
035a61c3 | 1103 | { |
4dff95dc SB |
1104 | if (!clk) |
1105 | return 0; | |
035a61c3 | 1106 | |
4dff95dc | 1107 | return clk_core_get_accuracy(clk->core); |
035a61c3 | 1108 | } |
4dff95dc | 1109 | EXPORT_SYMBOL_GPL(clk_get_accuracy); |
035a61c3 | 1110 | |
4dff95dc SB |
1111 | static unsigned long clk_recalc(struct clk_core *core, |
1112 | unsigned long parent_rate) | |
1c8e6004 | 1113 | { |
9a34b453 MS |
1114 | unsigned long rate = parent_rate; |
1115 | ||
1116 | if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) { | |
1117 | rate = core->ops->recalc_rate(core->hw, parent_rate); | |
1118 | clk_pm_runtime_put(core); | |
1119 | } | |
1120 | return rate; | |
1c8e6004 TV |
1121 | } |
1122 | ||
4dff95dc SB |
1123 | /** |
1124 | * __clk_recalc_rates | |
1125 | * @core: first clk in the subtree | |
1126 | * @msg: notification type (see include/linux/clk.h) | |
1127 | * | |
1128 | * Walks the subtree of clks starting with clk and recalculates rates as it | |
1129 | * goes. Note that if a clk does not implement the .recalc_rate callback then | |
1130 | * it is assumed that the clock will take on the rate of its parent. | |
1131 | * | |
1132 | * clk_recalc_rates also propagates the POST_RATE_CHANGE notification, | |
1133 | * if necessary. | |
15a02c1f | 1134 | */ |
4dff95dc | 1135 | static void __clk_recalc_rates(struct clk_core *core, unsigned long msg) |
15a02c1f | 1136 | { |
4dff95dc SB |
1137 | unsigned long old_rate; |
1138 | unsigned long parent_rate = 0; | |
1139 | struct clk_core *child; | |
e366fdd7 | 1140 | |
4dff95dc | 1141 | lockdep_assert_held(&prepare_lock); |
15a02c1f | 1142 | |
4dff95dc | 1143 | old_rate = core->rate; |
b2476490 | 1144 | |
4dff95dc SB |
1145 | if (core->parent) |
1146 | parent_rate = core->parent->rate; | |
b2476490 | 1147 | |
4dff95dc | 1148 | core->rate = clk_recalc(core, parent_rate); |
b2476490 | 1149 | |
4dff95dc SB |
1150 | /* |
1151 | * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE | |
1152 | * & ABORT_RATE_CHANGE notifiers | |
1153 | */ | |
1154 | if (core->notifier_count && msg) | |
1155 | __clk_notify(core, msg, old_rate, core->rate); | |
b2476490 | 1156 | |
4dff95dc SB |
1157 | hlist_for_each_entry(child, &core->children, child_node) |
1158 | __clk_recalc_rates(child, msg); | |
1159 | } | |
b2476490 | 1160 | |
4dff95dc SB |
1161 | static unsigned long clk_core_get_rate(struct clk_core *core) |
1162 | { | |
1163 | unsigned long rate; | |
dfc202ea | 1164 | |
4dff95dc | 1165 | clk_prepare_lock(); |
b2476490 | 1166 | |
4dff95dc SB |
1167 | if (core && (core->flags & CLK_GET_RATE_NOCACHE)) |
1168 | __clk_recalc_rates(core, 0); | |
1169 | ||
1170 | rate = clk_core_get_rate_nolock(core); | |
1171 | clk_prepare_unlock(); | |
1172 | ||
1173 | return rate; | |
b2476490 MT |
1174 | } |
1175 | ||
1176 | /** | |
4dff95dc SB |
1177 | * clk_get_rate - return the rate of clk |
1178 | * @clk: the clk whose rate is being returned | |
b2476490 | 1179 | * |
4dff95dc SB |
1180 | * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag |
1181 | * is set, which means a recalc_rate will be issued. | |
1182 | * If clk is NULL then returns 0. | |
b2476490 | 1183 | */ |
4dff95dc | 1184 | unsigned long clk_get_rate(struct clk *clk) |
b2476490 | 1185 | { |
4dff95dc SB |
1186 | if (!clk) |
1187 | return 0; | |
63589e92 | 1188 | |
4dff95dc | 1189 | return clk_core_get_rate(clk->core); |
b2476490 | 1190 | } |
4dff95dc | 1191 | EXPORT_SYMBOL_GPL(clk_get_rate); |
b2476490 | 1192 | |
4dff95dc SB |
1193 | static int clk_fetch_parent_index(struct clk_core *core, |
1194 | struct clk_core *parent) | |
b2476490 | 1195 | { |
4dff95dc | 1196 | int i; |
b2476490 | 1197 | |
508f884a MY |
1198 | if (!parent) |
1199 | return -EINVAL; | |
1200 | ||
470b5e2f MY |
1201 | for (i = 0; i < core->num_parents; i++) |
1202 | if (clk_core_get_parent_by_index(core, i) == parent) | |
4dff95dc | 1203 | return i; |
b2476490 | 1204 | |
4dff95dc | 1205 | return -EINVAL; |
b2476490 MT |
1206 | } |
1207 | ||
e6500344 HS |
1208 | /* |
1209 | * Update the orphan status of @core and all its children. | |
1210 | */ | |
1211 | static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan) | |
1212 | { | |
1213 | struct clk_core *child; | |
1214 | ||
1215 | core->orphan = is_orphan; | |
1216 | ||
1217 | hlist_for_each_entry(child, &core->children, child_node) | |
1218 | clk_core_update_orphan_status(child, is_orphan); | |
1219 | } | |
1220 | ||
4dff95dc | 1221 | static void clk_reparent(struct clk_core *core, struct clk_core *new_parent) |
b2476490 | 1222 | { |
e6500344 HS |
1223 | bool was_orphan = core->orphan; |
1224 | ||
4dff95dc | 1225 | hlist_del(&core->child_node); |
035a61c3 | 1226 | |
4dff95dc | 1227 | if (new_parent) { |
e6500344 HS |
1228 | bool becomes_orphan = new_parent->orphan; |
1229 | ||
4dff95dc SB |
1230 | /* avoid duplicate POST_RATE_CHANGE notifications */ |
1231 | if (new_parent->new_child == core) | |
1232 | new_parent->new_child = NULL; | |
b2476490 | 1233 | |
4dff95dc | 1234 | hlist_add_head(&core->child_node, &new_parent->children); |
e6500344 HS |
1235 | |
1236 | if (was_orphan != becomes_orphan) | |
1237 | clk_core_update_orphan_status(core, becomes_orphan); | |
4dff95dc SB |
1238 | } else { |
1239 | hlist_add_head(&core->child_node, &clk_orphan_list); | |
e6500344 HS |
1240 | if (!was_orphan) |
1241 | clk_core_update_orphan_status(core, true); | |
4dff95dc | 1242 | } |
dfc202ea | 1243 | |
4dff95dc | 1244 | core->parent = new_parent; |
035a61c3 TV |
1245 | } |
1246 | ||
4dff95dc SB |
1247 | static struct clk_core *__clk_set_parent_before(struct clk_core *core, |
1248 | struct clk_core *parent) | |
b2476490 MT |
1249 | { |
1250 | unsigned long flags; | |
4dff95dc | 1251 | struct clk_core *old_parent = core->parent; |
b2476490 | 1252 | |
4dff95dc | 1253 | /* |
fc8726a2 DA |
1254 | * 1. enable parents for CLK_OPS_PARENT_ENABLE clock |
1255 | * | |
1256 | * 2. Migrate prepare state between parents and prevent race with | |
4dff95dc SB |
1257 | * clk_enable(). |
1258 | * | |
1259 | * If the clock is not prepared, then a race with | |
1260 | * clk_enable/disable() is impossible since we already have the | |
1261 | * prepare lock (future calls to clk_enable() need to be preceded by | |
1262 | * a clk_prepare()). | |
1263 | * | |
1264 | * If the clock is prepared, migrate the prepared state to the new | |
1265 | * parent and also protect against a race with clk_enable() by | |
1266 | * forcing the clock and the new parent on. This ensures that all | |
1267 | * future calls to clk_enable() are practically NOPs with respect to | |
1268 | * hardware and software states. | |
1269 | * | |
1270 | * See also: Comment for clk_set_parent() below. | |
1271 | */ | |
fc8726a2 DA |
1272 | |
1273 | /* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */ | |
1274 | if (core->flags & CLK_OPS_PARENT_ENABLE) { | |
1275 | clk_core_prepare_enable(old_parent); | |
1276 | clk_core_prepare_enable(parent); | |
1277 | } | |
1278 | ||
1279 | /* migrate prepare count if > 0 */ | |
4dff95dc | 1280 | if (core->prepare_count) { |
fc8726a2 DA |
1281 | clk_core_prepare_enable(parent); |
1282 | clk_core_enable_lock(core); | |
4dff95dc | 1283 | } |
63589e92 | 1284 | |
4dff95dc | 1285 | /* update the clk tree topology */ |
eab89f69 | 1286 | flags = clk_enable_lock(); |
4dff95dc | 1287 | clk_reparent(core, parent); |
eab89f69 | 1288 | clk_enable_unlock(flags); |
4dff95dc SB |
1289 | |
1290 | return old_parent; | |
b2476490 | 1291 | } |
b2476490 | 1292 | |
4dff95dc SB |
1293 | static void __clk_set_parent_after(struct clk_core *core, |
1294 | struct clk_core *parent, | |
1295 | struct clk_core *old_parent) | |
b2476490 | 1296 | { |
4dff95dc SB |
1297 | /* |
1298 | * Finish the migration of prepare state and undo the changes done | |
1299 | * for preventing a race with clk_enable(). | |
1300 | */ | |
1301 | if (core->prepare_count) { | |
fc8726a2 DA |
1302 | clk_core_disable_lock(core); |
1303 | clk_core_disable_unprepare(old_parent); | |
1304 | } | |
1305 | ||
1306 | /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */ | |
1307 | if (core->flags & CLK_OPS_PARENT_ENABLE) { | |
1308 | clk_core_disable_unprepare(parent); | |
1309 | clk_core_disable_unprepare(old_parent); | |
4dff95dc SB |
1310 | } |
1311 | } | |
b2476490 | 1312 | |
4dff95dc SB |
1313 | static int __clk_set_parent(struct clk_core *core, struct clk_core *parent, |
1314 | u8 p_index) | |
1315 | { | |
1316 | unsigned long flags; | |
1317 | int ret = 0; | |
1318 | struct clk_core *old_parent; | |
b2476490 | 1319 | |
4dff95dc | 1320 | old_parent = __clk_set_parent_before(core, parent); |
b2476490 | 1321 | |
4dff95dc | 1322 | trace_clk_set_parent(core, parent); |
b2476490 | 1323 | |
4dff95dc SB |
1324 | /* change clock input source */ |
1325 | if (parent && core->ops->set_parent) | |
1326 | ret = core->ops->set_parent(core->hw, p_index); | |
dfc202ea | 1327 | |
4dff95dc | 1328 | trace_clk_set_parent_complete(core, parent); |
dfc202ea | 1329 | |
4dff95dc SB |
1330 | if (ret) { |
1331 | flags = clk_enable_lock(); | |
1332 | clk_reparent(core, old_parent); | |
1333 | clk_enable_unlock(flags); | |
c660b2eb | 1334 | __clk_set_parent_after(core, old_parent, parent); |
dfc202ea | 1335 | |
4dff95dc | 1336 | return ret; |
b2476490 MT |
1337 | } |
1338 | ||
4dff95dc SB |
1339 | __clk_set_parent_after(core, parent, old_parent); |
1340 | ||
b2476490 MT |
1341 | return 0; |
1342 | } | |
1343 | ||
1344 | /** | |
4dff95dc SB |
1345 | * __clk_speculate_rates |
1346 | * @core: first clk in the subtree | |
1347 | * @parent_rate: the "future" rate of clk's parent | |
b2476490 | 1348 | * |
4dff95dc SB |
1349 | * Walks the subtree of clks starting with clk, speculating rates as it |
1350 | * goes and firing off PRE_RATE_CHANGE notifications as necessary. | |
1351 | * | |
1352 | * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending | |
1353 | * pre-rate change notifications and returns early if no clks in the | |
1354 | * subtree have subscribed to the notifications. Note that if a clk does not | |
1355 | * implement the .recalc_rate callback then it is assumed that the clock will | |
1356 | * take on the rate of its parent. | |
b2476490 | 1357 | */ |
4dff95dc SB |
1358 | static int __clk_speculate_rates(struct clk_core *core, |
1359 | unsigned long parent_rate) | |
b2476490 | 1360 | { |
4dff95dc SB |
1361 | struct clk_core *child; |
1362 | unsigned long new_rate; | |
1363 | int ret = NOTIFY_DONE; | |
b2476490 | 1364 | |
4dff95dc | 1365 | lockdep_assert_held(&prepare_lock); |
864e160a | 1366 | |
4dff95dc SB |
1367 | new_rate = clk_recalc(core, parent_rate); |
1368 | ||
1369 | /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */ | |
1370 | if (core->notifier_count) | |
1371 | ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate); | |
1372 | ||
1373 | if (ret & NOTIFY_STOP_MASK) { | |
1374 | pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", | |
1375 | __func__, core->name, ret); | |
1376 | goto out; | |
1377 | } | |
1378 | ||
1379 | hlist_for_each_entry(child, &core->children, child_node) { | |
1380 | ret = __clk_speculate_rates(child, new_rate); | |
1381 | if (ret & NOTIFY_STOP_MASK) | |
1382 | break; | |
1383 | } | |
b2476490 | 1384 | |
4dff95dc | 1385 | out: |
b2476490 MT |
1386 | return ret; |
1387 | } | |
b2476490 | 1388 | |
4dff95dc SB |
1389 | static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate, |
1390 | struct clk_core *new_parent, u8 p_index) | |
b2476490 | 1391 | { |
4dff95dc | 1392 | struct clk_core *child; |
b2476490 | 1393 | |
4dff95dc SB |
1394 | core->new_rate = new_rate; |
1395 | core->new_parent = new_parent; | |
1396 | core->new_parent_index = p_index; | |
1397 | /* include clk in new parent's PRE_RATE_CHANGE notifications */ | |
1398 | core->new_child = NULL; | |
1399 | if (new_parent && new_parent != core->parent) | |
1400 | new_parent->new_child = core; | |
496eadf8 | 1401 | |
4dff95dc SB |
1402 | hlist_for_each_entry(child, &core->children, child_node) { |
1403 | child->new_rate = clk_recalc(child, new_rate); | |
1404 | clk_calc_subtree(child, child->new_rate, NULL, 0); | |
1405 | } | |
1406 | } | |
b2476490 | 1407 | |
4dff95dc SB |
1408 | /* |
1409 | * calculate the new rates returning the topmost clock that has to be | |
1410 | * changed. | |
1411 | */ | |
1412 | static struct clk_core *clk_calc_new_rates(struct clk_core *core, | |
1413 | unsigned long rate) | |
1414 | { | |
1415 | struct clk_core *top = core; | |
1416 | struct clk_core *old_parent, *parent; | |
4dff95dc SB |
1417 | unsigned long best_parent_rate = 0; |
1418 | unsigned long new_rate; | |
1419 | unsigned long min_rate; | |
1420 | unsigned long max_rate; | |
1421 | int p_index = 0; | |
1422 | long ret; | |
1423 | ||
1424 | /* sanity */ | |
1425 | if (IS_ERR_OR_NULL(core)) | |
1426 | return NULL; | |
1427 | ||
1428 | /* save parent rate, if it exists */ | |
1429 | parent = old_parent = core->parent; | |
71472c0c | 1430 | if (parent) |
4dff95dc | 1431 | best_parent_rate = parent->rate; |
71472c0c | 1432 | |
4dff95dc SB |
1433 | clk_core_get_boundaries(core, &min_rate, &max_rate); |
1434 | ||
1435 | /* find the closest rate and parent clk/rate */ | |
d6968fca | 1436 | if (core->ops->determine_rate) { |
0817b62c BB |
1437 | struct clk_rate_request req; |
1438 | ||
1439 | req.rate = rate; | |
1440 | req.min_rate = min_rate; | |
1441 | req.max_rate = max_rate; | |
1442 | if (parent) { | |
1443 | req.best_parent_hw = parent->hw; | |
1444 | req.best_parent_rate = parent->rate; | |
1445 | } else { | |
1446 | req.best_parent_hw = NULL; | |
1447 | req.best_parent_rate = 0; | |
1448 | } | |
1449 | ||
1450 | ret = core->ops->determine_rate(core->hw, &req); | |
4dff95dc SB |
1451 | if (ret < 0) |
1452 | return NULL; | |
1c8e6004 | 1453 | |
0817b62c BB |
1454 | best_parent_rate = req.best_parent_rate; |
1455 | new_rate = req.rate; | |
1456 | parent = req.best_parent_hw ? req.best_parent_hw->core : NULL; | |
4dff95dc SB |
1457 | } else if (core->ops->round_rate) { |
1458 | ret = core->ops->round_rate(core->hw, rate, | |
0817b62c | 1459 | &best_parent_rate); |
4dff95dc SB |
1460 | if (ret < 0) |
1461 | return NULL; | |
035a61c3 | 1462 | |
4dff95dc SB |
1463 | new_rate = ret; |
1464 | if (new_rate < min_rate || new_rate > max_rate) | |
1465 | return NULL; | |
1466 | } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) { | |
1467 | /* pass-through clock without adjustable parent */ | |
1468 | core->new_rate = core->rate; | |
1469 | return NULL; | |
1470 | } else { | |
1471 | /* pass-through clock with adjustable parent */ | |
1472 | top = clk_calc_new_rates(parent, rate); | |
1473 | new_rate = parent->new_rate; | |
1474 | goto out; | |
1475 | } | |
1c8e6004 | 1476 | |
4dff95dc SB |
1477 | /* some clocks must be gated to change parent */ |
1478 | if (parent != old_parent && | |
1479 | (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1480 | pr_debug("%s: %s not gated but wants to reparent\n", | |
1481 | __func__, core->name); | |
1482 | return NULL; | |
1483 | } | |
b2476490 | 1484 | |
4dff95dc SB |
1485 | /* try finding the new parent index */ |
1486 | if (parent && core->num_parents > 1) { | |
1487 | p_index = clk_fetch_parent_index(core, parent); | |
1488 | if (p_index < 0) { | |
1489 | pr_debug("%s: clk %s can not be parent of clk %s\n", | |
1490 | __func__, parent->name, core->name); | |
1491 | return NULL; | |
1492 | } | |
1493 | } | |
b2476490 | 1494 | |
4dff95dc SB |
1495 | if ((core->flags & CLK_SET_RATE_PARENT) && parent && |
1496 | best_parent_rate != parent->rate) | |
1497 | top = clk_calc_new_rates(parent, best_parent_rate); | |
035a61c3 | 1498 | |
4dff95dc SB |
1499 | out: |
1500 | clk_calc_subtree(core, new_rate, parent, p_index); | |
b2476490 | 1501 | |
4dff95dc | 1502 | return top; |
b2476490 | 1503 | } |
b2476490 | 1504 | |
4dff95dc SB |
1505 | /* |
1506 | * Notify about rate changes in a subtree. Always walk down the whole tree | |
1507 | * so that in case of an error we can walk down the whole tree again and | |
1508 | * abort the change. | |
b2476490 | 1509 | */ |
4dff95dc SB |
1510 | static struct clk_core *clk_propagate_rate_change(struct clk_core *core, |
1511 | unsigned long event) | |
b2476490 | 1512 | { |
4dff95dc | 1513 | struct clk_core *child, *tmp_clk, *fail_clk = NULL; |
b2476490 MT |
1514 | int ret = NOTIFY_DONE; |
1515 | ||
4dff95dc SB |
1516 | if (core->rate == core->new_rate) |
1517 | return NULL; | |
b2476490 | 1518 | |
4dff95dc SB |
1519 | if (core->notifier_count) { |
1520 | ret = __clk_notify(core, event, core->rate, core->new_rate); | |
1521 | if (ret & NOTIFY_STOP_MASK) | |
1522 | fail_clk = core; | |
b2476490 MT |
1523 | } |
1524 | ||
4dff95dc SB |
1525 | hlist_for_each_entry(child, &core->children, child_node) { |
1526 | /* Skip children who will be reparented to another clock */ | |
1527 | if (child->new_parent && child->new_parent != core) | |
1528 | continue; | |
1529 | tmp_clk = clk_propagate_rate_change(child, event); | |
1530 | if (tmp_clk) | |
1531 | fail_clk = tmp_clk; | |
1532 | } | |
5279fc40 | 1533 | |
4dff95dc SB |
1534 | /* handle the new child who might not be in core->children yet */ |
1535 | if (core->new_child) { | |
1536 | tmp_clk = clk_propagate_rate_change(core->new_child, event); | |
1537 | if (tmp_clk) | |
1538 | fail_clk = tmp_clk; | |
1539 | } | |
5279fc40 | 1540 | |
4dff95dc | 1541 | return fail_clk; |
5279fc40 BB |
1542 | } |
1543 | ||
4dff95dc SB |
1544 | /* |
1545 | * walk down a subtree and set the new rates notifying the rate | |
1546 | * change on the way | |
1547 | */ | |
1548 | static void clk_change_rate(struct clk_core *core) | |
035a61c3 | 1549 | { |
4dff95dc SB |
1550 | struct clk_core *child; |
1551 | struct hlist_node *tmp; | |
1552 | unsigned long old_rate; | |
1553 | unsigned long best_parent_rate = 0; | |
1554 | bool skip_set_rate = false; | |
1555 | struct clk_core *old_parent; | |
fc8726a2 | 1556 | struct clk_core *parent = NULL; |
035a61c3 | 1557 | |
4dff95dc | 1558 | old_rate = core->rate; |
035a61c3 | 1559 | |
fc8726a2 DA |
1560 | if (core->new_parent) { |
1561 | parent = core->new_parent; | |
4dff95dc | 1562 | best_parent_rate = core->new_parent->rate; |
fc8726a2 DA |
1563 | } else if (core->parent) { |
1564 | parent = core->parent; | |
4dff95dc | 1565 | best_parent_rate = core->parent->rate; |
fc8726a2 | 1566 | } |
035a61c3 | 1567 | |
588fb54b MS |
1568 | if (clk_pm_runtime_get(core)) |
1569 | return; | |
1570 | ||
2eb8c710 HS |
1571 | if (core->flags & CLK_SET_RATE_UNGATE) { |
1572 | unsigned long flags; | |
1573 | ||
1574 | clk_core_prepare(core); | |
1575 | flags = clk_enable_lock(); | |
1576 | clk_core_enable(core); | |
1577 | clk_enable_unlock(flags); | |
1578 | } | |
1579 | ||
4dff95dc SB |
1580 | if (core->new_parent && core->new_parent != core->parent) { |
1581 | old_parent = __clk_set_parent_before(core, core->new_parent); | |
1582 | trace_clk_set_parent(core, core->new_parent); | |
5279fc40 | 1583 | |
4dff95dc SB |
1584 | if (core->ops->set_rate_and_parent) { |
1585 | skip_set_rate = true; | |
1586 | core->ops->set_rate_and_parent(core->hw, core->new_rate, | |
1587 | best_parent_rate, | |
1588 | core->new_parent_index); | |
1589 | } else if (core->ops->set_parent) { | |
1590 | core->ops->set_parent(core->hw, core->new_parent_index); | |
1591 | } | |
5279fc40 | 1592 | |
4dff95dc SB |
1593 | trace_clk_set_parent_complete(core, core->new_parent); |
1594 | __clk_set_parent_after(core, core->new_parent, old_parent); | |
1595 | } | |
8f2c2db1 | 1596 | |
fc8726a2 DA |
1597 | if (core->flags & CLK_OPS_PARENT_ENABLE) |
1598 | clk_core_prepare_enable(parent); | |
1599 | ||
4dff95dc | 1600 | trace_clk_set_rate(core, core->new_rate); |
b2476490 | 1601 | |
4dff95dc SB |
1602 | if (!skip_set_rate && core->ops->set_rate) |
1603 | core->ops->set_rate(core->hw, core->new_rate, best_parent_rate); | |
496eadf8 | 1604 | |
4dff95dc | 1605 | trace_clk_set_rate_complete(core, core->new_rate); |
b2476490 | 1606 | |
4dff95dc | 1607 | core->rate = clk_recalc(core, best_parent_rate); |
b2476490 | 1608 | |
2eb8c710 HS |
1609 | if (core->flags & CLK_SET_RATE_UNGATE) { |
1610 | unsigned long flags; | |
1611 | ||
1612 | flags = clk_enable_lock(); | |
1613 | clk_core_disable(core); | |
1614 | clk_enable_unlock(flags); | |
1615 | clk_core_unprepare(core); | |
1616 | } | |
1617 | ||
fc8726a2 DA |
1618 | if (core->flags & CLK_OPS_PARENT_ENABLE) |
1619 | clk_core_disable_unprepare(parent); | |
1620 | ||
4dff95dc SB |
1621 | if (core->notifier_count && old_rate != core->rate) |
1622 | __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); | |
b2476490 | 1623 | |
85e88fab MT |
1624 | if (core->flags & CLK_RECALC_NEW_RATES) |
1625 | (void)clk_calc_new_rates(core, core->new_rate); | |
d8d91987 | 1626 | |
b2476490 | 1627 | /* |
4dff95dc SB |
1628 | * Use safe iteration, as change_rate can actually swap parents |
1629 | * for certain clock types. | |
b2476490 | 1630 | */ |
4dff95dc SB |
1631 | hlist_for_each_entry_safe(child, tmp, &core->children, child_node) { |
1632 | /* Skip children who will be reparented to another clock */ | |
1633 | if (child->new_parent && child->new_parent != core) | |
1634 | continue; | |
1635 | clk_change_rate(child); | |
1636 | } | |
b2476490 | 1637 | |
4dff95dc SB |
1638 | /* handle the new child who might not be in core->children yet */ |
1639 | if (core->new_child) | |
1640 | clk_change_rate(core->new_child); | |
588fb54b MS |
1641 | |
1642 | clk_pm_runtime_put(core); | |
b2476490 MT |
1643 | } |
1644 | ||
4dff95dc SB |
1645 | static int clk_core_set_rate_nolock(struct clk_core *core, |
1646 | unsigned long req_rate) | |
a093bde2 | 1647 | { |
4dff95dc SB |
1648 | struct clk_core *top, *fail_clk; |
1649 | unsigned long rate = req_rate; | |
9a34b453 | 1650 | int ret = 0; |
a093bde2 | 1651 | |
4dff95dc SB |
1652 | if (!core) |
1653 | return 0; | |
a093bde2 | 1654 | |
4dff95dc SB |
1655 | /* bail early if nothing to do */ |
1656 | if (rate == clk_core_get_rate_nolock(core)) | |
1657 | return 0; | |
a093bde2 | 1658 | |
4dff95dc SB |
1659 | if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count) |
1660 | return -EBUSY; | |
a093bde2 | 1661 | |
4dff95dc SB |
1662 | /* calculate new rates and get the topmost changed clock */ |
1663 | top = clk_calc_new_rates(core, rate); | |
1664 | if (!top) | |
1665 | return -EINVAL; | |
1666 | ||
9a34b453 MS |
1667 | ret = clk_pm_runtime_get(core); |
1668 | if (ret) | |
1669 | return ret; | |
1670 | ||
4dff95dc SB |
1671 | /* notify that we are about to change rates */ |
1672 | fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); | |
1673 | if (fail_clk) { | |
1674 | pr_debug("%s: failed to set %s rate\n", __func__, | |
1675 | fail_clk->name); | |
1676 | clk_propagate_rate_change(top, ABORT_RATE_CHANGE); | |
9a34b453 MS |
1677 | ret = -EBUSY; |
1678 | goto err; | |
4dff95dc SB |
1679 | } |
1680 | ||
1681 | /* change the rates */ | |
1682 | clk_change_rate(top); | |
1683 | ||
1684 | core->req_rate = req_rate; | |
9a34b453 MS |
1685 | err: |
1686 | clk_pm_runtime_put(core); | |
4dff95dc | 1687 | |
9a34b453 | 1688 | return ret; |
a093bde2 | 1689 | } |
035a61c3 TV |
1690 | |
1691 | /** | |
4dff95dc SB |
1692 | * clk_set_rate - specify a new rate for clk |
1693 | * @clk: the clk whose rate is being changed | |
1694 | * @rate: the new rate for clk | |
035a61c3 | 1695 | * |
4dff95dc SB |
1696 | * In the simplest case clk_set_rate will only adjust the rate of clk. |
1697 | * | |
1698 | * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to | |
1699 | * propagate up to clk's parent; whether or not this happens depends on the | |
1700 | * outcome of clk's .round_rate implementation. If *parent_rate is unchanged | |
1701 | * after calling .round_rate then upstream parent propagation is ignored. If | |
1702 | * *parent_rate comes back with a new rate for clk's parent then we propagate | |
1703 | * up to clk's parent and set its rate. Upward propagation will continue | |
1704 | * until either a clk does not support the CLK_SET_RATE_PARENT flag or | |
1705 | * .round_rate stops requesting changes to clk's parent_rate. | |
1706 | * | |
1707 | * Rate changes are accomplished via tree traversal that also recalculates the | |
1708 | * rates for the clocks and fires off POST_RATE_CHANGE notifiers. | |
1709 | * | |
1710 | * Returns 0 on success, -EERROR otherwise. | |
035a61c3 | 1711 | */ |
4dff95dc | 1712 | int clk_set_rate(struct clk *clk, unsigned long rate) |
035a61c3 | 1713 | { |
4dff95dc SB |
1714 | int ret; |
1715 | ||
035a61c3 TV |
1716 | if (!clk) |
1717 | return 0; | |
1718 | ||
4dff95dc SB |
1719 | /* prevent racing with updates to the clock topology */ |
1720 | clk_prepare_lock(); | |
da0f0b2c | 1721 | |
4dff95dc | 1722 | ret = clk_core_set_rate_nolock(clk->core, rate); |
da0f0b2c | 1723 | |
4dff95dc | 1724 | clk_prepare_unlock(); |
4935b22c | 1725 | |
4dff95dc | 1726 | return ret; |
4935b22c | 1727 | } |
4dff95dc | 1728 | EXPORT_SYMBOL_GPL(clk_set_rate); |
4935b22c | 1729 | |
4dff95dc SB |
1730 | /** |
1731 | * clk_set_rate_range - set a rate range for a clock source | |
1732 | * @clk: clock source | |
1733 | * @min: desired minimum clock rate in Hz, inclusive | |
1734 | * @max: desired maximum clock rate in Hz, inclusive | |
1735 | * | |
1736 | * Returns success (0) or negative errno. | |
1737 | */ | |
1738 | int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) | |
4935b22c | 1739 | { |
4dff95dc | 1740 | int ret = 0; |
4935b22c | 1741 | |
4dff95dc SB |
1742 | if (!clk) |
1743 | return 0; | |
903efc55 | 1744 | |
4dff95dc SB |
1745 | if (min > max) { |
1746 | pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n", | |
1747 | __func__, clk->core->name, clk->dev_id, clk->con_id, | |
1748 | min, max); | |
1749 | return -EINVAL; | |
903efc55 | 1750 | } |
4935b22c | 1751 | |
4dff95dc | 1752 | clk_prepare_lock(); |
4935b22c | 1753 | |
4dff95dc SB |
1754 | if (min != clk->min_rate || max != clk->max_rate) { |
1755 | clk->min_rate = min; | |
1756 | clk->max_rate = max; | |
1757 | ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
4935b22c JH |
1758 | } |
1759 | ||
4dff95dc | 1760 | clk_prepare_unlock(); |
4935b22c | 1761 | |
4dff95dc | 1762 | return ret; |
3fa2252b | 1763 | } |
4dff95dc | 1764 | EXPORT_SYMBOL_GPL(clk_set_rate_range); |
3fa2252b | 1765 | |
4dff95dc SB |
1766 | /** |
1767 | * clk_set_min_rate - set a minimum clock rate for a clock source | |
1768 | * @clk: clock source | |
1769 | * @rate: desired minimum clock rate in Hz, inclusive | |
1770 | * | |
1771 | * Returns success (0) or negative errno. | |
1772 | */ | |
1773 | int clk_set_min_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 1774 | { |
4dff95dc SB |
1775 | if (!clk) |
1776 | return 0; | |
1777 | ||
1778 | return clk_set_rate_range(clk, rate, clk->max_rate); | |
3fa2252b | 1779 | } |
4dff95dc | 1780 | EXPORT_SYMBOL_GPL(clk_set_min_rate); |
3fa2252b | 1781 | |
4dff95dc SB |
1782 | /** |
1783 | * clk_set_max_rate - set a maximum clock rate for a clock source | |
1784 | * @clk: clock source | |
1785 | * @rate: desired maximum clock rate in Hz, inclusive | |
1786 | * | |
1787 | * Returns success (0) or negative errno. | |
1788 | */ | |
1789 | int clk_set_max_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 1790 | { |
4dff95dc SB |
1791 | if (!clk) |
1792 | return 0; | |
4935b22c | 1793 | |
4dff95dc | 1794 | return clk_set_rate_range(clk, clk->min_rate, rate); |
4935b22c | 1795 | } |
4dff95dc | 1796 | EXPORT_SYMBOL_GPL(clk_set_max_rate); |
4935b22c | 1797 | |
b2476490 | 1798 | /** |
4dff95dc SB |
1799 | * clk_get_parent - return the parent of a clk |
1800 | * @clk: the clk whose parent gets returned | |
b2476490 | 1801 | * |
4dff95dc | 1802 | * Simply returns clk->parent. Returns NULL if clk is NULL. |
b2476490 | 1803 | */ |
4dff95dc | 1804 | struct clk *clk_get_parent(struct clk *clk) |
b2476490 | 1805 | { |
4dff95dc | 1806 | struct clk *parent; |
b2476490 | 1807 | |
fc4a05d4 SB |
1808 | if (!clk) |
1809 | return NULL; | |
1810 | ||
4dff95dc | 1811 | clk_prepare_lock(); |
fc4a05d4 SB |
1812 | /* TODO: Create a per-user clk and change callers to call clk_put */ |
1813 | parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk; | |
4dff95dc | 1814 | clk_prepare_unlock(); |
496eadf8 | 1815 | |
4dff95dc SB |
1816 | return parent; |
1817 | } | |
1818 | EXPORT_SYMBOL_GPL(clk_get_parent); | |
b2476490 | 1819 | |
4dff95dc SB |
1820 | static struct clk_core *__clk_init_parent(struct clk_core *core) |
1821 | { | |
5146e0b0 | 1822 | u8 index = 0; |
4dff95dc | 1823 | |
2430a94d | 1824 | if (core->num_parents > 1 && core->ops->get_parent) |
5146e0b0 | 1825 | index = core->ops->get_parent(core->hw); |
b2476490 | 1826 | |
5146e0b0 | 1827 | return clk_core_get_parent_by_index(core, index); |
b2476490 MT |
1828 | } |
1829 | ||
4dff95dc SB |
1830 | static void clk_core_reparent(struct clk_core *core, |
1831 | struct clk_core *new_parent) | |
b2476490 | 1832 | { |
4dff95dc SB |
1833 | clk_reparent(core, new_parent); |
1834 | __clk_recalc_accuracies(core); | |
1835 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
b2476490 MT |
1836 | } |
1837 | ||
42c86547 TV |
1838 | void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent) |
1839 | { | |
1840 | if (!hw) | |
1841 | return; | |
1842 | ||
1843 | clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core); | |
1844 | } | |
1845 | ||
4dff95dc SB |
1846 | /** |
1847 | * clk_has_parent - check if a clock is a possible parent for another | |
1848 | * @clk: clock source | |
1849 | * @parent: parent clock source | |
1850 | * | |
1851 | * This function can be used in drivers that need to check that a clock can be | |
1852 | * the parent of another without actually changing the parent. | |
1853 | * | |
1854 | * Returns true if @parent is a possible parent for @clk, false otherwise. | |
b2476490 | 1855 | */ |
4dff95dc | 1856 | bool clk_has_parent(struct clk *clk, struct clk *parent) |
b2476490 | 1857 | { |
4dff95dc SB |
1858 | struct clk_core *core, *parent_core; |
1859 | unsigned int i; | |
b2476490 | 1860 | |
4dff95dc SB |
1861 | /* NULL clocks should be nops, so return success if either is NULL. */ |
1862 | if (!clk || !parent) | |
1863 | return true; | |
7452b219 | 1864 | |
4dff95dc SB |
1865 | core = clk->core; |
1866 | parent_core = parent->core; | |
71472c0c | 1867 | |
4dff95dc SB |
1868 | /* Optimize for the case where the parent is already the parent. */ |
1869 | if (core->parent == parent_core) | |
1870 | return true; | |
1c8e6004 | 1871 | |
4dff95dc SB |
1872 | for (i = 0; i < core->num_parents; i++) |
1873 | if (strcmp(core->parent_names[i], parent_core->name) == 0) | |
1874 | return true; | |
03bc10ab | 1875 | |
4dff95dc SB |
1876 | return false; |
1877 | } | |
1878 | EXPORT_SYMBOL_GPL(clk_has_parent); | |
03bc10ab | 1879 | |
4dff95dc SB |
1880 | static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent) |
1881 | { | |
1882 | int ret = 0; | |
1883 | int p_index = 0; | |
1884 | unsigned long p_rate = 0; | |
1885 | ||
1886 | if (!core) | |
1887 | return 0; | |
1888 | ||
1889 | /* prevent racing with updates to the clock topology */ | |
1890 | clk_prepare_lock(); | |
1891 | ||
1892 | if (core->parent == parent) | |
1893 | goto out; | |
1894 | ||
1895 | /* verify ops for for multi-parent clks */ | |
1896 | if ((core->num_parents > 1) && (!core->ops->set_parent)) { | |
1897 | ret = -ENOSYS; | |
63f5c3b2 | 1898 | goto out; |
7452b219 MT |
1899 | } |
1900 | ||
4dff95dc SB |
1901 | /* check that we are allowed to re-parent if the clock is in use */ |
1902 | if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1903 | ret = -EBUSY; | |
1904 | goto out; | |
b2476490 MT |
1905 | } |
1906 | ||
71472c0c | 1907 | /* try finding the new parent index */ |
4dff95dc | 1908 | if (parent) { |
d6968fca | 1909 | p_index = clk_fetch_parent_index(core, parent); |
f1c8b2ed | 1910 | if (p_index < 0) { |
71472c0c | 1911 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
4dff95dc SB |
1912 | __func__, parent->name, core->name); |
1913 | ret = p_index; | |
1914 | goto out; | |
71472c0c | 1915 | } |
e8f0e68e | 1916 | p_rate = parent->rate; |
b2476490 MT |
1917 | } |
1918 | ||
9a34b453 MS |
1919 | ret = clk_pm_runtime_get(core); |
1920 | if (ret) | |
1921 | goto out; | |
1922 | ||
4dff95dc SB |
1923 | /* propagate PRE_RATE_CHANGE notifications */ |
1924 | ret = __clk_speculate_rates(core, p_rate); | |
b2476490 | 1925 | |
4dff95dc SB |
1926 | /* abort if a driver objects */ |
1927 | if (ret & NOTIFY_STOP_MASK) | |
9a34b453 | 1928 | goto runtime_put; |
b2476490 | 1929 | |
4dff95dc SB |
1930 | /* do the re-parent */ |
1931 | ret = __clk_set_parent(core, parent, p_index); | |
b2476490 | 1932 | |
4dff95dc SB |
1933 | /* propagate rate an accuracy recalculation accordingly */ |
1934 | if (ret) { | |
1935 | __clk_recalc_rates(core, ABORT_RATE_CHANGE); | |
1936 | } else { | |
1937 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
1938 | __clk_recalc_accuracies(core); | |
b2476490 MT |
1939 | } |
1940 | ||
9a34b453 MS |
1941 | runtime_put: |
1942 | clk_pm_runtime_put(core); | |
4dff95dc SB |
1943 | out: |
1944 | clk_prepare_unlock(); | |
71472c0c | 1945 | |
4dff95dc SB |
1946 | return ret; |
1947 | } | |
b2476490 | 1948 | |
4dff95dc SB |
1949 | /** |
1950 | * clk_set_parent - switch the parent of a mux clk | |
1951 | * @clk: the mux clk whose input we are switching | |
1952 | * @parent: the new input to clk | |
1953 | * | |
1954 | * Re-parent clk to use parent as its new input source. If clk is in | |
1955 | * prepared state, the clk will get enabled for the duration of this call. If | |
1956 | * that's not acceptable for a specific clk (Eg: the consumer can't handle | |
1957 | * that, the reparenting is glitchy in hardware, etc), use the | |
1958 | * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared. | |
1959 | * | |
1960 | * After successfully changing clk's parent clk_set_parent will update the | |
1961 | * clk topology, sysfs topology and propagate rate recalculation via | |
1962 | * __clk_recalc_rates. | |
1963 | * | |
1964 | * Returns 0 on success, -EERROR otherwise. | |
1965 | */ | |
1966 | int clk_set_parent(struct clk *clk, struct clk *parent) | |
1967 | { | |
1968 | if (!clk) | |
1969 | return 0; | |
1970 | ||
1971 | return clk_core_set_parent(clk->core, parent ? parent->core : NULL); | |
b2476490 | 1972 | } |
4dff95dc | 1973 | EXPORT_SYMBOL_GPL(clk_set_parent); |
b2476490 | 1974 | |
4dff95dc SB |
1975 | /** |
1976 | * clk_set_phase - adjust the phase shift of a clock signal | |
1977 | * @clk: clock signal source | |
1978 | * @degrees: number of degrees the signal is shifted | |
1979 | * | |
1980 | * Shifts the phase of a clock signal by the specified | |
1981 | * degrees. Returns 0 on success, -EERROR otherwise. | |
1982 | * | |
1983 | * This function makes no distinction about the input or reference | |
1984 | * signal that we adjust the clock signal phase against. For example | |
1985 | * phase locked-loop clock signal generators we may shift phase with | |
1986 | * respect to feedback clock signal input, but for other cases the | |
1987 | * clock phase may be shifted with respect to some other, unspecified | |
1988 | * signal. | |
1989 | * | |
1990 | * Additionally the concept of phase shift does not propagate through | |
1991 | * the clock tree hierarchy, which sets it apart from clock rates and | |
1992 | * clock accuracy. A parent clock phase attribute does not have an | |
1993 | * impact on the phase attribute of a child clock. | |
b2476490 | 1994 | */ |
4dff95dc | 1995 | int clk_set_phase(struct clk *clk, int degrees) |
b2476490 | 1996 | { |
4dff95dc | 1997 | int ret = -EINVAL; |
b2476490 | 1998 | |
4dff95dc SB |
1999 | if (!clk) |
2000 | return 0; | |
b2476490 | 2001 | |
4dff95dc SB |
2002 | /* sanity check degrees */ |
2003 | degrees %= 360; | |
2004 | if (degrees < 0) | |
2005 | degrees += 360; | |
bf47b4fd | 2006 | |
4dff95dc | 2007 | clk_prepare_lock(); |
3fa2252b | 2008 | |
4dff95dc | 2009 | trace_clk_set_phase(clk->core, degrees); |
3fa2252b | 2010 | |
4dff95dc SB |
2011 | if (clk->core->ops->set_phase) |
2012 | ret = clk->core->ops->set_phase(clk->core->hw, degrees); | |
3fa2252b | 2013 | |
4dff95dc | 2014 | trace_clk_set_phase_complete(clk->core, degrees); |
dfc202ea | 2015 | |
4dff95dc SB |
2016 | if (!ret) |
2017 | clk->core->phase = degrees; | |
b2476490 | 2018 | |
4dff95dc | 2019 | clk_prepare_unlock(); |
dfc202ea | 2020 | |
4dff95dc SB |
2021 | return ret; |
2022 | } | |
2023 | EXPORT_SYMBOL_GPL(clk_set_phase); | |
b2476490 | 2024 | |
4dff95dc SB |
2025 | static int clk_core_get_phase(struct clk_core *core) |
2026 | { | |
2027 | int ret; | |
b2476490 | 2028 | |
4dff95dc SB |
2029 | clk_prepare_lock(); |
2030 | ret = core->phase; | |
2031 | clk_prepare_unlock(); | |
71472c0c | 2032 | |
4dff95dc | 2033 | return ret; |
b2476490 MT |
2034 | } |
2035 | ||
4dff95dc SB |
2036 | /** |
2037 | * clk_get_phase - return the phase shift of a clock signal | |
2038 | * @clk: clock signal source | |
2039 | * | |
2040 | * Returns the phase shift of a clock node in degrees, otherwise returns | |
2041 | * -EERROR. | |
2042 | */ | |
2043 | int clk_get_phase(struct clk *clk) | |
1c8e6004 | 2044 | { |
4dff95dc | 2045 | if (!clk) |
1c8e6004 TV |
2046 | return 0; |
2047 | ||
4dff95dc SB |
2048 | return clk_core_get_phase(clk->core); |
2049 | } | |
2050 | EXPORT_SYMBOL_GPL(clk_get_phase); | |
1c8e6004 | 2051 | |
4dff95dc SB |
2052 | /** |
2053 | * clk_is_match - check if two clk's point to the same hardware clock | |
2054 | * @p: clk compared against q | |
2055 | * @q: clk compared against p | |
2056 | * | |
2057 | * Returns true if the two struct clk pointers both point to the same hardware | |
2058 | * clock node. Put differently, returns true if struct clk *p and struct clk *q | |
2059 | * share the same struct clk_core object. | |
2060 | * | |
2061 | * Returns false otherwise. Note that two NULL clks are treated as matching. | |
2062 | */ | |
2063 | bool clk_is_match(const struct clk *p, const struct clk *q) | |
2064 | { | |
2065 | /* trivial case: identical struct clk's or both NULL */ | |
2066 | if (p == q) | |
2067 | return true; | |
1c8e6004 | 2068 | |
3fe003f9 | 2069 | /* true if clk->core pointers match. Avoid dereferencing garbage */ |
4dff95dc SB |
2070 | if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q)) |
2071 | if (p->core == q->core) | |
2072 | return true; | |
1c8e6004 | 2073 | |
4dff95dc SB |
2074 | return false; |
2075 | } | |
2076 | EXPORT_SYMBOL_GPL(clk_is_match); | |
1c8e6004 | 2077 | |
4dff95dc | 2078 | /*** debugfs support ***/ |
1c8e6004 | 2079 | |
4dff95dc SB |
2080 | #ifdef CONFIG_DEBUG_FS |
2081 | #include <linux/debugfs.h> | |
1c8e6004 | 2082 | |
4dff95dc SB |
2083 | static struct dentry *rootdir; |
2084 | static int inited = 0; | |
2085 | static DEFINE_MUTEX(clk_debug_lock); | |
2086 | static HLIST_HEAD(clk_debug_list); | |
1c8e6004 | 2087 | |
4dff95dc SB |
2088 | static struct hlist_head *all_lists[] = { |
2089 | &clk_root_list, | |
2090 | &clk_orphan_list, | |
2091 | NULL, | |
2092 | }; | |
2093 | ||
2094 | static struct hlist_head *orphan_list[] = { | |
2095 | &clk_orphan_list, | |
2096 | NULL, | |
2097 | }; | |
2098 | ||
2099 | static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, | |
2100 | int level) | |
b2476490 | 2101 | { |
4dff95dc SB |
2102 | if (!c) |
2103 | return; | |
b2476490 | 2104 | |
4dff95dc SB |
2105 | seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n", |
2106 | level * 3 + 1, "", | |
2107 | 30 - level * 3, c->name, | |
2108 | c->enable_count, c->prepare_count, clk_core_get_rate(c), | |
2109 | clk_core_get_accuracy(c), clk_core_get_phase(c)); | |
2110 | } | |
89ac8d7a | 2111 | |
4dff95dc SB |
2112 | static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, |
2113 | int level) | |
2114 | { | |
2115 | struct clk_core *child; | |
b2476490 | 2116 | |
4dff95dc SB |
2117 | if (!c) |
2118 | return; | |
b2476490 | 2119 | |
4dff95dc | 2120 | clk_summary_show_one(s, c, level); |
0e1c0301 | 2121 | |
4dff95dc SB |
2122 | hlist_for_each_entry(child, &c->children, child_node) |
2123 | clk_summary_show_subtree(s, child, level + 1); | |
1c8e6004 | 2124 | } |
b2476490 | 2125 | |
4dff95dc | 2126 | static int clk_summary_show(struct seq_file *s, void *data) |
1c8e6004 | 2127 | { |
4dff95dc SB |
2128 | struct clk_core *c; |
2129 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
1c8e6004 | 2130 | |
4dff95dc SB |
2131 | seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n"); |
2132 | seq_puts(s, "----------------------------------------------------------------------------------------\n"); | |
b2476490 | 2133 | |
1c8e6004 TV |
2134 | clk_prepare_lock(); |
2135 | ||
4dff95dc SB |
2136 | for (; *lists; lists++) |
2137 | hlist_for_each_entry(c, *lists, child_node) | |
2138 | clk_summary_show_subtree(s, c, 0); | |
b2476490 | 2139 | |
eab89f69 | 2140 | clk_prepare_unlock(); |
b2476490 | 2141 | |
4dff95dc | 2142 | return 0; |
b2476490 | 2143 | } |
1c8e6004 | 2144 | |
1c8e6004 | 2145 | |
4dff95dc | 2146 | static int clk_summary_open(struct inode *inode, struct file *file) |
1c8e6004 | 2147 | { |
4dff95dc | 2148 | return single_open(file, clk_summary_show, inode->i_private); |
1c8e6004 | 2149 | } |
b2476490 | 2150 | |
4dff95dc SB |
2151 | static const struct file_operations clk_summary_fops = { |
2152 | .open = clk_summary_open, | |
2153 | .read = seq_read, | |
2154 | .llseek = seq_lseek, | |
2155 | .release = single_release, | |
2156 | }; | |
b2476490 | 2157 | |
4dff95dc SB |
2158 | static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) |
2159 | { | |
2160 | if (!c) | |
2161 | return; | |
b2476490 | 2162 | |
7cb81136 | 2163 | /* This should be JSON format, i.e. elements separated with a comma */ |
4dff95dc SB |
2164 | seq_printf(s, "\"%s\": { ", c->name); |
2165 | seq_printf(s, "\"enable_count\": %d,", c->enable_count); | |
2166 | seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); | |
7cb81136 SW |
2167 | seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c)); |
2168 | seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c)); | |
4dff95dc | 2169 | seq_printf(s, "\"phase\": %d", clk_core_get_phase(c)); |
b2476490 | 2170 | } |
b2476490 | 2171 | |
4dff95dc | 2172 | static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) |
b2476490 | 2173 | { |
4dff95dc | 2174 | struct clk_core *child; |
b2476490 | 2175 | |
4dff95dc SB |
2176 | if (!c) |
2177 | return; | |
b2476490 | 2178 | |
4dff95dc | 2179 | clk_dump_one(s, c, level); |
b2476490 | 2180 | |
4dff95dc | 2181 | hlist_for_each_entry(child, &c->children, child_node) { |
4d327586 | 2182 | seq_putc(s, ','); |
4dff95dc | 2183 | clk_dump_subtree(s, child, level + 1); |
b2476490 MT |
2184 | } |
2185 | ||
4d327586 | 2186 | seq_putc(s, '}'); |
b2476490 MT |
2187 | } |
2188 | ||
4dff95dc | 2189 | static int clk_dump(struct seq_file *s, void *data) |
4e88f3de | 2190 | { |
4dff95dc SB |
2191 | struct clk_core *c; |
2192 | bool first_node = true; | |
2193 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
4e88f3de | 2194 | |
4d327586 | 2195 | seq_putc(s, '{'); |
4dff95dc | 2196 | clk_prepare_lock(); |
035a61c3 | 2197 | |
4dff95dc SB |
2198 | for (; *lists; lists++) { |
2199 | hlist_for_each_entry(c, *lists, child_node) { | |
2200 | if (!first_node) | |
4d327586 | 2201 | seq_putc(s, ','); |
4dff95dc SB |
2202 | first_node = false; |
2203 | clk_dump_subtree(s, c, 0); | |
2204 | } | |
2205 | } | |
4e88f3de | 2206 | |
4dff95dc | 2207 | clk_prepare_unlock(); |
4e88f3de | 2208 | |
70e9f4dd | 2209 | seq_puts(s, "}\n"); |
4dff95dc | 2210 | return 0; |
4e88f3de | 2211 | } |
4e88f3de | 2212 | |
4dff95dc SB |
2213 | |
2214 | static int clk_dump_open(struct inode *inode, struct file *file) | |
b2476490 | 2215 | { |
4dff95dc SB |
2216 | return single_open(file, clk_dump, inode->i_private); |
2217 | } | |
b2476490 | 2218 | |
4dff95dc SB |
2219 | static const struct file_operations clk_dump_fops = { |
2220 | .open = clk_dump_open, | |
2221 | .read = seq_read, | |
2222 | .llseek = seq_lseek, | |
2223 | .release = single_release, | |
2224 | }; | |
89ac8d7a | 2225 | |
92031575 PDS |
2226 | static int possible_parents_dump(struct seq_file *s, void *data) |
2227 | { | |
2228 | struct clk_core *core = s->private; | |
2229 | int i; | |
2230 | ||
2231 | for (i = 0; i < core->num_parents - 1; i++) | |
2232 | seq_printf(s, "%s ", core->parent_names[i]); | |
2233 | ||
2234 | seq_printf(s, "%s\n", core->parent_names[i]); | |
2235 | ||
2236 | return 0; | |
2237 | } | |
2238 | ||
2239 | static int possible_parents_open(struct inode *inode, struct file *file) | |
2240 | { | |
2241 | return single_open(file, possible_parents_dump, inode->i_private); | |
2242 | } | |
2243 | ||
2244 | static const struct file_operations possible_parents_fops = { | |
2245 | .open = possible_parents_open, | |
2246 | .read = seq_read, | |
2247 | .llseek = seq_lseek, | |
2248 | .release = single_release, | |
2249 | }; | |
2250 | ||
4dff95dc SB |
2251 | static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) |
2252 | { | |
2253 | struct dentry *d; | |
2254 | int ret = -ENOMEM; | |
b2476490 | 2255 | |
4dff95dc SB |
2256 | if (!core || !pdentry) { |
2257 | ret = -EINVAL; | |
b2476490 | 2258 | goto out; |
4dff95dc | 2259 | } |
b2476490 | 2260 | |
4dff95dc SB |
2261 | d = debugfs_create_dir(core->name, pdentry); |
2262 | if (!d) | |
b61c43c0 | 2263 | goto out; |
b61c43c0 | 2264 | |
4dff95dc SB |
2265 | core->dentry = d; |
2266 | ||
2267 | d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry, | |
2268 | (u32 *)&core->rate); | |
2269 | if (!d) | |
2270 | goto err_out; | |
2271 | ||
2272 | d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry, | |
2273 | (u32 *)&core->accuracy); | |
2274 | if (!d) | |
2275 | goto err_out; | |
2276 | ||
2277 | d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry, | |
2278 | (u32 *)&core->phase); | |
2279 | if (!d) | |
2280 | goto err_out; | |
031dcc9b | 2281 | |
4dff95dc SB |
2282 | d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry, |
2283 | (u32 *)&core->flags); | |
2284 | if (!d) | |
2285 | goto err_out; | |
031dcc9b | 2286 | |
4dff95dc SB |
2287 | d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry, |
2288 | (u32 *)&core->prepare_count); | |
2289 | if (!d) | |
2290 | goto err_out; | |
b2476490 | 2291 | |
4dff95dc SB |
2292 | d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry, |
2293 | (u32 *)&core->enable_count); | |
2294 | if (!d) | |
2295 | goto err_out; | |
b2476490 | 2296 | |
4dff95dc SB |
2297 | d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry, |
2298 | (u32 *)&core->notifier_count); | |
2299 | if (!d) | |
2300 | goto err_out; | |
b2476490 | 2301 | |
92031575 PDS |
2302 | if (core->num_parents > 1) { |
2303 | d = debugfs_create_file("clk_possible_parents", S_IRUGO, | |
2304 | core->dentry, core, &possible_parents_fops); | |
2305 | if (!d) | |
2306 | goto err_out; | |
2307 | } | |
2308 | ||
4dff95dc SB |
2309 | if (core->ops->debug_init) { |
2310 | ret = core->ops->debug_init(core->hw, core->dentry); | |
2311 | if (ret) | |
2312 | goto err_out; | |
5279fc40 | 2313 | } |
b2476490 | 2314 | |
4dff95dc SB |
2315 | ret = 0; |
2316 | goto out; | |
b2476490 | 2317 | |
4dff95dc SB |
2318 | err_out: |
2319 | debugfs_remove_recursive(core->dentry); | |
2320 | core->dentry = NULL; | |
2321 | out: | |
b2476490 MT |
2322 | return ret; |
2323 | } | |
035a61c3 TV |
2324 | |
2325 | /** | |
6e5ab41b SB |
2326 | * clk_debug_register - add a clk node to the debugfs clk directory |
2327 | * @core: the clk being added to the debugfs clk directory | |
035a61c3 | 2328 | * |
6e5ab41b SB |
2329 | * Dynamically adds a clk to the debugfs clk directory if debugfs has been |
2330 | * initialized. Otherwise it bails out early since the debugfs clk directory | |
4dff95dc | 2331 | * will be created lazily by clk_debug_init as part of a late_initcall. |
035a61c3 | 2332 | */ |
4dff95dc | 2333 | static int clk_debug_register(struct clk_core *core) |
035a61c3 | 2334 | { |
4dff95dc | 2335 | int ret = 0; |
035a61c3 | 2336 | |
4dff95dc SB |
2337 | mutex_lock(&clk_debug_lock); |
2338 | hlist_add_head(&core->debug_node, &clk_debug_list); | |
2339 | ||
2340 | if (!inited) | |
2341 | goto unlock; | |
2342 | ||
2343 | ret = clk_debug_create_one(core, rootdir); | |
2344 | unlock: | |
2345 | mutex_unlock(&clk_debug_lock); | |
2346 | ||
2347 | return ret; | |
035a61c3 | 2348 | } |
b2476490 | 2349 | |
4dff95dc | 2350 | /** |
6e5ab41b SB |
2351 | * clk_debug_unregister - remove a clk node from the debugfs clk directory |
2352 | * @core: the clk being removed from the debugfs clk directory | |
e59c5371 | 2353 | * |
6e5ab41b SB |
2354 | * Dynamically removes a clk and all its child nodes from the |
2355 | * debugfs clk directory if clk->dentry points to debugfs created by | |
706d5c73 | 2356 | * clk_debug_register in __clk_core_init. |
e59c5371 | 2357 | */ |
4dff95dc | 2358 | static void clk_debug_unregister(struct clk_core *core) |
e59c5371 | 2359 | { |
4dff95dc SB |
2360 | mutex_lock(&clk_debug_lock); |
2361 | hlist_del_init(&core->debug_node); | |
2362 | debugfs_remove_recursive(core->dentry); | |
2363 | core->dentry = NULL; | |
2364 | mutex_unlock(&clk_debug_lock); | |
2365 | } | |
e59c5371 | 2366 | |
4dff95dc SB |
2367 | struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode, |
2368 | void *data, const struct file_operations *fops) | |
2369 | { | |
2370 | struct dentry *d = NULL; | |
e59c5371 | 2371 | |
4dff95dc SB |
2372 | if (hw->core->dentry) |
2373 | d = debugfs_create_file(name, mode, hw->core->dentry, data, | |
2374 | fops); | |
e59c5371 | 2375 | |
4dff95dc SB |
2376 | return d; |
2377 | } | |
2378 | EXPORT_SYMBOL_GPL(clk_debugfs_add_file); | |
e59c5371 | 2379 | |
4dff95dc | 2380 | /** |
6e5ab41b | 2381 | * clk_debug_init - lazily populate the debugfs clk directory |
4dff95dc | 2382 | * |
6e5ab41b SB |
2383 | * clks are often initialized very early during boot before memory can be |
2384 | * dynamically allocated and well before debugfs is setup. This function | |
2385 | * populates the debugfs clk directory once at boot-time when we know that | |
2386 | * debugfs is setup. It should only be called once at boot-time, all other clks | |
2387 | * added dynamically will be done so with clk_debug_register. | |
4dff95dc SB |
2388 | */ |
2389 | static int __init clk_debug_init(void) | |
2390 | { | |
2391 | struct clk_core *core; | |
2392 | struct dentry *d; | |
dfc202ea | 2393 | |
4dff95dc | 2394 | rootdir = debugfs_create_dir("clk", NULL); |
e59c5371 | 2395 | |
4dff95dc SB |
2396 | if (!rootdir) |
2397 | return -ENOMEM; | |
dfc202ea | 2398 | |
4dff95dc SB |
2399 | d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists, |
2400 | &clk_summary_fops); | |
2401 | if (!d) | |
2402 | return -ENOMEM; | |
e59c5371 | 2403 | |
4dff95dc SB |
2404 | d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists, |
2405 | &clk_dump_fops); | |
2406 | if (!d) | |
2407 | return -ENOMEM; | |
e59c5371 | 2408 | |
4dff95dc SB |
2409 | d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir, |
2410 | &orphan_list, &clk_summary_fops); | |
2411 | if (!d) | |
2412 | return -ENOMEM; | |
e59c5371 | 2413 | |
4dff95dc SB |
2414 | d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir, |
2415 | &orphan_list, &clk_dump_fops); | |
2416 | if (!d) | |
2417 | return -ENOMEM; | |
e59c5371 | 2418 | |
4dff95dc SB |
2419 | mutex_lock(&clk_debug_lock); |
2420 | hlist_for_each_entry(core, &clk_debug_list, debug_node) | |
2421 | clk_debug_create_one(core, rootdir); | |
e59c5371 | 2422 | |
4dff95dc SB |
2423 | inited = 1; |
2424 | mutex_unlock(&clk_debug_lock); | |
e59c5371 | 2425 | |
4dff95dc SB |
2426 | return 0; |
2427 | } | |
2428 | late_initcall(clk_debug_init); | |
2429 | #else | |
2430 | static inline int clk_debug_register(struct clk_core *core) { return 0; } | |
2431 | static inline void clk_debug_reparent(struct clk_core *core, | |
2432 | struct clk_core *new_parent) | |
035a61c3 | 2433 | { |
035a61c3 | 2434 | } |
4dff95dc | 2435 | static inline void clk_debug_unregister(struct clk_core *core) |
3d3801ef | 2436 | { |
3d3801ef | 2437 | } |
4dff95dc | 2438 | #endif |
3d3801ef | 2439 | |
b2476490 | 2440 | /** |
be45ebf2 | 2441 | * __clk_core_init - initialize the data structures in a struct clk_core |
d35c80c2 | 2442 | * @core: clk_core being initialized |
b2476490 | 2443 | * |
035a61c3 | 2444 | * Initializes the lists in struct clk_core, queries the hardware for the |
b2476490 | 2445 | * parent and rate and sets them both. |
b2476490 | 2446 | */ |
be45ebf2 | 2447 | static int __clk_core_init(struct clk_core *core) |
b2476490 | 2448 | { |
9a34b453 | 2449 | int i, ret; |
035a61c3 | 2450 | struct clk_core *orphan; |
b67bfe0d | 2451 | struct hlist_node *tmp2; |
1c8e6004 | 2452 | unsigned long rate; |
b2476490 | 2453 | |
d35c80c2 | 2454 | if (!core) |
d1302a36 | 2455 | return -EINVAL; |
b2476490 | 2456 | |
eab89f69 | 2457 | clk_prepare_lock(); |
b2476490 | 2458 | |
9a34b453 MS |
2459 | ret = clk_pm_runtime_get(core); |
2460 | if (ret) | |
2461 | goto unlock; | |
2462 | ||
b2476490 | 2463 | /* check to see if a clock with this name is already registered */ |
d6968fca | 2464 | if (clk_core_lookup(core->name)) { |
d1302a36 | 2465 | pr_debug("%s: clk %s already initialized\n", |
d6968fca | 2466 | __func__, core->name); |
d1302a36 | 2467 | ret = -EEXIST; |
b2476490 | 2468 | goto out; |
d1302a36 | 2469 | } |
b2476490 | 2470 | |
d4d7e3dd | 2471 | /* check that clk_ops are sane. See Documentation/clk.txt */ |
d6968fca SB |
2472 | if (core->ops->set_rate && |
2473 | !((core->ops->round_rate || core->ops->determine_rate) && | |
2474 | core->ops->recalc_rate)) { | |
c44fccb5 MY |
2475 | pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", |
2476 | __func__, core->name); | |
d1302a36 | 2477 | ret = -EINVAL; |
d4d7e3dd MT |
2478 | goto out; |
2479 | } | |
2480 | ||
d6968fca | 2481 | if (core->ops->set_parent && !core->ops->get_parent) { |
c44fccb5 MY |
2482 | pr_err("%s: %s must implement .get_parent & .set_parent\n", |
2483 | __func__, core->name); | |
d1302a36 | 2484 | ret = -EINVAL; |
d4d7e3dd MT |
2485 | goto out; |
2486 | } | |
2487 | ||
3c8e77dd MY |
2488 | if (core->num_parents > 1 && !core->ops->get_parent) { |
2489 | pr_err("%s: %s must implement .get_parent as it has multi parents\n", | |
2490 | __func__, core->name); | |
2491 | ret = -EINVAL; | |
2492 | goto out; | |
2493 | } | |
2494 | ||
d6968fca SB |
2495 | if (core->ops->set_rate_and_parent && |
2496 | !(core->ops->set_parent && core->ops->set_rate)) { | |
c44fccb5 | 2497 | pr_err("%s: %s must implement .set_parent & .set_rate\n", |
d6968fca | 2498 | __func__, core->name); |
3fa2252b SB |
2499 | ret = -EINVAL; |
2500 | goto out; | |
2501 | } | |
2502 | ||
b2476490 | 2503 | /* throw a WARN if any entries in parent_names are NULL */ |
d6968fca SB |
2504 | for (i = 0; i < core->num_parents; i++) |
2505 | WARN(!core->parent_names[i], | |
b2476490 | 2506 | "%s: invalid NULL in %s's .parent_names\n", |
d6968fca | 2507 | __func__, core->name); |
b2476490 | 2508 | |
d6968fca | 2509 | core->parent = __clk_init_parent(core); |
b2476490 MT |
2510 | |
2511 | /* | |
706d5c73 SB |
2512 | * Populate core->parent if parent has already been clk_core_init'd. If |
2513 | * parent has not yet been clk_core_init'd then place clk in the orphan | |
47b0eeb3 | 2514 | * list. If clk doesn't have any parents then place it in the root |
b2476490 MT |
2515 | * clk list. |
2516 | * | |
2517 | * Every time a new clk is clk_init'd then we walk the list of orphan | |
2518 | * clocks and re-parent any that are children of the clock currently | |
2519 | * being clk_init'd. | |
2520 | */ | |
e6500344 | 2521 | if (core->parent) { |
d6968fca SB |
2522 | hlist_add_head(&core->child_node, |
2523 | &core->parent->children); | |
e6500344 | 2524 | core->orphan = core->parent->orphan; |
47b0eeb3 | 2525 | } else if (!core->num_parents) { |
d6968fca | 2526 | hlist_add_head(&core->child_node, &clk_root_list); |
e6500344 HS |
2527 | core->orphan = false; |
2528 | } else { | |
d6968fca | 2529 | hlist_add_head(&core->child_node, &clk_orphan_list); |
e6500344 HS |
2530 | core->orphan = true; |
2531 | } | |
b2476490 | 2532 | |
5279fc40 BB |
2533 | /* |
2534 | * Set clk's accuracy. The preferred method is to use | |
2535 | * .recalc_accuracy. For simple clocks and lazy developers the default | |
2536 | * fallback is to use the parent's accuracy. If a clock doesn't have a | |
2537 | * parent (or is orphaned) then accuracy is set to zero (perfect | |
2538 | * clock). | |
2539 | */ | |
d6968fca SB |
2540 | if (core->ops->recalc_accuracy) |
2541 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
2542 | __clk_get_accuracy(core->parent)); | |
2543 | else if (core->parent) | |
2544 | core->accuracy = core->parent->accuracy; | |
5279fc40 | 2545 | else |
d6968fca | 2546 | core->accuracy = 0; |
5279fc40 | 2547 | |
9824cf73 MR |
2548 | /* |
2549 | * Set clk's phase. | |
2550 | * Since a phase is by definition relative to its parent, just | |
2551 | * query the current clock phase, or just assume it's in phase. | |
2552 | */ | |
d6968fca SB |
2553 | if (core->ops->get_phase) |
2554 | core->phase = core->ops->get_phase(core->hw); | |
9824cf73 | 2555 | else |
d6968fca | 2556 | core->phase = 0; |
9824cf73 | 2557 | |
b2476490 MT |
2558 | /* |
2559 | * Set clk's rate. The preferred method is to use .recalc_rate. For | |
2560 | * simple clocks and lazy developers the default fallback is to use the | |
2561 | * parent's rate. If a clock doesn't have a parent (or is orphaned) | |
2562 | * then rate is set to zero. | |
2563 | */ | |
d6968fca SB |
2564 | if (core->ops->recalc_rate) |
2565 | rate = core->ops->recalc_rate(core->hw, | |
2566 | clk_core_get_rate_nolock(core->parent)); | |
2567 | else if (core->parent) | |
2568 | rate = core->parent->rate; | |
b2476490 | 2569 | else |
1c8e6004 | 2570 | rate = 0; |
d6968fca | 2571 | core->rate = core->req_rate = rate; |
b2476490 MT |
2572 | |
2573 | /* | |
0e8f6e49 MY |
2574 | * walk the list of orphan clocks and reparent any that newly finds a |
2575 | * parent. | |
b2476490 | 2576 | */ |
b67bfe0d | 2577 | hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { |
0e8f6e49 | 2578 | struct clk_core *parent = __clk_init_parent(orphan); |
1f61e5f1 | 2579 | |
904e6ead MT |
2580 | /* |
2581 | * we could call __clk_set_parent, but that would result in a | |
2582 | * redundant call to the .set_rate op, if it exists | |
2583 | */ | |
2584 | if (parent) { | |
2585 | __clk_set_parent_before(orphan, parent); | |
2586 | __clk_set_parent_after(orphan, parent, NULL); | |
2587 | __clk_recalc_accuracies(orphan); | |
2588 | __clk_recalc_rates(orphan, 0); | |
2589 | } | |
0e8f6e49 | 2590 | } |
b2476490 MT |
2591 | |
2592 | /* | |
2593 | * optional platform-specific magic | |
2594 | * | |
2595 | * The .init callback is not used by any of the basic clock types, but | |
2596 | * exists for weird hardware that must perform initialization magic. | |
2597 | * Please consider other ways of solving initialization problems before | |
24ee1a08 | 2598 | * using this callback, as its use is discouraged. |
b2476490 | 2599 | */ |
d6968fca SB |
2600 | if (core->ops->init) |
2601 | core->ops->init(core->hw); | |
b2476490 | 2602 | |
32b9b109 | 2603 | if (core->flags & CLK_IS_CRITICAL) { |
ef56b79b MR |
2604 | unsigned long flags; |
2605 | ||
32b9b109 | 2606 | clk_core_prepare(core); |
ef56b79b MR |
2607 | |
2608 | flags = clk_enable_lock(); | |
32b9b109 | 2609 | clk_core_enable(core); |
ef56b79b | 2610 | clk_enable_unlock(flags); |
32b9b109 LJ |
2611 | } |
2612 | ||
d6968fca | 2613 | kref_init(&core->ref); |
b2476490 | 2614 | out: |
9a34b453 MS |
2615 | clk_pm_runtime_put(core); |
2616 | unlock: | |
eab89f69 | 2617 | clk_prepare_unlock(); |
b2476490 | 2618 | |
89f7e9de | 2619 | if (!ret) |
d6968fca | 2620 | clk_debug_register(core); |
89f7e9de | 2621 | |
d1302a36 | 2622 | return ret; |
b2476490 MT |
2623 | } |
2624 | ||
035a61c3 TV |
2625 | struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id, |
2626 | const char *con_id) | |
0197b3ea | 2627 | { |
0197b3ea SK |
2628 | struct clk *clk; |
2629 | ||
035a61c3 | 2630 | /* This is to allow this function to be chained to others */ |
c1de1357 | 2631 | if (IS_ERR_OR_NULL(hw)) |
8a23133c | 2632 | return ERR_CAST(hw); |
0197b3ea | 2633 | |
035a61c3 TV |
2634 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); |
2635 | if (!clk) | |
2636 | return ERR_PTR(-ENOMEM); | |
2637 | ||
2638 | clk->core = hw->core; | |
2639 | clk->dev_id = dev_id; | |
253160a8 | 2640 | clk->con_id = kstrdup_const(con_id, GFP_KERNEL); |
1c8e6004 TV |
2641 | clk->max_rate = ULONG_MAX; |
2642 | ||
2643 | clk_prepare_lock(); | |
50595f8b | 2644 | hlist_add_head(&clk->clks_node, &hw->core->clks); |
1c8e6004 | 2645 | clk_prepare_unlock(); |
0197b3ea SK |
2646 | |
2647 | return clk; | |
2648 | } | |
035a61c3 | 2649 | |
73e0e496 | 2650 | void __clk_free_clk(struct clk *clk) |
1c8e6004 TV |
2651 | { |
2652 | clk_prepare_lock(); | |
50595f8b | 2653 | hlist_del(&clk->clks_node); |
1c8e6004 TV |
2654 | clk_prepare_unlock(); |
2655 | ||
253160a8 | 2656 | kfree_const(clk->con_id); |
1c8e6004 TV |
2657 | kfree(clk); |
2658 | } | |
0197b3ea | 2659 | |
293ba3b4 SB |
2660 | /** |
2661 | * clk_register - allocate a new clock, register it and return an opaque cookie | |
2662 | * @dev: device that is registering this clock | |
2663 | * @hw: link to hardware-specific clock data | |
2664 | * | |
2665 | * clk_register is the primary interface for populating the clock tree with new | |
2666 | * clock nodes. It returns a pointer to the newly allocated struct clk which | |
a59a5163 | 2667 | * cannot be dereferenced by driver code but may be used in conjunction with the |
293ba3b4 SB |
2668 | * rest of the clock API. In the event of an error clk_register will return an |
2669 | * error code; drivers must test for an error code after calling clk_register. | |
2670 | */ | |
2671 | struct clk *clk_register(struct device *dev, struct clk_hw *hw) | |
b2476490 | 2672 | { |
d1302a36 | 2673 | int i, ret; |
d6968fca | 2674 | struct clk_core *core; |
293ba3b4 | 2675 | |
d6968fca SB |
2676 | core = kzalloc(sizeof(*core), GFP_KERNEL); |
2677 | if (!core) { | |
293ba3b4 SB |
2678 | ret = -ENOMEM; |
2679 | goto fail_out; | |
2680 | } | |
b2476490 | 2681 | |
d6968fca SB |
2682 | core->name = kstrdup_const(hw->init->name, GFP_KERNEL); |
2683 | if (!core->name) { | |
0197b3ea SK |
2684 | ret = -ENOMEM; |
2685 | goto fail_name; | |
2686 | } | |
d6968fca | 2687 | core->ops = hw->init->ops; |
9a34b453 MS |
2688 | if (dev && pm_runtime_enabled(dev)) |
2689 | core->dev = dev; | |
ac2df527 | 2690 | if (dev && dev->driver) |
d6968fca SB |
2691 | core->owner = dev->driver->owner; |
2692 | core->hw = hw; | |
2693 | core->flags = hw->init->flags; | |
2694 | core->num_parents = hw->init->num_parents; | |
9783c0d9 SB |
2695 | core->min_rate = 0; |
2696 | core->max_rate = ULONG_MAX; | |
d6968fca | 2697 | hw->core = core; |
b2476490 | 2698 | |
d1302a36 | 2699 | /* allocate local copy in case parent_names is __initdata */ |
d6968fca | 2700 | core->parent_names = kcalloc(core->num_parents, sizeof(char *), |
96a7ed90 | 2701 | GFP_KERNEL); |
d1302a36 | 2702 | |
d6968fca | 2703 | if (!core->parent_names) { |
d1302a36 MT |
2704 | ret = -ENOMEM; |
2705 | goto fail_parent_names; | |
2706 | } | |
2707 | ||
2708 | ||
2709 | /* copy each string name in case parent_names is __initdata */ | |
d6968fca SB |
2710 | for (i = 0; i < core->num_parents; i++) { |
2711 | core->parent_names[i] = kstrdup_const(hw->init->parent_names[i], | |
0197b3ea | 2712 | GFP_KERNEL); |
d6968fca | 2713 | if (!core->parent_names[i]) { |
d1302a36 MT |
2714 | ret = -ENOMEM; |
2715 | goto fail_parent_names_copy; | |
2716 | } | |
2717 | } | |
2718 | ||
176d1169 MY |
2719 | /* avoid unnecessary string look-ups of clk_core's possible parents. */ |
2720 | core->parents = kcalloc(core->num_parents, sizeof(*core->parents), | |
2721 | GFP_KERNEL); | |
2722 | if (!core->parents) { | |
2723 | ret = -ENOMEM; | |
2724 | goto fail_parents; | |
2725 | }; | |
2726 | ||
d6968fca | 2727 | INIT_HLIST_HEAD(&core->clks); |
1c8e6004 | 2728 | |
035a61c3 TV |
2729 | hw->clk = __clk_create_clk(hw, NULL, NULL); |
2730 | if (IS_ERR(hw->clk)) { | |
035a61c3 | 2731 | ret = PTR_ERR(hw->clk); |
176d1169 | 2732 | goto fail_parents; |
035a61c3 TV |
2733 | } |
2734 | ||
be45ebf2 | 2735 | ret = __clk_core_init(core); |
d1302a36 | 2736 | if (!ret) |
035a61c3 | 2737 | return hw->clk; |
b2476490 | 2738 | |
1c8e6004 | 2739 | __clk_free_clk(hw->clk); |
035a61c3 | 2740 | hw->clk = NULL; |
b2476490 | 2741 | |
176d1169 MY |
2742 | fail_parents: |
2743 | kfree(core->parents); | |
d1302a36 MT |
2744 | fail_parent_names_copy: |
2745 | while (--i >= 0) | |
d6968fca SB |
2746 | kfree_const(core->parent_names[i]); |
2747 | kfree(core->parent_names); | |
d1302a36 | 2748 | fail_parent_names: |
d6968fca | 2749 | kfree_const(core->name); |
0197b3ea | 2750 | fail_name: |
d6968fca | 2751 | kfree(core); |
d1302a36 MT |
2752 | fail_out: |
2753 | return ERR_PTR(ret); | |
b2476490 MT |
2754 | } |
2755 | EXPORT_SYMBOL_GPL(clk_register); | |
2756 | ||
4143804c SB |
2757 | /** |
2758 | * clk_hw_register - register a clk_hw and return an error code | |
2759 | * @dev: device that is registering this clock | |
2760 | * @hw: link to hardware-specific clock data | |
2761 | * | |
2762 | * clk_hw_register is the primary interface for populating the clock tree with | |
2763 | * new clock nodes. It returns an integer equal to zero indicating success or | |
2764 | * less than zero indicating failure. Drivers must test for an error code after | |
2765 | * calling clk_hw_register(). | |
2766 | */ | |
2767 | int clk_hw_register(struct device *dev, struct clk_hw *hw) | |
2768 | { | |
2769 | return PTR_ERR_OR_ZERO(clk_register(dev, hw)); | |
2770 | } | |
2771 | EXPORT_SYMBOL_GPL(clk_hw_register); | |
2772 | ||
6e5ab41b | 2773 | /* Free memory allocated for a clock. */ |
fcb0ee6a SN |
2774 | static void __clk_release(struct kref *ref) |
2775 | { | |
d6968fca SB |
2776 | struct clk_core *core = container_of(ref, struct clk_core, ref); |
2777 | int i = core->num_parents; | |
fcb0ee6a | 2778 | |
496eadf8 KK |
2779 | lockdep_assert_held(&prepare_lock); |
2780 | ||
d6968fca | 2781 | kfree(core->parents); |
fcb0ee6a | 2782 | while (--i >= 0) |
d6968fca | 2783 | kfree_const(core->parent_names[i]); |
fcb0ee6a | 2784 | |
d6968fca SB |
2785 | kfree(core->parent_names); |
2786 | kfree_const(core->name); | |
2787 | kfree(core); | |
fcb0ee6a SN |
2788 | } |
2789 | ||
2790 | /* | |
2791 | * Empty clk_ops for unregistered clocks. These are used temporarily | |
2792 | * after clk_unregister() was called on a clock and until last clock | |
2793 | * consumer calls clk_put() and the struct clk object is freed. | |
2794 | */ | |
2795 | static int clk_nodrv_prepare_enable(struct clk_hw *hw) | |
2796 | { | |
2797 | return -ENXIO; | |
2798 | } | |
2799 | ||
2800 | static void clk_nodrv_disable_unprepare(struct clk_hw *hw) | |
2801 | { | |
2802 | WARN_ON_ONCE(1); | |
2803 | } | |
2804 | ||
2805 | static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate, | |
2806 | unsigned long parent_rate) | |
2807 | { | |
2808 | return -ENXIO; | |
2809 | } | |
2810 | ||
2811 | static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) | |
2812 | { | |
2813 | return -ENXIO; | |
2814 | } | |
2815 | ||
2816 | static const struct clk_ops clk_nodrv_ops = { | |
2817 | .enable = clk_nodrv_prepare_enable, | |
2818 | .disable = clk_nodrv_disable_unprepare, | |
2819 | .prepare = clk_nodrv_prepare_enable, | |
2820 | .unprepare = clk_nodrv_disable_unprepare, | |
2821 | .set_rate = clk_nodrv_set_rate, | |
2822 | .set_parent = clk_nodrv_set_parent, | |
2823 | }; | |
2824 | ||
1df5c939 MB |
2825 | /** |
2826 | * clk_unregister - unregister a currently registered clock | |
2827 | * @clk: clock to unregister | |
1df5c939 | 2828 | */ |
fcb0ee6a SN |
2829 | void clk_unregister(struct clk *clk) |
2830 | { | |
2831 | unsigned long flags; | |
2832 | ||
6314b679 SB |
2833 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
2834 | return; | |
2835 | ||
035a61c3 | 2836 | clk_debug_unregister(clk->core); |
fcb0ee6a SN |
2837 | |
2838 | clk_prepare_lock(); | |
2839 | ||
035a61c3 TV |
2840 | if (clk->core->ops == &clk_nodrv_ops) { |
2841 | pr_err("%s: unregistered clock: %s\n", __func__, | |
2842 | clk->core->name); | |
4106a3d9 | 2843 | goto unlock; |
fcb0ee6a SN |
2844 | } |
2845 | /* | |
2846 | * Assign empty clock ops for consumers that might still hold | |
2847 | * a reference to this clock. | |
2848 | */ | |
2849 | flags = clk_enable_lock(); | |
035a61c3 | 2850 | clk->core->ops = &clk_nodrv_ops; |
fcb0ee6a SN |
2851 | clk_enable_unlock(flags); |
2852 | ||
035a61c3 TV |
2853 | if (!hlist_empty(&clk->core->children)) { |
2854 | struct clk_core *child; | |
874f224c | 2855 | struct hlist_node *t; |
fcb0ee6a SN |
2856 | |
2857 | /* Reparent all children to the orphan list. */ | |
035a61c3 TV |
2858 | hlist_for_each_entry_safe(child, t, &clk->core->children, |
2859 | child_node) | |
2860 | clk_core_set_parent(child, NULL); | |
fcb0ee6a SN |
2861 | } |
2862 | ||
035a61c3 | 2863 | hlist_del_init(&clk->core->child_node); |
fcb0ee6a | 2864 | |
035a61c3 | 2865 | if (clk->core->prepare_count) |
fcb0ee6a | 2866 | pr_warn("%s: unregistering prepared clock: %s\n", |
035a61c3 TV |
2867 | __func__, clk->core->name); |
2868 | kref_put(&clk->core->ref, __clk_release); | |
4106a3d9 | 2869 | unlock: |
fcb0ee6a SN |
2870 | clk_prepare_unlock(); |
2871 | } | |
1df5c939 MB |
2872 | EXPORT_SYMBOL_GPL(clk_unregister); |
2873 | ||
4143804c SB |
2874 | /** |
2875 | * clk_hw_unregister - unregister a currently registered clk_hw | |
2876 | * @hw: hardware-specific clock data to unregister | |
2877 | */ | |
2878 | void clk_hw_unregister(struct clk_hw *hw) | |
2879 | { | |
2880 | clk_unregister(hw->clk); | |
2881 | } | |
2882 | EXPORT_SYMBOL_GPL(clk_hw_unregister); | |
2883 | ||
46c8773a SB |
2884 | static void devm_clk_release(struct device *dev, void *res) |
2885 | { | |
293ba3b4 | 2886 | clk_unregister(*(struct clk **)res); |
46c8773a SB |
2887 | } |
2888 | ||
4143804c SB |
2889 | static void devm_clk_hw_release(struct device *dev, void *res) |
2890 | { | |
2891 | clk_hw_unregister(*(struct clk_hw **)res); | |
2892 | } | |
2893 | ||
46c8773a SB |
2894 | /** |
2895 | * devm_clk_register - resource managed clk_register() | |
2896 | * @dev: device that is registering this clock | |
2897 | * @hw: link to hardware-specific clock data | |
2898 | * | |
2899 | * Managed clk_register(). Clocks returned from this function are | |
2900 | * automatically clk_unregister()ed on driver detach. See clk_register() for | |
2901 | * more information. | |
2902 | */ | |
2903 | struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) | |
2904 | { | |
2905 | struct clk *clk; | |
293ba3b4 | 2906 | struct clk **clkp; |
46c8773a | 2907 | |
293ba3b4 SB |
2908 | clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); |
2909 | if (!clkp) | |
46c8773a SB |
2910 | return ERR_PTR(-ENOMEM); |
2911 | ||
293ba3b4 SB |
2912 | clk = clk_register(dev, hw); |
2913 | if (!IS_ERR(clk)) { | |
2914 | *clkp = clk; | |
2915 | devres_add(dev, clkp); | |
46c8773a | 2916 | } else { |
293ba3b4 | 2917 | devres_free(clkp); |
46c8773a SB |
2918 | } |
2919 | ||
2920 | return clk; | |
2921 | } | |
2922 | EXPORT_SYMBOL_GPL(devm_clk_register); | |
2923 | ||
4143804c SB |
2924 | /** |
2925 | * devm_clk_hw_register - resource managed clk_hw_register() | |
2926 | * @dev: device that is registering this clock | |
2927 | * @hw: link to hardware-specific clock data | |
2928 | * | |
c47265ad | 2929 | * Managed clk_hw_register(). Clocks registered by this function are |
4143804c SB |
2930 | * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register() |
2931 | * for more information. | |
2932 | */ | |
2933 | int devm_clk_hw_register(struct device *dev, struct clk_hw *hw) | |
2934 | { | |
2935 | struct clk_hw **hwp; | |
2936 | int ret; | |
2937 | ||
2938 | hwp = devres_alloc(devm_clk_hw_release, sizeof(*hwp), GFP_KERNEL); | |
2939 | if (!hwp) | |
2940 | return -ENOMEM; | |
2941 | ||
2942 | ret = clk_hw_register(dev, hw); | |
2943 | if (!ret) { | |
2944 | *hwp = hw; | |
2945 | devres_add(dev, hwp); | |
2946 | } else { | |
2947 | devres_free(hwp); | |
2948 | } | |
2949 | ||
2950 | return ret; | |
2951 | } | |
2952 | EXPORT_SYMBOL_GPL(devm_clk_hw_register); | |
2953 | ||
46c8773a SB |
2954 | static int devm_clk_match(struct device *dev, void *res, void *data) |
2955 | { | |
2956 | struct clk *c = res; | |
2957 | if (WARN_ON(!c)) | |
2958 | return 0; | |
2959 | return c == data; | |
2960 | } | |
2961 | ||
4143804c SB |
2962 | static int devm_clk_hw_match(struct device *dev, void *res, void *data) |
2963 | { | |
2964 | struct clk_hw *hw = res; | |
2965 | ||
2966 | if (WARN_ON(!hw)) | |
2967 | return 0; | |
2968 | return hw == data; | |
2969 | } | |
2970 | ||
46c8773a SB |
2971 | /** |
2972 | * devm_clk_unregister - resource managed clk_unregister() | |
2973 | * @clk: clock to unregister | |
2974 | * | |
2975 | * Deallocate a clock allocated with devm_clk_register(). Normally | |
2976 | * this function will not need to be called and the resource management | |
2977 | * code will ensure that the resource is freed. | |
2978 | */ | |
2979 | void devm_clk_unregister(struct device *dev, struct clk *clk) | |
2980 | { | |
2981 | WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk)); | |
2982 | } | |
2983 | EXPORT_SYMBOL_GPL(devm_clk_unregister); | |
2984 | ||
4143804c SB |
2985 | /** |
2986 | * devm_clk_hw_unregister - resource managed clk_hw_unregister() | |
2987 | * @dev: device that is unregistering the hardware-specific clock data | |
2988 | * @hw: link to hardware-specific clock data | |
2989 | * | |
2990 | * Unregister a clk_hw registered with devm_clk_hw_register(). Normally | |
2991 | * this function will not need to be called and the resource management | |
2992 | * code will ensure that the resource is freed. | |
2993 | */ | |
2994 | void devm_clk_hw_unregister(struct device *dev, struct clk_hw *hw) | |
2995 | { | |
2996 | WARN_ON(devres_release(dev, devm_clk_hw_release, devm_clk_hw_match, | |
2997 | hw)); | |
2998 | } | |
2999 | EXPORT_SYMBOL_GPL(devm_clk_hw_unregister); | |
3000 | ||
ac2df527 SN |
3001 | /* |
3002 | * clkdev helpers | |
3003 | */ | |
3004 | int __clk_get(struct clk *clk) | |
3005 | { | |
035a61c3 TV |
3006 | struct clk_core *core = !clk ? NULL : clk->core; |
3007 | ||
3008 | if (core) { | |
3009 | if (!try_module_get(core->owner)) | |
00efcb1c | 3010 | return 0; |
ac2df527 | 3011 | |
035a61c3 | 3012 | kref_get(&core->ref); |
00efcb1c | 3013 | } |
ac2df527 SN |
3014 | return 1; |
3015 | } | |
3016 | ||
3017 | void __clk_put(struct clk *clk) | |
3018 | { | |
10cdfe54 TV |
3019 | struct module *owner; |
3020 | ||
00efcb1c | 3021 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
ac2df527 SN |
3022 | return; |
3023 | ||
fcb0ee6a | 3024 | clk_prepare_lock(); |
1c8e6004 | 3025 | |
50595f8b | 3026 | hlist_del(&clk->clks_node); |
ec02ace8 TV |
3027 | if (clk->min_rate > clk->core->req_rate || |
3028 | clk->max_rate < clk->core->req_rate) | |
3029 | clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
3030 | ||
1c8e6004 TV |
3031 | owner = clk->core->owner; |
3032 | kref_put(&clk->core->ref, __clk_release); | |
3033 | ||
fcb0ee6a SN |
3034 | clk_prepare_unlock(); |
3035 | ||
10cdfe54 | 3036 | module_put(owner); |
035a61c3 | 3037 | |
035a61c3 | 3038 | kfree(clk); |
ac2df527 SN |
3039 | } |
3040 | ||
b2476490 MT |
3041 | /*** clk rate change notifiers ***/ |
3042 | ||
3043 | /** | |
3044 | * clk_notifier_register - add a clk rate change notifier | |
3045 | * @clk: struct clk * to watch | |
3046 | * @nb: struct notifier_block * with callback info | |
3047 | * | |
3048 | * Request notification when clk's rate changes. This uses an SRCU | |
3049 | * notifier because we want it to block and notifier unregistrations are | |
3050 | * uncommon. The callbacks associated with the notifier must not | |
3051 | * re-enter into the clk framework by calling any top-level clk APIs; | |
3052 | * this will cause a nested prepare_lock mutex. | |
3053 | * | |
198bb594 MY |
3054 | * In all notification cases (pre, post and abort rate change) the original |
3055 | * clock rate is passed to the callback via struct clk_notifier_data.old_rate | |
3056 | * and the new frequency is passed via struct clk_notifier_data.new_rate. | |
b2476490 | 3057 | * |
b2476490 MT |
3058 | * clk_notifier_register() must be called from non-atomic context. |
3059 | * Returns -EINVAL if called with null arguments, -ENOMEM upon | |
3060 | * allocation failure; otherwise, passes along the return value of | |
3061 | * srcu_notifier_chain_register(). | |
3062 | */ | |
3063 | int clk_notifier_register(struct clk *clk, struct notifier_block *nb) | |
3064 | { | |
3065 | struct clk_notifier *cn; | |
3066 | int ret = -ENOMEM; | |
3067 | ||
3068 | if (!clk || !nb) | |
3069 | return -EINVAL; | |
3070 | ||
eab89f69 | 3071 | clk_prepare_lock(); |
b2476490 MT |
3072 | |
3073 | /* search the list of notifiers for this clk */ | |
3074 | list_for_each_entry(cn, &clk_notifier_list, node) | |
3075 | if (cn->clk == clk) | |
3076 | break; | |
3077 | ||
3078 | /* if clk wasn't in the notifier list, allocate new clk_notifier */ | |
3079 | if (cn->clk != clk) { | |
1808a320 | 3080 | cn = kzalloc(sizeof(*cn), GFP_KERNEL); |
b2476490 MT |
3081 | if (!cn) |
3082 | goto out; | |
3083 | ||
3084 | cn->clk = clk; | |
3085 | srcu_init_notifier_head(&cn->notifier_head); | |
3086 | ||
3087 | list_add(&cn->node, &clk_notifier_list); | |
3088 | } | |
3089 | ||
3090 | ret = srcu_notifier_chain_register(&cn->notifier_head, nb); | |
3091 | ||
035a61c3 | 3092 | clk->core->notifier_count++; |
b2476490 MT |
3093 | |
3094 | out: | |
eab89f69 | 3095 | clk_prepare_unlock(); |
b2476490 MT |
3096 | |
3097 | return ret; | |
3098 | } | |
3099 | EXPORT_SYMBOL_GPL(clk_notifier_register); | |
3100 | ||
3101 | /** | |
3102 | * clk_notifier_unregister - remove a clk rate change notifier | |
3103 | * @clk: struct clk * | |
3104 | * @nb: struct notifier_block * with callback info | |
3105 | * | |
3106 | * Request no further notification for changes to 'clk' and frees memory | |
3107 | * allocated in clk_notifier_register. | |
3108 | * | |
3109 | * Returns -EINVAL if called with null arguments; otherwise, passes | |
3110 | * along the return value of srcu_notifier_chain_unregister(). | |
3111 | */ | |
3112 | int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) | |
3113 | { | |
3114 | struct clk_notifier *cn = NULL; | |
3115 | int ret = -EINVAL; | |
3116 | ||
3117 | if (!clk || !nb) | |
3118 | return -EINVAL; | |
3119 | ||
eab89f69 | 3120 | clk_prepare_lock(); |
b2476490 MT |
3121 | |
3122 | list_for_each_entry(cn, &clk_notifier_list, node) | |
3123 | if (cn->clk == clk) | |
3124 | break; | |
3125 | ||
3126 | if (cn->clk == clk) { | |
3127 | ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); | |
3128 | ||
035a61c3 | 3129 | clk->core->notifier_count--; |
b2476490 MT |
3130 | |
3131 | /* XXX the notifier code should handle this better */ | |
3132 | if (!cn->notifier_head.head) { | |
3133 | srcu_cleanup_notifier_head(&cn->notifier_head); | |
72b5322f | 3134 | list_del(&cn->node); |
b2476490 MT |
3135 | kfree(cn); |
3136 | } | |
3137 | ||
3138 | } else { | |
3139 | ret = -ENOENT; | |
3140 | } | |
3141 | ||
eab89f69 | 3142 | clk_prepare_unlock(); |
b2476490 MT |
3143 | |
3144 | return ret; | |
3145 | } | |
3146 | EXPORT_SYMBOL_GPL(clk_notifier_unregister); | |
766e6a4e GL |
3147 | |
3148 | #ifdef CONFIG_OF | |
3149 | /** | |
3150 | * struct of_clk_provider - Clock provider registration structure | |
3151 | * @link: Entry in global list of clock providers | |
3152 | * @node: Pointer to device tree node of clock provider | |
3153 | * @get: Get clock callback. Returns NULL or a struct clk for the | |
3154 | * given clock specifier | |
3155 | * @data: context pointer to be passed into @get callback | |
3156 | */ | |
3157 | struct of_clk_provider { | |
3158 | struct list_head link; | |
3159 | ||
3160 | struct device_node *node; | |
3161 | struct clk *(*get)(struct of_phandle_args *clkspec, void *data); | |
0861e5b8 | 3162 | struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data); |
766e6a4e GL |
3163 | void *data; |
3164 | }; | |
3165 | ||
f2f6c255 PG |
3166 | static const struct of_device_id __clk_of_table_sentinel |
3167 | __used __section(__clk_of_table_end); | |
3168 | ||
766e6a4e | 3169 | static LIST_HEAD(of_clk_providers); |
d6782c26 SN |
3170 | static DEFINE_MUTEX(of_clk_mutex); |
3171 | ||
766e6a4e GL |
3172 | struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, |
3173 | void *data) | |
3174 | { | |
3175 | return data; | |
3176 | } | |
3177 | EXPORT_SYMBOL_GPL(of_clk_src_simple_get); | |
3178 | ||
0861e5b8 SB |
3179 | struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data) |
3180 | { | |
3181 | return data; | |
3182 | } | |
3183 | EXPORT_SYMBOL_GPL(of_clk_hw_simple_get); | |
3184 | ||
494bfec9 SG |
3185 | struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data) |
3186 | { | |
3187 | struct clk_onecell_data *clk_data = data; | |
3188 | unsigned int idx = clkspec->args[0]; | |
3189 | ||
3190 | if (idx >= clk_data->clk_num) { | |
7e96353c | 3191 | pr_err("%s: invalid clock index %u\n", __func__, idx); |
494bfec9 SG |
3192 | return ERR_PTR(-EINVAL); |
3193 | } | |
3194 | ||
3195 | return clk_data->clks[idx]; | |
3196 | } | |
3197 | EXPORT_SYMBOL_GPL(of_clk_src_onecell_get); | |
3198 | ||
0861e5b8 SB |
3199 | struct clk_hw * |
3200 | of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data) | |
3201 | { | |
3202 | struct clk_hw_onecell_data *hw_data = data; | |
3203 | unsigned int idx = clkspec->args[0]; | |
3204 | ||
3205 | if (idx >= hw_data->num) { | |
3206 | pr_err("%s: invalid index %u\n", __func__, idx); | |
3207 | return ERR_PTR(-EINVAL); | |
3208 | } | |
3209 | ||
3210 | return hw_data->hws[idx]; | |
3211 | } | |
3212 | EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get); | |
3213 | ||
766e6a4e GL |
3214 | /** |
3215 | * of_clk_add_provider() - Register a clock provider for a node | |
3216 | * @np: Device node pointer associated with clock provider | |
3217 | * @clk_src_get: callback for decoding clock | |
3218 | * @data: context pointer for @clk_src_get callback. | |
3219 | */ | |
3220 | int of_clk_add_provider(struct device_node *np, | |
3221 | struct clk *(*clk_src_get)(struct of_phandle_args *clkspec, | |
3222 | void *data), | |
3223 | void *data) | |
3224 | { | |
3225 | struct of_clk_provider *cp; | |
86be408b | 3226 | int ret; |
766e6a4e | 3227 | |
1808a320 | 3228 | cp = kzalloc(sizeof(*cp), GFP_KERNEL); |
766e6a4e GL |
3229 | if (!cp) |
3230 | return -ENOMEM; | |
3231 | ||
3232 | cp->node = of_node_get(np); | |
3233 | cp->data = data; | |
3234 | cp->get = clk_src_get; | |
3235 | ||
d6782c26 | 3236 | mutex_lock(&of_clk_mutex); |
766e6a4e | 3237 | list_add(&cp->link, &of_clk_providers); |
d6782c26 | 3238 | mutex_unlock(&of_clk_mutex); |
16673931 | 3239 | pr_debug("Added clock from %pOF\n", np); |
766e6a4e | 3240 | |
86be408b SN |
3241 | ret = of_clk_set_defaults(np, true); |
3242 | if (ret < 0) | |
3243 | of_clk_del_provider(np); | |
3244 | ||
3245 | return ret; | |
766e6a4e GL |
3246 | } |
3247 | EXPORT_SYMBOL_GPL(of_clk_add_provider); | |
3248 | ||
0861e5b8 SB |
3249 | /** |
3250 | * of_clk_add_hw_provider() - Register a clock provider for a node | |
3251 | * @np: Device node pointer associated with clock provider | |
3252 | * @get: callback for decoding clk_hw | |
3253 | * @data: context pointer for @get callback. | |
3254 | */ | |
3255 | int of_clk_add_hw_provider(struct device_node *np, | |
3256 | struct clk_hw *(*get)(struct of_phandle_args *clkspec, | |
3257 | void *data), | |
3258 | void *data) | |
3259 | { | |
3260 | struct of_clk_provider *cp; | |
3261 | int ret; | |
3262 | ||
3263 | cp = kzalloc(sizeof(*cp), GFP_KERNEL); | |
3264 | if (!cp) | |
3265 | return -ENOMEM; | |
3266 | ||
3267 | cp->node = of_node_get(np); | |
3268 | cp->data = data; | |
3269 | cp->get_hw = get; | |
3270 | ||
3271 | mutex_lock(&of_clk_mutex); | |
3272 | list_add(&cp->link, &of_clk_providers); | |
3273 | mutex_unlock(&of_clk_mutex); | |
16673931 | 3274 | pr_debug("Added clk_hw provider from %pOF\n", np); |
0861e5b8 SB |
3275 | |
3276 | ret = of_clk_set_defaults(np, true); | |
3277 | if (ret < 0) | |
3278 | of_clk_del_provider(np); | |
3279 | ||
3280 | return ret; | |
3281 | } | |
3282 | EXPORT_SYMBOL_GPL(of_clk_add_hw_provider); | |
3283 | ||
aa795c41 SB |
3284 | static void devm_of_clk_release_provider(struct device *dev, void *res) |
3285 | { | |
3286 | of_clk_del_provider(*(struct device_node **)res); | |
3287 | } | |
3288 | ||
3289 | int devm_of_clk_add_hw_provider(struct device *dev, | |
3290 | struct clk_hw *(*get)(struct of_phandle_args *clkspec, | |
3291 | void *data), | |
3292 | void *data) | |
3293 | { | |
3294 | struct device_node **ptr, *np; | |
3295 | int ret; | |
3296 | ||
3297 | ptr = devres_alloc(devm_of_clk_release_provider, sizeof(*ptr), | |
3298 | GFP_KERNEL); | |
3299 | if (!ptr) | |
3300 | return -ENOMEM; | |
3301 | ||
3302 | np = dev->of_node; | |
3303 | ret = of_clk_add_hw_provider(np, get, data); | |
3304 | if (!ret) { | |
3305 | *ptr = np; | |
3306 | devres_add(dev, ptr); | |
3307 | } else { | |
3308 | devres_free(ptr); | |
3309 | } | |
3310 | ||
3311 | return ret; | |
3312 | } | |
3313 | EXPORT_SYMBOL_GPL(devm_of_clk_add_hw_provider); | |
3314 | ||
766e6a4e GL |
3315 | /** |
3316 | * of_clk_del_provider() - Remove a previously registered clock provider | |
3317 | * @np: Device node pointer associated with clock provider | |
3318 | */ | |
3319 | void of_clk_del_provider(struct device_node *np) | |
3320 | { | |
3321 | struct of_clk_provider *cp; | |
3322 | ||
d6782c26 | 3323 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
3324 | list_for_each_entry(cp, &of_clk_providers, link) { |
3325 | if (cp->node == np) { | |
3326 | list_del(&cp->link); | |
3327 | of_node_put(cp->node); | |
3328 | kfree(cp); | |
3329 | break; | |
3330 | } | |
3331 | } | |
d6782c26 | 3332 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
3333 | } |
3334 | EXPORT_SYMBOL_GPL(of_clk_del_provider); | |
3335 | ||
aa795c41 SB |
3336 | static int devm_clk_provider_match(struct device *dev, void *res, void *data) |
3337 | { | |
3338 | struct device_node **np = res; | |
3339 | ||
3340 | if (WARN_ON(!np || !*np)) | |
3341 | return 0; | |
3342 | ||
3343 | return *np == data; | |
3344 | } | |
3345 | ||
3346 | void devm_of_clk_del_provider(struct device *dev) | |
3347 | { | |
3348 | int ret; | |
3349 | ||
3350 | ret = devres_release(dev, devm_of_clk_release_provider, | |
3351 | devm_clk_provider_match, dev->of_node); | |
3352 | ||
3353 | WARN_ON(ret); | |
3354 | } | |
3355 | EXPORT_SYMBOL(devm_of_clk_del_provider); | |
3356 | ||
0861e5b8 SB |
3357 | static struct clk_hw * |
3358 | __of_clk_get_hw_from_provider(struct of_clk_provider *provider, | |
3359 | struct of_phandle_args *clkspec) | |
3360 | { | |
3361 | struct clk *clk; | |
0861e5b8 | 3362 | |
74002fcd SB |
3363 | if (provider->get_hw) |
3364 | return provider->get_hw(clkspec, provider->data); | |
0861e5b8 | 3365 | |
74002fcd SB |
3366 | clk = provider->get(clkspec, provider->data); |
3367 | if (IS_ERR(clk)) | |
3368 | return ERR_CAST(clk); | |
3369 | return __clk_get_hw(clk); | |
0861e5b8 SB |
3370 | } |
3371 | ||
73e0e496 SB |
3372 | struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec, |
3373 | const char *dev_id, const char *con_id) | |
766e6a4e GL |
3374 | { |
3375 | struct of_clk_provider *provider; | |
a34cd466 | 3376 | struct clk *clk = ERR_PTR(-EPROBE_DEFER); |
f155d15b | 3377 | struct clk_hw *hw; |
766e6a4e | 3378 | |
306c342f SB |
3379 | if (!clkspec) |
3380 | return ERR_PTR(-EINVAL); | |
3381 | ||
766e6a4e | 3382 | /* Check if we have such a provider in our array */ |
306c342f | 3383 | mutex_lock(&of_clk_mutex); |
766e6a4e | 3384 | list_for_each_entry(provider, &of_clk_providers, link) { |
f155d15b | 3385 | if (provider->node == clkspec->np) { |
0861e5b8 | 3386 | hw = __of_clk_get_hw_from_provider(provider, clkspec); |
0861e5b8 | 3387 | clk = __clk_create_clk(hw, dev_id, con_id); |
f155d15b | 3388 | } |
73e0e496 | 3389 | |
f155d15b SB |
3390 | if (!IS_ERR(clk)) { |
3391 | if (!__clk_get(clk)) { | |
73e0e496 SB |
3392 | __clk_free_clk(clk); |
3393 | clk = ERR_PTR(-ENOENT); | |
3394 | } | |
3395 | ||
766e6a4e | 3396 | break; |
73e0e496 | 3397 | } |
766e6a4e | 3398 | } |
306c342f | 3399 | mutex_unlock(&of_clk_mutex); |
d6782c26 SN |
3400 | |
3401 | return clk; | |
3402 | } | |
3403 | ||
306c342f SB |
3404 | /** |
3405 | * of_clk_get_from_provider() - Lookup a clock from a clock provider | |
3406 | * @clkspec: pointer to a clock specifier data structure | |
3407 | * | |
3408 | * This function looks up a struct clk from the registered list of clock | |
3409 | * providers, an input is a clock specifier data structure as returned | |
3410 | * from the of_parse_phandle_with_args() function call. | |
3411 | */ | |
d6782c26 SN |
3412 | struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) |
3413 | { | |
306c342f | 3414 | return __of_clk_get_from_provider(clkspec, NULL, __func__); |
766e6a4e | 3415 | } |
fb4dd222 | 3416 | EXPORT_SYMBOL_GPL(of_clk_get_from_provider); |
766e6a4e | 3417 | |
929e7f3b SB |
3418 | /** |
3419 | * of_clk_get_parent_count() - Count the number of clocks a device node has | |
3420 | * @np: device node to count | |
3421 | * | |
3422 | * Returns: The number of clocks that are possible parents of this node | |
3423 | */ | |
3424 | unsigned int of_clk_get_parent_count(struct device_node *np) | |
f6102742 | 3425 | { |
929e7f3b SB |
3426 | int count; |
3427 | ||
3428 | count = of_count_phandle_with_args(np, "clocks", "#clock-cells"); | |
3429 | if (count < 0) | |
3430 | return 0; | |
3431 | ||
3432 | return count; | |
f6102742 MT |
3433 | } |
3434 | EXPORT_SYMBOL_GPL(of_clk_get_parent_count); | |
3435 | ||
766e6a4e GL |
3436 | const char *of_clk_get_parent_name(struct device_node *np, int index) |
3437 | { | |
3438 | struct of_phandle_args clkspec; | |
7a0fc1a3 | 3439 | struct property *prop; |
766e6a4e | 3440 | const char *clk_name; |
7a0fc1a3 BD |
3441 | const __be32 *vp; |
3442 | u32 pv; | |
766e6a4e | 3443 | int rc; |
7a0fc1a3 | 3444 | int count; |
0a4807c2 | 3445 | struct clk *clk; |
766e6a4e | 3446 | |
766e6a4e GL |
3447 | rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, |
3448 | &clkspec); | |
3449 | if (rc) | |
3450 | return NULL; | |
3451 | ||
7a0fc1a3 BD |
3452 | index = clkspec.args_count ? clkspec.args[0] : 0; |
3453 | count = 0; | |
3454 | ||
3455 | /* if there is an indices property, use it to transfer the index | |
3456 | * specified into an array offset for the clock-output-names property. | |
3457 | */ | |
3458 | of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { | |
3459 | if (index == pv) { | |
3460 | index = count; | |
3461 | break; | |
3462 | } | |
3463 | count++; | |
3464 | } | |
8da411cc MY |
3465 | /* We went off the end of 'clock-indices' without finding it */ |
3466 | if (prop && !vp) | |
3467 | return NULL; | |
7a0fc1a3 | 3468 | |
766e6a4e | 3469 | if (of_property_read_string_index(clkspec.np, "clock-output-names", |
7a0fc1a3 | 3470 | index, |
0a4807c2 SB |
3471 | &clk_name) < 0) { |
3472 | /* | |
3473 | * Best effort to get the name if the clock has been | |
3474 | * registered with the framework. If the clock isn't | |
3475 | * registered, we return the node name as the name of | |
3476 | * the clock as long as #clock-cells = 0. | |
3477 | */ | |
3478 | clk = of_clk_get_from_provider(&clkspec); | |
3479 | if (IS_ERR(clk)) { | |
3480 | if (clkspec.args_count == 0) | |
3481 | clk_name = clkspec.np->name; | |
3482 | else | |
3483 | clk_name = NULL; | |
3484 | } else { | |
3485 | clk_name = __clk_get_name(clk); | |
3486 | clk_put(clk); | |
3487 | } | |
3488 | } | |
3489 | ||
766e6a4e GL |
3490 | |
3491 | of_node_put(clkspec.np); | |
3492 | return clk_name; | |
3493 | } | |
3494 | EXPORT_SYMBOL_GPL(of_clk_get_parent_name); | |
3495 | ||
2e61dfb3 DN |
3496 | /** |
3497 | * of_clk_parent_fill() - Fill @parents with names of @np's parents and return | |
3498 | * number of parents | |
3499 | * @np: Device node pointer associated with clock provider | |
3500 | * @parents: pointer to char array that hold the parents' names | |
3501 | * @size: size of the @parents array | |
3502 | * | |
3503 | * Return: number of parents for the clock node. | |
3504 | */ | |
3505 | int of_clk_parent_fill(struct device_node *np, const char **parents, | |
3506 | unsigned int size) | |
3507 | { | |
3508 | unsigned int i = 0; | |
3509 | ||
3510 | while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL) | |
3511 | i++; | |
3512 | ||
3513 | return i; | |
3514 | } | |
3515 | EXPORT_SYMBOL_GPL(of_clk_parent_fill); | |
3516 | ||
1771b10d GC |
3517 | struct clock_provider { |
3518 | of_clk_init_cb_t clk_init_cb; | |
3519 | struct device_node *np; | |
3520 | struct list_head node; | |
3521 | }; | |
3522 | ||
1771b10d GC |
3523 | /* |
3524 | * This function looks for a parent clock. If there is one, then it | |
3525 | * checks that the provider for this parent clock was initialized, in | |
3526 | * this case the parent clock will be ready. | |
3527 | */ | |
3528 | static int parent_ready(struct device_node *np) | |
3529 | { | |
3530 | int i = 0; | |
3531 | ||
3532 | while (true) { | |
3533 | struct clk *clk = of_clk_get(np, i); | |
3534 | ||
3535 | /* this parent is ready we can check the next one */ | |
3536 | if (!IS_ERR(clk)) { | |
3537 | clk_put(clk); | |
3538 | i++; | |
3539 | continue; | |
3540 | } | |
3541 | ||
3542 | /* at least one parent is not ready, we exit now */ | |
3543 | if (PTR_ERR(clk) == -EPROBE_DEFER) | |
3544 | return 0; | |
3545 | ||
3546 | /* | |
3547 | * Here we make assumption that the device tree is | |
3548 | * written correctly. So an error means that there is | |
3549 | * no more parent. As we didn't exit yet, then the | |
3550 | * previous parent are ready. If there is no clock | |
3551 | * parent, no need to wait for them, then we can | |
3552 | * consider their absence as being ready | |
3553 | */ | |
3554 | return 1; | |
3555 | } | |
3556 | } | |
3557 | ||
d56f8994 LJ |
3558 | /** |
3559 | * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree | |
3560 | * @np: Device node pointer associated with clock provider | |
3561 | * @index: clock index | |
3562 | * @flags: pointer to clk_core->flags | |
3563 | * | |
3564 | * Detects if the clock-critical property exists and, if so, sets the | |
3565 | * corresponding CLK_IS_CRITICAL flag. | |
3566 | * | |
3567 | * Do not use this function. It exists only for legacy Device Tree | |
3568 | * bindings, such as the one-clock-per-node style that are outdated. | |
3569 | * Those bindings typically put all clock data into .dts and the Linux | |
3570 | * driver has no clock data, thus making it impossible to set this flag | |
3571 | * correctly from the driver. Only those drivers may call | |
3572 | * of_clk_detect_critical from their setup functions. | |
3573 | * | |
3574 | * Return: error code or zero on success | |
3575 | */ | |
3576 | int of_clk_detect_critical(struct device_node *np, | |
3577 | int index, unsigned long *flags) | |
3578 | { | |
3579 | struct property *prop; | |
3580 | const __be32 *cur; | |
3581 | uint32_t idx; | |
3582 | ||
3583 | if (!np || !flags) | |
3584 | return -EINVAL; | |
3585 | ||
3586 | of_property_for_each_u32(np, "clock-critical", prop, cur, idx) | |
3587 | if (index == idx) | |
3588 | *flags |= CLK_IS_CRITICAL; | |
3589 | ||
3590 | return 0; | |
3591 | } | |
3592 | ||
766e6a4e GL |
3593 | /** |
3594 | * of_clk_init() - Scan and init clock providers from the DT | |
3595 | * @matches: array of compatible values and init functions for providers. | |
3596 | * | |
1771b10d | 3597 | * This function scans the device tree for matching clock providers |
e5ca8fb4 | 3598 | * and calls their initialization functions. It also does it by trying |
1771b10d | 3599 | * to follow the dependencies. |
766e6a4e GL |
3600 | */ |
3601 | void __init of_clk_init(const struct of_device_id *matches) | |
3602 | { | |
7f7ed584 | 3603 | const struct of_device_id *match; |
766e6a4e | 3604 | struct device_node *np; |
1771b10d GC |
3605 | struct clock_provider *clk_provider, *next; |
3606 | bool is_init_done; | |
3607 | bool force = false; | |
2573a02a | 3608 | LIST_HEAD(clk_provider_list); |
766e6a4e | 3609 | |
f2f6c255 | 3610 | if (!matches) |
819b4861 | 3611 | matches = &__clk_of_table; |
f2f6c255 | 3612 | |
1771b10d | 3613 | /* First prepare the list of the clocks providers */ |
7f7ed584 | 3614 | for_each_matching_node_and_match(np, matches, &match) { |
2e3b19f1 SB |
3615 | struct clock_provider *parent; |
3616 | ||
3e5dd6f6 GU |
3617 | if (!of_device_is_available(np)) |
3618 | continue; | |
3619 | ||
2e3b19f1 SB |
3620 | parent = kzalloc(sizeof(*parent), GFP_KERNEL); |
3621 | if (!parent) { | |
3622 | list_for_each_entry_safe(clk_provider, next, | |
3623 | &clk_provider_list, node) { | |
3624 | list_del(&clk_provider->node); | |
6bc9d9d6 | 3625 | of_node_put(clk_provider->np); |
2e3b19f1 SB |
3626 | kfree(clk_provider); |
3627 | } | |
6bc9d9d6 | 3628 | of_node_put(np); |
2e3b19f1 SB |
3629 | return; |
3630 | } | |
1771b10d GC |
3631 | |
3632 | parent->clk_init_cb = match->data; | |
6bc9d9d6 | 3633 | parent->np = of_node_get(np); |
3f6d439f | 3634 | list_add_tail(&parent->node, &clk_provider_list); |
1771b10d GC |
3635 | } |
3636 | ||
3637 | while (!list_empty(&clk_provider_list)) { | |
3638 | is_init_done = false; | |
3639 | list_for_each_entry_safe(clk_provider, next, | |
3640 | &clk_provider_list, node) { | |
3641 | if (force || parent_ready(clk_provider->np)) { | |
86be408b | 3642 | |
989eafd0 RRD |
3643 | /* Don't populate platform devices */ |
3644 | of_node_set_flag(clk_provider->np, | |
3645 | OF_POPULATED); | |
3646 | ||
1771b10d | 3647 | clk_provider->clk_init_cb(clk_provider->np); |
86be408b SN |
3648 | of_clk_set_defaults(clk_provider->np, true); |
3649 | ||
1771b10d | 3650 | list_del(&clk_provider->node); |
6bc9d9d6 | 3651 | of_node_put(clk_provider->np); |
1771b10d GC |
3652 | kfree(clk_provider); |
3653 | is_init_done = true; | |
3654 | } | |
3655 | } | |
3656 | ||
3657 | /* | |
e5ca8fb4 | 3658 | * We didn't manage to initialize any of the |
1771b10d GC |
3659 | * remaining providers during the last loop, so now we |
3660 | * initialize all the remaining ones unconditionally | |
3661 | * in case the clock parent was not mandatory | |
3662 | */ | |
3663 | if (!is_init_done) | |
3664 | force = true; | |
766e6a4e GL |
3665 | } |
3666 | } | |
3667 | #endif |