Merge remote-tracking branch 'spi/topic/dma' into spi-next
[linux-2.6-block.git] / drivers / clk / clk.c
CommitLineData
b2476490
MT
1/*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Standard functionality for the common clock API. See Documentation/clk.txt
10 */
11
3c373117 12#include <linux/clk.h>
b09d6d99 13#include <linux/clk-provider.h>
86be408b 14#include <linux/clk/clk-conf.h>
b2476490
MT
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/spinlock.h>
18#include <linux/err.h>
19#include <linux/list.h>
20#include <linux/slab.h>
766e6a4e 21#include <linux/of.h>
46c8773a 22#include <linux/device.h>
f2f6c255 23#include <linux/init.h>
533ddeb1 24#include <linux/sched.h>
562ef0b0 25#include <linux/clkdev.h>
b2476490 26
d6782c26
SN
27#include "clk.h"
28
b2476490
MT
29static DEFINE_SPINLOCK(enable_lock);
30static DEFINE_MUTEX(prepare_lock);
31
533ddeb1
MT
32static struct task_struct *prepare_owner;
33static struct task_struct *enable_owner;
34
35static int prepare_refcnt;
36static int enable_refcnt;
37
b2476490
MT
38static HLIST_HEAD(clk_root_list);
39static HLIST_HEAD(clk_orphan_list);
40static LIST_HEAD(clk_notifier_list);
41
b09d6d99
MT
42/*** private data structures ***/
43
44struct clk_core {
45 const char *name;
46 const struct clk_ops *ops;
47 struct clk_hw *hw;
48 struct module *owner;
49 struct clk_core *parent;
50 const char **parent_names;
51 struct clk_core **parents;
52 u8 num_parents;
53 u8 new_parent_index;
54 unsigned long rate;
1c8e6004 55 unsigned long req_rate;
b09d6d99
MT
56 unsigned long new_rate;
57 struct clk_core *new_parent;
58 struct clk_core *new_child;
59 unsigned long flags;
e6500344 60 bool orphan;
b09d6d99
MT
61 unsigned int enable_count;
62 unsigned int prepare_count;
9783c0d9
SB
63 unsigned long min_rate;
64 unsigned long max_rate;
b09d6d99
MT
65 unsigned long accuracy;
66 int phase;
67 struct hlist_head children;
68 struct hlist_node child_node;
1c8e6004 69 struct hlist_head clks;
b09d6d99
MT
70 unsigned int notifier_count;
71#ifdef CONFIG_DEBUG_FS
72 struct dentry *dentry;
8c9a8a8f 73 struct hlist_node debug_node;
b09d6d99
MT
74#endif
75 struct kref ref;
76};
77
dfc202ea
SB
78#define CREATE_TRACE_POINTS
79#include <trace/events/clk.h>
80
b09d6d99
MT
81struct clk {
82 struct clk_core *core;
83 const char *dev_id;
84 const char *con_id;
1c8e6004
TV
85 unsigned long min_rate;
86 unsigned long max_rate;
50595f8b 87 struct hlist_node clks_node;
b09d6d99
MT
88};
89
eab89f69
MT
90/*** locking ***/
91static void clk_prepare_lock(void)
92{
533ddeb1
MT
93 if (!mutex_trylock(&prepare_lock)) {
94 if (prepare_owner == current) {
95 prepare_refcnt++;
96 return;
97 }
98 mutex_lock(&prepare_lock);
99 }
100 WARN_ON_ONCE(prepare_owner != NULL);
101 WARN_ON_ONCE(prepare_refcnt != 0);
102 prepare_owner = current;
103 prepare_refcnt = 1;
eab89f69
MT
104}
105
106static void clk_prepare_unlock(void)
107{
533ddeb1
MT
108 WARN_ON_ONCE(prepare_owner != current);
109 WARN_ON_ONCE(prepare_refcnt == 0);
110
111 if (--prepare_refcnt)
112 return;
113 prepare_owner = NULL;
eab89f69
MT
114 mutex_unlock(&prepare_lock);
115}
116
117static unsigned long clk_enable_lock(void)
a57aa185 118 __acquires(enable_lock)
eab89f69
MT
119{
120 unsigned long flags;
533ddeb1
MT
121
122 if (!spin_trylock_irqsave(&enable_lock, flags)) {
123 if (enable_owner == current) {
124 enable_refcnt++;
a57aa185 125 __acquire(enable_lock);
533ddeb1
MT
126 return flags;
127 }
128 spin_lock_irqsave(&enable_lock, flags);
129 }
130 WARN_ON_ONCE(enable_owner != NULL);
131 WARN_ON_ONCE(enable_refcnt != 0);
132 enable_owner = current;
133 enable_refcnt = 1;
eab89f69
MT
134 return flags;
135}
136
137static void clk_enable_unlock(unsigned long flags)
a57aa185 138 __releases(enable_lock)
eab89f69 139{
533ddeb1
MT
140 WARN_ON_ONCE(enable_owner != current);
141 WARN_ON_ONCE(enable_refcnt == 0);
142
a57aa185
SB
143 if (--enable_refcnt) {
144 __release(enable_lock);
533ddeb1 145 return;
a57aa185 146 }
533ddeb1 147 enable_owner = NULL;
eab89f69
MT
148 spin_unlock_irqrestore(&enable_lock, flags);
149}
150
4dff95dc
SB
151static bool clk_core_is_prepared(struct clk_core *core)
152{
153 /*
154 * .is_prepared is optional for clocks that can prepare
155 * fall back to software usage counter if it is missing
156 */
157 if (!core->ops->is_prepared)
158 return core->prepare_count;
b2476490 159
4dff95dc
SB
160 return core->ops->is_prepared(core->hw);
161}
b2476490 162
4dff95dc
SB
163static bool clk_core_is_enabled(struct clk_core *core)
164{
165 /*
166 * .is_enabled is only mandatory for clocks that gate
167 * fall back to software usage counter if .is_enabled is missing
168 */
169 if (!core->ops->is_enabled)
170 return core->enable_count;
6b44c854 171
4dff95dc
SB
172 return core->ops->is_enabled(core->hw);
173}
6b44c854 174
4dff95dc 175static void clk_unprepare_unused_subtree(struct clk_core *core)
1af599df 176{
4dff95dc
SB
177 struct clk_core *child;
178
179 lockdep_assert_held(&prepare_lock);
180
181 hlist_for_each_entry(child, &core->children, child_node)
182 clk_unprepare_unused_subtree(child);
183
184 if (core->prepare_count)
1af599df
PG
185 return;
186
4dff95dc
SB
187 if (core->flags & CLK_IGNORE_UNUSED)
188 return;
189
190 if (clk_core_is_prepared(core)) {
191 trace_clk_unprepare(core);
192 if (core->ops->unprepare_unused)
193 core->ops->unprepare_unused(core->hw);
194 else if (core->ops->unprepare)
195 core->ops->unprepare(core->hw);
196 trace_clk_unprepare_complete(core);
197 }
1af599df
PG
198}
199
4dff95dc 200static void clk_disable_unused_subtree(struct clk_core *core)
1af599df 201{
035a61c3 202 struct clk_core *child;
4dff95dc 203 unsigned long flags;
1af599df 204
4dff95dc 205 lockdep_assert_held(&prepare_lock);
1af599df 206
4dff95dc
SB
207 hlist_for_each_entry(child, &core->children, child_node)
208 clk_disable_unused_subtree(child);
1af599df 209
4dff95dc
SB
210 flags = clk_enable_lock();
211
212 if (core->enable_count)
213 goto unlock_out;
214
215 if (core->flags & CLK_IGNORE_UNUSED)
216 goto unlock_out;
217
218 /*
219 * some gate clocks have special needs during the disable-unused
220 * sequence. call .disable_unused if available, otherwise fall
221 * back to .disable
222 */
223 if (clk_core_is_enabled(core)) {
224 trace_clk_disable(core);
225 if (core->ops->disable_unused)
226 core->ops->disable_unused(core->hw);
227 else if (core->ops->disable)
228 core->ops->disable(core->hw);
229 trace_clk_disable_complete(core);
230 }
231
232unlock_out:
233 clk_enable_unlock(flags);
1af599df
PG
234}
235
4dff95dc
SB
236static bool clk_ignore_unused;
237static int __init clk_ignore_unused_setup(char *__unused)
1af599df 238{
4dff95dc
SB
239 clk_ignore_unused = true;
240 return 1;
241}
242__setup("clk_ignore_unused", clk_ignore_unused_setup);
1af599df 243
4dff95dc
SB
244static int clk_disable_unused(void)
245{
246 struct clk_core *core;
247
248 if (clk_ignore_unused) {
249 pr_warn("clk: Not disabling unused clocks\n");
250 return 0;
251 }
1af599df 252
eab89f69 253 clk_prepare_lock();
1af599df 254
4dff95dc
SB
255 hlist_for_each_entry(core, &clk_root_list, child_node)
256 clk_disable_unused_subtree(core);
257
258 hlist_for_each_entry(core, &clk_orphan_list, child_node)
259 clk_disable_unused_subtree(core);
260
261 hlist_for_each_entry(core, &clk_root_list, child_node)
262 clk_unprepare_unused_subtree(core);
263
264 hlist_for_each_entry(core, &clk_orphan_list, child_node)
265 clk_unprepare_unused_subtree(core);
1af599df 266
eab89f69 267 clk_prepare_unlock();
1af599df
PG
268
269 return 0;
270}
4dff95dc 271late_initcall_sync(clk_disable_unused);
1af599df 272
4dff95dc 273/*** helper functions ***/
1af599df 274
b76281cb 275const char *__clk_get_name(const struct clk *clk)
1af599df 276{
4dff95dc 277 return !clk ? NULL : clk->core->name;
1af599df 278}
4dff95dc 279EXPORT_SYMBOL_GPL(__clk_get_name);
1af599df 280
e7df6f6e 281const char *clk_hw_get_name(const struct clk_hw *hw)
1a9c069c
SB
282{
283 return hw->core->name;
284}
285EXPORT_SYMBOL_GPL(clk_hw_get_name);
286
4dff95dc
SB
287struct clk_hw *__clk_get_hw(struct clk *clk)
288{
289 return !clk ? NULL : clk->core->hw;
290}
291EXPORT_SYMBOL_GPL(__clk_get_hw);
1af599df 292
e7df6f6e 293unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
1a9c069c
SB
294{
295 return hw->core->num_parents;
296}
297EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
298
e7df6f6e 299struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw)
1a9c069c
SB
300{
301 return hw->core->parent ? hw->core->parent->hw : NULL;
302}
303EXPORT_SYMBOL_GPL(clk_hw_get_parent);
304
4dff95dc
SB
305static struct clk_core *__clk_lookup_subtree(const char *name,
306 struct clk_core *core)
bddca894 307{
035a61c3 308 struct clk_core *child;
4dff95dc 309 struct clk_core *ret;
bddca894 310
4dff95dc
SB
311 if (!strcmp(core->name, name))
312 return core;
bddca894 313
4dff95dc
SB
314 hlist_for_each_entry(child, &core->children, child_node) {
315 ret = __clk_lookup_subtree(name, child);
316 if (ret)
317 return ret;
bddca894
PG
318 }
319
4dff95dc 320 return NULL;
bddca894
PG
321}
322
4dff95dc 323static struct clk_core *clk_core_lookup(const char *name)
bddca894 324{
4dff95dc
SB
325 struct clk_core *root_clk;
326 struct clk_core *ret;
bddca894 327
4dff95dc
SB
328 if (!name)
329 return NULL;
bddca894 330
4dff95dc
SB
331 /* search the 'proper' clk tree first */
332 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
333 ret = __clk_lookup_subtree(name, root_clk);
334 if (ret)
335 return ret;
bddca894
PG
336 }
337
4dff95dc
SB
338 /* if not found, then search the orphan tree */
339 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
340 ret = __clk_lookup_subtree(name, root_clk);
341 if (ret)
342 return ret;
343 }
bddca894 344
4dff95dc 345 return NULL;
bddca894
PG
346}
347
4dff95dc
SB
348static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
349 u8 index)
bddca894 350{
4dff95dc
SB
351 if (!core || index >= core->num_parents)
352 return NULL;
353 else if (!core->parents)
354 return clk_core_lookup(core->parent_names[index]);
355 else if (!core->parents[index])
356 return core->parents[index] =
357 clk_core_lookup(core->parent_names[index]);
358 else
359 return core->parents[index];
bddca894
PG
360}
361
e7df6f6e
SB
362struct clk_hw *
363clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
1a9c069c
SB
364{
365 struct clk_core *parent;
366
367 parent = clk_core_get_parent_by_index(hw->core, index);
368
369 return !parent ? NULL : parent->hw;
370}
371EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
372
4dff95dc
SB
373unsigned int __clk_get_enable_count(struct clk *clk)
374{
375 return !clk ? 0 : clk->core->enable_count;
376}
b2476490 377
4dff95dc
SB
378static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
379{
380 unsigned long ret;
b2476490 381
4dff95dc
SB
382 if (!core) {
383 ret = 0;
384 goto out;
385 }
b2476490 386
4dff95dc 387 ret = core->rate;
b2476490 388
4dff95dc
SB
389 if (core->flags & CLK_IS_ROOT)
390 goto out;
c646cbf1 391
4dff95dc
SB
392 if (!core->parent)
393 ret = 0;
b2476490 394
b2476490
MT
395out:
396 return ret;
397}
398
e7df6f6e 399unsigned long clk_hw_get_rate(const struct clk_hw *hw)
1a9c069c
SB
400{
401 return clk_core_get_rate_nolock(hw->core);
402}
403EXPORT_SYMBOL_GPL(clk_hw_get_rate);
404
4dff95dc
SB
405static unsigned long __clk_get_accuracy(struct clk_core *core)
406{
407 if (!core)
408 return 0;
b2476490 409
4dff95dc 410 return core->accuracy;
b2476490
MT
411}
412
4dff95dc 413unsigned long __clk_get_flags(struct clk *clk)
fcb0ee6a 414{
4dff95dc 415 return !clk ? 0 : clk->core->flags;
fcb0ee6a 416}
4dff95dc 417EXPORT_SYMBOL_GPL(__clk_get_flags);
fcb0ee6a 418
e7df6f6e 419unsigned long clk_hw_get_flags(const struct clk_hw *hw)
1a9c069c
SB
420{
421 return hw->core->flags;
422}
423EXPORT_SYMBOL_GPL(clk_hw_get_flags);
424
e7df6f6e 425bool clk_hw_is_prepared(const struct clk_hw *hw)
1a9c069c
SB
426{
427 return clk_core_is_prepared(hw->core);
428}
429
be68bf88
JE
430bool clk_hw_is_enabled(const struct clk_hw *hw)
431{
432 return clk_core_is_enabled(hw->core);
433}
434
4dff95dc 435bool __clk_is_enabled(struct clk *clk)
b2476490 436{
4dff95dc
SB
437 if (!clk)
438 return false;
b2476490 439
4dff95dc
SB
440 return clk_core_is_enabled(clk->core);
441}
442EXPORT_SYMBOL_GPL(__clk_is_enabled);
b2476490 443
4dff95dc
SB
444static bool mux_is_better_rate(unsigned long rate, unsigned long now,
445 unsigned long best, unsigned long flags)
446{
447 if (flags & CLK_MUX_ROUND_CLOSEST)
448 return abs(now - rate) < abs(best - rate);
1af599df 449
4dff95dc
SB
450 return now <= rate && now > best;
451}
bddca894 452
0817b62c
BB
453static int
454clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req,
4dff95dc
SB
455 unsigned long flags)
456{
457 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
0817b62c
BB
458 int i, num_parents, ret;
459 unsigned long best = 0;
460 struct clk_rate_request parent_req = *req;
b2476490 461
4dff95dc
SB
462 /* if NO_REPARENT flag set, pass through to current parent */
463 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
464 parent = core->parent;
0817b62c
BB
465 if (core->flags & CLK_SET_RATE_PARENT) {
466 ret = __clk_determine_rate(parent ? parent->hw : NULL,
467 &parent_req);
468 if (ret)
469 return ret;
470
471 best = parent_req.rate;
472 } else if (parent) {
4dff95dc 473 best = clk_core_get_rate_nolock(parent);
0817b62c 474 } else {
4dff95dc 475 best = clk_core_get_rate_nolock(core);
0817b62c
BB
476 }
477
4dff95dc
SB
478 goto out;
479 }
b2476490 480
4dff95dc
SB
481 /* find the parent that can provide the fastest rate <= rate */
482 num_parents = core->num_parents;
483 for (i = 0; i < num_parents; i++) {
484 parent = clk_core_get_parent_by_index(core, i);
485 if (!parent)
486 continue;
0817b62c
BB
487
488 if (core->flags & CLK_SET_RATE_PARENT) {
489 parent_req = *req;
490 ret = __clk_determine_rate(parent->hw, &parent_req);
491 if (ret)
492 continue;
493 } else {
494 parent_req.rate = clk_core_get_rate_nolock(parent);
495 }
496
497 if (mux_is_better_rate(req->rate, parent_req.rate,
498 best, flags)) {
4dff95dc 499 best_parent = parent;
0817b62c 500 best = parent_req.rate;
4dff95dc
SB
501 }
502 }
b2476490 503
57d866e6
BB
504 if (!best_parent)
505 return -EINVAL;
506
4dff95dc
SB
507out:
508 if (best_parent)
0817b62c
BB
509 req->best_parent_hw = best_parent->hw;
510 req->best_parent_rate = best;
511 req->rate = best;
b2476490 512
0817b62c 513 return 0;
b33d212f 514}
4dff95dc
SB
515
516struct clk *__clk_lookup(const char *name)
fcb0ee6a 517{
4dff95dc
SB
518 struct clk_core *core = clk_core_lookup(name);
519
520 return !core ? NULL : core->hw->clk;
fcb0ee6a 521}
b2476490 522
4dff95dc
SB
523static void clk_core_get_boundaries(struct clk_core *core,
524 unsigned long *min_rate,
525 unsigned long *max_rate)
1c155b3d 526{
4dff95dc 527 struct clk *clk_user;
1c155b3d 528
9783c0d9
SB
529 *min_rate = core->min_rate;
530 *max_rate = core->max_rate;
496eadf8 531
4dff95dc
SB
532 hlist_for_each_entry(clk_user, &core->clks, clks_node)
533 *min_rate = max(*min_rate, clk_user->min_rate);
1c155b3d 534
4dff95dc
SB
535 hlist_for_each_entry(clk_user, &core->clks, clks_node)
536 *max_rate = min(*max_rate, clk_user->max_rate);
537}
1c155b3d 538
9783c0d9
SB
539void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
540 unsigned long max_rate)
541{
542 hw->core->min_rate = min_rate;
543 hw->core->max_rate = max_rate;
544}
545EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
546
4dff95dc
SB
547/*
548 * Helper for finding best parent to provide a given frequency. This can be used
549 * directly as a determine_rate callback (e.g. for a mux), or from a more
550 * complex clock that may combine a mux with other operations.
551 */
0817b62c
BB
552int __clk_mux_determine_rate(struct clk_hw *hw,
553 struct clk_rate_request *req)
4dff95dc 554{
0817b62c 555 return clk_mux_determine_rate_flags(hw, req, 0);
1c155b3d 556}
4dff95dc 557EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
1c155b3d 558
0817b62c
BB
559int __clk_mux_determine_rate_closest(struct clk_hw *hw,
560 struct clk_rate_request *req)
b2476490 561{
0817b62c 562 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
4dff95dc
SB
563}
564EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
b2476490 565
4dff95dc 566/*** clk api ***/
496eadf8 567
4dff95dc
SB
568static void clk_core_unprepare(struct clk_core *core)
569{
a6334725
SB
570 lockdep_assert_held(&prepare_lock);
571
4dff95dc
SB
572 if (!core)
573 return;
b2476490 574
4dff95dc
SB
575 if (WARN_ON(core->prepare_count == 0))
576 return;
b2476490 577
4dff95dc
SB
578 if (--core->prepare_count > 0)
579 return;
b2476490 580
4dff95dc 581 WARN_ON(core->enable_count > 0);
b2476490 582
4dff95dc 583 trace_clk_unprepare(core);
b2476490 584
4dff95dc
SB
585 if (core->ops->unprepare)
586 core->ops->unprepare(core->hw);
587
588 trace_clk_unprepare_complete(core);
589 clk_core_unprepare(core->parent);
b2476490
MT
590}
591
4dff95dc
SB
592/**
593 * clk_unprepare - undo preparation of a clock source
594 * @clk: the clk being unprepared
595 *
596 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
597 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
598 * if the operation may sleep. One example is a clk which is accessed over
599 * I2c. In the complex case a clk gate operation may require a fast and a slow
600 * part. It is this reason that clk_unprepare and clk_disable are not mutually
601 * exclusive. In fact clk_disable must be called before clk_unprepare.
602 */
603void clk_unprepare(struct clk *clk)
1e435256 604{
4dff95dc
SB
605 if (IS_ERR_OR_NULL(clk))
606 return;
607
608 clk_prepare_lock();
609 clk_core_unprepare(clk->core);
610 clk_prepare_unlock();
1e435256 611}
4dff95dc 612EXPORT_SYMBOL_GPL(clk_unprepare);
1e435256 613
4dff95dc 614static int clk_core_prepare(struct clk_core *core)
b2476490 615{
4dff95dc 616 int ret = 0;
b2476490 617
a6334725
SB
618 lockdep_assert_held(&prepare_lock);
619
4dff95dc 620 if (!core)
1e435256 621 return 0;
1e435256 622
4dff95dc
SB
623 if (core->prepare_count == 0) {
624 ret = clk_core_prepare(core->parent);
625 if (ret)
626 return ret;
b2476490 627
4dff95dc 628 trace_clk_prepare(core);
b2476490 629
4dff95dc
SB
630 if (core->ops->prepare)
631 ret = core->ops->prepare(core->hw);
b2476490 632
4dff95dc 633 trace_clk_prepare_complete(core);
1c155b3d 634
4dff95dc
SB
635 if (ret) {
636 clk_core_unprepare(core->parent);
637 return ret;
638 }
639 }
1c155b3d 640
4dff95dc 641 core->prepare_count++;
b2476490
MT
642
643 return 0;
644}
b2476490 645
4dff95dc
SB
646/**
647 * clk_prepare - prepare a clock source
648 * @clk: the clk being prepared
649 *
650 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
651 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
652 * operation may sleep. One example is a clk which is accessed over I2c. In
653 * the complex case a clk ungate operation may require a fast and a slow part.
654 * It is this reason that clk_prepare and clk_enable are not mutually
655 * exclusive. In fact clk_prepare must be called before clk_enable.
656 * Returns 0 on success, -EERROR otherwise.
657 */
658int clk_prepare(struct clk *clk)
b2476490 659{
4dff95dc 660 int ret;
b2476490 661
4dff95dc
SB
662 if (!clk)
663 return 0;
b2476490 664
4dff95dc
SB
665 clk_prepare_lock();
666 ret = clk_core_prepare(clk->core);
667 clk_prepare_unlock();
668
669 return ret;
b2476490 670}
4dff95dc 671EXPORT_SYMBOL_GPL(clk_prepare);
b2476490 672
4dff95dc 673static void clk_core_disable(struct clk_core *core)
b2476490 674{
a6334725
SB
675 lockdep_assert_held(&enable_lock);
676
4dff95dc
SB
677 if (!core)
678 return;
035a61c3 679
4dff95dc
SB
680 if (WARN_ON(core->enable_count == 0))
681 return;
b2476490 682
4dff95dc
SB
683 if (--core->enable_count > 0)
684 return;
035a61c3 685
4dff95dc 686 trace_clk_disable(core);
035a61c3 687
4dff95dc
SB
688 if (core->ops->disable)
689 core->ops->disable(core->hw);
035a61c3 690
4dff95dc 691 trace_clk_disable_complete(core);
035a61c3 692
4dff95dc 693 clk_core_disable(core->parent);
035a61c3 694}
7ef3dcc8 695
4dff95dc
SB
696/**
697 * clk_disable - gate a clock
698 * @clk: the clk being gated
699 *
700 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
701 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
702 * clk if the operation is fast and will never sleep. One example is a
703 * SoC-internal clk which is controlled via simple register writes. In the
704 * complex case a clk gate operation may require a fast and a slow part. It is
705 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
706 * In fact clk_disable must be called before clk_unprepare.
707 */
708void clk_disable(struct clk *clk)
b2476490 709{
4dff95dc
SB
710 unsigned long flags;
711
712 if (IS_ERR_OR_NULL(clk))
713 return;
714
715 flags = clk_enable_lock();
716 clk_core_disable(clk->core);
717 clk_enable_unlock(flags);
b2476490 718}
4dff95dc 719EXPORT_SYMBOL_GPL(clk_disable);
b2476490 720
4dff95dc 721static int clk_core_enable(struct clk_core *core)
b2476490 722{
4dff95dc 723 int ret = 0;
b2476490 724
a6334725
SB
725 lockdep_assert_held(&enable_lock);
726
4dff95dc
SB
727 if (!core)
728 return 0;
b2476490 729
4dff95dc
SB
730 if (WARN_ON(core->prepare_count == 0))
731 return -ESHUTDOWN;
b2476490 732
4dff95dc
SB
733 if (core->enable_count == 0) {
734 ret = clk_core_enable(core->parent);
b2476490 735
4dff95dc
SB
736 if (ret)
737 return ret;
b2476490 738
4dff95dc 739 trace_clk_enable(core);
035a61c3 740
4dff95dc
SB
741 if (core->ops->enable)
742 ret = core->ops->enable(core->hw);
035a61c3 743
4dff95dc
SB
744 trace_clk_enable_complete(core);
745
746 if (ret) {
747 clk_core_disable(core->parent);
748 return ret;
749 }
750 }
751
752 core->enable_count++;
753 return 0;
035a61c3 754}
b2476490 755
4dff95dc
SB
756/**
757 * clk_enable - ungate a clock
758 * @clk: the clk being ungated
759 *
760 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
761 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
762 * if the operation will never sleep. One example is a SoC-internal clk which
763 * is controlled via simple register writes. In the complex case a clk ungate
764 * operation may require a fast and a slow part. It is this reason that
765 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
766 * must be called before clk_enable. Returns 0 on success, -EERROR
767 * otherwise.
768 */
769int clk_enable(struct clk *clk)
5279fc40 770{
4dff95dc
SB
771 unsigned long flags;
772 int ret;
773
774 if (!clk)
5279fc40
BB
775 return 0;
776
4dff95dc
SB
777 flags = clk_enable_lock();
778 ret = clk_core_enable(clk->core);
779 clk_enable_unlock(flags);
5279fc40 780
4dff95dc 781 return ret;
b2476490 782}
4dff95dc 783EXPORT_SYMBOL_GPL(clk_enable);
b2476490 784
0817b62c
BB
785static int clk_core_round_rate_nolock(struct clk_core *core,
786 struct clk_rate_request *req)
3d6ee287 787{
4dff95dc 788 struct clk_core *parent;
0817b62c 789 long rate;
4dff95dc
SB
790
791 lockdep_assert_held(&prepare_lock);
3d6ee287 792
d6968fca 793 if (!core)
4dff95dc 794 return 0;
3d6ee287 795
4dff95dc 796 parent = core->parent;
0817b62c
BB
797 if (parent) {
798 req->best_parent_hw = parent->hw;
799 req->best_parent_rate = parent->rate;
800 } else {
801 req->best_parent_hw = NULL;
802 req->best_parent_rate = 0;
803 }
3d6ee287 804
4dff95dc 805 if (core->ops->determine_rate) {
0817b62c
BB
806 return core->ops->determine_rate(core->hw, req);
807 } else if (core->ops->round_rate) {
808 rate = core->ops->round_rate(core->hw, req->rate,
809 &req->best_parent_rate);
810 if (rate < 0)
811 return rate;
812
813 req->rate = rate;
814 } else if (core->flags & CLK_SET_RATE_PARENT) {
815 return clk_core_round_rate_nolock(parent, req);
816 } else {
817 req->rate = core->rate;
818 }
819
820 return 0;
3d6ee287
UH
821}
822
4dff95dc
SB
823/**
824 * __clk_determine_rate - get the closest rate actually supported by a clock
825 * @hw: determine the rate of this clock
826 * @rate: target rate
827 * @min_rate: returned rate must be greater than this rate
828 * @max_rate: returned rate must be less than this rate
829 *
6e5ab41b 830 * Useful for clk_ops such as .set_rate and .determine_rate.
4dff95dc 831 */
0817b62c 832int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
035a61c3 833{
0817b62c
BB
834 if (!hw) {
835 req->rate = 0;
4dff95dc 836 return 0;
0817b62c 837 }
035a61c3 838
0817b62c 839 return clk_core_round_rate_nolock(hw->core, req);
035a61c3 840}
4dff95dc 841EXPORT_SYMBOL_GPL(__clk_determine_rate);
035a61c3 842
1a9c069c
SB
843unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
844{
845 int ret;
846 struct clk_rate_request req;
847
848 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
849 req.rate = rate;
850
851 ret = clk_core_round_rate_nolock(hw->core, &req);
852 if (ret)
853 return 0;
854
855 return req.rate;
856}
857EXPORT_SYMBOL_GPL(clk_hw_round_rate);
858
4dff95dc
SB
859/**
860 * clk_round_rate - round the given rate for a clk
861 * @clk: the clk for which we are rounding a rate
862 * @rate: the rate which is to be rounded
863 *
864 * Takes in a rate as input and rounds it to a rate that the clk can actually
865 * use which is then returned. If clk doesn't support round_rate operation
866 * then the parent rate is returned.
867 */
868long clk_round_rate(struct clk *clk, unsigned long rate)
035a61c3 869{
fc4a05d4
SB
870 struct clk_rate_request req;
871 int ret;
4dff95dc 872
035a61c3 873 if (!clk)
4dff95dc 874 return 0;
035a61c3 875
4dff95dc 876 clk_prepare_lock();
fc4a05d4
SB
877
878 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
879 req.rate = rate;
880
881 ret = clk_core_round_rate_nolock(clk->core, &req);
4dff95dc
SB
882 clk_prepare_unlock();
883
fc4a05d4
SB
884 if (ret)
885 return ret;
886
887 return req.rate;
035a61c3 888}
4dff95dc 889EXPORT_SYMBOL_GPL(clk_round_rate);
b2476490 890
4dff95dc
SB
891/**
892 * __clk_notify - call clk notifier chain
893 * @core: clk that is changing rate
894 * @msg: clk notifier type (see include/linux/clk.h)
895 * @old_rate: old clk rate
896 * @new_rate: new clk rate
897 *
898 * Triggers a notifier call chain on the clk rate-change notification
899 * for 'clk'. Passes a pointer to the struct clk and the previous
900 * and current rates to the notifier callback. Intended to be called by
901 * internal clock code only. Returns NOTIFY_DONE from the last driver
902 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
903 * a driver returns that.
904 */
905static int __clk_notify(struct clk_core *core, unsigned long msg,
906 unsigned long old_rate, unsigned long new_rate)
b2476490 907{
4dff95dc
SB
908 struct clk_notifier *cn;
909 struct clk_notifier_data cnd;
910 int ret = NOTIFY_DONE;
b2476490 911
4dff95dc
SB
912 cnd.old_rate = old_rate;
913 cnd.new_rate = new_rate;
b2476490 914
4dff95dc
SB
915 list_for_each_entry(cn, &clk_notifier_list, node) {
916 if (cn->clk->core == core) {
917 cnd.clk = cn->clk;
918 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
919 &cnd);
920 }
b2476490
MT
921 }
922
4dff95dc 923 return ret;
b2476490
MT
924}
925
4dff95dc
SB
926/**
927 * __clk_recalc_accuracies
928 * @core: first clk in the subtree
929 *
930 * Walks the subtree of clks starting with clk and recalculates accuracies as
931 * it goes. Note that if a clk does not implement the .recalc_accuracy
6e5ab41b 932 * callback then it is assumed that the clock will take on the accuracy of its
4dff95dc 933 * parent.
4dff95dc
SB
934 */
935static void __clk_recalc_accuracies(struct clk_core *core)
b2476490 936{
4dff95dc
SB
937 unsigned long parent_accuracy = 0;
938 struct clk_core *child;
b2476490 939
4dff95dc 940 lockdep_assert_held(&prepare_lock);
b2476490 941
4dff95dc
SB
942 if (core->parent)
943 parent_accuracy = core->parent->accuracy;
b2476490 944
4dff95dc
SB
945 if (core->ops->recalc_accuracy)
946 core->accuracy = core->ops->recalc_accuracy(core->hw,
947 parent_accuracy);
948 else
949 core->accuracy = parent_accuracy;
b2476490 950
4dff95dc
SB
951 hlist_for_each_entry(child, &core->children, child_node)
952 __clk_recalc_accuracies(child);
b2476490
MT
953}
954
4dff95dc 955static long clk_core_get_accuracy(struct clk_core *core)
e366fdd7 956{
4dff95dc 957 unsigned long accuracy;
15a02c1f 958
4dff95dc
SB
959 clk_prepare_lock();
960 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
961 __clk_recalc_accuracies(core);
15a02c1f 962
4dff95dc
SB
963 accuracy = __clk_get_accuracy(core);
964 clk_prepare_unlock();
e366fdd7 965
4dff95dc 966 return accuracy;
e366fdd7 967}
15a02c1f 968
4dff95dc
SB
969/**
970 * clk_get_accuracy - return the accuracy of clk
971 * @clk: the clk whose accuracy is being returned
972 *
973 * Simply returns the cached accuracy of the clk, unless
974 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
975 * issued.
976 * If clk is NULL then returns 0.
977 */
978long clk_get_accuracy(struct clk *clk)
035a61c3 979{
4dff95dc
SB
980 if (!clk)
981 return 0;
035a61c3 982
4dff95dc 983 return clk_core_get_accuracy(clk->core);
035a61c3 984}
4dff95dc 985EXPORT_SYMBOL_GPL(clk_get_accuracy);
035a61c3 986
4dff95dc
SB
987static unsigned long clk_recalc(struct clk_core *core,
988 unsigned long parent_rate)
1c8e6004 989{
4dff95dc
SB
990 if (core->ops->recalc_rate)
991 return core->ops->recalc_rate(core->hw, parent_rate);
992 return parent_rate;
1c8e6004
TV
993}
994
4dff95dc
SB
995/**
996 * __clk_recalc_rates
997 * @core: first clk in the subtree
998 * @msg: notification type (see include/linux/clk.h)
999 *
1000 * Walks the subtree of clks starting with clk and recalculates rates as it
1001 * goes. Note that if a clk does not implement the .recalc_rate callback then
1002 * it is assumed that the clock will take on the rate of its parent.
1003 *
1004 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1005 * if necessary.
15a02c1f 1006 */
4dff95dc 1007static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
15a02c1f 1008{
4dff95dc
SB
1009 unsigned long old_rate;
1010 unsigned long parent_rate = 0;
1011 struct clk_core *child;
e366fdd7 1012
4dff95dc 1013 lockdep_assert_held(&prepare_lock);
15a02c1f 1014
4dff95dc 1015 old_rate = core->rate;
b2476490 1016
4dff95dc
SB
1017 if (core->parent)
1018 parent_rate = core->parent->rate;
b2476490 1019
4dff95dc 1020 core->rate = clk_recalc(core, parent_rate);
b2476490 1021
4dff95dc
SB
1022 /*
1023 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1024 * & ABORT_RATE_CHANGE notifiers
1025 */
1026 if (core->notifier_count && msg)
1027 __clk_notify(core, msg, old_rate, core->rate);
b2476490 1028
4dff95dc
SB
1029 hlist_for_each_entry(child, &core->children, child_node)
1030 __clk_recalc_rates(child, msg);
1031}
b2476490 1032
4dff95dc
SB
1033static unsigned long clk_core_get_rate(struct clk_core *core)
1034{
1035 unsigned long rate;
dfc202ea 1036
4dff95dc 1037 clk_prepare_lock();
b2476490 1038
4dff95dc
SB
1039 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1040 __clk_recalc_rates(core, 0);
1041
1042 rate = clk_core_get_rate_nolock(core);
1043 clk_prepare_unlock();
1044
1045 return rate;
b2476490
MT
1046}
1047
1048/**
4dff95dc
SB
1049 * clk_get_rate - return the rate of clk
1050 * @clk: the clk whose rate is being returned
b2476490 1051 *
4dff95dc
SB
1052 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1053 * is set, which means a recalc_rate will be issued.
1054 * If clk is NULL then returns 0.
b2476490 1055 */
4dff95dc 1056unsigned long clk_get_rate(struct clk *clk)
b2476490 1057{
4dff95dc
SB
1058 if (!clk)
1059 return 0;
63589e92 1060
4dff95dc 1061 return clk_core_get_rate(clk->core);
b2476490 1062}
4dff95dc 1063EXPORT_SYMBOL_GPL(clk_get_rate);
b2476490 1064
4dff95dc
SB
1065static int clk_fetch_parent_index(struct clk_core *core,
1066 struct clk_core *parent)
b2476490 1067{
4dff95dc 1068 int i;
b2476490 1069
4dff95dc
SB
1070 if (!core->parents) {
1071 core->parents = kcalloc(core->num_parents,
1072 sizeof(struct clk *), GFP_KERNEL);
1073 if (!core->parents)
1074 return -ENOMEM;
1075 }
dfc202ea 1076
4dff95dc
SB
1077 /*
1078 * find index of new parent clock using cached parent ptrs,
1079 * or if not yet cached, use string name comparison and cache
1080 * them now to avoid future calls to clk_core_lookup.
1081 */
1082 for (i = 0; i < core->num_parents; i++) {
1083 if (core->parents[i] == parent)
1084 return i;
dfc202ea 1085
4dff95dc
SB
1086 if (core->parents[i])
1087 continue;
dfc202ea 1088
4dff95dc
SB
1089 if (!strcmp(core->parent_names[i], parent->name)) {
1090 core->parents[i] = clk_core_lookup(parent->name);
1091 return i;
b2476490
MT
1092 }
1093 }
1094
4dff95dc 1095 return -EINVAL;
b2476490
MT
1096}
1097
e6500344
HS
1098/*
1099 * Update the orphan status of @core and all its children.
1100 */
1101static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
1102{
1103 struct clk_core *child;
1104
1105 core->orphan = is_orphan;
1106
1107 hlist_for_each_entry(child, &core->children, child_node)
1108 clk_core_update_orphan_status(child, is_orphan);
1109}
1110
4dff95dc 1111static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
b2476490 1112{
e6500344
HS
1113 bool was_orphan = core->orphan;
1114
4dff95dc 1115 hlist_del(&core->child_node);
035a61c3 1116
4dff95dc 1117 if (new_parent) {
e6500344
HS
1118 bool becomes_orphan = new_parent->orphan;
1119
4dff95dc
SB
1120 /* avoid duplicate POST_RATE_CHANGE notifications */
1121 if (new_parent->new_child == core)
1122 new_parent->new_child = NULL;
b2476490 1123
4dff95dc 1124 hlist_add_head(&core->child_node, &new_parent->children);
e6500344
HS
1125
1126 if (was_orphan != becomes_orphan)
1127 clk_core_update_orphan_status(core, becomes_orphan);
4dff95dc
SB
1128 } else {
1129 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
1130 if (!was_orphan)
1131 clk_core_update_orphan_status(core, true);
4dff95dc 1132 }
dfc202ea 1133
4dff95dc 1134 core->parent = new_parent;
035a61c3
TV
1135}
1136
4dff95dc
SB
1137static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1138 struct clk_core *parent)
b2476490
MT
1139{
1140 unsigned long flags;
4dff95dc 1141 struct clk_core *old_parent = core->parent;
b2476490 1142
4dff95dc
SB
1143 /*
1144 * Migrate prepare state between parents and prevent race with
1145 * clk_enable().
1146 *
1147 * If the clock is not prepared, then a race with
1148 * clk_enable/disable() is impossible since we already have the
1149 * prepare lock (future calls to clk_enable() need to be preceded by
1150 * a clk_prepare()).
1151 *
1152 * If the clock is prepared, migrate the prepared state to the new
1153 * parent and also protect against a race with clk_enable() by
1154 * forcing the clock and the new parent on. This ensures that all
1155 * future calls to clk_enable() are practically NOPs with respect to
1156 * hardware and software states.
1157 *
1158 * See also: Comment for clk_set_parent() below.
1159 */
1160 if (core->prepare_count) {
1161 clk_core_prepare(parent);
d2a5d46b 1162 flags = clk_enable_lock();
4dff95dc
SB
1163 clk_core_enable(parent);
1164 clk_core_enable(core);
d2a5d46b 1165 clk_enable_unlock(flags);
4dff95dc 1166 }
63589e92 1167
4dff95dc 1168 /* update the clk tree topology */
eab89f69 1169 flags = clk_enable_lock();
4dff95dc 1170 clk_reparent(core, parent);
eab89f69 1171 clk_enable_unlock(flags);
4dff95dc
SB
1172
1173 return old_parent;
b2476490 1174}
b2476490 1175
4dff95dc
SB
1176static void __clk_set_parent_after(struct clk_core *core,
1177 struct clk_core *parent,
1178 struct clk_core *old_parent)
b2476490 1179{
d2a5d46b
DA
1180 unsigned long flags;
1181
4dff95dc
SB
1182 /*
1183 * Finish the migration of prepare state and undo the changes done
1184 * for preventing a race with clk_enable().
1185 */
1186 if (core->prepare_count) {
d2a5d46b 1187 flags = clk_enable_lock();
4dff95dc
SB
1188 clk_core_disable(core);
1189 clk_core_disable(old_parent);
d2a5d46b 1190 clk_enable_unlock(flags);
4dff95dc
SB
1191 clk_core_unprepare(old_parent);
1192 }
1193}
b2476490 1194
4dff95dc
SB
1195static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1196 u8 p_index)
1197{
1198 unsigned long flags;
1199 int ret = 0;
1200 struct clk_core *old_parent;
b2476490 1201
4dff95dc 1202 old_parent = __clk_set_parent_before(core, parent);
b2476490 1203
4dff95dc 1204 trace_clk_set_parent(core, parent);
b2476490 1205
4dff95dc
SB
1206 /* change clock input source */
1207 if (parent && core->ops->set_parent)
1208 ret = core->ops->set_parent(core->hw, p_index);
dfc202ea 1209
4dff95dc 1210 trace_clk_set_parent_complete(core, parent);
dfc202ea 1211
4dff95dc
SB
1212 if (ret) {
1213 flags = clk_enable_lock();
1214 clk_reparent(core, old_parent);
1215 clk_enable_unlock(flags);
c660b2eb 1216 __clk_set_parent_after(core, old_parent, parent);
dfc202ea 1217
4dff95dc 1218 return ret;
b2476490
MT
1219 }
1220
4dff95dc
SB
1221 __clk_set_parent_after(core, parent, old_parent);
1222
b2476490
MT
1223 return 0;
1224}
1225
1226/**
4dff95dc
SB
1227 * __clk_speculate_rates
1228 * @core: first clk in the subtree
1229 * @parent_rate: the "future" rate of clk's parent
b2476490 1230 *
4dff95dc
SB
1231 * Walks the subtree of clks starting with clk, speculating rates as it
1232 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1233 *
1234 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1235 * pre-rate change notifications and returns early if no clks in the
1236 * subtree have subscribed to the notifications. Note that if a clk does not
1237 * implement the .recalc_rate callback then it is assumed that the clock will
1238 * take on the rate of its parent.
b2476490 1239 */
4dff95dc
SB
1240static int __clk_speculate_rates(struct clk_core *core,
1241 unsigned long parent_rate)
b2476490 1242{
4dff95dc
SB
1243 struct clk_core *child;
1244 unsigned long new_rate;
1245 int ret = NOTIFY_DONE;
b2476490 1246
4dff95dc 1247 lockdep_assert_held(&prepare_lock);
864e160a 1248
4dff95dc
SB
1249 new_rate = clk_recalc(core, parent_rate);
1250
1251 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1252 if (core->notifier_count)
1253 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1254
1255 if (ret & NOTIFY_STOP_MASK) {
1256 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1257 __func__, core->name, ret);
1258 goto out;
1259 }
1260
1261 hlist_for_each_entry(child, &core->children, child_node) {
1262 ret = __clk_speculate_rates(child, new_rate);
1263 if (ret & NOTIFY_STOP_MASK)
1264 break;
1265 }
b2476490 1266
4dff95dc 1267out:
b2476490
MT
1268 return ret;
1269}
b2476490 1270
4dff95dc
SB
1271static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1272 struct clk_core *new_parent, u8 p_index)
b2476490 1273{
4dff95dc 1274 struct clk_core *child;
b2476490 1275
4dff95dc
SB
1276 core->new_rate = new_rate;
1277 core->new_parent = new_parent;
1278 core->new_parent_index = p_index;
1279 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1280 core->new_child = NULL;
1281 if (new_parent && new_parent != core->parent)
1282 new_parent->new_child = core;
496eadf8 1283
4dff95dc
SB
1284 hlist_for_each_entry(child, &core->children, child_node) {
1285 child->new_rate = clk_recalc(child, new_rate);
1286 clk_calc_subtree(child, child->new_rate, NULL, 0);
1287 }
1288}
b2476490 1289
4dff95dc
SB
1290/*
1291 * calculate the new rates returning the topmost clock that has to be
1292 * changed.
1293 */
1294static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1295 unsigned long rate)
1296{
1297 struct clk_core *top = core;
1298 struct clk_core *old_parent, *parent;
4dff95dc
SB
1299 unsigned long best_parent_rate = 0;
1300 unsigned long new_rate;
1301 unsigned long min_rate;
1302 unsigned long max_rate;
1303 int p_index = 0;
1304 long ret;
1305
1306 /* sanity */
1307 if (IS_ERR_OR_NULL(core))
1308 return NULL;
1309
1310 /* save parent rate, if it exists */
1311 parent = old_parent = core->parent;
71472c0c 1312 if (parent)
4dff95dc 1313 best_parent_rate = parent->rate;
71472c0c 1314
4dff95dc
SB
1315 clk_core_get_boundaries(core, &min_rate, &max_rate);
1316
1317 /* find the closest rate and parent clk/rate */
d6968fca 1318 if (core->ops->determine_rate) {
0817b62c
BB
1319 struct clk_rate_request req;
1320
1321 req.rate = rate;
1322 req.min_rate = min_rate;
1323 req.max_rate = max_rate;
1324 if (parent) {
1325 req.best_parent_hw = parent->hw;
1326 req.best_parent_rate = parent->rate;
1327 } else {
1328 req.best_parent_hw = NULL;
1329 req.best_parent_rate = 0;
1330 }
1331
1332 ret = core->ops->determine_rate(core->hw, &req);
4dff95dc
SB
1333 if (ret < 0)
1334 return NULL;
1c8e6004 1335
0817b62c
BB
1336 best_parent_rate = req.best_parent_rate;
1337 new_rate = req.rate;
1338 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
4dff95dc
SB
1339 } else if (core->ops->round_rate) {
1340 ret = core->ops->round_rate(core->hw, rate,
0817b62c 1341 &best_parent_rate);
4dff95dc
SB
1342 if (ret < 0)
1343 return NULL;
035a61c3 1344
4dff95dc
SB
1345 new_rate = ret;
1346 if (new_rate < min_rate || new_rate > max_rate)
1347 return NULL;
1348 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1349 /* pass-through clock without adjustable parent */
1350 core->new_rate = core->rate;
1351 return NULL;
1352 } else {
1353 /* pass-through clock with adjustable parent */
1354 top = clk_calc_new_rates(parent, rate);
1355 new_rate = parent->new_rate;
1356 goto out;
1357 }
1c8e6004 1358
4dff95dc
SB
1359 /* some clocks must be gated to change parent */
1360 if (parent != old_parent &&
1361 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1362 pr_debug("%s: %s not gated but wants to reparent\n",
1363 __func__, core->name);
1364 return NULL;
1365 }
b2476490 1366
4dff95dc
SB
1367 /* try finding the new parent index */
1368 if (parent && core->num_parents > 1) {
1369 p_index = clk_fetch_parent_index(core, parent);
1370 if (p_index < 0) {
1371 pr_debug("%s: clk %s can not be parent of clk %s\n",
1372 __func__, parent->name, core->name);
1373 return NULL;
1374 }
1375 }
b2476490 1376
4dff95dc
SB
1377 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
1378 best_parent_rate != parent->rate)
1379 top = clk_calc_new_rates(parent, best_parent_rate);
035a61c3 1380
4dff95dc
SB
1381out:
1382 clk_calc_subtree(core, new_rate, parent, p_index);
b2476490 1383
4dff95dc 1384 return top;
b2476490 1385}
b2476490 1386
4dff95dc
SB
1387/*
1388 * Notify about rate changes in a subtree. Always walk down the whole tree
1389 * so that in case of an error we can walk down the whole tree again and
1390 * abort the change.
b2476490 1391 */
4dff95dc
SB
1392static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
1393 unsigned long event)
b2476490 1394{
4dff95dc 1395 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
b2476490
MT
1396 int ret = NOTIFY_DONE;
1397
4dff95dc
SB
1398 if (core->rate == core->new_rate)
1399 return NULL;
b2476490 1400
4dff95dc
SB
1401 if (core->notifier_count) {
1402 ret = __clk_notify(core, event, core->rate, core->new_rate);
1403 if (ret & NOTIFY_STOP_MASK)
1404 fail_clk = core;
b2476490
MT
1405 }
1406
4dff95dc
SB
1407 hlist_for_each_entry(child, &core->children, child_node) {
1408 /* Skip children who will be reparented to another clock */
1409 if (child->new_parent && child->new_parent != core)
1410 continue;
1411 tmp_clk = clk_propagate_rate_change(child, event);
1412 if (tmp_clk)
1413 fail_clk = tmp_clk;
1414 }
5279fc40 1415
4dff95dc
SB
1416 /* handle the new child who might not be in core->children yet */
1417 if (core->new_child) {
1418 tmp_clk = clk_propagate_rate_change(core->new_child, event);
1419 if (tmp_clk)
1420 fail_clk = tmp_clk;
1421 }
5279fc40 1422
4dff95dc 1423 return fail_clk;
5279fc40
BB
1424}
1425
4dff95dc
SB
1426/*
1427 * walk down a subtree and set the new rates notifying the rate
1428 * change on the way
1429 */
1430static void clk_change_rate(struct clk_core *core)
035a61c3 1431{
4dff95dc
SB
1432 struct clk_core *child;
1433 struct hlist_node *tmp;
1434 unsigned long old_rate;
1435 unsigned long best_parent_rate = 0;
1436 bool skip_set_rate = false;
1437 struct clk_core *old_parent;
035a61c3 1438
4dff95dc 1439 old_rate = core->rate;
035a61c3 1440
4dff95dc
SB
1441 if (core->new_parent)
1442 best_parent_rate = core->new_parent->rate;
1443 else if (core->parent)
1444 best_parent_rate = core->parent->rate;
035a61c3 1445
2eb8c710
HS
1446 if (core->flags & CLK_SET_RATE_UNGATE) {
1447 unsigned long flags;
1448
1449 clk_core_prepare(core);
1450 flags = clk_enable_lock();
1451 clk_core_enable(core);
1452 clk_enable_unlock(flags);
1453 }
1454
4dff95dc
SB
1455 if (core->new_parent && core->new_parent != core->parent) {
1456 old_parent = __clk_set_parent_before(core, core->new_parent);
1457 trace_clk_set_parent(core, core->new_parent);
5279fc40 1458
4dff95dc
SB
1459 if (core->ops->set_rate_and_parent) {
1460 skip_set_rate = true;
1461 core->ops->set_rate_and_parent(core->hw, core->new_rate,
1462 best_parent_rate,
1463 core->new_parent_index);
1464 } else if (core->ops->set_parent) {
1465 core->ops->set_parent(core->hw, core->new_parent_index);
1466 }
5279fc40 1467
4dff95dc
SB
1468 trace_clk_set_parent_complete(core, core->new_parent);
1469 __clk_set_parent_after(core, core->new_parent, old_parent);
1470 }
8f2c2db1 1471
4dff95dc 1472 trace_clk_set_rate(core, core->new_rate);
b2476490 1473
4dff95dc
SB
1474 if (!skip_set_rate && core->ops->set_rate)
1475 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
496eadf8 1476
4dff95dc 1477 trace_clk_set_rate_complete(core, core->new_rate);
b2476490 1478
4dff95dc 1479 core->rate = clk_recalc(core, best_parent_rate);
b2476490 1480
2eb8c710
HS
1481 if (core->flags & CLK_SET_RATE_UNGATE) {
1482 unsigned long flags;
1483
1484 flags = clk_enable_lock();
1485 clk_core_disable(core);
1486 clk_enable_unlock(flags);
1487 clk_core_unprepare(core);
1488 }
1489
4dff95dc
SB
1490 if (core->notifier_count && old_rate != core->rate)
1491 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
b2476490 1492
85e88fab
MT
1493 if (core->flags & CLK_RECALC_NEW_RATES)
1494 (void)clk_calc_new_rates(core, core->new_rate);
d8d91987 1495
b2476490 1496 /*
4dff95dc
SB
1497 * Use safe iteration, as change_rate can actually swap parents
1498 * for certain clock types.
b2476490 1499 */
4dff95dc
SB
1500 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
1501 /* Skip children who will be reparented to another clock */
1502 if (child->new_parent && child->new_parent != core)
1503 continue;
1504 clk_change_rate(child);
1505 }
b2476490 1506
4dff95dc
SB
1507 /* handle the new child who might not be in core->children yet */
1508 if (core->new_child)
1509 clk_change_rate(core->new_child);
b2476490
MT
1510}
1511
4dff95dc
SB
1512static int clk_core_set_rate_nolock(struct clk_core *core,
1513 unsigned long req_rate)
a093bde2 1514{
4dff95dc
SB
1515 struct clk_core *top, *fail_clk;
1516 unsigned long rate = req_rate;
1517 int ret = 0;
a093bde2 1518
4dff95dc
SB
1519 if (!core)
1520 return 0;
a093bde2 1521
4dff95dc
SB
1522 /* bail early if nothing to do */
1523 if (rate == clk_core_get_rate_nolock(core))
1524 return 0;
a093bde2 1525
4dff95dc
SB
1526 if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count)
1527 return -EBUSY;
a093bde2 1528
4dff95dc
SB
1529 /* calculate new rates and get the topmost changed clock */
1530 top = clk_calc_new_rates(core, rate);
1531 if (!top)
1532 return -EINVAL;
1533
1534 /* notify that we are about to change rates */
1535 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
1536 if (fail_clk) {
1537 pr_debug("%s: failed to set %s rate\n", __func__,
1538 fail_clk->name);
1539 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
1540 return -EBUSY;
1541 }
1542
1543 /* change the rates */
1544 clk_change_rate(top);
1545
1546 core->req_rate = req_rate;
1547
1548 return ret;
a093bde2 1549}
035a61c3
TV
1550
1551/**
4dff95dc
SB
1552 * clk_set_rate - specify a new rate for clk
1553 * @clk: the clk whose rate is being changed
1554 * @rate: the new rate for clk
035a61c3 1555 *
4dff95dc
SB
1556 * In the simplest case clk_set_rate will only adjust the rate of clk.
1557 *
1558 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
1559 * propagate up to clk's parent; whether or not this happens depends on the
1560 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
1561 * after calling .round_rate then upstream parent propagation is ignored. If
1562 * *parent_rate comes back with a new rate for clk's parent then we propagate
1563 * up to clk's parent and set its rate. Upward propagation will continue
1564 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
1565 * .round_rate stops requesting changes to clk's parent_rate.
1566 *
1567 * Rate changes are accomplished via tree traversal that also recalculates the
1568 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
1569 *
1570 * Returns 0 on success, -EERROR otherwise.
035a61c3 1571 */
4dff95dc 1572int clk_set_rate(struct clk *clk, unsigned long rate)
035a61c3 1573{
4dff95dc
SB
1574 int ret;
1575
035a61c3
TV
1576 if (!clk)
1577 return 0;
1578
4dff95dc
SB
1579 /* prevent racing with updates to the clock topology */
1580 clk_prepare_lock();
da0f0b2c 1581
4dff95dc 1582 ret = clk_core_set_rate_nolock(clk->core, rate);
da0f0b2c 1583
4dff95dc 1584 clk_prepare_unlock();
4935b22c 1585
4dff95dc 1586 return ret;
4935b22c 1587}
4dff95dc 1588EXPORT_SYMBOL_GPL(clk_set_rate);
4935b22c 1589
4dff95dc
SB
1590/**
1591 * clk_set_rate_range - set a rate range for a clock source
1592 * @clk: clock source
1593 * @min: desired minimum clock rate in Hz, inclusive
1594 * @max: desired maximum clock rate in Hz, inclusive
1595 *
1596 * Returns success (0) or negative errno.
1597 */
1598int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
4935b22c 1599{
4dff95dc 1600 int ret = 0;
4935b22c 1601
4dff95dc
SB
1602 if (!clk)
1603 return 0;
903efc55 1604
4dff95dc
SB
1605 if (min > max) {
1606 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
1607 __func__, clk->core->name, clk->dev_id, clk->con_id,
1608 min, max);
1609 return -EINVAL;
903efc55 1610 }
4935b22c 1611
4dff95dc 1612 clk_prepare_lock();
4935b22c 1613
4dff95dc
SB
1614 if (min != clk->min_rate || max != clk->max_rate) {
1615 clk->min_rate = min;
1616 clk->max_rate = max;
1617 ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
4935b22c
JH
1618 }
1619
4dff95dc 1620 clk_prepare_unlock();
4935b22c 1621
4dff95dc 1622 return ret;
3fa2252b 1623}
4dff95dc 1624EXPORT_SYMBOL_GPL(clk_set_rate_range);
3fa2252b 1625
4dff95dc
SB
1626/**
1627 * clk_set_min_rate - set a minimum clock rate for a clock source
1628 * @clk: clock source
1629 * @rate: desired minimum clock rate in Hz, inclusive
1630 *
1631 * Returns success (0) or negative errno.
1632 */
1633int clk_set_min_rate(struct clk *clk, unsigned long rate)
3fa2252b 1634{
4dff95dc
SB
1635 if (!clk)
1636 return 0;
1637
1638 return clk_set_rate_range(clk, rate, clk->max_rate);
3fa2252b 1639}
4dff95dc 1640EXPORT_SYMBOL_GPL(clk_set_min_rate);
3fa2252b 1641
4dff95dc
SB
1642/**
1643 * clk_set_max_rate - set a maximum clock rate for a clock source
1644 * @clk: clock source
1645 * @rate: desired maximum clock rate in Hz, inclusive
1646 *
1647 * Returns success (0) or negative errno.
1648 */
1649int clk_set_max_rate(struct clk *clk, unsigned long rate)
3fa2252b 1650{
4dff95dc
SB
1651 if (!clk)
1652 return 0;
4935b22c 1653
4dff95dc 1654 return clk_set_rate_range(clk, clk->min_rate, rate);
4935b22c 1655}
4dff95dc 1656EXPORT_SYMBOL_GPL(clk_set_max_rate);
4935b22c 1657
b2476490 1658/**
4dff95dc
SB
1659 * clk_get_parent - return the parent of a clk
1660 * @clk: the clk whose parent gets returned
b2476490 1661 *
4dff95dc 1662 * Simply returns clk->parent. Returns NULL if clk is NULL.
b2476490 1663 */
4dff95dc 1664struct clk *clk_get_parent(struct clk *clk)
b2476490 1665{
4dff95dc 1666 struct clk *parent;
b2476490 1667
fc4a05d4
SB
1668 if (!clk)
1669 return NULL;
1670
4dff95dc 1671 clk_prepare_lock();
fc4a05d4
SB
1672 /* TODO: Create a per-user clk and change callers to call clk_put */
1673 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
4dff95dc 1674 clk_prepare_unlock();
496eadf8 1675
4dff95dc
SB
1676 return parent;
1677}
1678EXPORT_SYMBOL_GPL(clk_get_parent);
b2476490 1679
4dff95dc
SB
1680/*
1681 * .get_parent is mandatory for clocks with multiple possible parents. It is
1682 * optional for single-parent clocks. Always call .get_parent if it is
1683 * available and WARN if it is missing for multi-parent clocks.
1684 *
1685 * For single-parent clocks without .get_parent, first check to see if the
1686 * .parents array exists, and if so use it to avoid an expensive tree
1687 * traversal. If .parents does not exist then walk the tree.
1688 */
1689static struct clk_core *__clk_init_parent(struct clk_core *core)
1690{
1691 struct clk_core *ret = NULL;
1692 u8 index;
b2476490 1693
4dff95dc
SB
1694 /* handle the trivial cases */
1695
1696 if (!core->num_parents)
b2476490
MT
1697 goto out;
1698
4dff95dc
SB
1699 if (core->num_parents == 1) {
1700 if (IS_ERR_OR_NULL(core->parent))
1701 core->parent = clk_core_lookup(core->parent_names[0]);
1702 ret = core->parent;
1703 goto out;
b2476490
MT
1704 }
1705
4dff95dc
SB
1706 if (!core->ops->get_parent) {
1707 WARN(!core->ops->get_parent,
1708 "%s: multi-parent clocks must implement .get_parent\n",
1709 __func__);
1710 goto out;
90c53547 1711 }
4dff95dc
SB
1712
1713 /*
1714 * Do our best to cache parent clocks in core->parents. This prevents
1715 * unnecessary and expensive lookups. We don't set core->parent here;
1716 * that is done by the calling function.
1717 */
1718
1719 index = core->ops->get_parent(core->hw);
1720
1721 if (!core->parents)
1722 core->parents =
1723 kcalloc(core->num_parents, sizeof(struct clk *),
1724 GFP_KERNEL);
1725
1726 ret = clk_core_get_parent_by_index(core, index);
1727
b2476490
MT
1728out:
1729 return ret;
1730}
1731
4dff95dc
SB
1732static void clk_core_reparent(struct clk_core *core,
1733 struct clk_core *new_parent)
b2476490 1734{
4dff95dc
SB
1735 clk_reparent(core, new_parent);
1736 __clk_recalc_accuracies(core);
1737 __clk_recalc_rates(core, POST_RATE_CHANGE);
b2476490
MT
1738}
1739
42c86547
TV
1740void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
1741{
1742 if (!hw)
1743 return;
1744
1745 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
1746}
1747
4dff95dc
SB
1748/**
1749 * clk_has_parent - check if a clock is a possible parent for another
1750 * @clk: clock source
1751 * @parent: parent clock source
1752 *
1753 * This function can be used in drivers that need to check that a clock can be
1754 * the parent of another without actually changing the parent.
1755 *
1756 * Returns true if @parent is a possible parent for @clk, false otherwise.
b2476490 1757 */
4dff95dc 1758bool clk_has_parent(struct clk *clk, struct clk *parent)
b2476490 1759{
4dff95dc
SB
1760 struct clk_core *core, *parent_core;
1761 unsigned int i;
b2476490 1762
4dff95dc
SB
1763 /* NULL clocks should be nops, so return success if either is NULL. */
1764 if (!clk || !parent)
1765 return true;
7452b219 1766
4dff95dc
SB
1767 core = clk->core;
1768 parent_core = parent->core;
71472c0c 1769
4dff95dc
SB
1770 /* Optimize for the case where the parent is already the parent. */
1771 if (core->parent == parent_core)
1772 return true;
1c8e6004 1773
4dff95dc
SB
1774 for (i = 0; i < core->num_parents; i++)
1775 if (strcmp(core->parent_names[i], parent_core->name) == 0)
1776 return true;
03bc10ab 1777
4dff95dc
SB
1778 return false;
1779}
1780EXPORT_SYMBOL_GPL(clk_has_parent);
03bc10ab 1781
4dff95dc
SB
1782static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent)
1783{
1784 int ret = 0;
1785 int p_index = 0;
1786 unsigned long p_rate = 0;
1787
1788 if (!core)
1789 return 0;
1790
1791 /* prevent racing with updates to the clock topology */
1792 clk_prepare_lock();
1793
1794 if (core->parent == parent)
1795 goto out;
1796
1797 /* verify ops for for multi-parent clks */
1798 if ((core->num_parents > 1) && (!core->ops->set_parent)) {
1799 ret = -ENOSYS;
63f5c3b2 1800 goto out;
7452b219
MT
1801 }
1802
4dff95dc
SB
1803 /* check that we are allowed to re-parent if the clock is in use */
1804 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1805 ret = -EBUSY;
1806 goto out;
b2476490
MT
1807 }
1808
71472c0c 1809 /* try finding the new parent index */
4dff95dc 1810 if (parent) {
d6968fca 1811 p_index = clk_fetch_parent_index(core, parent);
4dff95dc 1812 p_rate = parent->rate;
f1c8b2ed 1813 if (p_index < 0) {
71472c0c 1814 pr_debug("%s: clk %s can not be parent of clk %s\n",
4dff95dc
SB
1815 __func__, parent->name, core->name);
1816 ret = p_index;
1817 goto out;
71472c0c 1818 }
b2476490
MT
1819 }
1820
4dff95dc
SB
1821 /* propagate PRE_RATE_CHANGE notifications */
1822 ret = __clk_speculate_rates(core, p_rate);
b2476490 1823
4dff95dc
SB
1824 /* abort if a driver objects */
1825 if (ret & NOTIFY_STOP_MASK)
1826 goto out;
b2476490 1827
4dff95dc
SB
1828 /* do the re-parent */
1829 ret = __clk_set_parent(core, parent, p_index);
b2476490 1830
4dff95dc
SB
1831 /* propagate rate an accuracy recalculation accordingly */
1832 if (ret) {
1833 __clk_recalc_rates(core, ABORT_RATE_CHANGE);
1834 } else {
1835 __clk_recalc_rates(core, POST_RATE_CHANGE);
1836 __clk_recalc_accuracies(core);
b2476490
MT
1837 }
1838
4dff95dc
SB
1839out:
1840 clk_prepare_unlock();
71472c0c 1841
4dff95dc
SB
1842 return ret;
1843}
b2476490 1844
4dff95dc
SB
1845/**
1846 * clk_set_parent - switch the parent of a mux clk
1847 * @clk: the mux clk whose input we are switching
1848 * @parent: the new input to clk
1849 *
1850 * Re-parent clk to use parent as its new input source. If clk is in
1851 * prepared state, the clk will get enabled for the duration of this call. If
1852 * that's not acceptable for a specific clk (Eg: the consumer can't handle
1853 * that, the reparenting is glitchy in hardware, etc), use the
1854 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
1855 *
1856 * After successfully changing clk's parent clk_set_parent will update the
1857 * clk topology, sysfs topology and propagate rate recalculation via
1858 * __clk_recalc_rates.
1859 *
1860 * Returns 0 on success, -EERROR otherwise.
1861 */
1862int clk_set_parent(struct clk *clk, struct clk *parent)
1863{
1864 if (!clk)
1865 return 0;
1866
1867 return clk_core_set_parent(clk->core, parent ? parent->core : NULL);
b2476490 1868}
4dff95dc 1869EXPORT_SYMBOL_GPL(clk_set_parent);
b2476490 1870
4dff95dc
SB
1871/**
1872 * clk_set_phase - adjust the phase shift of a clock signal
1873 * @clk: clock signal source
1874 * @degrees: number of degrees the signal is shifted
1875 *
1876 * Shifts the phase of a clock signal by the specified
1877 * degrees. Returns 0 on success, -EERROR otherwise.
1878 *
1879 * This function makes no distinction about the input or reference
1880 * signal that we adjust the clock signal phase against. For example
1881 * phase locked-loop clock signal generators we may shift phase with
1882 * respect to feedback clock signal input, but for other cases the
1883 * clock phase may be shifted with respect to some other, unspecified
1884 * signal.
1885 *
1886 * Additionally the concept of phase shift does not propagate through
1887 * the clock tree hierarchy, which sets it apart from clock rates and
1888 * clock accuracy. A parent clock phase attribute does not have an
1889 * impact on the phase attribute of a child clock.
b2476490 1890 */
4dff95dc 1891int clk_set_phase(struct clk *clk, int degrees)
b2476490 1892{
4dff95dc 1893 int ret = -EINVAL;
b2476490 1894
4dff95dc
SB
1895 if (!clk)
1896 return 0;
b2476490 1897
4dff95dc
SB
1898 /* sanity check degrees */
1899 degrees %= 360;
1900 if (degrees < 0)
1901 degrees += 360;
bf47b4fd 1902
4dff95dc 1903 clk_prepare_lock();
3fa2252b 1904
4dff95dc 1905 trace_clk_set_phase(clk->core, degrees);
3fa2252b 1906
4dff95dc
SB
1907 if (clk->core->ops->set_phase)
1908 ret = clk->core->ops->set_phase(clk->core->hw, degrees);
3fa2252b 1909
4dff95dc 1910 trace_clk_set_phase_complete(clk->core, degrees);
dfc202ea 1911
4dff95dc
SB
1912 if (!ret)
1913 clk->core->phase = degrees;
b2476490 1914
4dff95dc 1915 clk_prepare_unlock();
dfc202ea 1916
4dff95dc
SB
1917 return ret;
1918}
1919EXPORT_SYMBOL_GPL(clk_set_phase);
b2476490 1920
4dff95dc
SB
1921static int clk_core_get_phase(struct clk_core *core)
1922{
1923 int ret;
b2476490 1924
4dff95dc
SB
1925 clk_prepare_lock();
1926 ret = core->phase;
1927 clk_prepare_unlock();
71472c0c 1928
4dff95dc 1929 return ret;
b2476490
MT
1930}
1931
4dff95dc
SB
1932/**
1933 * clk_get_phase - return the phase shift of a clock signal
1934 * @clk: clock signal source
1935 *
1936 * Returns the phase shift of a clock node in degrees, otherwise returns
1937 * -EERROR.
1938 */
1939int clk_get_phase(struct clk *clk)
1c8e6004 1940{
4dff95dc 1941 if (!clk)
1c8e6004
TV
1942 return 0;
1943
4dff95dc
SB
1944 return clk_core_get_phase(clk->core);
1945}
1946EXPORT_SYMBOL_GPL(clk_get_phase);
1c8e6004 1947
4dff95dc
SB
1948/**
1949 * clk_is_match - check if two clk's point to the same hardware clock
1950 * @p: clk compared against q
1951 * @q: clk compared against p
1952 *
1953 * Returns true if the two struct clk pointers both point to the same hardware
1954 * clock node. Put differently, returns true if struct clk *p and struct clk *q
1955 * share the same struct clk_core object.
1956 *
1957 * Returns false otherwise. Note that two NULL clks are treated as matching.
1958 */
1959bool clk_is_match(const struct clk *p, const struct clk *q)
1960{
1961 /* trivial case: identical struct clk's or both NULL */
1962 if (p == q)
1963 return true;
1c8e6004 1964
3fe003f9 1965 /* true if clk->core pointers match. Avoid dereferencing garbage */
4dff95dc
SB
1966 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
1967 if (p->core == q->core)
1968 return true;
1c8e6004 1969
4dff95dc
SB
1970 return false;
1971}
1972EXPORT_SYMBOL_GPL(clk_is_match);
1c8e6004 1973
4dff95dc 1974/*** debugfs support ***/
1c8e6004 1975
4dff95dc
SB
1976#ifdef CONFIG_DEBUG_FS
1977#include <linux/debugfs.h>
1c8e6004 1978
4dff95dc
SB
1979static struct dentry *rootdir;
1980static int inited = 0;
1981static DEFINE_MUTEX(clk_debug_lock);
1982static HLIST_HEAD(clk_debug_list);
1c8e6004 1983
4dff95dc
SB
1984static struct hlist_head *all_lists[] = {
1985 &clk_root_list,
1986 &clk_orphan_list,
1987 NULL,
1988};
1989
1990static struct hlist_head *orphan_list[] = {
1991 &clk_orphan_list,
1992 NULL,
1993};
1994
1995static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
1996 int level)
b2476490 1997{
4dff95dc
SB
1998 if (!c)
1999 return;
b2476490 2000
4dff95dc
SB
2001 seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n",
2002 level * 3 + 1, "",
2003 30 - level * 3, c->name,
2004 c->enable_count, c->prepare_count, clk_core_get_rate(c),
2005 clk_core_get_accuracy(c), clk_core_get_phase(c));
2006}
89ac8d7a 2007
4dff95dc
SB
2008static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
2009 int level)
2010{
2011 struct clk_core *child;
b2476490 2012
4dff95dc
SB
2013 if (!c)
2014 return;
b2476490 2015
4dff95dc 2016 clk_summary_show_one(s, c, level);
0e1c0301 2017
4dff95dc
SB
2018 hlist_for_each_entry(child, &c->children, child_node)
2019 clk_summary_show_subtree(s, child, level + 1);
1c8e6004 2020}
b2476490 2021
4dff95dc 2022static int clk_summary_show(struct seq_file *s, void *data)
1c8e6004 2023{
4dff95dc
SB
2024 struct clk_core *c;
2025 struct hlist_head **lists = (struct hlist_head **)s->private;
1c8e6004 2026
4dff95dc
SB
2027 seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n");
2028 seq_puts(s, "----------------------------------------------------------------------------------------\n");
b2476490 2029
1c8e6004
TV
2030 clk_prepare_lock();
2031
4dff95dc
SB
2032 for (; *lists; lists++)
2033 hlist_for_each_entry(c, *lists, child_node)
2034 clk_summary_show_subtree(s, c, 0);
b2476490 2035
eab89f69 2036 clk_prepare_unlock();
b2476490 2037
4dff95dc 2038 return 0;
b2476490 2039}
1c8e6004 2040
1c8e6004 2041
4dff95dc 2042static int clk_summary_open(struct inode *inode, struct file *file)
1c8e6004 2043{
4dff95dc 2044 return single_open(file, clk_summary_show, inode->i_private);
1c8e6004 2045}
b2476490 2046
4dff95dc
SB
2047static const struct file_operations clk_summary_fops = {
2048 .open = clk_summary_open,
2049 .read = seq_read,
2050 .llseek = seq_lseek,
2051 .release = single_release,
2052};
b2476490 2053
4dff95dc
SB
2054static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
2055{
2056 if (!c)
2057 return;
b2476490 2058
7cb81136 2059 /* This should be JSON format, i.e. elements separated with a comma */
4dff95dc
SB
2060 seq_printf(s, "\"%s\": { ", c->name);
2061 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
2062 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
7cb81136
SW
2063 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c));
2064 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c));
4dff95dc 2065 seq_printf(s, "\"phase\": %d", clk_core_get_phase(c));
b2476490 2066}
b2476490 2067
4dff95dc 2068static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
b2476490 2069{
4dff95dc 2070 struct clk_core *child;
b2476490 2071
4dff95dc
SB
2072 if (!c)
2073 return;
b2476490 2074
4dff95dc 2075 clk_dump_one(s, c, level);
b2476490 2076
4dff95dc
SB
2077 hlist_for_each_entry(child, &c->children, child_node) {
2078 seq_printf(s, ",");
2079 clk_dump_subtree(s, child, level + 1);
b2476490
MT
2080 }
2081
4dff95dc 2082 seq_printf(s, "}");
b2476490
MT
2083}
2084
4dff95dc 2085static int clk_dump(struct seq_file *s, void *data)
4e88f3de 2086{
4dff95dc
SB
2087 struct clk_core *c;
2088 bool first_node = true;
2089 struct hlist_head **lists = (struct hlist_head **)s->private;
4e88f3de 2090
4dff95dc 2091 seq_printf(s, "{");
4e88f3de 2092
4dff95dc 2093 clk_prepare_lock();
035a61c3 2094
4dff95dc
SB
2095 for (; *lists; lists++) {
2096 hlist_for_each_entry(c, *lists, child_node) {
2097 if (!first_node)
2098 seq_puts(s, ",");
2099 first_node = false;
2100 clk_dump_subtree(s, c, 0);
2101 }
2102 }
4e88f3de 2103
4dff95dc 2104 clk_prepare_unlock();
4e88f3de 2105
70e9f4dd 2106 seq_puts(s, "}\n");
4dff95dc 2107 return 0;
4e88f3de 2108}
4e88f3de 2109
4dff95dc
SB
2110
2111static int clk_dump_open(struct inode *inode, struct file *file)
b2476490 2112{
4dff95dc
SB
2113 return single_open(file, clk_dump, inode->i_private);
2114}
b2476490 2115
4dff95dc
SB
2116static const struct file_operations clk_dump_fops = {
2117 .open = clk_dump_open,
2118 .read = seq_read,
2119 .llseek = seq_lseek,
2120 .release = single_release,
2121};
89ac8d7a 2122
4dff95dc
SB
2123static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
2124{
2125 struct dentry *d;
2126 int ret = -ENOMEM;
b2476490 2127
4dff95dc
SB
2128 if (!core || !pdentry) {
2129 ret = -EINVAL;
b2476490 2130 goto out;
4dff95dc 2131 }
b2476490 2132
4dff95dc
SB
2133 d = debugfs_create_dir(core->name, pdentry);
2134 if (!d)
b61c43c0 2135 goto out;
b61c43c0 2136
4dff95dc
SB
2137 core->dentry = d;
2138
2139 d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry,
2140 (u32 *)&core->rate);
2141 if (!d)
2142 goto err_out;
2143
2144 d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry,
2145 (u32 *)&core->accuracy);
2146 if (!d)
2147 goto err_out;
2148
2149 d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry,
2150 (u32 *)&core->phase);
2151 if (!d)
2152 goto err_out;
031dcc9b 2153
4dff95dc
SB
2154 d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry,
2155 (u32 *)&core->flags);
2156 if (!d)
2157 goto err_out;
031dcc9b 2158
4dff95dc
SB
2159 d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry,
2160 (u32 *)&core->prepare_count);
2161 if (!d)
2162 goto err_out;
b2476490 2163
4dff95dc
SB
2164 d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry,
2165 (u32 *)&core->enable_count);
2166 if (!d)
2167 goto err_out;
b2476490 2168
4dff95dc
SB
2169 d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry,
2170 (u32 *)&core->notifier_count);
2171 if (!d)
2172 goto err_out;
b2476490 2173
4dff95dc
SB
2174 if (core->ops->debug_init) {
2175 ret = core->ops->debug_init(core->hw, core->dentry);
2176 if (ret)
2177 goto err_out;
5279fc40 2178 }
b2476490 2179
4dff95dc
SB
2180 ret = 0;
2181 goto out;
b2476490 2182
4dff95dc
SB
2183err_out:
2184 debugfs_remove_recursive(core->dentry);
2185 core->dentry = NULL;
2186out:
b2476490
MT
2187 return ret;
2188}
035a61c3
TV
2189
2190/**
6e5ab41b
SB
2191 * clk_debug_register - add a clk node to the debugfs clk directory
2192 * @core: the clk being added to the debugfs clk directory
035a61c3 2193 *
6e5ab41b
SB
2194 * Dynamically adds a clk to the debugfs clk directory if debugfs has been
2195 * initialized. Otherwise it bails out early since the debugfs clk directory
4dff95dc 2196 * will be created lazily by clk_debug_init as part of a late_initcall.
035a61c3 2197 */
4dff95dc 2198static int clk_debug_register(struct clk_core *core)
035a61c3 2199{
4dff95dc 2200 int ret = 0;
035a61c3 2201
4dff95dc
SB
2202 mutex_lock(&clk_debug_lock);
2203 hlist_add_head(&core->debug_node, &clk_debug_list);
2204
2205 if (!inited)
2206 goto unlock;
2207
2208 ret = clk_debug_create_one(core, rootdir);
2209unlock:
2210 mutex_unlock(&clk_debug_lock);
2211
2212 return ret;
035a61c3 2213}
b2476490 2214
4dff95dc 2215 /**
6e5ab41b
SB
2216 * clk_debug_unregister - remove a clk node from the debugfs clk directory
2217 * @core: the clk being removed from the debugfs clk directory
e59c5371 2218 *
6e5ab41b
SB
2219 * Dynamically removes a clk and all its child nodes from the
2220 * debugfs clk directory if clk->dentry points to debugfs created by
4dff95dc 2221 * clk_debug_register in __clk_init.
e59c5371 2222 */
4dff95dc 2223static void clk_debug_unregister(struct clk_core *core)
e59c5371 2224{
4dff95dc
SB
2225 mutex_lock(&clk_debug_lock);
2226 hlist_del_init(&core->debug_node);
2227 debugfs_remove_recursive(core->dentry);
2228 core->dentry = NULL;
2229 mutex_unlock(&clk_debug_lock);
2230}
e59c5371 2231
4dff95dc
SB
2232struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode,
2233 void *data, const struct file_operations *fops)
2234{
2235 struct dentry *d = NULL;
e59c5371 2236
4dff95dc
SB
2237 if (hw->core->dentry)
2238 d = debugfs_create_file(name, mode, hw->core->dentry, data,
2239 fops);
e59c5371 2240
4dff95dc
SB
2241 return d;
2242}
2243EXPORT_SYMBOL_GPL(clk_debugfs_add_file);
e59c5371 2244
4dff95dc 2245/**
6e5ab41b 2246 * clk_debug_init - lazily populate the debugfs clk directory
4dff95dc 2247 *
6e5ab41b
SB
2248 * clks are often initialized very early during boot before memory can be
2249 * dynamically allocated and well before debugfs is setup. This function
2250 * populates the debugfs clk directory once at boot-time when we know that
2251 * debugfs is setup. It should only be called once at boot-time, all other clks
2252 * added dynamically will be done so with clk_debug_register.
4dff95dc
SB
2253 */
2254static int __init clk_debug_init(void)
2255{
2256 struct clk_core *core;
2257 struct dentry *d;
dfc202ea 2258
4dff95dc 2259 rootdir = debugfs_create_dir("clk", NULL);
e59c5371 2260
4dff95dc
SB
2261 if (!rootdir)
2262 return -ENOMEM;
dfc202ea 2263
4dff95dc
SB
2264 d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists,
2265 &clk_summary_fops);
2266 if (!d)
2267 return -ENOMEM;
e59c5371 2268
4dff95dc
SB
2269 d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists,
2270 &clk_dump_fops);
2271 if (!d)
2272 return -ENOMEM;
e59c5371 2273
4dff95dc
SB
2274 d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir,
2275 &orphan_list, &clk_summary_fops);
2276 if (!d)
2277 return -ENOMEM;
e59c5371 2278
4dff95dc
SB
2279 d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir,
2280 &orphan_list, &clk_dump_fops);
2281 if (!d)
2282 return -ENOMEM;
e59c5371 2283
4dff95dc
SB
2284 mutex_lock(&clk_debug_lock);
2285 hlist_for_each_entry(core, &clk_debug_list, debug_node)
2286 clk_debug_create_one(core, rootdir);
e59c5371 2287
4dff95dc
SB
2288 inited = 1;
2289 mutex_unlock(&clk_debug_lock);
e59c5371 2290
4dff95dc
SB
2291 return 0;
2292}
2293late_initcall(clk_debug_init);
2294#else
2295static inline int clk_debug_register(struct clk_core *core) { return 0; }
2296static inline void clk_debug_reparent(struct clk_core *core,
2297 struct clk_core *new_parent)
035a61c3 2298{
035a61c3 2299}
4dff95dc 2300static inline void clk_debug_unregister(struct clk_core *core)
3d3801ef 2301{
3d3801ef 2302}
4dff95dc 2303#endif
3d3801ef 2304
b2476490
MT
2305/**
2306 * __clk_init - initialize the data structures in a struct clk
2307 * @dev: device initializing this clk, placeholder for now
2308 * @clk: clk being initialized
2309 *
035a61c3 2310 * Initializes the lists in struct clk_core, queries the hardware for the
b2476490 2311 * parent and rate and sets them both.
b2476490 2312 */
b09d6d99 2313static int __clk_init(struct device *dev, struct clk *clk_user)
b2476490 2314{
d1302a36 2315 int i, ret = 0;
035a61c3 2316 struct clk_core *orphan;
b67bfe0d 2317 struct hlist_node *tmp2;
d6968fca 2318 struct clk_core *core;
1c8e6004 2319 unsigned long rate;
b2476490 2320
035a61c3 2321 if (!clk_user)
d1302a36 2322 return -EINVAL;
b2476490 2323
d6968fca 2324 core = clk_user->core;
035a61c3 2325
eab89f69 2326 clk_prepare_lock();
b2476490
MT
2327
2328 /* check to see if a clock with this name is already registered */
d6968fca 2329 if (clk_core_lookup(core->name)) {
d1302a36 2330 pr_debug("%s: clk %s already initialized\n",
d6968fca 2331 __func__, core->name);
d1302a36 2332 ret = -EEXIST;
b2476490 2333 goto out;
d1302a36 2334 }
b2476490 2335
d4d7e3dd 2336 /* check that clk_ops are sane. See Documentation/clk.txt */
d6968fca
SB
2337 if (core->ops->set_rate &&
2338 !((core->ops->round_rate || core->ops->determine_rate) &&
2339 core->ops->recalc_rate)) {
71472c0c 2340 pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
d6968fca 2341 __func__, core->name);
d1302a36 2342 ret = -EINVAL;
d4d7e3dd
MT
2343 goto out;
2344 }
2345
d6968fca 2346 if (core->ops->set_parent && !core->ops->get_parent) {
d4d7e3dd 2347 pr_warning("%s: %s must implement .get_parent & .set_parent\n",
d6968fca 2348 __func__, core->name);
d1302a36 2349 ret = -EINVAL;
d4d7e3dd
MT
2350 goto out;
2351 }
2352
d6968fca
SB
2353 if (core->ops->set_rate_and_parent &&
2354 !(core->ops->set_parent && core->ops->set_rate)) {
3fa2252b 2355 pr_warn("%s: %s must implement .set_parent & .set_rate\n",
d6968fca 2356 __func__, core->name);
3fa2252b
SB
2357 ret = -EINVAL;
2358 goto out;
2359 }
2360
b2476490 2361 /* throw a WARN if any entries in parent_names are NULL */
d6968fca
SB
2362 for (i = 0; i < core->num_parents; i++)
2363 WARN(!core->parent_names[i],
b2476490 2364 "%s: invalid NULL in %s's .parent_names\n",
d6968fca 2365 __func__, core->name);
b2476490
MT
2366
2367 /*
2368 * Allocate an array of struct clk *'s to avoid unnecessary string
2369 * look-ups of clk's possible parents. This can fail for clocks passed
d6968fca 2370 * in to clk_init during early boot; thus any access to core->parents[]
b2476490
MT
2371 * must always check for a NULL pointer and try to populate it if
2372 * necessary.
2373 *
d6968fca
SB
2374 * If core->parents is not NULL we skip this entire block. This allows
2375 * for clock drivers to statically initialize core->parents.
b2476490 2376 */
d6968fca
SB
2377 if (core->num_parents > 1 && !core->parents) {
2378 core->parents = kcalloc(core->num_parents, sizeof(struct clk *),
96a7ed90 2379 GFP_KERNEL);
b2476490 2380 /*
035a61c3 2381 * clk_core_lookup returns NULL for parents that have not been
b2476490
MT
2382 * clk_init'd; thus any access to clk->parents[] must check
2383 * for a NULL pointer. We can always perform lazy lookups for
2384 * missing parents later on.
2385 */
d6968fca
SB
2386 if (core->parents)
2387 for (i = 0; i < core->num_parents; i++)
2388 core->parents[i] =
2389 clk_core_lookup(core->parent_names[i]);
b2476490
MT
2390 }
2391
d6968fca 2392 core->parent = __clk_init_parent(core);
b2476490
MT
2393
2394 /*
d6968fca 2395 * Populate core->parent if parent has already been __clk_init'd. If
b2476490
MT
2396 * parent has not yet been __clk_init'd then place clk in the orphan
2397 * list. If clk has set the CLK_IS_ROOT flag then place it in the root
2398 * clk list.
2399 *
2400 * Every time a new clk is clk_init'd then we walk the list of orphan
2401 * clocks and re-parent any that are children of the clock currently
2402 * being clk_init'd.
2403 */
e6500344 2404 if (core->parent) {
d6968fca
SB
2405 hlist_add_head(&core->child_node,
2406 &core->parent->children);
e6500344
HS
2407 core->orphan = core->parent->orphan;
2408 } else if (core->flags & CLK_IS_ROOT) {
d6968fca 2409 hlist_add_head(&core->child_node, &clk_root_list);
e6500344
HS
2410 core->orphan = false;
2411 } else {
d6968fca 2412 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
2413 core->orphan = true;
2414 }
b2476490 2415
5279fc40
BB
2416 /*
2417 * Set clk's accuracy. The preferred method is to use
2418 * .recalc_accuracy. For simple clocks and lazy developers the default
2419 * fallback is to use the parent's accuracy. If a clock doesn't have a
2420 * parent (or is orphaned) then accuracy is set to zero (perfect
2421 * clock).
2422 */
d6968fca
SB
2423 if (core->ops->recalc_accuracy)
2424 core->accuracy = core->ops->recalc_accuracy(core->hw,
2425 __clk_get_accuracy(core->parent));
2426 else if (core->parent)
2427 core->accuracy = core->parent->accuracy;
5279fc40 2428 else
d6968fca 2429 core->accuracy = 0;
5279fc40 2430
9824cf73
MR
2431 /*
2432 * Set clk's phase.
2433 * Since a phase is by definition relative to its parent, just
2434 * query the current clock phase, or just assume it's in phase.
2435 */
d6968fca
SB
2436 if (core->ops->get_phase)
2437 core->phase = core->ops->get_phase(core->hw);
9824cf73 2438 else
d6968fca 2439 core->phase = 0;
9824cf73 2440
b2476490
MT
2441 /*
2442 * Set clk's rate. The preferred method is to use .recalc_rate. For
2443 * simple clocks and lazy developers the default fallback is to use the
2444 * parent's rate. If a clock doesn't have a parent (or is orphaned)
2445 * then rate is set to zero.
2446 */
d6968fca
SB
2447 if (core->ops->recalc_rate)
2448 rate = core->ops->recalc_rate(core->hw,
2449 clk_core_get_rate_nolock(core->parent));
2450 else if (core->parent)
2451 rate = core->parent->rate;
b2476490 2452 else
1c8e6004 2453 rate = 0;
d6968fca 2454 core->rate = core->req_rate = rate;
b2476490
MT
2455
2456 /*
2457 * walk the list of orphan clocks and reparent any that are children of
2458 * this clock
2459 */
b67bfe0d 2460 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
12d29886 2461 if (orphan->num_parents && orphan->ops->get_parent) {
1f61e5f1 2462 i = orphan->ops->get_parent(orphan->hw);
9054a31d
MR
2463 if (i >= 0 && i < orphan->num_parents &&
2464 !strcmp(core->name, orphan->parent_names[i]))
d6968fca 2465 clk_core_reparent(orphan, core);
1f61e5f1
MF
2466 continue;
2467 }
2468
b2476490 2469 for (i = 0; i < orphan->num_parents; i++)
d6968fca
SB
2470 if (!strcmp(core->name, orphan->parent_names[i])) {
2471 clk_core_reparent(orphan, core);
b2476490
MT
2472 break;
2473 }
1f61e5f1 2474 }
b2476490
MT
2475
2476 /*
2477 * optional platform-specific magic
2478 *
2479 * The .init callback is not used by any of the basic clock types, but
2480 * exists for weird hardware that must perform initialization magic.
2481 * Please consider other ways of solving initialization problems before
24ee1a08 2482 * using this callback, as its use is discouraged.
b2476490 2483 */
d6968fca
SB
2484 if (core->ops->init)
2485 core->ops->init(core->hw);
b2476490 2486
d6968fca 2487 kref_init(&core->ref);
b2476490 2488out:
eab89f69 2489 clk_prepare_unlock();
b2476490 2490
89f7e9de 2491 if (!ret)
d6968fca 2492 clk_debug_register(core);
89f7e9de 2493
d1302a36 2494 return ret;
b2476490
MT
2495}
2496
035a61c3
TV
2497struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
2498 const char *con_id)
0197b3ea 2499{
0197b3ea
SK
2500 struct clk *clk;
2501
035a61c3 2502 /* This is to allow this function to be chained to others */
c1de1357 2503 if (IS_ERR_OR_NULL(hw))
035a61c3 2504 return (struct clk *) hw;
0197b3ea 2505
035a61c3
TV
2506 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2507 if (!clk)
2508 return ERR_PTR(-ENOMEM);
2509
2510 clk->core = hw->core;
2511 clk->dev_id = dev_id;
2512 clk->con_id = con_id;
1c8e6004
TV
2513 clk->max_rate = ULONG_MAX;
2514
2515 clk_prepare_lock();
50595f8b 2516 hlist_add_head(&clk->clks_node, &hw->core->clks);
1c8e6004 2517 clk_prepare_unlock();
0197b3ea
SK
2518
2519 return clk;
2520}
035a61c3 2521
73e0e496 2522void __clk_free_clk(struct clk *clk)
1c8e6004
TV
2523{
2524 clk_prepare_lock();
50595f8b 2525 hlist_del(&clk->clks_node);
1c8e6004
TV
2526 clk_prepare_unlock();
2527
2528 kfree(clk);
2529}
0197b3ea 2530
293ba3b4
SB
2531/**
2532 * clk_register - allocate a new clock, register it and return an opaque cookie
2533 * @dev: device that is registering this clock
2534 * @hw: link to hardware-specific clock data
2535 *
2536 * clk_register is the primary interface for populating the clock tree with new
2537 * clock nodes. It returns a pointer to the newly allocated struct clk which
a59a5163 2538 * cannot be dereferenced by driver code but may be used in conjunction with the
293ba3b4
SB
2539 * rest of the clock API. In the event of an error clk_register will return an
2540 * error code; drivers must test for an error code after calling clk_register.
2541 */
2542struct clk *clk_register(struct device *dev, struct clk_hw *hw)
b2476490 2543{
d1302a36 2544 int i, ret;
d6968fca 2545 struct clk_core *core;
293ba3b4 2546
d6968fca
SB
2547 core = kzalloc(sizeof(*core), GFP_KERNEL);
2548 if (!core) {
293ba3b4
SB
2549 ret = -ENOMEM;
2550 goto fail_out;
2551 }
b2476490 2552
d6968fca
SB
2553 core->name = kstrdup_const(hw->init->name, GFP_KERNEL);
2554 if (!core->name) {
0197b3ea
SK
2555 ret = -ENOMEM;
2556 goto fail_name;
2557 }
d6968fca 2558 core->ops = hw->init->ops;
ac2df527 2559 if (dev && dev->driver)
d6968fca
SB
2560 core->owner = dev->driver->owner;
2561 core->hw = hw;
2562 core->flags = hw->init->flags;
2563 core->num_parents = hw->init->num_parents;
9783c0d9
SB
2564 core->min_rate = 0;
2565 core->max_rate = ULONG_MAX;
d6968fca 2566 hw->core = core;
b2476490 2567
d1302a36 2568 /* allocate local copy in case parent_names is __initdata */
d6968fca 2569 core->parent_names = kcalloc(core->num_parents, sizeof(char *),
96a7ed90 2570 GFP_KERNEL);
d1302a36 2571
d6968fca 2572 if (!core->parent_names) {
d1302a36
MT
2573 ret = -ENOMEM;
2574 goto fail_parent_names;
2575 }
2576
2577
2578 /* copy each string name in case parent_names is __initdata */
d6968fca
SB
2579 for (i = 0; i < core->num_parents; i++) {
2580 core->parent_names[i] = kstrdup_const(hw->init->parent_names[i],
0197b3ea 2581 GFP_KERNEL);
d6968fca 2582 if (!core->parent_names[i]) {
d1302a36
MT
2583 ret = -ENOMEM;
2584 goto fail_parent_names_copy;
2585 }
2586 }
2587
d6968fca 2588 INIT_HLIST_HEAD(&core->clks);
1c8e6004 2589
035a61c3
TV
2590 hw->clk = __clk_create_clk(hw, NULL, NULL);
2591 if (IS_ERR(hw->clk)) {
035a61c3
TV
2592 ret = PTR_ERR(hw->clk);
2593 goto fail_parent_names_copy;
2594 }
2595
2596 ret = __clk_init(dev, hw->clk);
d1302a36 2597 if (!ret)
035a61c3 2598 return hw->clk;
b2476490 2599
1c8e6004 2600 __clk_free_clk(hw->clk);
035a61c3 2601 hw->clk = NULL;
b2476490 2602
d1302a36
MT
2603fail_parent_names_copy:
2604 while (--i >= 0)
d6968fca
SB
2605 kfree_const(core->parent_names[i]);
2606 kfree(core->parent_names);
d1302a36 2607fail_parent_names:
d6968fca 2608 kfree_const(core->name);
0197b3ea 2609fail_name:
d6968fca 2610 kfree(core);
d1302a36
MT
2611fail_out:
2612 return ERR_PTR(ret);
b2476490
MT
2613}
2614EXPORT_SYMBOL_GPL(clk_register);
2615
6e5ab41b 2616/* Free memory allocated for a clock. */
fcb0ee6a
SN
2617static void __clk_release(struct kref *ref)
2618{
d6968fca
SB
2619 struct clk_core *core = container_of(ref, struct clk_core, ref);
2620 int i = core->num_parents;
fcb0ee6a 2621
496eadf8
KK
2622 lockdep_assert_held(&prepare_lock);
2623
d6968fca 2624 kfree(core->parents);
fcb0ee6a 2625 while (--i >= 0)
d6968fca 2626 kfree_const(core->parent_names[i]);
fcb0ee6a 2627
d6968fca
SB
2628 kfree(core->parent_names);
2629 kfree_const(core->name);
2630 kfree(core);
fcb0ee6a
SN
2631}
2632
2633/*
2634 * Empty clk_ops for unregistered clocks. These are used temporarily
2635 * after clk_unregister() was called on a clock and until last clock
2636 * consumer calls clk_put() and the struct clk object is freed.
2637 */
2638static int clk_nodrv_prepare_enable(struct clk_hw *hw)
2639{
2640 return -ENXIO;
2641}
2642
2643static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
2644{
2645 WARN_ON_ONCE(1);
2646}
2647
2648static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
2649 unsigned long parent_rate)
2650{
2651 return -ENXIO;
2652}
2653
2654static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
2655{
2656 return -ENXIO;
2657}
2658
2659static const struct clk_ops clk_nodrv_ops = {
2660 .enable = clk_nodrv_prepare_enable,
2661 .disable = clk_nodrv_disable_unprepare,
2662 .prepare = clk_nodrv_prepare_enable,
2663 .unprepare = clk_nodrv_disable_unprepare,
2664 .set_rate = clk_nodrv_set_rate,
2665 .set_parent = clk_nodrv_set_parent,
2666};
2667
1df5c939
MB
2668/**
2669 * clk_unregister - unregister a currently registered clock
2670 * @clk: clock to unregister
1df5c939 2671 */
fcb0ee6a
SN
2672void clk_unregister(struct clk *clk)
2673{
2674 unsigned long flags;
2675
6314b679
SB
2676 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
2677 return;
2678
035a61c3 2679 clk_debug_unregister(clk->core);
fcb0ee6a
SN
2680
2681 clk_prepare_lock();
2682
035a61c3
TV
2683 if (clk->core->ops == &clk_nodrv_ops) {
2684 pr_err("%s: unregistered clock: %s\n", __func__,
2685 clk->core->name);
6314b679 2686 return;
fcb0ee6a
SN
2687 }
2688 /*
2689 * Assign empty clock ops for consumers that might still hold
2690 * a reference to this clock.
2691 */
2692 flags = clk_enable_lock();
035a61c3 2693 clk->core->ops = &clk_nodrv_ops;
fcb0ee6a
SN
2694 clk_enable_unlock(flags);
2695
035a61c3
TV
2696 if (!hlist_empty(&clk->core->children)) {
2697 struct clk_core *child;
874f224c 2698 struct hlist_node *t;
fcb0ee6a
SN
2699
2700 /* Reparent all children to the orphan list. */
035a61c3
TV
2701 hlist_for_each_entry_safe(child, t, &clk->core->children,
2702 child_node)
2703 clk_core_set_parent(child, NULL);
fcb0ee6a
SN
2704 }
2705
035a61c3 2706 hlist_del_init(&clk->core->child_node);
fcb0ee6a 2707
035a61c3 2708 if (clk->core->prepare_count)
fcb0ee6a 2709 pr_warn("%s: unregistering prepared clock: %s\n",
035a61c3
TV
2710 __func__, clk->core->name);
2711 kref_put(&clk->core->ref, __clk_release);
6314b679 2712
fcb0ee6a
SN
2713 clk_prepare_unlock();
2714}
1df5c939
MB
2715EXPORT_SYMBOL_GPL(clk_unregister);
2716
46c8773a
SB
2717static void devm_clk_release(struct device *dev, void *res)
2718{
293ba3b4 2719 clk_unregister(*(struct clk **)res);
46c8773a
SB
2720}
2721
2722/**
2723 * devm_clk_register - resource managed clk_register()
2724 * @dev: device that is registering this clock
2725 * @hw: link to hardware-specific clock data
2726 *
2727 * Managed clk_register(). Clocks returned from this function are
2728 * automatically clk_unregister()ed on driver detach. See clk_register() for
2729 * more information.
2730 */
2731struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
2732{
2733 struct clk *clk;
293ba3b4 2734 struct clk **clkp;
46c8773a 2735
293ba3b4
SB
2736 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
2737 if (!clkp)
46c8773a
SB
2738 return ERR_PTR(-ENOMEM);
2739
293ba3b4
SB
2740 clk = clk_register(dev, hw);
2741 if (!IS_ERR(clk)) {
2742 *clkp = clk;
2743 devres_add(dev, clkp);
46c8773a 2744 } else {
293ba3b4 2745 devres_free(clkp);
46c8773a
SB
2746 }
2747
2748 return clk;
2749}
2750EXPORT_SYMBOL_GPL(devm_clk_register);
2751
2752static int devm_clk_match(struct device *dev, void *res, void *data)
2753{
2754 struct clk *c = res;
2755 if (WARN_ON(!c))
2756 return 0;
2757 return c == data;
2758}
2759
2760/**
2761 * devm_clk_unregister - resource managed clk_unregister()
2762 * @clk: clock to unregister
2763 *
2764 * Deallocate a clock allocated with devm_clk_register(). Normally
2765 * this function will not need to be called and the resource management
2766 * code will ensure that the resource is freed.
2767 */
2768void devm_clk_unregister(struct device *dev, struct clk *clk)
2769{
2770 WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
2771}
2772EXPORT_SYMBOL_GPL(devm_clk_unregister);
2773
ac2df527
SN
2774/*
2775 * clkdev helpers
2776 */
2777int __clk_get(struct clk *clk)
2778{
035a61c3
TV
2779 struct clk_core *core = !clk ? NULL : clk->core;
2780
2781 if (core) {
2782 if (!try_module_get(core->owner))
00efcb1c 2783 return 0;
ac2df527 2784
035a61c3 2785 kref_get(&core->ref);
00efcb1c 2786 }
ac2df527
SN
2787 return 1;
2788}
2789
2790void __clk_put(struct clk *clk)
2791{
10cdfe54
TV
2792 struct module *owner;
2793
00efcb1c 2794 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
ac2df527
SN
2795 return;
2796
fcb0ee6a 2797 clk_prepare_lock();
1c8e6004 2798
50595f8b 2799 hlist_del(&clk->clks_node);
ec02ace8
TV
2800 if (clk->min_rate > clk->core->req_rate ||
2801 clk->max_rate < clk->core->req_rate)
2802 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
2803
1c8e6004
TV
2804 owner = clk->core->owner;
2805 kref_put(&clk->core->ref, __clk_release);
2806
fcb0ee6a
SN
2807 clk_prepare_unlock();
2808
10cdfe54 2809 module_put(owner);
035a61c3 2810
035a61c3 2811 kfree(clk);
ac2df527
SN
2812}
2813
b2476490
MT
2814/*** clk rate change notifiers ***/
2815
2816/**
2817 * clk_notifier_register - add a clk rate change notifier
2818 * @clk: struct clk * to watch
2819 * @nb: struct notifier_block * with callback info
2820 *
2821 * Request notification when clk's rate changes. This uses an SRCU
2822 * notifier because we want it to block and notifier unregistrations are
2823 * uncommon. The callbacks associated with the notifier must not
2824 * re-enter into the clk framework by calling any top-level clk APIs;
2825 * this will cause a nested prepare_lock mutex.
2826 *
198bb594
MY
2827 * In all notification cases (pre, post and abort rate change) the original
2828 * clock rate is passed to the callback via struct clk_notifier_data.old_rate
2829 * and the new frequency is passed via struct clk_notifier_data.new_rate.
b2476490 2830 *
b2476490
MT
2831 * clk_notifier_register() must be called from non-atomic context.
2832 * Returns -EINVAL if called with null arguments, -ENOMEM upon
2833 * allocation failure; otherwise, passes along the return value of
2834 * srcu_notifier_chain_register().
2835 */
2836int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
2837{
2838 struct clk_notifier *cn;
2839 int ret = -ENOMEM;
2840
2841 if (!clk || !nb)
2842 return -EINVAL;
2843
eab89f69 2844 clk_prepare_lock();
b2476490
MT
2845
2846 /* search the list of notifiers for this clk */
2847 list_for_each_entry(cn, &clk_notifier_list, node)
2848 if (cn->clk == clk)
2849 break;
2850
2851 /* if clk wasn't in the notifier list, allocate new clk_notifier */
2852 if (cn->clk != clk) {
2853 cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL);
2854 if (!cn)
2855 goto out;
2856
2857 cn->clk = clk;
2858 srcu_init_notifier_head(&cn->notifier_head);
2859
2860 list_add(&cn->node, &clk_notifier_list);
2861 }
2862
2863 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
2864
035a61c3 2865 clk->core->notifier_count++;
b2476490
MT
2866
2867out:
eab89f69 2868 clk_prepare_unlock();
b2476490
MT
2869
2870 return ret;
2871}
2872EXPORT_SYMBOL_GPL(clk_notifier_register);
2873
2874/**
2875 * clk_notifier_unregister - remove a clk rate change notifier
2876 * @clk: struct clk *
2877 * @nb: struct notifier_block * with callback info
2878 *
2879 * Request no further notification for changes to 'clk' and frees memory
2880 * allocated in clk_notifier_register.
2881 *
2882 * Returns -EINVAL if called with null arguments; otherwise, passes
2883 * along the return value of srcu_notifier_chain_unregister().
2884 */
2885int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
2886{
2887 struct clk_notifier *cn = NULL;
2888 int ret = -EINVAL;
2889
2890 if (!clk || !nb)
2891 return -EINVAL;
2892
eab89f69 2893 clk_prepare_lock();
b2476490
MT
2894
2895 list_for_each_entry(cn, &clk_notifier_list, node)
2896 if (cn->clk == clk)
2897 break;
2898
2899 if (cn->clk == clk) {
2900 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
2901
035a61c3 2902 clk->core->notifier_count--;
b2476490
MT
2903
2904 /* XXX the notifier code should handle this better */
2905 if (!cn->notifier_head.head) {
2906 srcu_cleanup_notifier_head(&cn->notifier_head);
72b5322f 2907 list_del(&cn->node);
b2476490
MT
2908 kfree(cn);
2909 }
2910
2911 } else {
2912 ret = -ENOENT;
2913 }
2914
eab89f69 2915 clk_prepare_unlock();
b2476490
MT
2916
2917 return ret;
2918}
2919EXPORT_SYMBOL_GPL(clk_notifier_unregister);
766e6a4e
GL
2920
2921#ifdef CONFIG_OF
2922/**
2923 * struct of_clk_provider - Clock provider registration structure
2924 * @link: Entry in global list of clock providers
2925 * @node: Pointer to device tree node of clock provider
2926 * @get: Get clock callback. Returns NULL or a struct clk for the
2927 * given clock specifier
2928 * @data: context pointer to be passed into @get callback
2929 */
2930struct of_clk_provider {
2931 struct list_head link;
2932
2933 struct device_node *node;
2934 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
2935 void *data;
2936};
2937
f2f6c255
PG
2938static const struct of_device_id __clk_of_table_sentinel
2939 __used __section(__clk_of_table_end);
2940
766e6a4e 2941static LIST_HEAD(of_clk_providers);
d6782c26
SN
2942static DEFINE_MUTEX(of_clk_mutex);
2943
766e6a4e
GL
2944struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
2945 void *data)
2946{
2947 return data;
2948}
2949EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
2950
494bfec9
SG
2951struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
2952{
2953 struct clk_onecell_data *clk_data = data;
2954 unsigned int idx = clkspec->args[0];
2955
2956 if (idx >= clk_data->clk_num) {
7e96353c 2957 pr_err("%s: invalid clock index %u\n", __func__, idx);
494bfec9
SG
2958 return ERR_PTR(-EINVAL);
2959 }
2960
2961 return clk_data->clks[idx];
2962}
2963EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
2964
766e6a4e
GL
2965/**
2966 * of_clk_add_provider() - Register a clock provider for a node
2967 * @np: Device node pointer associated with clock provider
2968 * @clk_src_get: callback for decoding clock
2969 * @data: context pointer for @clk_src_get callback.
2970 */
2971int of_clk_add_provider(struct device_node *np,
2972 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
2973 void *data),
2974 void *data)
2975{
2976 struct of_clk_provider *cp;
86be408b 2977 int ret;
766e6a4e
GL
2978
2979 cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL);
2980 if (!cp)
2981 return -ENOMEM;
2982
2983 cp->node = of_node_get(np);
2984 cp->data = data;
2985 cp->get = clk_src_get;
2986
d6782c26 2987 mutex_lock(&of_clk_mutex);
766e6a4e 2988 list_add(&cp->link, &of_clk_providers);
d6782c26 2989 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2990 pr_debug("Added clock from %s\n", np->full_name);
2991
86be408b
SN
2992 ret = of_clk_set_defaults(np, true);
2993 if (ret < 0)
2994 of_clk_del_provider(np);
2995
2996 return ret;
766e6a4e
GL
2997}
2998EXPORT_SYMBOL_GPL(of_clk_add_provider);
2999
3000/**
3001 * of_clk_del_provider() - Remove a previously registered clock provider
3002 * @np: Device node pointer associated with clock provider
3003 */
3004void of_clk_del_provider(struct device_node *np)
3005{
3006 struct of_clk_provider *cp;
3007
d6782c26 3008 mutex_lock(&of_clk_mutex);
766e6a4e
GL
3009 list_for_each_entry(cp, &of_clk_providers, link) {
3010 if (cp->node == np) {
3011 list_del(&cp->link);
3012 of_node_put(cp->node);
3013 kfree(cp);
3014 break;
3015 }
3016 }
d6782c26 3017 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
3018}
3019EXPORT_SYMBOL_GPL(of_clk_del_provider);
3020
73e0e496
SB
3021struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
3022 const char *dev_id, const char *con_id)
766e6a4e
GL
3023{
3024 struct of_clk_provider *provider;
a34cd466 3025 struct clk *clk = ERR_PTR(-EPROBE_DEFER);
766e6a4e 3026
306c342f
SB
3027 if (!clkspec)
3028 return ERR_PTR(-EINVAL);
3029
766e6a4e 3030 /* Check if we have such a provider in our array */
306c342f 3031 mutex_lock(&of_clk_mutex);
766e6a4e
GL
3032 list_for_each_entry(provider, &of_clk_providers, link) {
3033 if (provider->node == clkspec->np)
3034 clk = provider->get(clkspec, provider->data);
73e0e496
SB
3035 if (!IS_ERR(clk)) {
3036 clk = __clk_create_clk(__clk_get_hw(clk), dev_id,
3037 con_id);
3038
3039 if (!IS_ERR(clk) && !__clk_get(clk)) {
3040 __clk_free_clk(clk);
3041 clk = ERR_PTR(-ENOENT);
3042 }
3043
766e6a4e 3044 break;
73e0e496 3045 }
766e6a4e 3046 }
306c342f 3047 mutex_unlock(&of_clk_mutex);
d6782c26
SN
3048
3049 return clk;
3050}
3051
306c342f
SB
3052/**
3053 * of_clk_get_from_provider() - Lookup a clock from a clock provider
3054 * @clkspec: pointer to a clock specifier data structure
3055 *
3056 * This function looks up a struct clk from the registered list of clock
3057 * providers, an input is a clock specifier data structure as returned
3058 * from the of_parse_phandle_with_args() function call.
3059 */
d6782c26
SN
3060struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
3061{
306c342f 3062 return __of_clk_get_from_provider(clkspec, NULL, __func__);
766e6a4e
GL
3063}
3064
f6102742
MT
3065int of_clk_get_parent_count(struct device_node *np)
3066{
3067 return of_count_phandle_with_args(np, "clocks", "#clock-cells");
3068}
3069EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
3070
766e6a4e
GL
3071const char *of_clk_get_parent_name(struct device_node *np, int index)
3072{
3073 struct of_phandle_args clkspec;
7a0fc1a3 3074 struct property *prop;
766e6a4e 3075 const char *clk_name;
7a0fc1a3
BD
3076 const __be32 *vp;
3077 u32 pv;
766e6a4e 3078 int rc;
7a0fc1a3 3079 int count;
0a4807c2 3080 struct clk *clk;
766e6a4e 3081
766e6a4e
GL
3082 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
3083 &clkspec);
3084 if (rc)
3085 return NULL;
3086
7a0fc1a3
BD
3087 index = clkspec.args_count ? clkspec.args[0] : 0;
3088 count = 0;
3089
3090 /* if there is an indices property, use it to transfer the index
3091 * specified into an array offset for the clock-output-names property.
3092 */
3093 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
3094 if (index == pv) {
3095 index = count;
3096 break;
3097 }
3098 count++;
3099 }
8da411cc
MY
3100 /* We went off the end of 'clock-indices' without finding it */
3101 if (prop && !vp)
3102 return NULL;
7a0fc1a3 3103
766e6a4e 3104 if (of_property_read_string_index(clkspec.np, "clock-output-names",
7a0fc1a3 3105 index,
0a4807c2
SB
3106 &clk_name) < 0) {
3107 /*
3108 * Best effort to get the name if the clock has been
3109 * registered with the framework. If the clock isn't
3110 * registered, we return the node name as the name of
3111 * the clock as long as #clock-cells = 0.
3112 */
3113 clk = of_clk_get_from_provider(&clkspec);
3114 if (IS_ERR(clk)) {
3115 if (clkspec.args_count == 0)
3116 clk_name = clkspec.np->name;
3117 else
3118 clk_name = NULL;
3119 } else {
3120 clk_name = __clk_get_name(clk);
3121 clk_put(clk);
3122 }
3123 }
3124
766e6a4e
GL
3125
3126 of_node_put(clkspec.np);
3127 return clk_name;
3128}
3129EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
3130
2e61dfb3
DN
3131/**
3132 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
3133 * number of parents
3134 * @np: Device node pointer associated with clock provider
3135 * @parents: pointer to char array that hold the parents' names
3136 * @size: size of the @parents array
3137 *
3138 * Return: number of parents for the clock node.
3139 */
3140int of_clk_parent_fill(struct device_node *np, const char **parents,
3141 unsigned int size)
3142{
3143 unsigned int i = 0;
3144
3145 while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
3146 i++;
3147
3148 return i;
3149}
3150EXPORT_SYMBOL_GPL(of_clk_parent_fill);
3151
1771b10d
GC
3152struct clock_provider {
3153 of_clk_init_cb_t clk_init_cb;
3154 struct device_node *np;
3155 struct list_head node;
3156};
3157
1771b10d
GC
3158/*
3159 * This function looks for a parent clock. If there is one, then it
3160 * checks that the provider for this parent clock was initialized, in
3161 * this case the parent clock will be ready.
3162 */
3163static int parent_ready(struct device_node *np)
3164{
3165 int i = 0;
3166
3167 while (true) {
3168 struct clk *clk = of_clk_get(np, i);
3169
3170 /* this parent is ready we can check the next one */
3171 if (!IS_ERR(clk)) {
3172 clk_put(clk);
3173 i++;
3174 continue;
3175 }
3176
3177 /* at least one parent is not ready, we exit now */
3178 if (PTR_ERR(clk) == -EPROBE_DEFER)
3179 return 0;
3180
3181 /*
3182 * Here we make assumption that the device tree is
3183 * written correctly. So an error means that there is
3184 * no more parent. As we didn't exit yet, then the
3185 * previous parent are ready. If there is no clock
3186 * parent, no need to wait for them, then we can
3187 * consider their absence as being ready
3188 */
3189 return 1;
3190 }
3191}
3192
766e6a4e
GL
3193/**
3194 * of_clk_init() - Scan and init clock providers from the DT
3195 * @matches: array of compatible values and init functions for providers.
3196 *
1771b10d 3197 * This function scans the device tree for matching clock providers
e5ca8fb4 3198 * and calls their initialization functions. It also does it by trying
1771b10d 3199 * to follow the dependencies.
766e6a4e
GL
3200 */
3201void __init of_clk_init(const struct of_device_id *matches)
3202{
7f7ed584 3203 const struct of_device_id *match;
766e6a4e 3204 struct device_node *np;
1771b10d
GC
3205 struct clock_provider *clk_provider, *next;
3206 bool is_init_done;
3207 bool force = false;
2573a02a 3208 LIST_HEAD(clk_provider_list);
766e6a4e 3209
f2f6c255 3210 if (!matches)
819b4861 3211 matches = &__clk_of_table;
f2f6c255 3212
1771b10d 3213 /* First prepare the list of the clocks providers */
7f7ed584 3214 for_each_matching_node_and_match(np, matches, &match) {
2e3b19f1
SB
3215 struct clock_provider *parent;
3216
3217 parent = kzalloc(sizeof(*parent), GFP_KERNEL);
3218 if (!parent) {
3219 list_for_each_entry_safe(clk_provider, next,
3220 &clk_provider_list, node) {
3221 list_del(&clk_provider->node);
6bc9d9d6 3222 of_node_put(clk_provider->np);
2e3b19f1
SB
3223 kfree(clk_provider);
3224 }
6bc9d9d6 3225 of_node_put(np);
2e3b19f1
SB
3226 return;
3227 }
1771b10d
GC
3228
3229 parent->clk_init_cb = match->data;
6bc9d9d6 3230 parent->np = of_node_get(np);
3f6d439f 3231 list_add_tail(&parent->node, &clk_provider_list);
1771b10d
GC
3232 }
3233
3234 while (!list_empty(&clk_provider_list)) {
3235 is_init_done = false;
3236 list_for_each_entry_safe(clk_provider, next,
3237 &clk_provider_list, node) {
3238 if (force || parent_ready(clk_provider->np)) {
86be408b 3239
1771b10d 3240 clk_provider->clk_init_cb(clk_provider->np);
86be408b
SN
3241 of_clk_set_defaults(clk_provider->np, true);
3242
1771b10d 3243 list_del(&clk_provider->node);
6bc9d9d6 3244 of_node_put(clk_provider->np);
1771b10d
GC
3245 kfree(clk_provider);
3246 is_init_done = true;
3247 }
3248 }
3249
3250 /*
e5ca8fb4 3251 * We didn't manage to initialize any of the
1771b10d
GC
3252 * remaining providers during the last loop, so now we
3253 * initialize all the remaining ones unconditionally
3254 * in case the clock parent was not mandatory
3255 */
3256 if (!is_init_done)
3257 force = true;
766e6a4e
GL
3258 }
3259}
3260#endif