Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
[linux-2.6-block.git] / drivers / clk / clk.c
CommitLineData
ebafb63d 1// SPDX-License-Identifier: GPL-2.0
b2476490
MT
2/*
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
5 *
5fb94e9c 6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
b2476490
MT
7 */
8
3c373117 9#include <linux/clk.h>
b09d6d99 10#include <linux/clk-provider.h>
86be408b 11#include <linux/clk/clk-conf.h>
b2476490
MT
12#include <linux/module.h>
13#include <linux/mutex.h>
14#include <linux/spinlock.h>
15#include <linux/err.h>
16#include <linux/list.h>
17#include <linux/slab.h>
766e6a4e 18#include <linux/of.h>
46c8773a 19#include <linux/device.h>
f2f6c255 20#include <linux/init.h>
9a34b453 21#include <linux/pm_runtime.h>
533ddeb1 22#include <linux/sched.h>
562ef0b0 23#include <linux/clkdev.h>
b2476490 24
d6782c26
SN
25#include "clk.h"
26
b2476490
MT
27static DEFINE_SPINLOCK(enable_lock);
28static DEFINE_MUTEX(prepare_lock);
29
533ddeb1
MT
30static struct task_struct *prepare_owner;
31static struct task_struct *enable_owner;
32
33static int prepare_refcnt;
34static int enable_refcnt;
35
b2476490
MT
36static HLIST_HEAD(clk_root_list);
37static HLIST_HEAD(clk_orphan_list);
38static LIST_HEAD(clk_notifier_list);
39
bdcf1dc2
SB
40static struct hlist_head *all_lists[] = {
41 &clk_root_list,
42 &clk_orphan_list,
43 NULL,
44};
45
b09d6d99
MT
46/*** private data structures ***/
47
fc0c209c
SB
48struct clk_parent_map {
49 const struct clk_hw *hw;
50 struct clk_core *core;
51 const char *fw_name;
52 const char *name;
601b6e93 53 int index;
fc0c209c
SB
54};
55
b09d6d99
MT
56struct clk_core {
57 const char *name;
58 const struct clk_ops *ops;
59 struct clk_hw *hw;
60 struct module *owner;
9a34b453 61 struct device *dev;
89a5ddcc 62 struct device_node *of_node;
b09d6d99 63 struct clk_core *parent;
fc0c209c 64 struct clk_parent_map *parents;
b09d6d99
MT
65 u8 num_parents;
66 u8 new_parent_index;
67 unsigned long rate;
1c8e6004 68 unsigned long req_rate;
b09d6d99
MT
69 unsigned long new_rate;
70 struct clk_core *new_parent;
71 struct clk_core *new_child;
72 unsigned long flags;
e6500344 73 bool orphan;
24478839 74 bool rpm_enabled;
b09d6d99
MT
75 unsigned int enable_count;
76 unsigned int prepare_count;
e55a839a 77 unsigned int protect_count;
9783c0d9
SB
78 unsigned long min_rate;
79 unsigned long max_rate;
b09d6d99
MT
80 unsigned long accuracy;
81 int phase;
9fba738a 82 struct clk_duty duty;
b09d6d99
MT
83 struct hlist_head children;
84 struct hlist_node child_node;
1c8e6004 85 struct hlist_head clks;
b09d6d99
MT
86 unsigned int notifier_count;
87#ifdef CONFIG_DEBUG_FS
88 struct dentry *dentry;
8c9a8a8f 89 struct hlist_node debug_node;
b09d6d99
MT
90#endif
91 struct kref ref;
92};
93
dfc202ea
SB
94#define CREATE_TRACE_POINTS
95#include <trace/events/clk.h>
96
b09d6d99
MT
97struct clk {
98 struct clk_core *core;
efa85048 99 struct device *dev;
b09d6d99
MT
100 const char *dev_id;
101 const char *con_id;
1c8e6004
TV
102 unsigned long min_rate;
103 unsigned long max_rate;
55e9b8b7 104 unsigned int exclusive_count;
50595f8b 105 struct hlist_node clks_node;
b09d6d99
MT
106};
107
9a34b453
MS
108/*** runtime pm ***/
109static int clk_pm_runtime_get(struct clk_core *core)
110{
24478839 111 int ret;
9a34b453 112
24478839 113 if (!core->rpm_enabled)
9a34b453
MS
114 return 0;
115
116 ret = pm_runtime_get_sync(core->dev);
64c7d7ea
RW
117 if (ret < 0) {
118 pm_runtime_put_noidle(core->dev);
119 return ret;
120 }
121 return 0;
9a34b453
MS
122}
123
124static void clk_pm_runtime_put(struct clk_core *core)
125{
24478839 126 if (!core->rpm_enabled)
9a34b453
MS
127 return;
128
129 pm_runtime_put_sync(core->dev);
130}
131
eab89f69
MT
132/*** locking ***/
133static void clk_prepare_lock(void)
134{
533ddeb1
MT
135 if (!mutex_trylock(&prepare_lock)) {
136 if (prepare_owner == current) {
137 prepare_refcnt++;
138 return;
139 }
140 mutex_lock(&prepare_lock);
141 }
142 WARN_ON_ONCE(prepare_owner != NULL);
143 WARN_ON_ONCE(prepare_refcnt != 0);
144 prepare_owner = current;
145 prepare_refcnt = 1;
eab89f69
MT
146}
147
148static void clk_prepare_unlock(void)
149{
533ddeb1
MT
150 WARN_ON_ONCE(prepare_owner != current);
151 WARN_ON_ONCE(prepare_refcnt == 0);
152
153 if (--prepare_refcnt)
154 return;
155 prepare_owner = NULL;
eab89f69
MT
156 mutex_unlock(&prepare_lock);
157}
158
159static unsigned long clk_enable_lock(void)
a57aa185 160 __acquires(enable_lock)
eab89f69
MT
161{
162 unsigned long flags;
533ddeb1 163
a12aa8a6
DL
164 /*
165 * On UP systems, spin_trylock_irqsave() always returns true, even if
166 * we already hold the lock. So, in that case, we rely only on
167 * reference counting.
168 */
169 if (!IS_ENABLED(CONFIG_SMP) ||
170 !spin_trylock_irqsave(&enable_lock, flags)) {
533ddeb1
MT
171 if (enable_owner == current) {
172 enable_refcnt++;
a57aa185 173 __acquire(enable_lock);
a12aa8a6
DL
174 if (!IS_ENABLED(CONFIG_SMP))
175 local_save_flags(flags);
533ddeb1
MT
176 return flags;
177 }
178 spin_lock_irqsave(&enable_lock, flags);
179 }
180 WARN_ON_ONCE(enable_owner != NULL);
181 WARN_ON_ONCE(enable_refcnt != 0);
182 enable_owner = current;
183 enable_refcnt = 1;
eab89f69
MT
184 return flags;
185}
186
187static void clk_enable_unlock(unsigned long flags)
a57aa185 188 __releases(enable_lock)
eab89f69 189{
533ddeb1
MT
190 WARN_ON_ONCE(enable_owner != current);
191 WARN_ON_ONCE(enable_refcnt == 0);
192
a57aa185
SB
193 if (--enable_refcnt) {
194 __release(enable_lock);
533ddeb1 195 return;
a57aa185 196 }
533ddeb1 197 enable_owner = NULL;
eab89f69
MT
198 spin_unlock_irqrestore(&enable_lock, flags);
199}
200
e55a839a
JB
201static bool clk_core_rate_is_protected(struct clk_core *core)
202{
203 return core->protect_count;
204}
205
4dff95dc
SB
206static bool clk_core_is_prepared(struct clk_core *core)
207{
9a34b453
MS
208 bool ret = false;
209
4dff95dc
SB
210 /*
211 * .is_prepared is optional for clocks that can prepare
212 * fall back to software usage counter if it is missing
213 */
214 if (!core->ops->is_prepared)
215 return core->prepare_count;
b2476490 216
9a34b453
MS
217 if (!clk_pm_runtime_get(core)) {
218 ret = core->ops->is_prepared(core->hw);
219 clk_pm_runtime_put(core);
220 }
221
222 return ret;
4dff95dc 223}
b2476490 224
4dff95dc
SB
225static bool clk_core_is_enabled(struct clk_core *core)
226{
9a34b453
MS
227 bool ret = false;
228
4dff95dc
SB
229 /*
230 * .is_enabled is only mandatory for clocks that gate
231 * fall back to software usage counter if .is_enabled is missing
232 */
233 if (!core->ops->is_enabled)
234 return core->enable_count;
6b44c854 235
9a34b453
MS
236 /*
237 * Check if clock controller's device is runtime active before
238 * calling .is_enabled callback. If not, assume that clock is
239 * disabled, because we might be called from atomic context, from
240 * which pm_runtime_get() is not allowed.
241 * This function is called mainly from clk_disable_unused_subtree,
242 * which ensures proper runtime pm activation of controller before
243 * taking enable spinlock, but the below check is needed if one tries
244 * to call it from other places.
245 */
24478839 246 if (core->rpm_enabled) {
9a34b453
MS
247 pm_runtime_get_noresume(core->dev);
248 if (!pm_runtime_active(core->dev)) {
249 ret = false;
250 goto done;
251 }
252 }
253
254 ret = core->ops->is_enabled(core->hw);
255done:
24478839 256 if (core->rpm_enabled)
756efe13 257 pm_runtime_put(core->dev);
9a34b453
MS
258
259 return ret;
4dff95dc 260}
6b44c854 261
4dff95dc 262/*** helper functions ***/
1af599df 263
b76281cb 264const char *__clk_get_name(const struct clk *clk)
1af599df 265{
4dff95dc 266 return !clk ? NULL : clk->core->name;
1af599df 267}
4dff95dc 268EXPORT_SYMBOL_GPL(__clk_get_name);
1af599df 269
e7df6f6e 270const char *clk_hw_get_name(const struct clk_hw *hw)
1a9c069c
SB
271{
272 return hw->core->name;
273}
274EXPORT_SYMBOL_GPL(clk_hw_get_name);
275
4dff95dc
SB
276struct clk_hw *__clk_get_hw(struct clk *clk)
277{
278 return !clk ? NULL : clk->core->hw;
279}
280EXPORT_SYMBOL_GPL(__clk_get_hw);
1af599df 281
e7df6f6e 282unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
1a9c069c
SB
283{
284 return hw->core->num_parents;
285}
286EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
287
e7df6f6e 288struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw)
1a9c069c
SB
289{
290 return hw->core->parent ? hw->core->parent->hw : NULL;
291}
292EXPORT_SYMBOL_GPL(clk_hw_get_parent);
293
4dff95dc
SB
294static struct clk_core *__clk_lookup_subtree(const char *name,
295 struct clk_core *core)
bddca894 296{
035a61c3 297 struct clk_core *child;
4dff95dc 298 struct clk_core *ret;
bddca894 299
4dff95dc
SB
300 if (!strcmp(core->name, name))
301 return core;
bddca894 302
4dff95dc
SB
303 hlist_for_each_entry(child, &core->children, child_node) {
304 ret = __clk_lookup_subtree(name, child);
305 if (ret)
306 return ret;
bddca894
PG
307 }
308
4dff95dc 309 return NULL;
bddca894
PG
310}
311
4dff95dc 312static struct clk_core *clk_core_lookup(const char *name)
bddca894 313{
4dff95dc
SB
314 struct clk_core *root_clk;
315 struct clk_core *ret;
bddca894 316
4dff95dc
SB
317 if (!name)
318 return NULL;
bddca894 319
4dff95dc
SB
320 /* search the 'proper' clk tree first */
321 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
322 ret = __clk_lookup_subtree(name, root_clk);
323 if (ret)
324 return ret;
bddca894
PG
325 }
326
4dff95dc
SB
327 /* if not found, then search the orphan tree */
328 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
329 ret = __clk_lookup_subtree(name, root_clk);
330 if (ret)
331 return ret;
332 }
bddca894 333
4dff95dc 334 return NULL;
bddca894
PG
335}
336
4f8c6aba
SB
337#ifdef CONFIG_OF
338static int of_parse_clkspec(const struct device_node *np, int index,
339 const char *name, struct of_phandle_args *out_args);
340static struct clk_hw *
341of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec);
342#else
343static inline int of_parse_clkspec(const struct device_node *np, int index,
344 const char *name,
345 struct of_phandle_args *out_args)
346{
347 return -ENOENT;
348}
349static inline struct clk_hw *
350of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec)
351{
352 return ERR_PTR(-ENOENT);
353}
354#endif
355
fc0c209c 356/**
dde4eff4 357 * clk_core_get - Find the clk_core parent of a clk
fc0c209c 358 * @core: clk to find parent of
1a079560 359 * @p_index: parent index to search for
fc0c209c
SB
360 *
361 * This is the preferred method for clk providers to find the parent of a
362 * clk when that parent is external to the clk controller. The parent_names
363 * array is indexed and treated as a local name matching a string in the device
dde4eff4
SB
364 * node's 'clock-names' property or as the 'con_id' matching the device's
365 * dev_name() in a clk_lookup. This allows clk providers to use their own
fc0c209c
SB
366 * namespace instead of looking for a globally unique parent string.
367 *
368 * For example the following DT snippet would allow a clock registered by the
369 * clock-controller@c001 that has a clk_init_data::parent_data array
370 * with 'xtal' in the 'name' member to find the clock provided by the
371 * clock-controller@f00abcd without needing to get the globally unique name of
372 * the xtal clk.
373 *
374 * parent: clock-controller@f00abcd {
375 * reg = <0xf00abcd 0xabcd>;
376 * #clock-cells = <0>;
377 * };
378 *
379 * clock-controller@c001 {
380 * reg = <0xc001 0xf00d>;
381 * clocks = <&parent>;
382 * clock-names = "xtal";
383 * #clock-cells = <1>;
384 * };
385 *
386 * Returns: -ENOENT when the provider can't be found or the clk doesn't
4f8c6aba
SB
387 * exist in the provider or the name can't be found in the DT node or
388 * in a clkdev lookup. NULL when the provider knows about the clk but it
389 * isn't provided on this system.
fc0c209c
SB
390 * A valid clk_core pointer when the clk can be found in the provider.
391 */
1a079560 392static struct clk_core *clk_core_get(struct clk_core *core, u8 p_index)
fc0c209c 393{
1a079560
SB
394 const char *name = core->parents[p_index].fw_name;
395 int index = core->parents[p_index].index;
dde4eff4
SB
396 struct clk_hw *hw = ERR_PTR(-ENOENT);
397 struct device *dev = core->dev;
398 const char *dev_id = dev ? dev_name(dev) : NULL;
fc0c209c 399 struct device_node *np = core->of_node;
4f8c6aba 400 struct of_phandle_args clkspec;
fc0c209c 401
4f8c6aba
SB
402 if (np && (name || index >= 0) &&
403 !of_parse_clkspec(np, index, name, &clkspec)) {
404 hw = of_clk_get_hw_from_clkspec(&clkspec);
405 of_node_put(clkspec.np);
406 } else if (name) {
407 /*
408 * If the DT search above couldn't find the provider fallback to
409 * looking up via clkdev based clk_lookups.
410 */
dde4eff4 411 hw = clk_find_hw(dev_id, name);
4f8c6aba 412 }
dde4eff4
SB
413
414 if (IS_ERR(hw))
fc0c209c
SB
415 return ERR_CAST(hw);
416
417 return hw->core;
418}
419
420static void clk_core_fill_parent_index(struct clk_core *core, u8 index)
421{
422 struct clk_parent_map *entry = &core->parents[index];
6a178497 423 struct clk_core *parent;
fc0c209c
SB
424
425 if (entry->hw) {
426 parent = entry->hw->core;
427 /*
428 * We have a direct reference but it isn't registered yet?
429 * Orphan it and let clk_reparent() update the orphan status
430 * when the parent is registered.
431 */
432 if (!parent)
433 parent = ERR_PTR(-EPROBE_DEFER);
434 } else {
1a079560 435 parent = clk_core_get(core, index);
45586c70 436 if (PTR_ERR(parent) == -ENOENT && entry->name)
fc0c209c
SB
437 parent = clk_core_lookup(entry->name);
438 }
439
440 /* Only cache it if it's not an error */
441 if (!IS_ERR(parent))
442 entry->core = parent;
443}
444
4dff95dc
SB
445static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
446 u8 index)
bddca894 447{
fc0c209c 448 if (!core || index >= core->num_parents || !core->parents)
4dff95dc 449 return NULL;
88cfbef2 450
fc0c209c
SB
451 if (!core->parents[index].core)
452 clk_core_fill_parent_index(core, index);
88cfbef2 453
fc0c209c 454 return core->parents[index].core;
bddca894
PG
455}
456
e7df6f6e
SB
457struct clk_hw *
458clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
1a9c069c
SB
459{
460 struct clk_core *parent;
461
462 parent = clk_core_get_parent_by_index(hw->core, index);
463
464 return !parent ? NULL : parent->hw;
465}
466EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
467
4dff95dc
SB
468unsigned int __clk_get_enable_count(struct clk *clk)
469{
470 return !clk ? 0 : clk->core->enable_count;
471}
b2476490 472
4dff95dc
SB
473static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
474{
73d4f945
SB
475 if (!core)
476 return 0;
c646cbf1 477
73d4f945
SB
478 if (!core->num_parents || core->parent)
479 return core->rate;
b2476490 480
73d4f945
SB
481 /*
482 * Clk must have a parent because num_parents > 0 but the parent isn't
483 * known yet. Best to return 0 as the rate of this clk until we can
484 * properly recalc the rate based on the parent's rate.
485 */
486 return 0;
b2476490
MT
487}
488
e7df6f6e 489unsigned long clk_hw_get_rate(const struct clk_hw *hw)
1a9c069c
SB
490{
491 return clk_core_get_rate_nolock(hw->core);
492}
493EXPORT_SYMBOL_GPL(clk_hw_get_rate);
494
0daa376d 495static unsigned long clk_core_get_accuracy_no_lock(struct clk_core *core)
4dff95dc
SB
496{
497 if (!core)
498 return 0;
b2476490 499
4dff95dc 500 return core->accuracy;
b2476490
MT
501}
502
e7df6f6e 503unsigned long clk_hw_get_flags(const struct clk_hw *hw)
1a9c069c
SB
504{
505 return hw->core->flags;
506}
507EXPORT_SYMBOL_GPL(clk_hw_get_flags);
508
e7df6f6e 509bool clk_hw_is_prepared(const struct clk_hw *hw)
1a9c069c
SB
510{
511 return clk_core_is_prepared(hw->core);
512}
12aa377b 513EXPORT_SYMBOL_GPL(clk_hw_is_prepared);
1a9c069c 514
e55a839a
JB
515bool clk_hw_rate_is_protected(const struct clk_hw *hw)
516{
517 return clk_core_rate_is_protected(hw->core);
518}
12aa377b 519EXPORT_SYMBOL_GPL(clk_hw_rate_is_protected);
e55a839a 520
be68bf88
JE
521bool clk_hw_is_enabled(const struct clk_hw *hw)
522{
523 return clk_core_is_enabled(hw->core);
524}
12aa377b 525EXPORT_SYMBOL_GPL(clk_hw_is_enabled);
be68bf88 526
4dff95dc 527bool __clk_is_enabled(struct clk *clk)
b2476490 528{
4dff95dc
SB
529 if (!clk)
530 return false;
b2476490 531
4dff95dc
SB
532 return clk_core_is_enabled(clk->core);
533}
534EXPORT_SYMBOL_GPL(__clk_is_enabled);
b2476490 535
4dff95dc
SB
536static bool mux_is_better_rate(unsigned long rate, unsigned long now,
537 unsigned long best, unsigned long flags)
538{
539 if (flags & CLK_MUX_ROUND_CLOSEST)
540 return abs(now - rate) < abs(best - rate);
1af599df 541
4dff95dc
SB
542 return now <= rate && now > best;
543}
bddca894 544
4ad69b80
JB
545int clk_mux_determine_rate_flags(struct clk_hw *hw,
546 struct clk_rate_request *req,
547 unsigned long flags)
4dff95dc
SB
548{
549 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
0817b62c
BB
550 int i, num_parents, ret;
551 unsigned long best = 0;
552 struct clk_rate_request parent_req = *req;
b2476490 553
4dff95dc
SB
554 /* if NO_REPARENT flag set, pass through to current parent */
555 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
556 parent = core->parent;
0817b62c
BB
557 if (core->flags & CLK_SET_RATE_PARENT) {
558 ret = __clk_determine_rate(parent ? parent->hw : NULL,
559 &parent_req);
560 if (ret)
561 return ret;
562
563 best = parent_req.rate;
564 } else if (parent) {
4dff95dc 565 best = clk_core_get_rate_nolock(parent);
0817b62c 566 } else {
4dff95dc 567 best = clk_core_get_rate_nolock(core);
0817b62c
BB
568 }
569
4dff95dc
SB
570 goto out;
571 }
b2476490 572
4dff95dc
SB
573 /* find the parent that can provide the fastest rate <= rate */
574 num_parents = core->num_parents;
575 for (i = 0; i < num_parents; i++) {
576 parent = clk_core_get_parent_by_index(core, i);
577 if (!parent)
578 continue;
0817b62c
BB
579
580 if (core->flags & CLK_SET_RATE_PARENT) {
581 parent_req = *req;
582 ret = __clk_determine_rate(parent->hw, &parent_req);
583 if (ret)
584 continue;
585 } else {
586 parent_req.rate = clk_core_get_rate_nolock(parent);
587 }
588
589 if (mux_is_better_rate(req->rate, parent_req.rate,
590 best, flags)) {
4dff95dc 591 best_parent = parent;
0817b62c 592 best = parent_req.rate;
4dff95dc
SB
593 }
594 }
b2476490 595
57d866e6
BB
596 if (!best_parent)
597 return -EINVAL;
598
4dff95dc
SB
599out:
600 if (best_parent)
0817b62c
BB
601 req->best_parent_hw = best_parent->hw;
602 req->best_parent_rate = best;
603 req->rate = best;
b2476490 604
0817b62c 605 return 0;
b33d212f 606}
4ad69b80 607EXPORT_SYMBOL_GPL(clk_mux_determine_rate_flags);
4dff95dc
SB
608
609struct clk *__clk_lookup(const char *name)
fcb0ee6a 610{
4dff95dc
SB
611 struct clk_core *core = clk_core_lookup(name);
612
613 return !core ? NULL : core->hw->clk;
fcb0ee6a 614}
b2476490 615
4dff95dc
SB
616static void clk_core_get_boundaries(struct clk_core *core,
617 unsigned long *min_rate,
618 unsigned long *max_rate)
1c155b3d 619{
4dff95dc 620 struct clk *clk_user;
1c155b3d 621
9f776722
LC
622 lockdep_assert_held(&prepare_lock);
623
9783c0d9
SB
624 *min_rate = core->min_rate;
625 *max_rate = core->max_rate;
496eadf8 626
4dff95dc
SB
627 hlist_for_each_entry(clk_user, &core->clks, clks_node)
628 *min_rate = max(*min_rate, clk_user->min_rate);
1c155b3d 629
4dff95dc
SB
630 hlist_for_each_entry(clk_user, &core->clks, clks_node)
631 *max_rate = min(*max_rate, clk_user->max_rate);
632}
1c155b3d 633
9783c0d9
SB
634void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
635 unsigned long max_rate)
636{
637 hw->core->min_rate = min_rate;
638 hw->core->max_rate = max_rate;
639}
640EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
641
4dff95dc 642/*
777c1a40
SB
643 * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk
644 * @hw: mux type clk to determine rate on
645 * @req: rate request, also used to return preferred parent and frequencies
646 *
4dff95dc
SB
647 * Helper for finding best parent to provide a given frequency. This can be used
648 * directly as a determine_rate callback (e.g. for a mux), or from a more
649 * complex clock that may combine a mux with other operations.
777c1a40
SB
650 *
651 * Returns: 0 on success, -EERROR value on error
4dff95dc 652 */
0817b62c
BB
653int __clk_mux_determine_rate(struct clk_hw *hw,
654 struct clk_rate_request *req)
4dff95dc 655{
0817b62c 656 return clk_mux_determine_rate_flags(hw, req, 0);
1c155b3d 657}
4dff95dc 658EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
1c155b3d 659
0817b62c
BB
660int __clk_mux_determine_rate_closest(struct clk_hw *hw,
661 struct clk_rate_request *req)
b2476490 662{
0817b62c 663 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
4dff95dc
SB
664}
665EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
b2476490 666
4dff95dc 667/*** clk api ***/
496eadf8 668
e55a839a
JB
669static void clk_core_rate_unprotect(struct clk_core *core)
670{
671 lockdep_assert_held(&prepare_lock);
672
673 if (!core)
674 return;
675
ab525dcc
FE
676 if (WARN(core->protect_count == 0,
677 "%s already unprotected\n", core->name))
e55a839a
JB
678 return;
679
680 if (--core->protect_count > 0)
681 return;
682
683 clk_core_rate_unprotect(core->parent);
684}
685
686static int clk_core_rate_nuke_protect(struct clk_core *core)
687{
688 int ret;
689
690 lockdep_assert_held(&prepare_lock);
691
692 if (!core)
693 return -EINVAL;
694
695 if (core->protect_count == 0)
696 return 0;
697
698 ret = core->protect_count;
699 core->protect_count = 1;
700 clk_core_rate_unprotect(core);
701
702 return ret;
703}
704
55e9b8b7
JB
705/**
706 * clk_rate_exclusive_put - release exclusivity over clock rate control
707 * @clk: the clk over which the exclusivity is released
708 *
709 * clk_rate_exclusive_put() completes a critical section during which a clock
710 * consumer cannot tolerate any other consumer making any operation on the
711 * clock which could result in a rate change or rate glitch. Exclusive clocks
712 * cannot have their rate changed, either directly or indirectly due to changes
713 * further up the parent chain of clocks. As a result, clocks up parent chain
714 * also get under exclusive control of the calling consumer.
715 *
716 * If exlusivity is claimed more than once on clock, even by the same consumer,
717 * the rate effectively gets locked as exclusivity can't be preempted.
718 *
719 * Calls to clk_rate_exclusive_put() must be balanced with calls to
720 * clk_rate_exclusive_get(). Calls to this function may sleep, and do not return
721 * error status.
722 */
723void clk_rate_exclusive_put(struct clk *clk)
724{
725 if (!clk)
726 return;
727
728 clk_prepare_lock();
729
730 /*
731 * if there is something wrong with this consumer protect count, stop
732 * here before messing with the provider
733 */
734 if (WARN_ON(clk->exclusive_count <= 0))
735 goto out;
736
737 clk_core_rate_unprotect(clk->core);
738 clk->exclusive_count--;
739out:
740 clk_prepare_unlock();
741}
742EXPORT_SYMBOL_GPL(clk_rate_exclusive_put);
743
e55a839a
JB
744static void clk_core_rate_protect(struct clk_core *core)
745{
746 lockdep_assert_held(&prepare_lock);
747
748 if (!core)
749 return;
750
751 if (core->protect_count == 0)
752 clk_core_rate_protect(core->parent);
753
754 core->protect_count++;
755}
756
757static void clk_core_rate_restore_protect(struct clk_core *core, int count)
758{
759 lockdep_assert_held(&prepare_lock);
760
761 if (!core)
762 return;
763
764 if (count == 0)
765 return;
766
767 clk_core_rate_protect(core);
768 core->protect_count = count;
769}
770
55e9b8b7
JB
771/**
772 * clk_rate_exclusive_get - get exclusivity over the clk rate control
773 * @clk: the clk over which the exclusity of rate control is requested
774 *
a37a5a9d 775 * clk_rate_exclusive_get() begins a critical section during which a clock
55e9b8b7
JB
776 * consumer cannot tolerate any other consumer making any operation on the
777 * clock which could result in a rate change or rate glitch. Exclusive clocks
778 * cannot have their rate changed, either directly or indirectly due to changes
779 * further up the parent chain of clocks. As a result, clocks up parent chain
780 * also get under exclusive control of the calling consumer.
781 *
782 * If exlusivity is claimed more than once on clock, even by the same consumer,
783 * the rate effectively gets locked as exclusivity can't be preempted.
784 *
785 * Calls to clk_rate_exclusive_get() should be balanced with calls to
786 * clk_rate_exclusive_put(). Calls to this function may sleep.
787 * Returns 0 on success, -EERROR otherwise
788 */
789int clk_rate_exclusive_get(struct clk *clk)
790{
791 if (!clk)
792 return 0;
793
794 clk_prepare_lock();
795 clk_core_rate_protect(clk->core);
796 clk->exclusive_count++;
797 clk_prepare_unlock();
798
799 return 0;
800}
801EXPORT_SYMBOL_GPL(clk_rate_exclusive_get);
802
4dff95dc
SB
803static void clk_core_unprepare(struct clk_core *core)
804{
a6334725
SB
805 lockdep_assert_held(&prepare_lock);
806
4dff95dc
SB
807 if (!core)
808 return;
b2476490 809
ab525dcc
FE
810 if (WARN(core->prepare_count == 0,
811 "%s already unprepared\n", core->name))
4dff95dc 812 return;
b2476490 813
ab525dcc
FE
814 if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL,
815 "Unpreparing critical %s\n", core->name))
2e20fbf5
LJ
816 return;
817
9461f7b3
JB
818 if (core->flags & CLK_SET_RATE_GATE)
819 clk_core_rate_unprotect(core);
820
4dff95dc
SB
821 if (--core->prepare_count > 0)
822 return;
b2476490 823
ab525dcc 824 WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
b2476490 825
4dff95dc 826 trace_clk_unprepare(core);
b2476490 827
4dff95dc
SB
828 if (core->ops->unprepare)
829 core->ops->unprepare(core->hw);
830
9a34b453
MS
831 clk_pm_runtime_put(core);
832
4dff95dc
SB
833 trace_clk_unprepare_complete(core);
834 clk_core_unprepare(core->parent);
b2476490
MT
835}
836
a6adc30b
DA
837static void clk_core_unprepare_lock(struct clk_core *core)
838{
839 clk_prepare_lock();
840 clk_core_unprepare(core);
841 clk_prepare_unlock();
842}
843
4dff95dc
SB
844/**
845 * clk_unprepare - undo preparation of a clock source
846 * @clk: the clk being unprepared
847 *
848 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
849 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
850 * if the operation may sleep. One example is a clk which is accessed over
851 * I2c. In the complex case a clk gate operation may require a fast and a slow
852 * part. It is this reason that clk_unprepare and clk_disable are not mutually
853 * exclusive. In fact clk_disable must be called before clk_unprepare.
854 */
855void clk_unprepare(struct clk *clk)
1e435256 856{
4dff95dc
SB
857 if (IS_ERR_OR_NULL(clk))
858 return;
859
a6adc30b 860 clk_core_unprepare_lock(clk->core);
1e435256 861}
4dff95dc 862EXPORT_SYMBOL_GPL(clk_unprepare);
1e435256 863
4dff95dc 864static int clk_core_prepare(struct clk_core *core)
b2476490 865{
4dff95dc 866 int ret = 0;
b2476490 867
a6334725
SB
868 lockdep_assert_held(&prepare_lock);
869
4dff95dc 870 if (!core)
1e435256 871 return 0;
1e435256 872
4dff95dc 873 if (core->prepare_count == 0) {
9a34b453 874 ret = clk_pm_runtime_get(core);
4dff95dc
SB
875 if (ret)
876 return ret;
b2476490 877
9a34b453
MS
878 ret = clk_core_prepare(core->parent);
879 if (ret)
880 goto runtime_put;
881
4dff95dc 882 trace_clk_prepare(core);
b2476490 883
4dff95dc
SB
884 if (core->ops->prepare)
885 ret = core->ops->prepare(core->hw);
b2476490 886
4dff95dc 887 trace_clk_prepare_complete(core);
1c155b3d 888
9a34b453
MS
889 if (ret)
890 goto unprepare;
4dff95dc 891 }
1c155b3d 892
4dff95dc 893 core->prepare_count++;
b2476490 894
9461f7b3
JB
895 /*
896 * CLK_SET_RATE_GATE is a special case of clock protection
897 * Instead of a consumer claiming exclusive rate control, it is
898 * actually the provider which prevents any consumer from making any
899 * operation which could result in a rate change or rate glitch while
900 * the clock is prepared.
901 */
902 if (core->flags & CLK_SET_RATE_GATE)
903 clk_core_rate_protect(core);
904
b2476490 905 return 0;
9a34b453
MS
906unprepare:
907 clk_core_unprepare(core->parent);
908runtime_put:
909 clk_pm_runtime_put(core);
910 return ret;
b2476490 911}
b2476490 912
a6adc30b
DA
913static int clk_core_prepare_lock(struct clk_core *core)
914{
915 int ret;
916
917 clk_prepare_lock();
918 ret = clk_core_prepare(core);
919 clk_prepare_unlock();
920
921 return ret;
922}
923
4dff95dc
SB
924/**
925 * clk_prepare - prepare a clock source
926 * @clk: the clk being prepared
927 *
928 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
929 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
930 * operation may sleep. One example is a clk which is accessed over I2c. In
931 * the complex case a clk ungate operation may require a fast and a slow part.
932 * It is this reason that clk_prepare and clk_enable are not mutually
933 * exclusive. In fact clk_prepare must be called before clk_enable.
934 * Returns 0 on success, -EERROR otherwise.
935 */
936int clk_prepare(struct clk *clk)
b2476490 937{
4dff95dc
SB
938 if (!clk)
939 return 0;
b2476490 940
a6adc30b 941 return clk_core_prepare_lock(clk->core);
b2476490 942}
4dff95dc 943EXPORT_SYMBOL_GPL(clk_prepare);
b2476490 944
4dff95dc 945static void clk_core_disable(struct clk_core *core)
b2476490 946{
a6334725
SB
947 lockdep_assert_held(&enable_lock);
948
4dff95dc
SB
949 if (!core)
950 return;
035a61c3 951
ab525dcc 952 if (WARN(core->enable_count == 0, "%s already disabled\n", core->name))
4dff95dc 953 return;
b2476490 954
ab525dcc
FE
955 if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL,
956 "Disabling critical %s\n", core->name))
2e20fbf5
LJ
957 return;
958
4dff95dc
SB
959 if (--core->enable_count > 0)
960 return;
035a61c3 961
2f87a6ea 962 trace_clk_disable_rcuidle(core);
035a61c3 963
4dff95dc
SB
964 if (core->ops->disable)
965 core->ops->disable(core->hw);
035a61c3 966
2f87a6ea 967 trace_clk_disable_complete_rcuidle(core);
035a61c3 968
4dff95dc 969 clk_core_disable(core->parent);
035a61c3 970}
7ef3dcc8 971
a6adc30b
DA
972static void clk_core_disable_lock(struct clk_core *core)
973{
974 unsigned long flags;
975
976 flags = clk_enable_lock();
977 clk_core_disable(core);
978 clk_enable_unlock(flags);
979}
980
4dff95dc
SB
981/**
982 * clk_disable - gate a clock
983 * @clk: the clk being gated
984 *
985 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
986 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
987 * clk if the operation is fast and will never sleep. One example is a
988 * SoC-internal clk which is controlled via simple register writes. In the
989 * complex case a clk gate operation may require a fast and a slow part. It is
990 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
991 * In fact clk_disable must be called before clk_unprepare.
992 */
993void clk_disable(struct clk *clk)
b2476490 994{
4dff95dc
SB
995 if (IS_ERR_OR_NULL(clk))
996 return;
997
a6adc30b 998 clk_core_disable_lock(clk->core);
b2476490 999}
4dff95dc 1000EXPORT_SYMBOL_GPL(clk_disable);
b2476490 1001
4dff95dc 1002static int clk_core_enable(struct clk_core *core)
b2476490 1003{
4dff95dc 1004 int ret = 0;
b2476490 1005
a6334725
SB
1006 lockdep_assert_held(&enable_lock);
1007
4dff95dc
SB
1008 if (!core)
1009 return 0;
b2476490 1010
ab525dcc
FE
1011 if (WARN(core->prepare_count == 0,
1012 "Enabling unprepared %s\n", core->name))
4dff95dc 1013 return -ESHUTDOWN;
b2476490 1014
4dff95dc
SB
1015 if (core->enable_count == 0) {
1016 ret = clk_core_enable(core->parent);
b2476490 1017
4dff95dc
SB
1018 if (ret)
1019 return ret;
b2476490 1020
f17a0dd1 1021 trace_clk_enable_rcuidle(core);
035a61c3 1022
4dff95dc
SB
1023 if (core->ops->enable)
1024 ret = core->ops->enable(core->hw);
035a61c3 1025
f17a0dd1 1026 trace_clk_enable_complete_rcuidle(core);
4dff95dc
SB
1027
1028 if (ret) {
1029 clk_core_disable(core->parent);
1030 return ret;
1031 }
1032 }
1033
1034 core->enable_count++;
1035 return 0;
035a61c3 1036}
b2476490 1037
a6adc30b
DA
1038static int clk_core_enable_lock(struct clk_core *core)
1039{
1040 unsigned long flags;
1041 int ret;
1042
1043 flags = clk_enable_lock();
1044 ret = clk_core_enable(core);
1045 clk_enable_unlock(flags);
1046
1047 return ret;
1048}
1049
43536548
K
1050/**
1051 * clk_gate_restore_context - restore context for poweroff
1052 * @hw: the clk_hw pointer of clock whose state is to be restored
1053 *
1054 * The clock gate restore context function enables or disables
1055 * the gate clocks based on the enable_count. This is done in cases
1056 * where the clock context is lost and based on the enable_count
1057 * the clock either needs to be enabled/disabled. This
1058 * helps restore the state of gate clocks.
1059 */
1060void clk_gate_restore_context(struct clk_hw *hw)
1061{
9be76627
SB
1062 struct clk_core *core = hw->core;
1063
1064 if (core->enable_count)
1065 core->ops->enable(hw);
43536548 1066 else
9be76627 1067 core->ops->disable(hw);
43536548
K
1068}
1069EXPORT_SYMBOL_GPL(clk_gate_restore_context);
1070
9be76627 1071static int clk_core_save_context(struct clk_core *core)
8b95d1ce
RD
1072{
1073 struct clk_core *child;
1074 int ret = 0;
1075
9be76627
SB
1076 hlist_for_each_entry(child, &core->children, child_node) {
1077 ret = clk_core_save_context(child);
8b95d1ce
RD
1078 if (ret < 0)
1079 return ret;
1080 }
1081
9be76627
SB
1082 if (core->ops && core->ops->save_context)
1083 ret = core->ops->save_context(core->hw);
8b95d1ce
RD
1084
1085 return ret;
1086}
1087
9be76627 1088static void clk_core_restore_context(struct clk_core *core)
8b95d1ce
RD
1089{
1090 struct clk_core *child;
1091
9be76627
SB
1092 if (core->ops && core->ops->restore_context)
1093 core->ops->restore_context(core->hw);
8b95d1ce 1094
9be76627
SB
1095 hlist_for_each_entry(child, &core->children, child_node)
1096 clk_core_restore_context(child);
8b95d1ce
RD
1097}
1098
1099/**
1100 * clk_save_context - save clock context for poweroff
1101 *
1102 * Saves the context of the clock register for powerstates in which the
1103 * contents of the registers will be lost. Occurs deep within the suspend
1104 * code. Returns 0 on success.
1105 */
1106int clk_save_context(void)
1107{
1108 struct clk_core *clk;
1109 int ret;
1110
1111 hlist_for_each_entry(clk, &clk_root_list, child_node) {
9be76627 1112 ret = clk_core_save_context(clk);
8b95d1ce
RD
1113 if (ret < 0)
1114 return ret;
1115 }
1116
1117 hlist_for_each_entry(clk, &clk_orphan_list, child_node) {
9be76627 1118 ret = clk_core_save_context(clk);
8b95d1ce
RD
1119 if (ret < 0)
1120 return ret;
1121 }
1122
1123 return 0;
1124}
1125EXPORT_SYMBOL_GPL(clk_save_context);
1126
1127/**
1128 * clk_restore_context - restore clock context after poweroff
1129 *
1130 * Restore the saved clock context upon resume.
1131 *
1132 */
1133void clk_restore_context(void)
1134{
9be76627 1135 struct clk_core *core;
8b95d1ce 1136
9be76627
SB
1137 hlist_for_each_entry(core, &clk_root_list, child_node)
1138 clk_core_restore_context(core);
8b95d1ce 1139
9be76627
SB
1140 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1141 clk_core_restore_context(core);
8b95d1ce
RD
1142}
1143EXPORT_SYMBOL_GPL(clk_restore_context);
1144
4dff95dc
SB
1145/**
1146 * clk_enable - ungate a clock
1147 * @clk: the clk being ungated
1148 *
1149 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
1150 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
1151 * if the operation will never sleep. One example is a SoC-internal clk which
1152 * is controlled via simple register writes. In the complex case a clk ungate
1153 * operation may require a fast and a slow part. It is this reason that
1154 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
1155 * must be called before clk_enable. Returns 0 on success, -EERROR
1156 * otherwise.
1157 */
1158int clk_enable(struct clk *clk)
5279fc40 1159{
4dff95dc 1160 if (!clk)
5279fc40
BB
1161 return 0;
1162
a6adc30b
DA
1163 return clk_core_enable_lock(clk->core);
1164}
1165EXPORT_SYMBOL_GPL(clk_enable);
1166
0bfa0820
NP
1167/**
1168 * clk_is_enabled_when_prepared - indicate if preparing a clock also enables it.
1169 * @clk: clock source
1170 *
1171 * Returns true if clk_prepare() implicitly enables the clock, effectively
1172 * making clk_enable()/clk_disable() no-ops, false otherwise.
1173 *
1174 * This is of interest mainly to power management code where actually
1175 * disabling the clock also requires unpreparing it to have any material
1176 * effect.
1177 *
1178 * Regardless of the value returned here, the caller must always invoke
1179 * clk_enable() or clk_prepare_enable() and counterparts for usage counts
1180 * to be right.
1181 */
1182bool clk_is_enabled_when_prepared(struct clk *clk)
1183{
1184 return clk && !(clk->core->ops->enable && clk->core->ops->disable);
1185}
1186EXPORT_SYMBOL_GPL(clk_is_enabled_when_prepared);
1187
a6adc30b
DA
1188static int clk_core_prepare_enable(struct clk_core *core)
1189{
1190 int ret;
1191
1192 ret = clk_core_prepare_lock(core);
1193 if (ret)
1194 return ret;
1195
1196 ret = clk_core_enable_lock(core);
1197 if (ret)
1198 clk_core_unprepare_lock(core);
5279fc40 1199
4dff95dc 1200 return ret;
b2476490 1201}
a6adc30b
DA
1202
1203static void clk_core_disable_unprepare(struct clk_core *core)
1204{
1205 clk_core_disable_lock(core);
1206 clk_core_unprepare_lock(core);
1207}
b2476490 1208
564f86d3 1209static void __init clk_unprepare_unused_subtree(struct clk_core *core)
7ec986ef
DA
1210{
1211 struct clk_core *child;
1212
1213 lockdep_assert_held(&prepare_lock);
1214
1215 hlist_for_each_entry(child, &core->children, child_node)
1216 clk_unprepare_unused_subtree(child);
1217
1218 if (core->prepare_count)
1219 return;
1220
1221 if (core->flags & CLK_IGNORE_UNUSED)
1222 return;
1223
9a34b453
MS
1224 if (clk_pm_runtime_get(core))
1225 return;
1226
7ec986ef
DA
1227 if (clk_core_is_prepared(core)) {
1228 trace_clk_unprepare(core);
1229 if (core->ops->unprepare_unused)
1230 core->ops->unprepare_unused(core->hw);
1231 else if (core->ops->unprepare)
1232 core->ops->unprepare(core->hw);
1233 trace_clk_unprepare_complete(core);
1234 }
9a34b453
MS
1235
1236 clk_pm_runtime_put(core);
7ec986ef
DA
1237}
1238
564f86d3 1239static void __init clk_disable_unused_subtree(struct clk_core *core)
7ec986ef
DA
1240{
1241 struct clk_core *child;
1242 unsigned long flags;
1243
1244 lockdep_assert_held(&prepare_lock);
1245
1246 hlist_for_each_entry(child, &core->children, child_node)
1247 clk_disable_unused_subtree(child);
1248
a4b3518d
DA
1249 if (core->flags & CLK_OPS_PARENT_ENABLE)
1250 clk_core_prepare_enable(core->parent);
1251
9a34b453
MS
1252 if (clk_pm_runtime_get(core))
1253 goto unprepare_out;
1254
7ec986ef
DA
1255 flags = clk_enable_lock();
1256
1257 if (core->enable_count)
1258 goto unlock_out;
1259
1260 if (core->flags & CLK_IGNORE_UNUSED)
1261 goto unlock_out;
1262
1263 /*
1264 * some gate clocks have special needs during the disable-unused
1265 * sequence. call .disable_unused if available, otherwise fall
1266 * back to .disable
1267 */
1268 if (clk_core_is_enabled(core)) {
1269 trace_clk_disable(core);
1270 if (core->ops->disable_unused)
1271 core->ops->disable_unused(core->hw);
1272 else if (core->ops->disable)
1273 core->ops->disable(core->hw);
1274 trace_clk_disable_complete(core);
1275 }
1276
1277unlock_out:
1278 clk_enable_unlock(flags);
9a34b453
MS
1279 clk_pm_runtime_put(core);
1280unprepare_out:
a4b3518d
DA
1281 if (core->flags & CLK_OPS_PARENT_ENABLE)
1282 clk_core_disable_unprepare(core->parent);
7ec986ef
DA
1283}
1284
564f86d3 1285static bool clk_ignore_unused __initdata;
7ec986ef
DA
1286static int __init clk_ignore_unused_setup(char *__unused)
1287{
1288 clk_ignore_unused = true;
1289 return 1;
1290}
1291__setup("clk_ignore_unused", clk_ignore_unused_setup);
1292
564f86d3 1293static int __init clk_disable_unused(void)
7ec986ef
DA
1294{
1295 struct clk_core *core;
1296
1297 if (clk_ignore_unused) {
1298 pr_warn("clk: Not disabling unused clocks\n");
1299 return 0;
1300 }
1301
1302 clk_prepare_lock();
1303
1304 hlist_for_each_entry(core, &clk_root_list, child_node)
1305 clk_disable_unused_subtree(core);
1306
1307 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1308 clk_disable_unused_subtree(core);
1309
1310 hlist_for_each_entry(core, &clk_root_list, child_node)
1311 clk_unprepare_unused_subtree(core);
1312
1313 hlist_for_each_entry(core, &clk_orphan_list, child_node)
1314 clk_unprepare_unused_subtree(core);
1315
1316 clk_prepare_unlock();
1317
1318 return 0;
1319}
1320late_initcall_sync(clk_disable_unused);
1321
0f6cc2b8
JB
1322static int clk_core_determine_round_nolock(struct clk_core *core,
1323 struct clk_rate_request *req)
3d6ee287 1324{
0817b62c 1325 long rate;
4dff95dc
SB
1326
1327 lockdep_assert_held(&prepare_lock);
3d6ee287 1328
d6968fca 1329 if (!core)
4dff95dc 1330 return 0;
3d6ee287 1331
55e9b8b7
JB
1332 /*
1333 * At this point, core protection will be disabled if
1334 * - if the provider is not protected at all
1335 * - if the calling consumer is the only one which has exclusivity
1336 * over the provider
1337 */
e55a839a
JB
1338 if (clk_core_rate_is_protected(core)) {
1339 req->rate = core->rate;
1340 } else if (core->ops->determine_rate) {
0817b62c
BB
1341 return core->ops->determine_rate(core->hw, req);
1342 } else if (core->ops->round_rate) {
1343 rate = core->ops->round_rate(core->hw, req->rate,
1344 &req->best_parent_rate);
1345 if (rate < 0)
1346 return rate;
1347
1348 req->rate = rate;
0817b62c 1349 } else {
0f6cc2b8 1350 return -EINVAL;
0817b62c
BB
1351 }
1352
1353 return 0;
3d6ee287
UH
1354}
1355
0f6cc2b8
JB
1356static void clk_core_init_rate_req(struct clk_core * const core,
1357 struct clk_rate_request *req)
1358{
1359 struct clk_core *parent;
1360
1361 if (WARN_ON(!core || !req))
1362 return;
1363
1364 parent = core->parent;
1365 if (parent) {
1366 req->best_parent_hw = parent->hw;
1367 req->best_parent_rate = parent->rate;
1368 } else {
1369 req->best_parent_hw = NULL;
1370 req->best_parent_rate = 0;
0817b62c 1371 }
0f6cc2b8 1372}
0817b62c 1373
0f6cc2b8
JB
1374static bool clk_core_can_round(struct clk_core * const core)
1375{
eef1f1b6 1376 return core->ops->determine_rate || core->ops->round_rate;
0f6cc2b8
JB
1377}
1378
1379static int clk_core_round_rate_nolock(struct clk_core *core,
1380 struct clk_rate_request *req)
1381{
1382 lockdep_assert_held(&prepare_lock);
1383
04bf9ab3
JB
1384 if (!core) {
1385 req->rate = 0;
0f6cc2b8 1386 return 0;
04bf9ab3 1387 }
0817b62c 1388
0f6cc2b8
JB
1389 clk_core_init_rate_req(core, req);
1390
1391 if (clk_core_can_round(core))
1392 return clk_core_determine_round_nolock(core, req);
1393 else if (core->flags & CLK_SET_RATE_PARENT)
1394 return clk_core_round_rate_nolock(core->parent, req);
1395
1396 req->rate = core->rate;
0817b62c 1397 return 0;
3d6ee287
UH
1398}
1399
4dff95dc
SB
1400/**
1401 * __clk_determine_rate - get the closest rate actually supported by a clock
1402 * @hw: determine the rate of this clock
2d5b520c 1403 * @req: target rate request
4dff95dc 1404 *
6e5ab41b 1405 * Useful for clk_ops such as .set_rate and .determine_rate.
4dff95dc 1406 */
0817b62c 1407int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
035a61c3 1408{
0817b62c
BB
1409 if (!hw) {
1410 req->rate = 0;
4dff95dc 1411 return 0;
0817b62c 1412 }
035a61c3 1413
0817b62c 1414 return clk_core_round_rate_nolock(hw->core, req);
035a61c3 1415}
4dff95dc 1416EXPORT_SYMBOL_GPL(__clk_determine_rate);
035a61c3 1417
e8c849c2
SM
1418/**
1419 * clk_hw_round_rate() - round the given rate for a hw clk
1420 * @hw: the hw clk for which we are rounding a rate
1421 * @rate: the rate which is to be rounded
1422 *
1423 * Takes in a rate as input and rounds it to a rate that the clk can actually
1424 * use.
1425 *
1426 * Context: prepare_lock must be held.
1427 * For clk providers to call from within clk_ops such as .round_rate,
1428 * .determine_rate.
1429 *
1430 * Return: returns rounded rate of hw clk if clk supports round_rate operation
1431 * else returns the parent rate.
1432 */
1a9c069c
SB
1433unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
1434{
1435 int ret;
1436 struct clk_rate_request req;
1437
1438 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
1439 req.rate = rate;
1440
1441 ret = clk_core_round_rate_nolock(hw->core, &req);
1442 if (ret)
1443 return 0;
1444
1445 return req.rate;
1446}
1447EXPORT_SYMBOL_GPL(clk_hw_round_rate);
1448
4dff95dc
SB
1449/**
1450 * clk_round_rate - round the given rate for a clk
1451 * @clk: the clk for which we are rounding a rate
1452 * @rate: the rate which is to be rounded
1453 *
1454 * Takes in a rate as input and rounds it to a rate that the clk can actually
1455 * use which is then returned. If clk doesn't support round_rate operation
1456 * then the parent rate is returned.
1457 */
1458long clk_round_rate(struct clk *clk, unsigned long rate)
035a61c3 1459{
fc4a05d4
SB
1460 struct clk_rate_request req;
1461 int ret;
4dff95dc 1462
035a61c3 1463 if (!clk)
4dff95dc 1464 return 0;
035a61c3 1465
4dff95dc 1466 clk_prepare_lock();
fc4a05d4 1467
55e9b8b7
JB
1468 if (clk->exclusive_count)
1469 clk_core_rate_unprotect(clk->core);
1470
fc4a05d4
SB
1471 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
1472 req.rate = rate;
1473
1474 ret = clk_core_round_rate_nolock(clk->core, &req);
55e9b8b7
JB
1475
1476 if (clk->exclusive_count)
1477 clk_core_rate_protect(clk->core);
1478
4dff95dc
SB
1479 clk_prepare_unlock();
1480
fc4a05d4
SB
1481 if (ret)
1482 return ret;
1483
1484 return req.rate;
035a61c3 1485}
4dff95dc 1486EXPORT_SYMBOL_GPL(clk_round_rate);
b2476490 1487
4dff95dc
SB
1488/**
1489 * __clk_notify - call clk notifier chain
1490 * @core: clk that is changing rate
1491 * @msg: clk notifier type (see include/linux/clk.h)
1492 * @old_rate: old clk rate
1493 * @new_rate: new clk rate
1494 *
1495 * Triggers a notifier call chain on the clk rate-change notification
1496 * for 'clk'. Passes a pointer to the struct clk and the previous
1497 * and current rates to the notifier callback. Intended to be called by
1498 * internal clock code only. Returns NOTIFY_DONE from the last driver
1499 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
1500 * a driver returns that.
1501 */
1502static int __clk_notify(struct clk_core *core, unsigned long msg,
1503 unsigned long old_rate, unsigned long new_rate)
b2476490 1504{
4dff95dc
SB
1505 struct clk_notifier *cn;
1506 struct clk_notifier_data cnd;
1507 int ret = NOTIFY_DONE;
b2476490 1508
4dff95dc
SB
1509 cnd.old_rate = old_rate;
1510 cnd.new_rate = new_rate;
b2476490 1511
4dff95dc
SB
1512 list_for_each_entry(cn, &clk_notifier_list, node) {
1513 if (cn->clk->core == core) {
1514 cnd.clk = cn->clk;
1515 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1516 &cnd);
17c34c56
PDS
1517 if (ret & NOTIFY_STOP_MASK)
1518 return ret;
4dff95dc 1519 }
b2476490
MT
1520 }
1521
4dff95dc 1522 return ret;
b2476490
MT
1523}
1524
4dff95dc
SB
1525/**
1526 * __clk_recalc_accuracies
1527 * @core: first clk in the subtree
1528 *
1529 * Walks the subtree of clks starting with clk and recalculates accuracies as
1530 * it goes. Note that if a clk does not implement the .recalc_accuracy
6e5ab41b 1531 * callback then it is assumed that the clock will take on the accuracy of its
4dff95dc 1532 * parent.
4dff95dc
SB
1533 */
1534static void __clk_recalc_accuracies(struct clk_core *core)
b2476490 1535{
4dff95dc
SB
1536 unsigned long parent_accuracy = 0;
1537 struct clk_core *child;
b2476490 1538
4dff95dc 1539 lockdep_assert_held(&prepare_lock);
b2476490 1540
4dff95dc
SB
1541 if (core->parent)
1542 parent_accuracy = core->parent->accuracy;
b2476490 1543
4dff95dc
SB
1544 if (core->ops->recalc_accuracy)
1545 core->accuracy = core->ops->recalc_accuracy(core->hw,
1546 parent_accuracy);
1547 else
1548 core->accuracy = parent_accuracy;
b2476490 1549
4dff95dc
SB
1550 hlist_for_each_entry(child, &core->children, child_node)
1551 __clk_recalc_accuracies(child);
b2476490
MT
1552}
1553
0daa376d 1554static long clk_core_get_accuracy_recalc(struct clk_core *core)
e366fdd7 1555{
4dff95dc
SB
1556 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
1557 __clk_recalc_accuracies(core);
15a02c1f 1558
0daa376d 1559 return clk_core_get_accuracy_no_lock(core);
e366fdd7 1560}
15a02c1f 1561
4dff95dc
SB
1562/**
1563 * clk_get_accuracy - return the accuracy of clk
1564 * @clk: the clk whose accuracy is being returned
1565 *
1566 * Simply returns the cached accuracy of the clk, unless
1567 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
1568 * issued.
1569 * If clk is NULL then returns 0.
1570 */
1571long clk_get_accuracy(struct clk *clk)
035a61c3 1572{
0daa376d
SB
1573 long accuracy;
1574
4dff95dc
SB
1575 if (!clk)
1576 return 0;
035a61c3 1577
0daa376d
SB
1578 clk_prepare_lock();
1579 accuracy = clk_core_get_accuracy_recalc(clk->core);
1580 clk_prepare_unlock();
1581
1582 return accuracy;
035a61c3 1583}
4dff95dc 1584EXPORT_SYMBOL_GPL(clk_get_accuracy);
035a61c3 1585
4dff95dc
SB
1586static unsigned long clk_recalc(struct clk_core *core,
1587 unsigned long parent_rate)
1c8e6004 1588{
9a34b453
MS
1589 unsigned long rate = parent_rate;
1590
1591 if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
1592 rate = core->ops->recalc_rate(core->hw, parent_rate);
1593 clk_pm_runtime_put(core);
1594 }
1595 return rate;
1c8e6004
TV
1596}
1597
4dff95dc
SB
1598/**
1599 * __clk_recalc_rates
1600 * @core: first clk in the subtree
1601 * @msg: notification type (see include/linux/clk.h)
1602 *
1603 * Walks the subtree of clks starting with clk and recalculates rates as it
1604 * goes. Note that if a clk does not implement the .recalc_rate callback then
1605 * it is assumed that the clock will take on the rate of its parent.
1606 *
1607 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1608 * if necessary.
15a02c1f 1609 */
4dff95dc 1610static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
15a02c1f 1611{
4dff95dc
SB
1612 unsigned long old_rate;
1613 unsigned long parent_rate = 0;
1614 struct clk_core *child;
e366fdd7 1615
4dff95dc 1616 lockdep_assert_held(&prepare_lock);
15a02c1f 1617
4dff95dc 1618 old_rate = core->rate;
b2476490 1619
4dff95dc
SB
1620 if (core->parent)
1621 parent_rate = core->parent->rate;
b2476490 1622
4dff95dc 1623 core->rate = clk_recalc(core, parent_rate);
b2476490 1624
4dff95dc
SB
1625 /*
1626 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1627 * & ABORT_RATE_CHANGE notifiers
1628 */
1629 if (core->notifier_count && msg)
1630 __clk_notify(core, msg, old_rate, core->rate);
b2476490 1631
4dff95dc
SB
1632 hlist_for_each_entry(child, &core->children, child_node)
1633 __clk_recalc_rates(child, msg);
1634}
b2476490 1635
0daa376d 1636static unsigned long clk_core_get_rate_recalc(struct clk_core *core)
4dff95dc 1637{
4dff95dc
SB
1638 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1639 __clk_recalc_rates(core, 0);
1640
0daa376d 1641 return clk_core_get_rate_nolock(core);
b2476490
MT
1642}
1643
1644/**
4dff95dc
SB
1645 * clk_get_rate - return the rate of clk
1646 * @clk: the clk whose rate is being returned
b2476490 1647 *
4dff95dc
SB
1648 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1649 * is set, which means a recalc_rate will be issued.
1650 * If clk is NULL then returns 0.
b2476490 1651 */
4dff95dc 1652unsigned long clk_get_rate(struct clk *clk)
b2476490 1653{
0daa376d
SB
1654 unsigned long rate;
1655
4dff95dc
SB
1656 if (!clk)
1657 return 0;
63589e92 1658
0daa376d
SB
1659 clk_prepare_lock();
1660 rate = clk_core_get_rate_recalc(clk->core);
1661 clk_prepare_unlock();
1662
1663 return rate;
b2476490 1664}
4dff95dc 1665EXPORT_SYMBOL_GPL(clk_get_rate);
b2476490 1666
4dff95dc
SB
1667static int clk_fetch_parent_index(struct clk_core *core,
1668 struct clk_core *parent)
b2476490 1669{
4dff95dc 1670 int i;
b2476490 1671
508f884a
MY
1672 if (!parent)
1673 return -EINVAL;
1674
ede77858 1675 for (i = 0; i < core->num_parents; i++) {
1a079560 1676 /* Found it first try! */
fc0c209c 1677 if (core->parents[i].core == parent)
4dff95dc 1678 return i;
b2476490 1679
1a079560 1680 /* Something else is here, so keep looking */
fc0c209c 1681 if (core->parents[i].core)
ede77858
DB
1682 continue;
1683
1a079560
SB
1684 /* Maybe core hasn't been cached but the hw is all we know? */
1685 if (core->parents[i].hw) {
1686 if (core->parents[i].hw == parent->hw)
1687 break;
1688
1689 /* Didn't match, but we're expecting a clk_hw */
1690 continue;
ede77858 1691 }
1a079560
SB
1692
1693 /* Maybe it hasn't been cached (clk_set_parent() path) */
1694 if (parent == clk_core_get(core, i))
1695 break;
1696
1697 /* Fallback to comparing globally unique names */
24876f09
MB
1698 if (core->parents[i].name &&
1699 !strcmp(parent->name, core->parents[i].name))
1a079560 1700 break;
ede77858
DB
1701 }
1702
1a079560
SB
1703 if (i == core->num_parents)
1704 return -EINVAL;
1705
1706 core->parents[i].core = parent;
1707 return i;
b2476490
MT
1708}
1709
d9b86cc4
SK
1710/**
1711 * clk_hw_get_parent_index - return the index of the parent clock
1712 * @hw: clk_hw associated with the clk being consumed
1713 *
1714 * Fetches and returns the index of parent clock. Returns -EINVAL if the given
1715 * clock does not have a current parent.
1716 */
1717int clk_hw_get_parent_index(struct clk_hw *hw)
1718{
1719 struct clk_hw *parent = clk_hw_get_parent(hw);
1720
1721 if (WARN_ON(parent == NULL))
1722 return -EINVAL;
1723
1724 return clk_fetch_parent_index(hw->core, parent->core);
1725}
1726EXPORT_SYMBOL_GPL(clk_hw_get_parent_index);
1727
e6500344
HS
1728/*
1729 * Update the orphan status of @core and all its children.
1730 */
1731static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
1732{
1733 struct clk_core *child;
1734
1735 core->orphan = is_orphan;
1736
1737 hlist_for_each_entry(child, &core->children, child_node)
1738 clk_core_update_orphan_status(child, is_orphan);
1739}
1740
4dff95dc 1741static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
b2476490 1742{
e6500344
HS
1743 bool was_orphan = core->orphan;
1744
4dff95dc 1745 hlist_del(&core->child_node);
035a61c3 1746
4dff95dc 1747 if (new_parent) {
e6500344
HS
1748 bool becomes_orphan = new_parent->orphan;
1749
4dff95dc
SB
1750 /* avoid duplicate POST_RATE_CHANGE notifications */
1751 if (new_parent->new_child == core)
1752 new_parent->new_child = NULL;
b2476490 1753
4dff95dc 1754 hlist_add_head(&core->child_node, &new_parent->children);
e6500344
HS
1755
1756 if (was_orphan != becomes_orphan)
1757 clk_core_update_orphan_status(core, becomes_orphan);
4dff95dc
SB
1758 } else {
1759 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
1760 if (!was_orphan)
1761 clk_core_update_orphan_status(core, true);
4dff95dc 1762 }
dfc202ea 1763
4dff95dc 1764 core->parent = new_parent;
035a61c3
TV
1765}
1766
4dff95dc
SB
1767static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1768 struct clk_core *parent)
b2476490
MT
1769{
1770 unsigned long flags;
4dff95dc 1771 struct clk_core *old_parent = core->parent;
b2476490 1772
4dff95dc 1773 /*
fc8726a2
DA
1774 * 1. enable parents for CLK_OPS_PARENT_ENABLE clock
1775 *
1776 * 2. Migrate prepare state between parents and prevent race with
4dff95dc
SB
1777 * clk_enable().
1778 *
1779 * If the clock is not prepared, then a race with
1780 * clk_enable/disable() is impossible since we already have the
1781 * prepare lock (future calls to clk_enable() need to be preceded by
1782 * a clk_prepare()).
1783 *
1784 * If the clock is prepared, migrate the prepared state to the new
1785 * parent and also protect against a race with clk_enable() by
1786 * forcing the clock and the new parent on. This ensures that all
1787 * future calls to clk_enable() are practically NOPs with respect to
1788 * hardware and software states.
1789 *
1790 * See also: Comment for clk_set_parent() below.
1791 */
fc8726a2
DA
1792
1793 /* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */
1794 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1795 clk_core_prepare_enable(old_parent);
1796 clk_core_prepare_enable(parent);
1797 }
1798
1799 /* migrate prepare count if > 0 */
4dff95dc 1800 if (core->prepare_count) {
fc8726a2
DA
1801 clk_core_prepare_enable(parent);
1802 clk_core_enable_lock(core);
4dff95dc 1803 }
63589e92 1804
4dff95dc 1805 /* update the clk tree topology */
eab89f69 1806 flags = clk_enable_lock();
4dff95dc 1807 clk_reparent(core, parent);
eab89f69 1808 clk_enable_unlock(flags);
4dff95dc
SB
1809
1810 return old_parent;
b2476490 1811}
b2476490 1812
4dff95dc
SB
1813static void __clk_set_parent_after(struct clk_core *core,
1814 struct clk_core *parent,
1815 struct clk_core *old_parent)
b2476490 1816{
4dff95dc
SB
1817 /*
1818 * Finish the migration of prepare state and undo the changes done
1819 * for preventing a race with clk_enable().
1820 */
1821 if (core->prepare_count) {
fc8726a2
DA
1822 clk_core_disable_lock(core);
1823 clk_core_disable_unprepare(old_parent);
1824 }
1825
1826 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
1827 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1828 clk_core_disable_unprepare(parent);
1829 clk_core_disable_unprepare(old_parent);
4dff95dc
SB
1830 }
1831}
b2476490 1832
4dff95dc
SB
1833static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1834 u8 p_index)
1835{
1836 unsigned long flags;
1837 int ret = 0;
1838 struct clk_core *old_parent;
b2476490 1839
4dff95dc 1840 old_parent = __clk_set_parent_before(core, parent);
b2476490 1841
4dff95dc 1842 trace_clk_set_parent(core, parent);
b2476490 1843
4dff95dc
SB
1844 /* change clock input source */
1845 if (parent && core->ops->set_parent)
1846 ret = core->ops->set_parent(core->hw, p_index);
dfc202ea 1847
4dff95dc 1848 trace_clk_set_parent_complete(core, parent);
dfc202ea 1849
4dff95dc
SB
1850 if (ret) {
1851 flags = clk_enable_lock();
1852 clk_reparent(core, old_parent);
1853 clk_enable_unlock(flags);
c660b2eb 1854 __clk_set_parent_after(core, old_parent, parent);
dfc202ea 1855
4dff95dc 1856 return ret;
b2476490
MT
1857 }
1858
4dff95dc
SB
1859 __clk_set_parent_after(core, parent, old_parent);
1860
b2476490
MT
1861 return 0;
1862}
1863
1864/**
4dff95dc
SB
1865 * __clk_speculate_rates
1866 * @core: first clk in the subtree
1867 * @parent_rate: the "future" rate of clk's parent
b2476490 1868 *
4dff95dc
SB
1869 * Walks the subtree of clks starting with clk, speculating rates as it
1870 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1871 *
1872 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1873 * pre-rate change notifications and returns early if no clks in the
1874 * subtree have subscribed to the notifications. Note that if a clk does not
1875 * implement the .recalc_rate callback then it is assumed that the clock will
1876 * take on the rate of its parent.
b2476490 1877 */
4dff95dc
SB
1878static int __clk_speculate_rates(struct clk_core *core,
1879 unsigned long parent_rate)
b2476490 1880{
4dff95dc
SB
1881 struct clk_core *child;
1882 unsigned long new_rate;
1883 int ret = NOTIFY_DONE;
b2476490 1884
4dff95dc 1885 lockdep_assert_held(&prepare_lock);
864e160a 1886
4dff95dc
SB
1887 new_rate = clk_recalc(core, parent_rate);
1888
1889 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1890 if (core->notifier_count)
1891 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1892
1893 if (ret & NOTIFY_STOP_MASK) {
1894 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1895 __func__, core->name, ret);
1896 goto out;
1897 }
1898
1899 hlist_for_each_entry(child, &core->children, child_node) {
1900 ret = __clk_speculate_rates(child, new_rate);
1901 if (ret & NOTIFY_STOP_MASK)
1902 break;
1903 }
b2476490 1904
4dff95dc 1905out:
b2476490
MT
1906 return ret;
1907}
b2476490 1908
4dff95dc
SB
1909static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1910 struct clk_core *new_parent, u8 p_index)
b2476490 1911{
4dff95dc 1912 struct clk_core *child;
b2476490 1913
4dff95dc
SB
1914 core->new_rate = new_rate;
1915 core->new_parent = new_parent;
1916 core->new_parent_index = p_index;
1917 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1918 core->new_child = NULL;
1919 if (new_parent && new_parent != core->parent)
1920 new_parent->new_child = core;
496eadf8 1921
4dff95dc
SB
1922 hlist_for_each_entry(child, &core->children, child_node) {
1923 child->new_rate = clk_recalc(child, new_rate);
1924 clk_calc_subtree(child, child->new_rate, NULL, 0);
1925 }
1926}
b2476490 1927
4dff95dc
SB
1928/*
1929 * calculate the new rates returning the topmost clock that has to be
1930 * changed.
1931 */
1932static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1933 unsigned long rate)
1934{
1935 struct clk_core *top = core;
1936 struct clk_core *old_parent, *parent;
4dff95dc
SB
1937 unsigned long best_parent_rate = 0;
1938 unsigned long new_rate;
1939 unsigned long min_rate;
1940 unsigned long max_rate;
1941 int p_index = 0;
1942 long ret;
1943
1944 /* sanity */
1945 if (IS_ERR_OR_NULL(core))
1946 return NULL;
1947
1948 /* save parent rate, if it exists */
1949 parent = old_parent = core->parent;
71472c0c 1950 if (parent)
4dff95dc 1951 best_parent_rate = parent->rate;
71472c0c 1952
4dff95dc
SB
1953 clk_core_get_boundaries(core, &min_rate, &max_rate);
1954
1955 /* find the closest rate and parent clk/rate */
0f6cc2b8 1956 if (clk_core_can_round(core)) {
0817b62c
BB
1957 struct clk_rate_request req;
1958
1959 req.rate = rate;
1960 req.min_rate = min_rate;
1961 req.max_rate = max_rate;
0817b62c 1962
0f6cc2b8
JB
1963 clk_core_init_rate_req(core, &req);
1964
1965 ret = clk_core_determine_round_nolock(core, &req);
4dff95dc
SB
1966 if (ret < 0)
1967 return NULL;
1c8e6004 1968
0817b62c
BB
1969 best_parent_rate = req.best_parent_rate;
1970 new_rate = req.rate;
1971 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
035a61c3 1972
4dff95dc
SB
1973 if (new_rate < min_rate || new_rate > max_rate)
1974 return NULL;
1975 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1976 /* pass-through clock without adjustable parent */
1977 core->new_rate = core->rate;
1978 return NULL;
1979 } else {
1980 /* pass-through clock with adjustable parent */
1981 top = clk_calc_new_rates(parent, rate);
1982 new_rate = parent->new_rate;
1983 goto out;
1984 }
1c8e6004 1985
4dff95dc
SB
1986 /* some clocks must be gated to change parent */
1987 if (parent != old_parent &&
1988 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1989 pr_debug("%s: %s not gated but wants to reparent\n",
1990 __func__, core->name);
1991 return NULL;
1992 }
b2476490 1993
4dff95dc
SB
1994 /* try finding the new parent index */
1995 if (parent && core->num_parents > 1) {
1996 p_index = clk_fetch_parent_index(core, parent);
1997 if (p_index < 0) {
1998 pr_debug("%s: clk %s can not be parent of clk %s\n",
1999 __func__, parent->name, core->name);
2000 return NULL;
2001 }
2002 }
b2476490 2003
4dff95dc
SB
2004 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
2005 best_parent_rate != parent->rate)
2006 top = clk_calc_new_rates(parent, best_parent_rate);
035a61c3 2007
4dff95dc
SB
2008out:
2009 clk_calc_subtree(core, new_rate, parent, p_index);
b2476490 2010
4dff95dc 2011 return top;
b2476490 2012}
b2476490 2013
4dff95dc
SB
2014/*
2015 * Notify about rate changes in a subtree. Always walk down the whole tree
2016 * so that in case of an error we can walk down the whole tree again and
2017 * abort the change.
b2476490 2018 */
4dff95dc
SB
2019static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
2020 unsigned long event)
b2476490 2021{
4dff95dc 2022 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
b2476490
MT
2023 int ret = NOTIFY_DONE;
2024
4dff95dc
SB
2025 if (core->rate == core->new_rate)
2026 return NULL;
b2476490 2027
4dff95dc
SB
2028 if (core->notifier_count) {
2029 ret = __clk_notify(core, event, core->rate, core->new_rate);
2030 if (ret & NOTIFY_STOP_MASK)
2031 fail_clk = core;
b2476490
MT
2032 }
2033
4dff95dc
SB
2034 hlist_for_each_entry(child, &core->children, child_node) {
2035 /* Skip children who will be reparented to another clock */
2036 if (child->new_parent && child->new_parent != core)
2037 continue;
2038 tmp_clk = clk_propagate_rate_change(child, event);
2039 if (tmp_clk)
2040 fail_clk = tmp_clk;
2041 }
5279fc40 2042
4dff95dc
SB
2043 /* handle the new child who might not be in core->children yet */
2044 if (core->new_child) {
2045 tmp_clk = clk_propagate_rate_change(core->new_child, event);
2046 if (tmp_clk)
2047 fail_clk = tmp_clk;
2048 }
5279fc40 2049
4dff95dc 2050 return fail_clk;
5279fc40
BB
2051}
2052
4dff95dc
SB
2053/*
2054 * walk down a subtree and set the new rates notifying the rate
2055 * change on the way
2056 */
2057static void clk_change_rate(struct clk_core *core)
035a61c3 2058{
4dff95dc
SB
2059 struct clk_core *child;
2060 struct hlist_node *tmp;
2061 unsigned long old_rate;
2062 unsigned long best_parent_rate = 0;
2063 bool skip_set_rate = false;
2064 struct clk_core *old_parent;
fc8726a2 2065 struct clk_core *parent = NULL;
035a61c3 2066
4dff95dc 2067 old_rate = core->rate;
035a61c3 2068
fc8726a2
DA
2069 if (core->new_parent) {
2070 parent = core->new_parent;
4dff95dc 2071 best_parent_rate = core->new_parent->rate;
fc8726a2
DA
2072 } else if (core->parent) {
2073 parent = core->parent;
4dff95dc 2074 best_parent_rate = core->parent->rate;
fc8726a2 2075 }
035a61c3 2076
588fb54b
MS
2077 if (clk_pm_runtime_get(core))
2078 return;
2079
2eb8c710
HS
2080 if (core->flags & CLK_SET_RATE_UNGATE) {
2081 unsigned long flags;
2082
2083 clk_core_prepare(core);
2084 flags = clk_enable_lock();
2085 clk_core_enable(core);
2086 clk_enable_unlock(flags);
2087 }
2088
4dff95dc
SB
2089 if (core->new_parent && core->new_parent != core->parent) {
2090 old_parent = __clk_set_parent_before(core, core->new_parent);
2091 trace_clk_set_parent(core, core->new_parent);
5279fc40 2092
4dff95dc
SB
2093 if (core->ops->set_rate_and_parent) {
2094 skip_set_rate = true;
2095 core->ops->set_rate_and_parent(core->hw, core->new_rate,
2096 best_parent_rate,
2097 core->new_parent_index);
2098 } else if (core->ops->set_parent) {
2099 core->ops->set_parent(core->hw, core->new_parent_index);
2100 }
5279fc40 2101
4dff95dc
SB
2102 trace_clk_set_parent_complete(core, core->new_parent);
2103 __clk_set_parent_after(core, core->new_parent, old_parent);
2104 }
8f2c2db1 2105
fc8726a2
DA
2106 if (core->flags & CLK_OPS_PARENT_ENABLE)
2107 clk_core_prepare_enable(parent);
2108
4dff95dc 2109 trace_clk_set_rate(core, core->new_rate);
b2476490 2110
4dff95dc
SB
2111 if (!skip_set_rate && core->ops->set_rate)
2112 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
496eadf8 2113
4dff95dc 2114 trace_clk_set_rate_complete(core, core->new_rate);
b2476490 2115
4dff95dc 2116 core->rate = clk_recalc(core, best_parent_rate);
b2476490 2117
2eb8c710
HS
2118 if (core->flags & CLK_SET_RATE_UNGATE) {
2119 unsigned long flags;
2120
2121 flags = clk_enable_lock();
2122 clk_core_disable(core);
2123 clk_enable_unlock(flags);
2124 clk_core_unprepare(core);
2125 }
2126
fc8726a2
DA
2127 if (core->flags & CLK_OPS_PARENT_ENABLE)
2128 clk_core_disable_unprepare(parent);
2129
4dff95dc
SB
2130 if (core->notifier_count && old_rate != core->rate)
2131 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
b2476490 2132
85e88fab
MT
2133 if (core->flags & CLK_RECALC_NEW_RATES)
2134 (void)clk_calc_new_rates(core, core->new_rate);
d8d91987 2135
b2476490 2136 /*
4dff95dc
SB
2137 * Use safe iteration, as change_rate can actually swap parents
2138 * for certain clock types.
b2476490 2139 */
4dff95dc
SB
2140 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
2141 /* Skip children who will be reparented to another clock */
2142 if (child->new_parent && child->new_parent != core)
2143 continue;
2144 clk_change_rate(child);
2145 }
b2476490 2146
4dff95dc
SB
2147 /* handle the new child who might not be in core->children yet */
2148 if (core->new_child)
2149 clk_change_rate(core->new_child);
588fb54b
MS
2150
2151 clk_pm_runtime_put(core);
b2476490
MT
2152}
2153
ca5e089a
JB
2154static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core,
2155 unsigned long req_rate)
2156{
e55a839a 2157 int ret, cnt;
ca5e089a
JB
2158 struct clk_rate_request req;
2159
2160 lockdep_assert_held(&prepare_lock);
2161
2162 if (!core)
2163 return 0;
2164
e55a839a
JB
2165 /* simulate what the rate would be if it could be freely set */
2166 cnt = clk_core_rate_nuke_protect(core);
2167 if (cnt < 0)
2168 return cnt;
2169
ca5e089a
JB
2170 clk_core_get_boundaries(core, &req.min_rate, &req.max_rate);
2171 req.rate = req_rate;
2172
2173 ret = clk_core_round_rate_nolock(core, &req);
2174
e55a839a
JB
2175 /* restore the protection */
2176 clk_core_rate_restore_protect(core, cnt);
2177
ca5e089a 2178 return ret ? 0 : req.rate;
b2476490
MT
2179}
2180
4dff95dc
SB
2181static int clk_core_set_rate_nolock(struct clk_core *core,
2182 unsigned long req_rate)
a093bde2 2183{
4dff95dc 2184 struct clk_core *top, *fail_clk;
ca5e089a 2185 unsigned long rate;
9a34b453 2186 int ret = 0;
a093bde2 2187
4dff95dc
SB
2188 if (!core)
2189 return 0;
a093bde2 2190
ca5e089a
JB
2191 rate = clk_core_req_round_rate_nolock(core, req_rate);
2192
4dff95dc
SB
2193 /* bail early if nothing to do */
2194 if (rate == clk_core_get_rate_nolock(core))
2195 return 0;
a093bde2 2196
e55a839a
JB
2197 /* fail on a direct rate set of a protected provider */
2198 if (clk_core_rate_is_protected(core))
2199 return -EBUSY;
2200
4dff95dc 2201 /* calculate new rates and get the topmost changed clock */
ca5e089a 2202 top = clk_calc_new_rates(core, req_rate);
4dff95dc
SB
2203 if (!top)
2204 return -EINVAL;
2205
9a34b453
MS
2206 ret = clk_pm_runtime_get(core);
2207 if (ret)
2208 return ret;
2209
4dff95dc
SB
2210 /* notify that we are about to change rates */
2211 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
2212 if (fail_clk) {
2213 pr_debug("%s: failed to set %s rate\n", __func__,
2214 fail_clk->name);
2215 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
9a34b453
MS
2216 ret = -EBUSY;
2217 goto err;
4dff95dc
SB
2218 }
2219
2220 /* change the rates */
2221 clk_change_rate(top);
2222
2223 core->req_rate = req_rate;
9a34b453
MS
2224err:
2225 clk_pm_runtime_put(core);
4dff95dc 2226
9a34b453 2227 return ret;
a093bde2 2228}
035a61c3
TV
2229
2230/**
4dff95dc
SB
2231 * clk_set_rate - specify a new rate for clk
2232 * @clk: the clk whose rate is being changed
2233 * @rate: the new rate for clk
035a61c3 2234 *
4dff95dc
SB
2235 * In the simplest case clk_set_rate will only adjust the rate of clk.
2236 *
2237 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
2238 * propagate up to clk's parent; whether or not this happens depends on the
2239 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
2240 * after calling .round_rate then upstream parent propagation is ignored. If
2241 * *parent_rate comes back with a new rate for clk's parent then we propagate
2242 * up to clk's parent and set its rate. Upward propagation will continue
2243 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
2244 * .round_rate stops requesting changes to clk's parent_rate.
2245 *
2246 * Rate changes are accomplished via tree traversal that also recalculates the
2247 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
2248 *
2249 * Returns 0 on success, -EERROR otherwise.
035a61c3 2250 */
4dff95dc 2251int clk_set_rate(struct clk *clk, unsigned long rate)
035a61c3 2252{
4dff95dc
SB
2253 int ret;
2254
035a61c3
TV
2255 if (!clk)
2256 return 0;
2257
4dff95dc
SB
2258 /* prevent racing with updates to the clock topology */
2259 clk_prepare_lock();
da0f0b2c 2260
55e9b8b7
JB
2261 if (clk->exclusive_count)
2262 clk_core_rate_unprotect(clk->core);
2263
4dff95dc 2264 ret = clk_core_set_rate_nolock(clk->core, rate);
da0f0b2c 2265
55e9b8b7
JB
2266 if (clk->exclusive_count)
2267 clk_core_rate_protect(clk->core);
2268
4dff95dc 2269 clk_prepare_unlock();
4935b22c 2270
4dff95dc 2271 return ret;
4935b22c 2272}
4dff95dc 2273EXPORT_SYMBOL_GPL(clk_set_rate);
4935b22c 2274
55e9b8b7 2275/**
65e2218d 2276 * clk_set_rate_exclusive - specify a new rate and get exclusive control
55e9b8b7
JB
2277 * @clk: the clk whose rate is being changed
2278 * @rate: the new rate for clk
2279 *
2280 * This is a combination of clk_set_rate() and clk_rate_exclusive_get()
2281 * within a critical section
2282 *
2283 * This can be used initially to ensure that at least 1 consumer is
65e2218d 2284 * satisfied when several consumers are competing for exclusivity over the
55e9b8b7
JB
2285 * same clock provider.
2286 *
2287 * The exclusivity is not applied if setting the rate failed.
2288 *
2289 * Calls to clk_rate_exclusive_get() should be balanced with calls to
2290 * clk_rate_exclusive_put().
2291 *
2292 * Returns 0 on success, -EERROR otherwise.
2293 */
2294int clk_set_rate_exclusive(struct clk *clk, unsigned long rate)
2295{
2296 int ret;
2297
2298 if (!clk)
2299 return 0;
2300
2301 /* prevent racing with updates to the clock topology */
2302 clk_prepare_lock();
2303
2304 /*
2305 * The temporary protection removal is not here, on purpose
2306 * This function is meant to be used instead of clk_rate_protect,
2307 * so before the consumer code path protect the clock provider
2308 */
2309
2310 ret = clk_core_set_rate_nolock(clk->core, rate);
2311 if (!ret) {
2312 clk_core_rate_protect(clk->core);
2313 clk->exclusive_count++;
2314 }
2315
2316 clk_prepare_unlock();
2317
2318 return ret;
2319}
2320EXPORT_SYMBOL_GPL(clk_set_rate_exclusive);
2321
4dff95dc
SB
2322/**
2323 * clk_set_rate_range - set a rate range for a clock source
2324 * @clk: clock source
2325 * @min: desired minimum clock rate in Hz, inclusive
2326 * @max: desired maximum clock rate in Hz, inclusive
2327 *
2328 * Returns success (0) or negative errno.
2329 */
2330int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
4935b22c 2331{
4dff95dc 2332 int ret = 0;
6562fbcf 2333 unsigned long old_min, old_max, rate;
4935b22c 2334
4dff95dc
SB
2335 if (!clk)
2336 return 0;
903efc55 2337
03813d9b
MR
2338 trace_clk_set_rate_range(clk->core, min, max);
2339
4dff95dc
SB
2340 if (min > max) {
2341 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
2342 __func__, clk->core->name, clk->dev_id, clk->con_id,
2343 min, max);
2344 return -EINVAL;
903efc55 2345 }
4935b22c 2346
4dff95dc 2347 clk_prepare_lock();
4935b22c 2348
55e9b8b7
JB
2349 if (clk->exclusive_count)
2350 clk_core_rate_unprotect(clk->core);
2351
6562fbcf
JB
2352 /* Save the current values in case we need to rollback the change */
2353 old_min = clk->min_rate;
2354 old_max = clk->max_rate;
2355 clk->min_rate = min;
2356 clk->max_rate = max;
2357
2358 rate = clk_core_get_rate_nolock(clk->core);
2359 if (rate < min || rate > max) {
2360 /*
2361 * FIXME:
2362 * We are in bit of trouble here, current rate is outside the
2363 * the requested range. We are going try to request appropriate
2364 * range boundary but there is a catch. It may fail for the
2365 * usual reason (clock broken, clock protected, etc) but also
2366 * because:
2367 * - round_rate() was not favorable and fell on the wrong
2368 * side of the boundary
2369 * - the determine_rate() callback does not really check for
2370 * this corner case when determining the rate
2371 */
2372
2373 if (rate < min)
2374 rate = min;
2375 else
2376 rate = max;
2377
2378 ret = clk_core_set_rate_nolock(clk->core, rate);
2379 if (ret) {
2380 /* rollback the changes */
2381 clk->min_rate = old_min;
2382 clk->max_rate = old_max;
2383 }
4935b22c
JH
2384 }
2385
55e9b8b7
JB
2386 if (clk->exclusive_count)
2387 clk_core_rate_protect(clk->core);
2388
4dff95dc 2389 clk_prepare_unlock();
4935b22c 2390
4dff95dc 2391 return ret;
3fa2252b 2392}
4dff95dc 2393EXPORT_SYMBOL_GPL(clk_set_rate_range);
3fa2252b 2394
4dff95dc
SB
2395/**
2396 * clk_set_min_rate - set a minimum clock rate for a clock source
2397 * @clk: clock source
2398 * @rate: desired minimum clock rate in Hz, inclusive
2399 *
2400 * Returns success (0) or negative errno.
2401 */
2402int clk_set_min_rate(struct clk *clk, unsigned long rate)
3fa2252b 2403{
4dff95dc
SB
2404 if (!clk)
2405 return 0;
2406
03813d9b
MR
2407 trace_clk_set_min_rate(clk->core, rate);
2408
4dff95dc 2409 return clk_set_rate_range(clk, rate, clk->max_rate);
3fa2252b 2410}
4dff95dc 2411EXPORT_SYMBOL_GPL(clk_set_min_rate);
3fa2252b 2412
4dff95dc
SB
2413/**
2414 * clk_set_max_rate - set a maximum clock rate for a clock source
2415 * @clk: clock source
2416 * @rate: desired maximum clock rate in Hz, inclusive
2417 *
2418 * Returns success (0) or negative errno.
2419 */
2420int clk_set_max_rate(struct clk *clk, unsigned long rate)
3fa2252b 2421{
4dff95dc
SB
2422 if (!clk)
2423 return 0;
4935b22c 2424
03813d9b
MR
2425 trace_clk_set_max_rate(clk->core, rate);
2426
4dff95dc 2427 return clk_set_rate_range(clk, clk->min_rate, rate);
4935b22c 2428}
4dff95dc 2429EXPORT_SYMBOL_GPL(clk_set_max_rate);
4935b22c 2430
b2476490 2431/**
4dff95dc
SB
2432 * clk_get_parent - return the parent of a clk
2433 * @clk: the clk whose parent gets returned
b2476490 2434 *
4dff95dc 2435 * Simply returns clk->parent. Returns NULL if clk is NULL.
b2476490 2436 */
4dff95dc 2437struct clk *clk_get_parent(struct clk *clk)
b2476490 2438{
4dff95dc 2439 struct clk *parent;
b2476490 2440
fc4a05d4
SB
2441 if (!clk)
2442 return NULL;
2443
4dff95dc 2444 clk_prepare_lock();
fc4a05d4
SB
2445 /* TODO: Create a per-user clk and change callers to call clk_put */
2446 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
4dff95dc 2447 clk_prepare_unlock();
496eadf8 2448
4dff95dc
SB
2449 return parent;
2450}
2451EXPORT_SYMBOL_GPL(clk_get_parent);
b2476490 2452
4dff95dc
SB
2453static struct clk_core *__clk_init_parent(struct clk_core *core)
2454{
5146e0b0 2455 u8 index = 0;
4dff95dc 2456
2430a94d 2457 if (core->num_parents > 1 && core->ops->get_parent)
5146e0b0 2458 index = core->ops->get_parent(core->hw);
b2476490 2459
5146e0b0 2460 return clk_core_get_parent_by_index(core, index);
b2476490
MT
2461}
2462
4dff95dc
SB
2463static void clk_core_reparent(struct clk_core *core,
2464 struct clk_core *new_parent)
b2476490 2465{
4dff95dc
SB
2466 clk_reparent(core, new_parent);
2467 __clk_recalc_accuracies(core);
2468 __clk_recalc_rates(core, POST_RATE_CHANGE);
b2476490
MT
2469}
2470
42c86547
TV
2471void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
2472{
2473 if (!hw)
2474 return;
2475
2476 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
2477}
2478
4dff95dc
SB
2479/**
2480 * clk_has_parent - check if a clock is a possible parent for another
2481 * @clk: clock source
2482 * @parent: parent clock source
2483 *
2484 * This function can be used in drivers that need to check that a clock can be
2485 * the parent of another without actually changing the parent.
2486 *
2487 * Returns true if @parent is a possible parent for @clk, false otherwise.
b2476490 2488 */
4dff95dc 2489bool clk_has_parent(struct clk *clk, struct clk *parent)
b2476490 2490{
4dff95dc 2491 struct clk_core *core, *parent_core;
fc0c209c 2492 int i;
b2476490 2493
4dff95dc
SB
2494 /* NULL clocks should be nops, so return success if either is NULL. */
2495 if (!clk || !parent)
2496 return true;
7452b219 2497
4dff95dc
SB
2498 core = clk->core;
2499 parent_core = parent->core;
71472c0c 2500
4dff95dc
SB
2501 /* Optimize for the case where the parent is already the parent. */
2502 if (core->parent == parent_core)
2503 return true;
1c8e6004 2504
fc0c209c
SB
2505 for (i = 0; i < core->num_parents; i++)
2506 if (!strcmp(core->parents[i].name, parent_core->name))
2507 return true;
2508
2509 return false;
4dff95dc
SB
2510}
2511EXPORT_SYMBOL_GPL(clk_has_parent);
03bc10ab 2512
91baa9ff
JB
2513static int clk_core_set_parent_nolock(struct clk_core *core,
2514 struct clk_core *parent)
4dff95dc
SB
2515{
2516 int ret = 0;
2517 int p_index = 0;
2518 unsigned long p_rate = 0;
2519
91baa9ff
JB
2520 lockdep_assert_held(&prepare_lock);
2521
4dff95dc
SB
2522 if (!core)
2523 return 0;
2524
4dff95dc 2525 if (core->parent == parent)
91baa9ff 2526 return 0;
4dff95dc 2527
ef13e55c 2528 /* verify ops for multi-parent clks */
91baa9ff
JB
2529 if (core->num_parents > 1 && !core->ops->set_parent)
2530 return -EPERM;
7452b219 2531
4dff95dc 2532 /* check that we are allowed to re-parent if the clock is in use */
91baa9ff
JB
2533 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count)
2534 return -EBUSY;
b2476490 2535
e55a839a
JB
2536 if (clk_core_rate_is_protected(core))
2537 return -EBUSY;
b2476490 2538
71472c0c 2539 /* try finding the new parent index */
4dff95dc 2540 if (parent) {
d6968fca 2541 p_index = clk_fetch_parent_index(core, parent);
f1c8b2ed 2542 if (p_index < 0) {
71472c0c 2543 pr_debug("%s: clk %s can not be parent of clk %s\n",
4dff95dc 2544 __func__, parent->name, core->name);
91baa9ff 2545 return p_index;
71472c0c 2546 }
e8f0e68e 2547 p_rate = parent->rate;
b2476490
MT
2548 }
2549
9a34b453
MS
2550 ret = clk_pm_runtime_get(core);
2551 if (ret)
91baa9ff 2552 return ret;
9a34b453 2553
4dff95dc
SB
2554 /* propagate PRE_RATE_CHANGE notifications */
2555 ret = __clk_speculate_rates(core, p_rate);
b2476490 2556
4dff95dc
SB
2557 /* abort if a driver objects */
2558 if (ret & NOTIFY_STOP_MASK)
9a34b453 2559 goto runtime_put;
b2476490 2560
4dff95dc
SB
2561 /* do the re-parent */
2562 ret = __clk_set_parent(core, parent, p_index);
b2476490 2563
4dff95dc
SB
2564 /* propagate rate an accuracy recalculation accordingly */
2565 if (ret) {
2566 __clk_recalc_rates(core, ABORT_RATE_CHANGE);
2567 } else {
2568 __clk_recalc_rates(core, POST_RATE_CHANGE);
2569 __clk_recalc_accuracies(core);
b2476490
MT
2570 }
2571
9a34b453
MS
2572runtime_put:
2573 clk_pm_runtime_put(core);
71472c0c 2574
4dff95dc
SB
2575 return ret;
2576}
b2476490 2577
3567894b
NA
2578int clk_hw_set_parent(struct clk_hw *hw, struct clk_hw *parent)
2579{
2580 return clk_core_set_parent_nolock(hw->core, parent->core);
2581}
2582EXPORT_SYMBOL_GPL(clk_hw_set_parent);
2583
4dff95dc
SB
2584/**
2585 * clk_set_parent - switch the parent of a mux clk
2586 * @clk: the mux clk whose input we are switching
2587 * @parent: the new input to clk
2588 *
2589 * Re-parent clk to use parent as its new input source. If clk is in
2590 * prepared state, the clk will get enabled for the duration of this call. If
2591 * that's not acceptable for a specific clk (Eg: the consumer can't handle
2592 * that, the reparenting is glitchy in hardware, etc), use the
2593 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
2594 *
2595 * After successfully changing clk's parent clk_set_parent will update the
2596 * clk topology, sysfs topology and propagate rate recalculation via
2597 * __clk_recalc_rates.
2598 *
2599 * Returns 0 on success, -EERROR otherwise.
2600 */
2601int clk_set_parent(struct clk *clk, struct clk *parent)
2602{
91baa9ff
JB
2603 int ret;
2604
4dff95dc
SB
2605 if (!clk)
2606 return 0;
2607
91baa9ff 2608 clk_prepare_lock();
55e9b8b7
JB
2609
2610 if (clk->exclusive_count)
2611 clk_core_rate_unprotect(clk->core);
2612
91baa9ff
JB
2613 ret = clk_core_set_parent_nolock(clk->core,
2614 parent ? parent->core : NULL);
55e9b8b7
JB
2615
2616 if (clk->exclusive_count)
2617 clk_core_rate_protect(clk->core);
2618
91baa9ff
JB
2619 clk_prepare_unlock();
2620
2621 return ret;
b2476490 2622}
4dff95dc 2623EXPORT_SYMBOL_GPL(clk_set_parent);
b2476490 2624
9e4d04ad
JB
2625static int clk_core_set_phase_nolock(struct clk_core *core, int degrees)
2626{
2627 int ret = -EINVAL;
2628
2629 lockdep_assert_held(&prepare_lock);
2630
2631 if (!core)
2632 return 0;
2633
e55a839a
JB
2634 if (clk_core_rate_is_protected(core))
2635 return -EBUSY;
2636
9e4d04ad
JB
2637 trace_clk_set_phase(core, degrees);
2638
7f95beea 2639 if (core->ops->set_phase) {
9e4d04ad 2640 ret = core->ops->set_phase(core->hw, degrees);
7f95beea
SL
2641 if (!ret)
2642 core->phase = degrees;
2643 }
9e4d04ad
JB
2644
2645 trace_clk_set_phase_complete(core, degrees);
2646
2647 return ret;
2648}
2649
4dff95dc
SB
2650/**
2651 * clk_set_phase - adjust the phase shift of a clock signal
2652 * @clk: clock signal source
2653 * @degrees: number of degrees the signal is shifted
2654 *
2655 * Shifts the phase of a clock signal by the specified
2656 * degrees. Returns 0 on success, -EERROR otherwise.
2657 *
2658 * This function makes no distinction about the input or reference
2659 * signal that we adjust the clock signal phase against. For example
2660 * phase locked-loop clock signal generators we may shift phase with
2661 * respect to feedback clock signal input, but for other cases the
2662 * clock phase may be shifted with respect to some other, unspecified
2663 * signal.
2664 *
2665 * Additionally the concept of phase shift does not propagate through
2666 * the clock tree hierarchy, which sets it apart from clock rates and
2667 * clock accuracy. A parent clock phase attribute does not have an
2668 * impact on the phase attribute of a child clock.
b2476490 2669 */
4dff95dc 2670int clk_set_phase(struct clk *clk, int degrees)
b2476490 2671{
9e4d04ad 2672 int ret;
b2476490 2673
4dff95dc
SB
2674 if (!clk)
2675 return 0;
b2476490 2676
4dff95dc
SB
2677 /* sanity check degrees */
2678 degrees %= 360;
2679 if (degrees < 0)
2680 degrees += 360;
bf47b4fd 2681
4dff95dc 2682 clk_prepare_lock();
3fa2252b 2683
55e9b8b7
JB
2684 if (clk->exclusive_count)
2685 clk_core_rate_unprotect(clk->core);
3fa2252b 2686
9e4d04ad 2687 ret = clk_core_set_phase_nolock(clk->core, degrees);
3fa2252b 2688
55e9b8b7
JB
2689 if (clk->exclusive_count)
2690 clk_core_rate_protect(clk->core);
b2476490 2691
4dff95dc 2692 clk_prepare_unlock();
dfc202ea 2693
4dff95dc
SB
2694 return ret;
2695}
2696EXPORT_SYMBOL_GPL(clk_set_phase);
b2476490 2697
4dff95dc
SB
2698static int clk_core_get_phase(struct clk_core *core)
2699{
2700 int ret;
b2476490 2701
f21cf9c7
SB
2702 lockdep_assert_held(&prepare_lock);
2703 if (!core->ops->get_phase)
2704 return 0;
2705
1f9c63e8 2706 /* Always try to update cached phase if possible */
f21cf9c7
SB
2707 ret = core->ops->get_phase(core->hw);
2708 if (ret >= 0)
2709 core->phase = ret;
71472c0c 2710
4dff95dc 2711 return ret;
b2476490
MT
2712}
2713
4dff95dc
SB
2714/**
2715 * clk_get_phase - return the phase shift of a clock signal
2716 * @clk: clock signal source
2717 *
2718 * Returns the phase shift of a clock node in degrees, otherwise returns
2719 * -EERROR.
2720 */
2721int clk_get_phase(struct clk *clk)
1c8e6004 2722{
f21cf9c7
SB
2723 int ret;
2724
4dff95dc 2725 if (!clk)
1c8e6004
TV
2726 return 0;
2727
f21cf9c7
SB
2728 clk_prepare_lock();
2729 ret = clk_core_get_phase(clk->core);
2730 clk_prepare_unlock();
2731
2732 return ret;
4dff95dc
SB
2733}
2734EXPORT_SYMBOL_GPL(clk_get_phase);
1c8e6004 2735
9fba738a
JB
2736static void clk_core_reset_duty_cycle_nolock(struct clk_core *core)
2737{
2738 /* Assume a default value of 50% */
2739 core->duty.num = 1;
2740 core->duty.den = 2;
2741}
2742
2743static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core);
2744
2745static int clk_core_update_duty_cycle_nolock(struct clk_core *core)
2746{
2747 struct clk_duty *duty = &core->duty;
2748 int ret = 0;
2749
2750 if (!core->ops->get_duty_cycle)
2751 return clk_core_update_duty_cycle_parent_nolock(core);
2752
2753 ret = core->ops->get_duty_cycle(core->hw, duty);
2754 if (ret)
2755 goto reset;
2756
2757 /* Don't trust the clock provider too much */
2758 if (duty->den == 0 || duty->num > duty->den) {
2759 ret = -EINVAL;
2760 goto reset;
2761 }
2762
2763 return 0;
2764
2765reset:
2766 clk_core_reset_duty_cycle_nolock(core);
2767 return ret;
2768}
2769
2770static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core)
2771{
2772 int ret = 0;
2773
2774 if (core->parent &&
2775 core->flags & CLK_DUTY_CYCLE_PARENT) {
2776 ret = clk_core_update_duty_cycle_nolock(core->parent);
2777 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2778 } else {
2779 clk_core_reset_duty_cycle_nolock(core);
2780 }
2781
2782 return ret;
2783}
2784
2785static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
2786 struct clk_duty *duty);
2787
2788static int clk_core_set_duty_cycle_nolock(struct clk_core *core,
2789 struct clk_duty *duty)
2790{
2791 int ret;
2792
2793 lockdep_assert_held(&prepare_lock);
2794
2795 if (clk_core_rate_is_protected(core))
2796 return -EBUSY;
2797
2798 trace_clk_set_duty_cycle(core, duty);
2799
2800 if (!core->ops->set_duty_cycle)
2801 return clk_core_set_duty_cycle_parent_nolock(core, duty);
2802
2803 ret = core->ops->set_duty_cycle(core->hw, duty);
2804 if (!ret)
2805 memcpy(&core->duty, duty, sizeof(*duty));
2806
2807 trace_clk_set_duty_cycle_complete(core, duty);
2808
2809 return ret;
2810}
2811
2812static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
2813 struct clk_duty *duty)
2814{
2815 int ret = 0;
2816
2817 if (core->parent &&
2818 core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
2819 ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
2820 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2821 }
2822
2823 return ret;
2824}
2825
2826/**
2827 * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
2828 * @clk: clock signal source
2829 * @num: numerator of the duty cycle ratio to be applied
2830 * @den: denominator of the duty cycle ratio to be applied
2831 *
2832 * Apply the duty cycle ratio if the ratio is valid and the clock can
2833 * perform this operation
2834 *
2835 * Returns (0) on success, a negative errno otherwise.
2836 */
2837int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den)
2838{
2839 int ret;
2840 struct clk_duty duty;
2841
2842 if (!clk)
2843 return 0;
2844
2845 /* sanity check the ratio */
2846 if (den == 0 || num > den)
2847 return -EINVAL;
2848
2849 duty.num = num;
2850 duty.den = den;
2851
2852 clk_prepare_lock();
2853
2854 if (clk->exclusive_count)
2855 clk_core_rate_unprotect(clk->core);
2856
2857 ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
2858
2859 if (clk->exclusive_count)
2860 clk_core_rate_protect(clk->core);
2861
2862 clk_prepare_unlock();
2863
2864 return ret;
2865}
2866EXPORT_SYMBOL_GPL(clk_set_duty_cycle);
2867
2868static int clk_core_get_scaled_duty_cycle(struct clk_core *core,
2869 unsigned int scale)
2870{
2871 struct clk_duty *duty = &core->duty;
2872 int ret;
2873
2874 clk_prepare_lock();
2875
2876 ret = clk_core_update_duty_cycle_nolock(core);
2877 if (!ret)
2878 ret = mult_frac(scale, duty->num, duty->den);
2879
2880 clk_prepare_unlock();
2881
2882 return ret;
2883}
2884
2885/**
2886 * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
2887 * @clk: clock signal source
2888 * @scale: scaling factor to be applied to represent the ratio as an integer
2889 *
2890 * Returns the duty cycle ratio of a clock node multiplied by the provided
2891 * scaling factor, or negative errno on error.
2892 */
2893int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale)
2894{
2895 if (!clk)
2896 return 0;
2897
2898 return clk_core_get_scaled_duty_cycle(clk->core, scale);
2899}
2900EXPORT_SYMBOL_GPL(clk_get_scaled_duty_cycle);
2901
4dff95dc
SB
2902/**
2903 * clk_is_match - check if two clk's point to the same hardware clock
2904 * @p: clk compared against q
2905 * @q: clk compared against p
2906 *
2907 * Returns true if the two struct clk pointers both point to the same hardware
2908 * clock node. Put differently, returns true if struct clk *p and struct clk *q
2909 * share the same struct clk_core object.
2910 *
2911 * Returns false otherwise. Note that two NULL clks are treated as matching.
2912 */
2913bool clk_is_match(const struct clk *p, const struct clk *q)
2914{
2915 /* trivial case: identical struct clk's or both NULL */
2916 if (p == q)
2917 return true;
1c8e6004 2918
3fe003f9 2919 /* true if clk->core pointers match. Avoid dereferencing garbage */
4dff95dc
SB
2920 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
2921 if (p->core == q->core)
2922 return true;
1c8e6004 2923
4dff95dc
SB
2924 return false;
2925}
2926EXPORT_SYMBOL_GPL(clk_is_match);
1c8e6004 2927
4dff95dc 2928/*** debugfs support ***/
1c8e6004 2929
4dff95dc
SB
2930#ifdef CONFIG_DEBUG_FS
2931#include <linux/debugfs.h>
1c8e6004 2932
4dff95dc
SB
2933static struct dentry *rootdir;
2934static int inited = 0;
2935static DEFINE_MUTEX(clk_debug_lock);
2936static HLIST_HEAD(clk_debug_list);
1c8e6004 2937
4dff95dc
SB
2938static struct hlist_head *orphan_list[] = {
2939 &clk_orphan_list,
2940 NULL,
2941};
2942
2943static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
2944 int level)
b2476490 2945{
f21cf9c7
SB
2946 int phase;
2947
2948 seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu ",
4dff95dc
SB
2949 level * 3 + 1, "",
2950 30 - level * 3, c->name,
e55a839a 2951 c->enable_count, c->prepare_count, c->protect_count,
0daa376d
SB
2952 clk_core_get_rate_recalc(c),
2953 clk_core_get_accuracy_recalc(c));
f21cf9c7
SB
2954
2955 phase = clk_core_get_phase(c);
2956 if (phase >= 0)
2957 seq_printf(s, "%5d", phase);
2958 else
2959 seq_puts(s, "-----");
2960
bf6d43d7
DO
2961 seq_printf(s, " %6d", clk_core_get_scaled_duty_cycle(c, 100000));
2962
2963 if (c->ops->is_enabled)
2964 seq_printf(s, " %9c\n", clk_core_is_enabled(c) ? 'Y' : 'N');
2965 else if (!c->ops->enable)
2966 seq_printf(s, " %9c\n", 'Y');
2967 else
2968 seq_printf(s, " %9c\n", '?');
4dff95dc 2969}
89ac8d7a 2970
4dff95dc
SB
2971static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
2972 int level)
2973{
2974 struct clk_core *child;
b2476490 2975
4dff95dc 2976 clk_summary_show_one(s, c, level);
0e1c0301 2977
4dff95dc
SB
2978 hlist_for_each_entry(child, &c->children, child_node)
2979 clk_summary_show_subtree(s, child, level + 1);
1c8e6004 2980}
b2476490 2981
4dff95dc 2982static int clk_summary_show(struct seq_file *s, void *data)
1c8e6004 2983{
4dff95dc
SB
2984 struct clk_core *c;
2985 struct hlist_head **lists = (struct hlist_head **)s->private;
1c8e6004 2986
bf6d43d7
DO
2987 seq_puts(s, " enable prepare protect duty hardware\n");
2988 seq_puts(s, " clock count count count rate accuracy phase cycle enable\n");
2989 seq_puts(s, "-------------------------------------------------------------------------------------------------------\n");
b2476490 2990
1c8e6004
TV
2991 clk_prepare_lock();
2992
4dff95dc
SB
2993 for (; *lists; lists++)
2994 hlist_for_each_entry(c, *lists, child_node)
2995 clk_summary_show_subtree(s, c, 0);
b2476490 2996
eab89f69 2997 clk_prepare_unlock();
b2476490 2998
4dff95dc 2999 return 0;
b2476490 3000}
fec0ef3f 3001DEFINE_SHOW_ATTRIBUTE(clk_summary);
b2476490 3002
4dff95dc
SB
3003static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
3004{
f21cf9c7 3005 int phase;
1bd37a46
LC
3006 unsigned long min_rate, max_rate;
3007
1bd37a46 3008 clk_core_get_boundaries(c, &min_rate, &max_rate);
b2476490 3009
7cb81136 3010 /* This should be JSON format, i.e. elements separated with a comma */
4dff95dc
SB
3011 seq_printf(s, "\"%s\": { ", c->name);
3012 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
3013 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
e55a839a 3014 seq_printf(s, "\"protect_count\": %d,", c->protect_count);
0daa376d 3015 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate_recalc(c));
1bd37a46
LC
3016 seq_printf(s, "\"min_rate\": %lu,", min_rate);
3017 seq_printf(s, "\"max_rate\": %lu,", max_rate);
0daa376d 3018 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy_recalc(c));
f21cf9c7
SB
3019 phase = clk_core_get_phase(c);
3020 if (phase >= 0)
3021 seq_printf(s, "\"phase\": %d,", phase);
9fba738a
JB
3022 seq_printf(s, "\"duty_cycle\": %u",
3023 clk_core_get_scaled_duty_cycle(c, 100000));
b2476490 3024}
b2476490 3025
4dff95dc 3026static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
b2476490 3027{
4dff95dc 3028 struct clk_core *child;
b2476490 3029
4dff95dc 3030 clk_dump_one(s, c, level);
b2476490 3031
4dff95dc 3032 hlist_for_each_entry(child, &c->children, child_node) {
4d327586 3033 seq_putc(s, ',');
4dff95dc 3034 clk_dump_subtree(s, child, level + 1);
b2476490
MT
3035 }
3036
4d327586 3037 seq_putc(s, '}');
b2476490
MT
3038}
3039
fec0ef3f 3040static int clk_dump_show(struct seq_file *s, void *data)
4e88f3de 3041{
4dff95dc
SB
3042 struct clk_core *c;
3043 bool first_node = true;
3044 struct hlist_head **lists = (struct hlist_head **)s->private;
4e88f3de 3045
4d327586 3046 seq_putc(s, '{');
4dff95dc 3047 clk_prepare_lock();
035a61c3 3048
4dff95dc
SB
3049 for (; *lists; lists++) {
3050 hlist_for_each_entry(c, *lists, child_node) {
3051 if (!first_node)
4d327586 3052 seq_putc(s, ',');
4dff95dc
SB
3053 first_node = false;
3054 clk_dump_subtree(s, c, 0);
3055 }
3056 }
4e88f3de 3057
4dff95dc 3058 clk_prepare_unlock();
4e88f3de 3059
70e9f4dd 3060 seq_puts(s, "}\n");
4dff95dc 3061 return 0;
4e88f3de 3062}
fec0ef3f 3063DEFINE_SHOW_ATTRIBUTE(clk_dump);
89ac8d7a 3064
37215da5
GU
3065#undef CLOCK_ALLOW_WRITE_DEBUGFS
3066#ifdef CLOCK_ALLOW_WRITE_DEBUGFS
3067/*
3068 * This can be dangerous, therefore don't provide any real compile time
3069 * configuration option for this feature.
3070 * People who want to use this will need to modify the source code directly.
3071 */
3072static int clk_rate_set(void *data, u64 val)
3073{
3074 struct clk_core *core = data;
3075 int ret;
3076
3077 clk_prepare_lock();
3078 ret = clk_core_set_rate_nolock(core, val);
3079 clk_prepare_unlock();
3080
3081 return ret;
3082}
3083
3084#define clk_rate_mode 0644
03111b10
MT
3085
3086static int clk_prepare_enable_set(void *data, u64 val)
3087{
3088 struct clk_core *core = data;
3089 int ret = 0;
3090
3091 if (val)
3092 ret = clk_prepare_enable(core->hw->clk);
3093 else
3094 clk_disable_unprepare(core->hw->clk);
3095
3096 return ret;
3097}
3098
3099static int clk_prepare_enable_get(void *data, u64 *val)
3100{
3101 struct clk_core *core = data;
3102
3103 *val = core->enable_count && core->prepare_count;
3104 return 0;
3105}
3106
3107DEFINE_DEBUGFS_ATTRIBUTE(clk_prepare_enable_fops, clk_prepare_enable_get,
3108 clk_prepare_enable_set, "%llu\n");
3109
37215da5
GU
3110#else
3111#define clk_rate_set NULL
3112#define clk_rate_mode 0444
3113#endif
3114
3115static int clk_rate_get(void *data, u64 *val)
3116{
3117 struct clk_core *core = data;
3118
3119 *val = core->rate;
3120 return 0;
3121}
3122
3123DEFINE_DEBUGFS_ATTRIBUTE(clk_rate_fops, clk_rate_get, clk_rate_set, "%llu\n");
3124
a6059ab9
GU
3125static const struct {
3126 unsigned long flag;
3127 const char *name;
3128} clk_flags[] = {
40dd71c7 3129#define ENTRY(f) { f, #f }
a6059ab9
GU
3130 ENTRY(CLK_SET_RATE_GATE),
3131 ENTRY(CLK_SET_PARENT_GATE),
3132 ENTRY(CLK_SET_RATE_PARENT),
3133 ENTRY(CLK_IGNORE_UNUSED),
a6059ab9
GU
3134 ENTRY(CLK_GET_RATE_NOCACHE),
3135 ENTRY(CLK_SET_RATE_NO_REPARENT),
3136 ENTRY(CLK_GET_ACCURACY_NOCACHE),
3137 ENTRY(CLK_RECALC_NEW_RATES),
3138 ENTRY(CLK_SET_RATE_UNGATE),
3139 ENTRY(CLK_IS_CRITICAL),
3140 ENTRY(CLK_OPS_PARENT_ENABLE),
9fba738a 3141 ENTRY(CLK_DUTY_CYCLE_PARENT),
a6059ab9
GU
3142#undef ENTRY
3143};
3144
fec0ef3f 3145static int clk_flags_show(struct seq_file *s, void *data)
a6059ab9
GU
3146{
3147 struct clk_core *core = s->private;
3148 unsigned long flags = core->flags;
3149 unsigned int i;
3150
3151 for (i = 0; flags && i < ARRAY_SIZE(clk_flags); i++) {
3152 if (flags & clk_flags[i].flag) {
3153 seq_printf(s, "%s\n", clk_flags[i].name);
3154 flags &= ~clk_flags[i].flag;
3155 }
3156 }
3157 if (flags) {
3158 /* Unknown flags */
3159 seq_printf(s, "0x%lx\n", flags);
3160 }
3161
3162 return 0;
3163}
fec0ef3f 3164DEFINE_SHOW_ATTRIBUTE(clk_flags);
a6059ab9 3165
11f6c230
SB
3166static void possible_parent_show(struct seq_file *s, struct clk_core *core,
3167 unsigned int i, char terminator)
92031575 3168{
2d156b78 3169 struct clk_core *parent;
92031575 3170
2d156b78
CYT
3171 /*
3172 * Go through the following options to fetch a parent's name.
3173 *
3174 * 1. Fetch the registered parent clock and use its name
3175 * 2. Use the global (fallback) name if specified
3176 * 3. Use the local fw_name if provided
3177 * 4. Fetch parent clock's clock-output-name if DT index was set
3178 *
3179 * This may still fail in some cases, such as when the parent is
3180 * specified directly via a struct clk_hw pointer, but it isn't
3181 * registered (yet).
3182 */
2d156b78
CYT
3183 parent = clk_core_get_parent_by_index(core, i);
3184 if (parent)
1ccc0ddf 3185 seq_puts(s, parent->name);
2d156b78 3186 else if (core->parents[i].name)
1ccc0ddf 3187 seq_puts(s, core->parents[i].name);
2d156b78
CYT
3188 else if (core->parents[i].fw_name)
3189 seq_printf(s, "<%s>(fw)", core->parents[i].fw_name);
3190 else if (core->parents[i].index >= 0)
1ccc0ddf
ME
3191 seq_puts(s,
3192 of_clk_get_parent_name(core->of_node,
3193 core->parents[i].index));
2d156b78
CYT
3194 else
3195 seq_puts(s, "(missing)");
92031575 3196
11f6c230
SB
3197 seq_putc(s, terminator);
3198}
3199
fec0ef3f 3200static int possible_parents_show(struct seq_file *s, void *data)
92031575
PDS
3201{
3202 struct clk_core *core = s->private;
3203 int i;
3204
3205 for (i = 0; i < core->num_parents - 1; i++)
11f6c230 3206 possible_parent_show(s, core, i, ' ');
92031575 3207
11f6c230 3208 possible_parent_show(s, core, i, '\n');
92031575
PDS
3209
3210 return 0;
3211}
fec0ef3f 3212DEFINE_SHOW_ATTRIBUTE(possible_parents);
92031575 3213
e5e89247
LC
3214static int current_parent_show(struct seq_file *s, void *data)
3215{
3216 struct clk_core *core = s->private;
3217
3218 if (core->parent)
3219 seq_printf(s, "%s\n", core->parent->name);
3220
3221 return 0;
3222}
3223DEFINE_SHOW_ATTRIBUTE(current_parent);
3224
9fba738a
JB
3225static int clk_duty_cycle_show(struct seq_file *s, void *data)
3226{
3227 struct clk_core *core = s->private;
3228 struct clk_duty *duty = &core->duty;
3229
3230 seq_printf(s, "%u/%u\n", duty->num, duty->den);
3231
3232 return 0;
3233}
3234DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle);
3235
1bd37a46
LC
3236static int clk_min_rate_show(struct seq_file *s, void *data)
3237{
3238 struct clk_core *core = s->private;
3239 unsigned long min_rate, max_rate;
3240
3241 clk_prepare_lock();
3242 clk_core_get_boundaries(core, &min_rate, &max_rate);
3243 clk_prepare_unlock();
3244 seq_printf(s, "%lu\n", min_rate);
3245
3246 return 0;
3247}
3248DEFINE_SHOW_ATTRIBUTE(clk_min_rate);
3249
3250static int clk_max_rate_show(struct seq_file *s, void *data)
3251{
3252 struct clk_core *core = s->private;
3253 unsigned long min_rate, max_rate;
3254
3255 clk_prepare_lock();
3256 clk_core_get_boundaries(core, &min_rate, &max_rate);
3257 clk_prepare_unlock();
3258 seq_printf(s, "%lu\n", max_rate);
3259
3260 return 0;
3261}
3262DEFINE_SHOW_ATTRIBUTE(clk_max_rate);
3263
8a26bbbb 3264static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
4dff95dc 3265{
8a26bbbb 3266 struct dentry *root;
b61c43c0 3267
8a26bbbb
GKH
3268 if (!core || !pdentry)
3269 return;
b2476490 3270
8a26bbbb
GKH
3271 root = debugfs_create_dir(core->name, pdentry);
3272 core->dentry = root;
92031575 3273
37215da5
GU
3274 debugfs_create_file("clk_rate", clk_rate_mode, root, core,
3275 &clk_rate_fops);
1bd37a46
LC
3276 debugfs_create_file("clk_min_rate", 0444, root, core, &clk_min_rate_fops);
3277 debugfs_create_file("clk_max_rate", 0444, root, core, &clk_max_rate_fops);
8a26bbbb
GKH
3278 debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
3279 debugfs_create_u32("clk_phase", 0444, root, &core->phase);
3280 debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops);
3281 debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
3282 debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
3283 debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
3284 debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
9fba738a
JB
3285 debugfs_create_file("clk_duty_cycle", 0444, root, core,
3286 &clk_duty_cycle_fops);
03111b10
MT
3287#ifdef CLOCK_ALLOW_WRITE_DEBUGFS
3288 debugfs_create_file("clk_prepare_enable", 0644, root, core,
3289 &clk_prepare_enable_fops);
3290#endif
b2476490 3291
e5e89247
LC
3292 if (core->num_parents > 0)
3293 debugfs_create_file("clk_parent", 0444, root, core,
3294 &current_parent_fops);
3295
8a26bbbb
GKH
3296 if (core->num_parents > 1)
3297 debugfs_create_file("clk_possible_parents", 0444, root, core,
3298 &possible_parents_fops);
b2476490 3299
8a26bbbb
GKH
3300 if (core->ops->debug_init)
3301 core->ops->debug_init(core->hw, core->dentry);
b2476490 3302}
035a61c3
TV
3303
3304/**
6e5ab41b
SB
3305 * clk_debug_register - add a clk node to the debugfs clk directory
3306 * @core: the clk being added to the debugfs clk directory
035a61c3 3307 *
6e5ab41b
SB
3308 * Dynamically adds a clk to the debugfs clk directory if debugfs has been
3309 * initialized. Otherwise it bails out early since the debugfs clk directory
4dff95dc 3310 * will be created lazily by clk_debug_init as part of a late_initcall.
035a61c3 3311 */
8a26bbbb 3312static void clk_debug_register(struct clk_core *core)
035a61c3 3313{
4dff95dc
SB
3314 mutex_lock(&clk_debug_lock);
3315 hlist_add_head(&core->debug_node, &clk_debug_list);
db3188fa 3316 if (inited)
8a26bbbb 3317 clk_debug_create_one(core, rootdir);
4dff95dc 3318 mutex_unlock(&clk_debug_lock);
035a61c3 3319}
b2476490 3320
4dff95dc 3321 /**
6e5ab41b
SB
3322 * clk_debug_unregister - remove a clk node from the debugfs clk directory
3323 * @core: the clk being removed from the debugfs clk directory
e59c5371 3324 *
6e5ab41b
SB
3325 * Dynamically removes a clk and all its child nodes from the
3326 * debugfs clk directory if clk->dentry points to debugfs created by
706d5c73 3327 * clk_debug_register in __clk_core_init.
e59c5371 3328 */
4dff95dc 3329static void clk_debug_unregister(struct clk_core *core)
e59c5371 3330{
4dff95dc
SB
3331 mutex_lock(&clk_debug_lock);
3332 hlist_del_init(&core->debug_node);
3333 debugfs_remove_recursive(core->dentry);
3334 core->dentry = NULL;
3335 mutex_unlock(&clk_debug_lock);
3336}
e59c5371 3337
4dff95dc 3338/**
6e5ab41b 3339 * clk_debug_init - lazily populate the debugfs clk directory
4dff95dc 3340 *
6e5ab41b
SB
3341 * clks are often initialized very early during boot before memory can be
3342 * dynamically allocated and well before debugfs is setup. This function
3343 * populates the debugfs clk directory once at boot-time when we know that
3344 * debugfs is setup. It should only be called once at boot-time, all other clks
3345 * added dynamically will be done so with clk_debug_register.
4dff95dc
SB
3346 */
3347static int __init clk_debug_init(void)
3348{
3349 struct clk_core *core;
dfc202ea 3350
4dff95dc 3351 rootdir = debugfs_create_dir("clk", NULL);
e59c5371 3352
8a26bbbb
GKH
3353 debugfs_create_file("clk_summary", 0444, rootdir, &all_lists,
3354 &clk_summary_fops);
3355 debugfs_create_file("clk_dump", 0444, rootdir, &all_lists,
3356 &clk_dump_fops);
3357 debugfs_create_file("clk_orphan_summary", 0444, rootdir, &orphan_list,
3358 &clk_summary_fops);
3359 debugfs_create_file("clk_orphan_dump", 0444, rootdir, &orphan_list,
3360 &clk_dump_fops);
e59c5371 3361
4dff95dc
SB
3362 mutex_lock(&clk_debug_lock);
3363 hlist_for_each_entry(core, &clk_debug_list, debug_node)
3364 clk_debug_create_one(core, rootdir);
e59c5371 3365
4dff95dc
SB
3366 inited = 1;
3367 mutex_unlock(&clk_debug_lock);
e59c5371 3368
4dff95dc
SB
3369 return 0;
3370}
3371late_initcall(clk_debug_init);
3372#else
8a26bbbb 3373static inline void clk_debug_register(struct clk_core *core) { }
4dff95dc 3374static inline void clk_debug_unregister(struct clk_core *core)
3d3801ef 3375{
3d3801ef 3376}
4dff95dc 3377#endif
3d3801ef 3378
66d95064
JB
3379static void clk_core_reparent_orphans_nolock(void)
3380{
3381 struct clk_core *orphan;
3382 struct hlist_node *tmp2;
3383
3384 /*
3385 * walk the list of orphan clocks and reparent any that newly finds a
3386 * parent.
3387 */
3388 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
3389 struct clk_core *parent = __clk_init_parent(orphan);
3390
3391 /*
3392 * We need to use __clk_set_parent_before() and _after() to
3393 * to properly migrate any prepare/enable count of the orphan
3394 * clock. This is important for CLK_IS_CRITICAL clocks, which
3395 * are enabled during init but might not have a parent yet.
3396 */
3397 if (parent) {
3398 /* update the clk tree topology */
3399 __clk_set_parent_before(orphan, parent);
3400 __clk_set_parent_after(orphan, parent, NULL);
3401 __clk_recalc_accuracies(orphan);
3402 __clk_recalc_rates(orphan, 0);
3403 }
3404 }
3405}
3406
b2476490 3407/**
be45ebf2 3408 * __clk_core_init - initialize the data structures in a struct clk_core
d35c80c2 3409 * @core: clk_core being initialized
b2476490 3410 *
035a61c3 3411 * Initializes the lists in struct clk_core, queries the hardware for the
b2476490 3412 * parent and rate and sets them both.
b2476490 3413 */
be45ebf2 3414static int __clk_core_init(struct clk_core *core)
b2476490 3415{
fc0c209c 3416 int ret;
768a5d4f 3417 struct clk_core *parent;
1c8e6004 3418 unsigned long rate;
c3944ec8 3419 int phase;
b2476490 3420
d35c80c2 3421 if (!core)
d1302a36 3422 return -EINVAL;
b2476490 3423
eab89f69 3424 clk_prepare_lock();
b2476490 3425
9a34b453
MS
3426 ret = clk_pm_runtime_get(core);
3427 if (ret)
3428 goto unlock;
3429
b2476490 3430 /* check to see if a clock with this name is already registered */
d6968fca 3431 if (clk_core_lookup(core->name)) {
d1302a36 3432 pr_debug("%s: clk %s already initialized\n",
d6968fca 3433 __func__, core->name);
d1302a36 3434 ret = -EEXIST;
b2476490 3435 goto out;
d1302a36 3436 }
b2476490 3437
5fb94e9c 3438 /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */
d6968fca
SB
3439 if (core->ops->set_rate &&
3440 !((core->ops->round_rate || core->ops->determine_rate) &&
3441 core->ops->recalc_rate)) {
c44fccb5
MY
3442 pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
3443 __func__, core->name);
d1302a36 3444 ret = -EINVAL;
d4d7e3dd
MT
3445 goto out;
3446 }
3447
d6968fca 3448 if (core->ops->set_parent && !core->ops->get_parent) {
c44fccb5
MY
3449 pr_err("%s: %s must implement .get_parent & .set_parent\n",
3450 __func__, core->name);
d1302a36 3451 ret = -EINVAL;
d4d7e3dd
MT
3452 goto out;
3453 }
3454
3c8e77dd
MY
3455 if (core->num_parents > 1 && !core->ops->get_parent) {
3456 pr_err("%s: %s must implement .get_parent as it has multi parents\n",
3457 __func__, core->name);
3458 ret = -EINVAL;
3459 goto out;
3460 }
3461
d6968fca
SB
3462 if (core->ops->set_rate_and_parent &&
3463 !(core->ops->set_parent && core->ops->set_rate)) {
c44fccb5 3464 pr_err("%s: %s must implement .set_parent & .set_rate\n",
d6968fca 3465 __func__, core->name);
3fa2252b
SB
3466 ret = -EINVAL;
3467 goto out;
3468 }
3469
f6fa75ca
JB
3470 /*
3471 * optional platform-specific magic
3472 *
3473 * The .init callback is not used by any of the basic clock types, but
89d079dc
JB
3474 * exists for weird hardware that must perform initialization magic for
3475 * CCF to get an accurate view of clock for any other callbacks. It may
3476 * also be used needs to perform dynamic allocations. Such allocation
3477 * must be freed in the terminate() callback.
3478 * This callback shall not be used to initialize the parameters state,
3479 * such as rate, parent, etc ...
f6fa75ca
JB
3480 *
3481 * If it exist, this callback should called before any other callback of
3482 * the clock
3483 */
89d079dc
JB
3484 if (core->ops->init) {
3485 ret = core->ops->init(core->hw);
3486 if (ret)
3487 goto out;
3488 }
f6fa75ca 3489
768a5d4f 3490 parent = core->parent = __clk_init_parent(core);
b2476490
MT
3491
3492 /*
706d5c73
SB
3493 * Populate core->parent if parent has already been clk_core_init'd. If
3494 * parent has not yet been clk_core_init'd then place clk in the orphan
47b0eeb3 3495 * list. If clk doesn't have any parents then place it in the root
b2476490
MT
3496 * clk list.
3497 *
3498 * Every time a new clk is clk_init'd then we walk the list of orphan
3499 * clocks and re-parent any that are children of the clock currently
3500 * being clk_init'd.
3501 */
768a5d4f
SB
3502 if (parent) {
3503 hlist_add_head(&core->child_node, &parent->children);
3504 core->orphan = parent->orphan;
47b0eeb3 3505 } else if (!core->num_parents) {
d6968fca 3506 hlist_add_head(&core->child_node, &clk_root_list);
e6500344
HS
3507 core->orphan = false;
3508 } else {
d6968fca 3509 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
3510 core->orphan = true;
3511 }
b2476490 3512
5279fc40
BB
3513 /*
3514 * Set clk's accuracy. The preferred method is to use
3515 * .recalc_accuracy. For simple clocks and lazy developers the default
3516 * fallback is to use the parent's accuracy. If a clock doesn't have a
3517 * parent (or is orphaned) then accuracy is set to zero (perfect
3518 * clock).
3519 */
d6968fca
SB
3520 if (core->ops->recalc_accuracy)
3521 core->accuracy = core->ops->recalc_accuracy(core->hw,
0daa376d 3522 clk_core_get_accuracy_no_lock(parent));
768a5d4f
SB
3523 else if (parent)
3524 core->accuracy = parent->accuracy;
5279fc40 3525 else
d6968fca 3526 core->accuracy = 0;
5279fc40 3527
9824cf73 3528 /*
f21cf9c7 3529 * Set clk's phase by clk_core_get_phase() caching the phase.
9824cf73
MR
3530 * Since a phase is by definition relative to its parent, just
3531 * query the current clock phase, or just assume it's in phase.
3532 */
c3944ec8
MR
3533 phase = clk_core_get_phase(core);
3534 if (phase < 0) {
3535 ret = phase;
27608786
SB
3536 pr_warn("%s: Failed to get phase for clk '%s'\n", __func__,
3537 core->name);
3538 goto out;
3539 }
9824cf73 3540
9fba738a
JB
3541 /*
3542 * Set clk's duty cycle.
3543 */
3544 clk_core_update_duty_cycle_nolock(core);
3545
b2476490
MT
3546 /*
3547 * Set clk's rate. The preferred method is to use .recalc_rate. For
3548 * simple clocks and lazy developers the default fallback is to use the
3549 * parent's rate. If a clock doesn't have a parent (or is orphaned)
3550 * then rate is set to zero.
3551 */
d6968fca
SB
3552 if (core->ops->recalc_rate)
3553 rate = core->ops->recalc_rate(core->hw,
768a5d4f
SB
3554 clk_core_get_rate_nolock(parent));
3555 else if (parent)
3556 rate = parent->rate;
b2476490 3557 else
1c8e6004 3558 rate = 0;
d6968fca 3559 core->rate = core->req_rate = rate;
b2476490 3560
99652a46
JB
3561 /*
3562 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
3563 * don't get accidentally disabled when walking the orphan tree and
3564 * reparenting clocks
3565 */
3566 if (core->flags & CLK_IS_CRITICAL) {
3567 unsigned long flags;
3568
12ead774 3569 ret = clk_core_prepare(core);
2d269992
SB
3570 if (ret) {
3571 pr_warn("%s: critical clk '%s' failed to prepare\n",
3572 __func__, core->name);
12ead774 3573 goto out;
2d269992 3574 }
99652a46
JB
3575
3576 flags = clk_enable_lock();
12ead774 3577 ret = clk_core_enable(core);
99652a46 3578 clk_enable_unlock(flags);
12ead774 3579 if (ret) {
2d269992
SB
3580 pr_warn("%s: critical clk '%s' failed to enable\n",
3581 __func__, core->name);
12ead774
GR
3582 clk_core_unprepare(core);
3583 goto out;
3584 }
99652a46
JB
3585 }
3586
66d95064 3587 clk_core_reparent_orphans_nolock();
1f61e5f1 3588
b2476490 3589
d6968fca 3590 kref_init(&core->ref);
b2476490 3591out:
9a34b453
MS
3592 clk_pm_runtime_put(core);
3593unlock:
018d4671
MZ
3594 if (ret)
3595 hlist_del_init(&core->child_node);
3596
eab89f69 3597 clk_prepare_unlock();
b2476490 3598
89f7e9de 3599 if (!ret)
d6968fca 3600 clk_debug_register(core);
89f7e9de 3601
d1302a36 3602 return ret;
b2476490
MT
3603}
3604
1df4046a
SB
3605/**
3606 * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core
3607 * @core: clk to add consumer to
3608 * @clk: consumer to link to a clk
3609 */
3610static void clk_core_link_consumer(struct clk_core *core, struct clk *clk)
3611{
3612 clk_prepare_lock();
3613 hlist_add_head(&clk->clks_node, &core->clks);
3614 clk_prepare_unlock();
3615}
3616
3617/**
3618 * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core
3619 * @clk: consumer to unlink
3620 */
3621static void clk_core_unlink_consumer(struct clk *clk)
3622{
3623 lockdep_assert_held(&prepare_lock);
3624 hlist_del(&clk->clks_node);
3625}
3626
3627/**
3628 * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core
3629 * @core: clk to allocate a consumer for
3630 * @dev_id: string describing device name
3631 * @con_id: connection ID string on device
3632 *
3633 * Returns: clk consumer left unlinked from the consumer list
3634 */
3635static struct clk *alloc_clk(struct clk_core *core, const char *dev_id,
035a61c3 3636 const char *con_id)
0197b3ea 3637{
0197b3ea
SK
3638 struct clk *clk;
3639
035a61c3
TV
3640 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
3641 if (!clk)
3642 return ERR_PTR(-ENOMEM);
3643
1df4046a 3644 clk->core = core;
035a61c3 3645 clk->dev_id = dev_id;
253160a8 3646 clk->con_id = kstrdup_const(con_id, GFP_KERNEL);
1c8e6004
TV
3647 clk->max_rate = ULONG_MAX;
3648
0197b3ea
SK
3649 return clk;
3650}
035a61c3 3651
1df4046a
SB
3652/**
3653 * free_clk - Free a clk consumer
3654 * @clk: clk consumer to free
3655 *
3656 * Note, this assumes the clk has been unlinked from the clk_core consumer
3657 * list.
3658 */
3659static void free_clk(struct clk *clk)
1c8e6004 3660{
253160a8 3661 kfree_const(clk->con_id);
1c8e6004
TV
3662 kfree(clk);
3663}
0197b3ea 3664
1df4046a
SB
3665/**
3666 * clk_hw_create_clk: Allocate and link a clk consumer to a clk_core given
3667 * a clk_hw
efa85048 3668 * @dev: clk consumer device
1df4046a
SB
3669 * @hw: clk_hw associated with the clk being consumed
3670 * @dev_id: string describing device name
3671 * @con_id: connection ID string on device
3672 *
3673 * This is the main function used to create a clk pointer for use by clk
3674 * consumers. It connects a consumer to the clk_core and clk_hw structures
3675 * used by the framework and clk provider respectively.
3676 */
efa85048 3677struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw,
1df4046a
SB
3678 const char *dev_id, const char *con_id)
3679{
3680 struct clk *clk;
3681 struct clk_core *core;
3682
3683 /* This is to allow this function to be chained to others */
3684 if (IS_ERR_OR_NULL(hw))
3685 return ERR_CAST(hw);
3686
3687 core = hw->core;
3688 clk = alloc_clk(core, dev_id, con_id);
3689 if (IS_ERR(clk))
3690 return clk;
efa85048 3691 clk->dev = dev;
1df4046a
SB
3692
3693 if (!try_module_get(core->owner)) {
3694 free_clk(clk);
3695 return ERR_PTR(-ENOENT);
3696 }
3697
3698 kref_get(&core->ref);
3699 clk_core_link_consumer(core, clk);
3700
3701 return clk;
3702}
3703
30d6f8c1
JB
3704/**
3705 * clk_hw_get_clk - get clk consumer given an clk_hw
3706 * @hw: clk_hw associated with the clk being consumed
3707 * @con_id: connection ID string on device
3708 *
3709 * Returns: new clk consumer
3710 * This is the function to be used by providers which need
3711 * to get a consumer clk and act on the clock element
3712 * Calls to this function must be balanced with calls clk_put()
3713 */
3714struct clk *clk_hw_get_clk(struct clk_hw *hw, const char *con_id)
3715{
3716 struct device *dev = hw->core->dev;
3717
3718 return clk_hw_create_clk(dev, hw, dev_name(dev), con_id);
3719}
3720EXPORT_SYMBOL(clk_hw_get_clk);
3721
fc0c209c 3722static int clk_cpy_name(const char **dst_p, const char *src, bool must_exist)
b2476490 3723{
fc0c209c
SB
3724 const char *dst;
3725
3726 if (!src) {
3727 if (must_exist)
3728 return -EINVAL;
3729 return 0;
3730 }
3731
3732 *dst_p = dst = kstrdup_const(src, GFP_KERNEL);
3733 if (!dst)
3734 return -ENOMEM;
3735
3736 return 0;
3737}
3738
0214f33c
SB
3739static int clk_core_populate_parent_map(struct clk_core *core,
3740 const struct clk_init_data *init)
fc0c209c 3741{
fc0c209c
SB
3742 u8 num_parents = init->num_parents;
3743 const char * const *parent_names = init->parent_names;
3744 const struct clk_hw **parent_hws = init->parent_hws;
3745 const struct clk_parent_data *parent_data = init->parent_data;
3746 int i, ret = 0;
3747 struct clk_parent_map *parents, *parent;
3748
3749 if (!num_parents)
3750 return 0;
3751
3752 /*
3753 * Avoid unnecessary string look-ups of clk_core's possible parents by
3754 * having a cache of names/clk_hw pointers to clk_core pointers.
3755 */
3756 parents = kcalloc(num_parents, sizeof(*parents), GFP_KERNEL);
3757 core->parents = parents;
3758 if (!parents)
3759 return -ENOMEM;
3760
3761 /* Copy everything over because it might be __initdata */
3762 for (i = 0, parent = parents; i < num_parents; i++, parent++) {
601b6e93 3763 parent->index = -1;
fc0c209c
SB
3764 if (parent_names) {
3765 /* throw a WARN if any entries are NULL */
3766 WARN(!parent_names[i],
3767 "%s: invalid NULL in %s's .parent_names\n",
3768 __func__, core->name);
3769 ret = clk_cpy_name(&parent->name, parent_names[i],
3770 true);
3771 } else if (parent_data) {
3772 parent->hw = parent_data[i].hw;
601b6e93 3773 parent->index = parent_data[i].index;
fc0c209c
SB
3774 ret = clk_cpy_name(&parent->fw_name,
3775 parent_data[i].fw_name, false);
3776 if (!ret)
3777 ret = clk_cpy_name(&parent->name,
3778 parent_data[i].name,
3779 false);
3780 } else if (parent_hws) {
3781 parent->hw = parent_hws[i];
3782 } else {
3783 ret = -EINVAL;
3784 WARN(1, "Must specify parents if num_parents > 0\n");
3785 }
3786
3787 if (ret) {
3788 do {
3789 kfree_const(parents[i].name);
3790 kfree_const(parents[i].fw_name);
3791 } while (--i >= 0);
3792 kfree(parents);
3793
3794 return ret;
3795 }
3796 }
3797
3798 return 0;
3799}
3800
3801static void clk_core_free_parent_map(struct clk_core *core)
3802{
3803 int i = core->num_parents;
3804
3805 if (!core->num_parents)
3806 return;
3807
3808 while (--i >= 0) {
3809 kfree_const(core->parents[i].name);
3810 kfree_const(core->parents[i].fw_name);
3811 }
3812
3813 kfree(core->parents);
3814}
3815
89a5ddcc
SB
3816static struct clk *
3817__clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw)
b2476490 3818{
fc0c209c 3819 int ret;
d6968fca 3820 struct clk_core *core;
0214f33c
SB
3821 const struct clk_init_data *init = hw->init;
3822
3823 /*
3824 * The init data is not supposed to be used outside of registration path.
3825 * Set it to NULL so that provider drivers can't use it either and so that
3826 * we catch use of hw->init early on in the core.
3827 */
3828 hw->init = NULL;
293ba3b4 3829
d6968fca
SB
3830 core = kzalloc(sizeof(*core), GFP_KERNEL);
3831 if (!core) {
293ba3b4
SB
3832 ret = -ENOMEM;
3833 goto fail_out;
3834 }
b2476490 3835
0214f33c 3836 core->name = kstrdup_const(init->name, GFP_KERNEL);
d6968fca 3837 if (!core->name) {
0197b3ea
SK
3838 ret = -ENOMEM;
3839 goto fail_name;
3840 }
29fd2a34 3841
0214f33c 3842 if (WARN_ON(!init->ops)) {
29fd2a34
JB
3843 ret = -EINVAL;
3844 goto fail_ops;
3845 }
0214f33c 3846 core->ops = init->ops;
29fd2a34 3847
9a34b453 3848 if (dev && pm_runtime_enabled(dev))
24478839
MR
3849 core->rpm_enabled = true;
3850 core->dev = dev;
89a5ddcc 3851 core->of_node = np;
ac2df527 3852 if (dev && dev->driver)
d6968fca
SB
3853 core->owner = dev->driver->owner;
3854 core->hw = hw;
0214f33c
SB
3855 core->flags = init->flags;
3856 core->num_parents = init->num_parents;
9783c0d9
SB
3857 core->min_rate = 0;
3858 core->max_rate = ULONG_MAX;
d6968fca 3859 hw->core = core;
b2476490 3860
0214f33c 3861 ret = clk_core_populate_parent_map(core, init);
fc0c209c 3862 if (ret)
176d1169 3863 goto fail_parents;
176d1169 3864
d6968fca 3865 INIT_HLIST_HEAD(&core->clks);
1c8e6004 3866
1df4046a
SB
3867 /*
3868 * Don't call clk_hw_create_clk() here because that would pin the
3869 * provider module to itself and prevent it from ever being removed.
3870 */
3871 hw->clk = alloc_clk(core, NULL, NULL);
035a61c3 3872 if (IS_ERR(hw->clk)) {
035a61c3 3873 ret = PTR_ERR(hw->clk);
fc0c209c 3874 goto fail_create_clk;
035a61c3
TV
3875 }
3876
1df4046a
SB
3877 clk_core_link_consumer(hw->core, hw->clk);
3878
be45ebf2 3879 ret = __clk_core_init(core);
d1302a36 3880 if (!ret)
035a61c3 3881 return hw->clk;
b2476490 3882
1df4046a
SB
3883 clk_prepare_lock();
3884 clk_core_unlink_consumer(hw->clk);
3885 clk_prepare_unlock();
3886
3887 free_clk(hw->clk);
035a61c3 3888 hw->clk = NULL;
b2476490 3889
fc0c209c
SB
3890fail_create_clk:
3891 clk_core_free_parent_map(core);
176d1169 3892fail_parents:
29fd2a34 3893fail_ops:
d6968fca 3894 kfree_const(core->name);
0197b3ea 3895fail_name:
d6968fca 3896 kfree(core);
d1302a36
MT
3897fail_out:
3898 return ERR_PTR(ret);
b2476490 3899}
fceaa7d8 3900
9011f926
SB
3901/**
3902 * dev_or_parent_of_node() - Get device node of @dev or @dev's parent
3903 * @dev: Device to get device node of
3904 *
3905 * Return: device node pointer of @dev, or the device node pointer of
3906 * @dev->parent if dev doesn't have a device node, or NULL if neither
3907 * @dev or @dev->parent have a device node.
3908 */
3909static struct device_node *dev_or_parent_of_node(struct device *dev)
3910{
3911 struct device_node *np;
3912
3913 if (!dev)
3914 return NULL;
3915
3916 np = dev_of_node(dev);
3917 if (!np)
3918 np = dev_of_node(dev->parent);
3919
3920 return np;
3921}
3922
fceaa7d8
SB
3923/**
3924 * clk_register - allocate a new clock, register it and return an opaque cookie
3925 * @dev: device that is registering this clock
3926 * @hw: link to hardware-specific clock data
3927 *
c1157f60
SB
3928 * clk_register is the *deprecated* interface for populating the clock tree with
3929 * new clock nodes. Use clk_hw_register() instead.
3930 *
3931 * Returns: a pointer to the newly allocated struct clk which
fceaa7d8
SB
3932 * cannot be dereferenced by driver code but may be used in conjunction with the
3933 * rest of the clock API. In the event of an error clk_register will return an
3934 * error code; drivers must test for an error code after calling clk_register.
3935 */
3936struct clk *clk_register(struct device *dev, struct clk_hw *hw)
3937{
9011f926 3938 return __clk_register(dev, dev_or_parent_of_node(dev), hw);
fceaa7d8 3939}
b2476490
MT
3940EXPORT_SYMBOL_GPL(clk_register);
3941
4143804c
SB
3942/**
3943 * clk_hw_register - register a clk_hw and return an error code
3944 * @dev: device that is registering this clock
3945 * @hw: link to hardware-specific clock data
3946 *
3947 * clk_hw_register is the primary interface for populating the clock tree with
3948 * new clock nodes. It returns an integer equal to zero indicating success or
3949 * less than zero indicating failure. Drivers must test for an error code after
3950 * calling clk_hw_register().
3951 */
3952int clk_hw_register(struct device *dev, struct clk_hw *hw)
3953{
9011f926
SB
3954 return PTR_ERR_OR_ZERO(__clk_register(dev, dev_or_parent_of_node(dev),
3955 hw));
4143804c
SB
3956}
3957EXPORT_SYMBOL_GPL(clk_hw_register);
3958
89a5ddcc
SB
3959/*
3960 * of_clk_hw_register - register a clk_hw and return an error code
3961 * @node: device_node of device that is registering this clock
3962 * @hw: link to hardware-specific clock data
3963 *
3964 * of_clk_hw_register() is the primary interface for populating the clock tree
3965 * with new clock nodes when a struct device is not available, but a struct
3966 * device_node is. It returns an integer equal to zero indicating success or
3967 * less than zero indicating failure. Drivers must test for an error code after
3968 * calling of_clk_hw_register().
3969 */
3970int of_clk_hw_register(struct device_node *node, struct clk_hw *hw)
3971{
3972 return PTR_ERR_OR_ZERO(__clk_register(NULL, node, hw));
3973}
3974EXPORT_SYMBOL_GPL(of_clk_hw_register);
3975
6e5ab41b 3976/* Free memory allocated for a clock. */
fcb0ee6a
SN
3977static void __clk_release(struct kref *ref)
3978{
d6968fca 3979 struct clk_core *core = container_of(ref, struct clk_core, ref);
fcb0ee6a 3980
496eadf8
KK
3981 lockdep_assert_held(&prepare_lock);
3982
fc0c209c 3983 clk_core_free_parent_map(core);
d6968fca
SB
3984 kfree_const(core->name);
3985 kfree(core);
fcb0ee6a
SN
3986}
3987
3988/*
3989 * Empty clk_ops for unregistered clocks. These are used temporarily
3990 * after clk_unregister() was called on a clock and until last clock
3991 * consumer calls clk_put() and the struct clk object is freed.
3992 */
3993static int clk_nodrv_prepare_enable(struct clk_hw *hw)
3994{
3995 return -ENXIO;
3996}
3997
3998static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
3999{
4000 WARN_ON_ONCE(1);
4001}
4002
4003static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
4004 unsigned long parent_rate)
4005{
4006 return -ENXIO;
4007}
4008
4009static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
4010{
4011 return -ENXIO;
4012}
4013
4014static const struct clk_ops clk_nodrv_ops = {
4015 .enable = clk_nodrv_prepare_enable,
4016 .disable = clk_nodrv_disable_unprepare,
4017 .prepare = clk_nodrv_prepare_enable,
4018 .unprepare = clk_nodrv_disable_unprepare,
4019 .set_rate = clk_nodrv_set_rate,
4020 .set_parent = clk_nodrv_set_parent,
4021};
4022
bdcf1dc2
SB
4023static void clk_core_evict_parent_cache_subtree(struct clk_core *root,
4024 struct clk_core *target)
4025{
4026 int i;
4027 struct clk_core *child;
4028
4029 for (i = 0; i < root->num_parents; i++)
4030 if (root->parents[i].core == target)
4031 root->parents[i].core = NULL;
4032
4033 hlist_for_each_entry(child, &root->children, child_node)
4034 clk_core_evict_parent_cache_subtree(child, target);
4035}
4036
4037/* Remove this clk from all parent caches */
4038static void clk_core_evict_parent_cache(struct clk_core *core)
4039{
4040 struct hlist_head **lists;
4041 struct clk_core *root;
4042
4043 lockdep_assert_held(&prepare_lock);
4044
4045 for (lists = all_lists; *lists; lists++)
4046 hlist_for_each_entry(root, *lists, child_node)
4047 clk_core_evict_parent_cache_subtree(root, core);
4048
4049}
4050
1df5c939
MB
4051/**
4052 * clk_unregister - unregister a currently registered clock
4053 * @clk: clock to unregister
1df5c939 4054 */
fcb0ee6a
SN
4055void clk_unregister(struct clk *clk)
4056{
4057 unsigned long flags;
f873744c 4058 const struct clk_ops *ops;
fcb0ee6a 4059
6314b679
SB
4060 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
4061 return;
4062
035a61c3 4063 clk_debug_unregister(clk->core);
fcb0ee6a
SN
4064
4065 clk_prepare_lock();
4066
f873744c
JB
4067 ops = clk->core->ops;
4068 if (ops == &clk_nodrv_ops) {
035a61c3
TV
4069 pr_err("%s: unregistered clock: %s\n", __func__,
4070 clk->core->name);
4106a3d9 4071 goto unlock;
fcb0ee6a
SN
4072 }
4073 /*
4074 * Assign empty clock ops for consumers that might still hold
4075 * a reference to this clock.
4076 */
4077 flags = clk_enable_lock();
035a61c3 4078 clk->core->ops = &clk_nodrv_ops;
fcb0ee6a
SN
4079 clk_enable_unlock(flags);
4080
f873744c
JB
4081 if (ops->terminate)
4082 ops->terminate(clk->core->hw);
4083
035a61c3
TV
4084 if (!hlist_empty(&clk->core->children)) {
4085 struct clk_core *child;
874f224c 4086 struct hlist_node *t;
fcb0ee6a
SN
4087
4088 /* Reparent all children to the orphan list. */
035a61c3
TV
4089 hlist_for_each_entry_safe(child, t, &clk->core->children,
4090 child_node)
91baa9ff 4091 clk_core_set_parent_nolock(child, NULL);
fcb0ee6a
SN
4092 }
4093
bdcf1dc2
SB
4094 clk_core_evict_parent_cache(clk->core);
4095
035a61c3 4096 hlist_del_init(&clk->core->child_node);
fcb0ee6a 4097
035a61c3 4098 if (clk->core->prepare_count)
fcb0ee6a 4099 pr_warn("%s: unregistering prepared clock: %s\n",
035a61c3 4100 __func__, clk->core->name);
e55a839a
JB
4101
4102 if (clk->core->protect_count)
4103 pr_warn("%s: unregistering protected clock: %s\n",
4104 __func__, clk->core->name);
4105
035a61c3 4106 kref_put(&clk->core->ref, __clk_release);
82474707 4107 free_clk(clk);
4106a3d9 4108unlock:
fcb0ee6a
SN
4109 clk_prepare_unlock();
4110}
1df5c939
MB
4111EXPORT_SYMBOL_GPL(clk_unregister);
4112
4143804c
SB
4113/**
4114 * clk_hw_unregister - unregister a currently registered clk_hw
4115 * @hw: hardware-specific clock data to unregister
4116 */
4117void clk_hw_unregister(struct clk_hw *hw)
4118{
4119 clk_unregister(hw->clk);
4120}
4121EXPORT_SYMBOL_GPL(clk_hw_unregister);
4122
e5a4b9b9 4123static void devm_clk_unregister_cb(struct device *dev, void *res)
46c8773a 4124{
293ba3b4 4125 clk_unregister(*(struct clk **)res);
46c8773a
SB
4126}
4127
e5a4b9b9 4128static void devm_clk_hw_unregister_cb(struct device *dev, void *res)
4143804c
SB
4129{
4130 clk_hw_unregister(*(struct clk_hw **)res);
4131}
4132
46c8773a
SB
4133/**
4134 * devm_clk_register - resource managed clk_register()
4135 * @dev: device that is registering this clock
4136 * @hw: link to hardware-specific clock data
4137 *
9fe9b7ab
SB
4138 * Managed clk_register(). This function is *deprecated*, use devm_clk_hw_register() instead.
4139 *
4140 * Clocks returned from this function are automatically clk_unregister()ed on
4141 * driver detach. See clk_register() for more information.
46c8773a
SB
4142 */
4143struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
4144{
4145 struct clk *clk;
293ba3b4 4146 struct clk **clkp;
46c8773a 4147
e5a4b9b9 4148 clkp = devres_alloc(devm_clk_unregister_cb, sizeof(*clkp), GFP_KERNEL);
293ba3b4 4149 if (!clkp)
46c8773a
SB
4150 return ERR_PTR(-ENOMEM);
4151
293ba3b4
SB
4152 clk = clk_register(dev, hw);
4153 if (!IS_ERR(clk)) {
4154 *clkp = clk;
4155 devres_add(dev, clkp);
46c8773a 4156 } else {
293ba3b4 4157 devres_free(clkp);
46c8773a
SB
4158 }
4159
4160 return clk;
4161}
4162EXPORT_SYMBOL_GPL(devm_clk_register);
4163
4143804c
SB
4164/**
4165 * devm_clk_hw_register - resource managed clk_hw_register()
4166 * @dev: device that is registering this clock
4167 * @hw: link to hardware-specific clock data
4168 *
c47265ad 4169 * Managed clk_hw_register(). Clocks registered by this function are
4143804c
SB
4170 * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register()
4171 * for more information.
4172 */
4173int devm_clk_hw_register(struct device *dev, struct clk_hw *hw)
4174{
4175 struct clk_hw **hwp;
4176 int ret;
4177
e5a4b9b9 4178 hwp = devres_alloc(devm_clk_hw_unregister_cb, sizeof(*hwp), GFP_KERNEL);
4143804c
SB
4179 if (!hwp)
4180 return -ENOMEM;
4181
4182 ret = clk_hw_register(dev, hw);
4183 if (!ret) {
4184 *hwp = hw;
4185 devres_add(dev, hwp);
4186 } else {
4187 devres_free(hwp);
4188 }
4189
4190 return ret;
4191}
4192EXPORT_SYMBOL_GPL(devm_clk_hw_register);
4193
46c8773a
SB
4194static int devm_clk_match(struct device *dev, void *res, void *data)
4195{
4196 struct clk *c = res;
4197 if (WARN_ON(!c))
4198 return 0;
4199 return c == data;
4200}
4201
4143804c
SB
4202static int devm_clk_hw_match(struct device *dev, void *res, void *data)
4203{
4204 struct clk_hw *hw = res;
4205
4206 if (WARN_ON(!hw))
4207 return 0;
4208 return hw == data;
4209}
4210
46c8773a
SB
4211/**
4212 * devm_clk_unregister - resource managed clk_unregister()
6378cfdc 4213 * @dev: device that is unregistering the clock data
46c8773a
SB
4214 * @clk: clock to unregister
4215 *
4216 * Deallocate a clock allocated with devm_clk_register(). Normally
4217 * this function will not need to be called and the resource management
4218 * code will ensure that the resource is freed.
4219 */
4220void devm_clk_unregister(struct device *dev, struct clk *clk)
4221{
e5a4b9b9 4222 WARN_ON(devres_release(dev, devm_clk_unregister_cb, devm_clk_match, clk));
46c8773a
SB
4223}
4224EXPORT_SYMBOL_GPL(devm_clk_unregister);
4225
4143804c
SB
4226/**
4227 * devm_clk_hw_unregister - resource managed clk_hw_unregister()
4228 * @dev: device that is unregistering the hardware-specific clock data
4229 * @hw: link to hardware-specific clock data
4230 *
4231 * Unregister a clk_hw registered with devm_clk_hw_register(). Normally
4232 * this function will not need to be called and the resource management
4233 * code will ensure that the resource is freed.
4234 */
4235void devm_clk_hw_unregister(struct device *dev, struct clk_hw *hw)
4236{
e5a4b9b9 4237 WARN_ON(devres_release(dev, devm_clk_hw_unregister_cb, devm_clk_hw_match,
4143804c
SB
4238 hw));
4239}
4240EXPORT_SYMBOL_GPL(devm_clk_hw_unregister);
4241
30d6f8c1
JB
4242static void devm_clk_release(struct device *dev, void *res)
4243{
4244 clk_put(*(struct clk **)res);
4245}
4246
4247/**
4248 * devm_clk_hw_get_clk - resource managed clk_hw_get_clk()
4249 * @dev: device that is registering this clock
4250 * @hw: clk_hw associated with the clk being consumed
4251 * @con_id: connection ID string on device
4252 *
4253 * Managed clk_hw_get_clk(). Clocks got with this function are
4254 * automatically clk_put() on driver detach. See clk_put()
4255 * for more information.
4256 */
4257struct clk *devm_clk_hw_get_clk(struct device *dev, struct clk_hw *hw,
4258 const char *con_id)
4259{
4260 struct clk *clk;
4261 struct clk **clkp;
4262
4263 /* This should not happen because it would mean we have drivers
4264 * passing around clk_hw pointers instead of having the caller use
4265 * proper clk_get() style APIs
4266 */
4267 WARN_ON_ONCE(dev != hw->core->dev);
4268
4269 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
4270 if (!clkp)
4271 return ERR_PTR(-ENOMEM);
4272
4273 clk = clk_hw_get_clk(hw, con_id);
4274 if (!IS_ERR(clk)) {
4275 *clkp = clk;
4276 devres_add(dev, clkp);
4277 } else {
4278 devres_free(clkp);
4279 }
4280
4281 return clk;
4282}
4283EXPORT_SYMBOL_GPL(devm_clk_hw_get_clk);
4284
ac2df527
SN
4285/*
4286 * clkdev helpers
4287 */
ac2df527
SN
4288
4289void __clk_put(struct clk *clk)
4290{
10cdfe54
TV
4291 struct module *owner;
4292
00efcb1c 4293 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
ac2df527
SN
4294 return;
4295
fcb0ee6a 4296 clk_prepare_lock();
1c8e6004 4297
55e9b8b7
JB
4298 /*
4299 * Before calling clk_put, all calls to clk_rate_exclusive_get() from a
4300 * given user should be balanced with calls to clk_rate_exclusive_put()
4301 * and by that same consumer
4302 */
4303 if (WARN_ON(clk->exclusive_count)) {
4304 /* We voiced our concern, let's sanitize the situation */
4305 clk->core->protect_count -= (clk->exclusive_count - 1);
4306 clk_core_rate_unprotect(clk->core);
4307 clk->exclusive_count = 0;
4308 }
4309
50595f8b 4310 hlist_del(&clk->clks_node);
ec02ace8
TV
4311 if (clk->min_rate > clk->core->req_rate ||
4312 clk->max_rate < clk->core->req_rate)
4313 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
4314
1c8e6004
TV
4315 owner = clk->core->owner;
4316 kref_put(&clk->core->ref, __clk_release);
4317
fcb0ee6a
SN
4318 clk_prepare_unlock();
4319
10cdfe54 4320 module_put(owner);
035a61c3 4321
1df4046a 4322 free_clk(clk);
ac2df527
SN
4323}
4324
b2476490
MT
4325/*** clk rate change notifiers ***/
4326
4327/**
4328 * clk_notifier_register - add a clk rate change notifier
4329 * @clk: struct clk * to watch
4330 * @nb: struct notifier_block * with callback info
4331 *
4332 * Request notification when clk's rate changes. This uses an SRCU
4333 * notifier because we want it to block and notifier unregistrations are
4334 * uncommon. The callbacks associated with the notifier must not
4335 * re-enter into the clk framework by calling any top-level clk APIs;
4336 * this will cause a nested prepare_lock mutex.
4337 *
198bb594
MY
4338 * In all notification cases (pre, post and abort rate change) the original
4339 * clock rate is passed to the callback via struct clk_notifier_data.old_rate
4340 * and the new frequency is passed via struct clk_notifier_data.new_rate.
b2476490 4341 *
b2476490
MT
4342 * clk_notifier_register() must be called from non-atomic context.
4343 * Returns -EINVAL if called with null arguments, -ENOMEM upon
4344 * allocation failure; otherwise, passes along the return value of
4345 * srcu_notifier_chain_register().
4346 */
4347int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
4348{
4349 struct clk_notifier *cn;
4350 int ret = -ENOMEM;
4351
4352 if (!clk || !nb)
4353 return -EINVAL;
4354
eab89f69 4355 clk_prepare_lock();
b2476490
MT
4356
4357 /* search the list of notifiers for this clk */
4358 list_for_each_entry(cn, &clk_notifier_list, node)
4359 if (cn->clk == clk)
4360 break;
4361
4362 /* if clk wasn't in the notifier list, allocate new clk_notifier */
4363 if (cn->clk != clk) {
1808a320 4364 cn = kzalloc(sizeof(*cn), GFP_KERNEL);
b2476490
MT
4365 if (!cn)
4366 goto out;
4367
4368 cn->clk = clk;
4369 srcu_init_notifier_head(&cn->notifier_head);
4370
4371 list_add(&cn->node, &clk_notifier_list);
4372 }
4373
4374 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
4375
035a61c3 4376 clk->core->notifier_count++;
b2476490
MT
4377
4378out:
eab89f69 4379 clk_prepare_unlock();
b2476490
MT
4380
4381 return ret;
4382}
4383EXPORT_SYMBOL_GPL(clk_notifier_register);
4384
4385/**
4386 * clk_notifier_unregister - remove a clk rate change notifier
4387 * @clk: struct clk *
4388 * @nb: struct notifier_block * with callback info
4389 *
4390 * Request no further notification for changes to 'clk' and frees memory
4391 * allocated in clk_notifier_register.
4392 *
4393 * Returns -EINVAL if called with null arguments; otherwise, passes
4394 * along the return value of srcu_notifier_chain_unregister().
4395 */
4396int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
4397{
4398 struct clk_notifier *cn = NULL;
4399 int ret = -EINVAL;
4400
4401 if (!clk || !nb)
4402 return -EINVAL;
4403
eab89f69 4404 clk_prepare_lock();
b2476490
MT
4405
4406 list_for_each_entry(cn, &clk_notifier_list, node)
4407 if (cn->clk == clk)
4408 break;
4409
4410 if (cn->clk == clk) {
4411 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
4412
035a61c3 4413 clk->core->notifier_count--;
b2476490
MT
4414
4415 /* XXX the notifier code should handle this better */
4416 if (!cn->notifier_head.head) {
4417 srcu_cleanup_notifier_head(&cn->notifier_head);
72b5322f 4418 list_del(&cn->node);
b2476490
MT
4419 kfree(cn);
4420 }
4421
4422 } else {
4423 ret = -ENOENT;
4424 }
4425
eab89f69 4426 clk_prepare_unlock();
b2476490
MT
4427
4428 return ret;
4429}
4430EXPORT_SYMBOL_GPL(clk_notifier_unregister);
766e6a4e 4431
6d30d50d
JB
4432struct clk_notifier_devres {
4433 struct clk *clk;
4434 struct notifier_block *nb;
4435};
4436
4437static void devm_clk_notifier_release(struct device *dev, void *res)
4438{
4439 struct clk_notifier_devres *devres = res;
4440
4441 clk_notifier_unregister(devres->clk, devres->nb);
4442}
4443
4444int devm_clk_notifier_register(struct device *dev, struct clk *clk,
4445 struct notifier_block *nb)
4446{
4447 struct clk_notifier_devres *devres;
4448 int ret;
4449
4450 devres = devres_alloc(devm_clk_notifier_release,
4451 sizeof(*devres), GFP_KERNEL);
4452
4453 if (!devres)
4454 return -ENOMEM;
4455
4456 ret = clk_notifier_register(clk, nb);
4457 if (!ret) {
4458 devres->clk = clk;
4459 devres->nb = nb;
4460 } else {
4461 devres_free(devres);
4462 }
4463
4464 return ret;
4465}
4466EXPORT_SYMBOL_GPL(devm_clk_notifier_register);
4467
766e6a4e 4468#ifdef CONFIG_OF
c771256e
OJ
4469static void clk_core_reparent_orphans(void)
4470{
4471 clk_prepare_lock();
4472 clk_core_reparent_orphans_nolock();
4473 clk_prepare_unlock();
4474}
4475
766e6a4e
GL
4476/**
4477 * struct of_clk_provider - Clock provider registration structure
4478 * @link: Entry in global list of clock providers
4479 * @node: Pointer to device tree node of clock provider
4480 * @get: Get clock callback. Returns NULL or a struct clk for the
4481 * given clock specifier
6378cfdc
SB
4482 * @get_hw: Get clk_hw callback. Returns NULL, ERR_PTR or a
4483 * struct clk_hw for the given clock specifier
766e6a4e
GL
4484 * @data: context pointer to be passed into @get callback
4485 */
4486struct of_clk_provider {
4487 struct list_head link;
4488
4489 struct device_node *node;
4490 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
0861e5b8 4491 struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data);
766e6a4e
GL
4492 void *data;
4493};
4494
30d5a945 4495extern struct of_device_id __clk_of_table;
f2f6c255 4496static const struct of_device_id __clk_of_table_sentinel
33def849 4497 __used __section("__clk_of_table_end");
f2f6c255 4498
766e6a4e 4499static LIST_HEAD(of_clk_providers);
d6782c26
SN
4500static DEFINE_MUTEX(of_clk_mutex);
4501
766e6a4e
GL
4502struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
4503 void *data)
4504{
4505 return data;
4506}
4507EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
4508
0861e5b8
SB
4509struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data)
4510{
4511 return data;
4512}
4513EXPORT_SYMBOL_GPL(of_clk_hw_simple_get);
4514
494bfec9
SG
4515struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
4516{
4517 struct clk_onecell_data *clk_data = data;
4518 unsigned int idx = clkspec->args[0];
4519
4520 if (idx >= clk_data->clk_num) {
7e96353c 4521 pr_err("%s: invalid clock index %u\n", __func__, idx);
494bfec9
SG
4522 return ERR_PTR(-EINVAL);
4523 }
4524
4525 return clk_data->clks[idx];
4526}
4527EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
4528
0861e5b8
SB
4529struct clk_hw *
4530of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data)
4531{
4532 struct clk_hw_onecell_data *hw_data = data;
4533 unsigned int idx = clkspec->args[0];
4534
4535 if (idx >= hw_data->num) {
4536 pr_err("%s: invalid index %u\n", __func__, idx);
4537 return ERR_PTR(-EINVAL);
4538 }
4539
4540 return hw_data->hws[idx];
4541}
4542EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get);
4543
766e6a4e
GL
4544/**
4545 * of_clk_add_provider() - Register a clock provider for a node
4546 * @np: Device node pointer associated with clock provider
4547 * @clk_src_get: callback for decoding clock
4548 * @data: context pointer for @clk_src_get callback.
9fe9b7ab
SB
4549 *
4550 * This function is *deprecated*. Use of_clk_add_hw_provider() instead.
766e6a4e
GL
4551 */
4552int of_clk_add_provider(struct device_node *np,
4553 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
4554 void *data),
4555 void *data)
4556{
4557 struct of_clk_provider *cp;
86be408b 4558 int ret;
766e6a4e 4559
1808a320 4560 cp = kzalloc(sizeof(*cp), GFP_KERNEL);
766e6a4e
GL
4561 if (!cp)
4562 return -ENOMEM;
4563
4564 cp->node = of_node_get(np);
4565 cp->data = data;
4566 cp->get = clk_src_get;
4567
d6782c26 4568 mutex_lock(&of_clk_mutex);
766e6a4e 4569 list_add(&cp->link, &of_clk_providers);
d6782c26 4570 mutex_unlock(&of_clk_mutex);
16673931 4571 pr_debug("Added clock from %pOF\n", np);
766e6a4e 4572
66d95064
JB
4573 clk_core_reparent_orphans();
4574
86be408b
SN
4575 ret = of_clk_set_defaults(np, true);
4576 if (ret < 0)
4577 of_clk_del_provider(np);
4578
3c9ea428
SK
4579 fwnode_dev_initialized(&np->fwnode, true);
4580
86be408b 4581 return ret;
766e6a4e
GL
4582}
4583EXPORT_SYMBOL_GPL(of_clk_add_provider);
4584
0861e5b8
SB
4585/**
4586 * of_clk_add_hw_provider() - Register a clock provider for a node
4587 * @np: Device node pointer associated with clock provider
4588 * @get: callback for decoding clk_hw
4589 * @data: context pointer for @get callback.
4590 */
4591int of_clk_add_hw_provider(struct device_node *np,
4592 struct clk_hw *(*get)(struct of_phandle_args *clkspec,
4593 void *data),
4594 void *data)
4595{
4596 struct of_clk_provider *cp;
4597 int ret;
4598
4599 cp = kzalloc(sizeof(*cp), GFP_KERNEL);
4600 if (!cp)
4601 return -ENOMEM;
4602
4603 cp->node = of_node_get(np);
4604 cp->data = data;
4605 cp->get_hw = get;
4606
4607 mutex_lock(&of_clk_mutex);
4608 list_add(&cp->link, &of_clk_providers);
4609 mutex_unlock(&of_clk_mutex);
16673931 4610 pr_debug("Added clk_hw provider from %pOF\n", np);
0861e5b8 4611
66d95064
JB
4612 clk_core_reparent_orphans();
4613
0861e5b8
SB
4614 ret = of_clk_set_defaults(np, true);
4615 if (ret < 0)
4616 of_clk_del_provider(np);
4617
4618 return ret;
4619}
4620EXPORT_SYMBOL_GPL(of_clk_add_hw_provider);
4621
aa795c41
SB
4622static void devm_of_clk_release_provider(struct device *dev, void *res)
4623{
4624 of_clk_del_provider(*(struct device_node **)res);
4625}
4626
05502bf9
MV
4627/*
4628 * We allow a child device to use its parent device as the clock provider node
4629 * for cases like MFD sub-devices where the child device driver wants to use
4630 * devm_*() APIs but not list the device in DT as a sub-node.
4631 */
4632static struct device_node *get_clk_provider_node(struct device *dev)
4633{
4634 struct device_node *np, *parent_np;
4635
4636 np = dev->of_node;
4637 parent_np = dev->parent ? dev->parent->of_node : NULL;
4638
4639 if (!of_find_property(np, "#clock-cells", NULL))
4640 if (of_find_property(parent_np, "#clock-cells", NULL))
4641 np = parent_np;
4642
4643 return np;
4644}
4645
e45838b5
MV
4646/**
4647 * devm_of_clk_add_hw_provider() - Managed clk provider node registration
4648 * @dev: Device acting as the clock provider (used for DT node and lifetime)
4649 * @get: callback for decoding clk_hw
4650 * @data: context pointer for @get callback
4651 *
05502bf9
MV
4652 * Registers clock provider for given device's node. If the device has no DT
4653 * node or if the device node lacks of clock provider information (#clock-cells)
4654 * then the parent device's node is scanned for this information. If parent node
4655 * has the #clock-cells then it is used in registration. Provider is
4656 * automatically released at device exit.
e45838b5
MV
4657 *
4658 * Return: 0 on success or an errno on failure.
4659 */
aa795c41
SB
4660int devm_of_clk_add_hw_provider(struct device *dev,
4661 struct clk_hw *(*get)(struct of_phandle_args *clkspec,
4662 void *data),
4663 void *data)
4664{
4665 struct device_node **ptr, *np;
4666 int ret;
4667
4668 ptr = devres_alloc(devm_of_clk_release_provider, sizeof(*ptr),
4669 GFP_KERNEL);
4670 if (!ptr)
4671 return -ENOMEM;
4672
05502bf9 4673 np = get_clk_provider_node(dev);
aa795c41
SB
4674 ret = of_clk_add_hw_provider(np, get, data);
4675 if (!ret) {
4676 *ptr = np;
4677 devres_add(dev, ptr);
4678 } else {
4679 devres_free(ptr);
4680 }
4681
4682 return ret;
4683}
4684EXPORT_SYMBOL_GPL(devm_of_clk_add_hw_provider);
4685
766e6a4e
GL
4686/**
4687 * of_clk_del_provider() - Remove a previously registered clock provider
4688 * @np: Device node pointer associated with clock provider
4689 */
4690void of_clk_del_provider(struct device_node *np)
4691{
4692 struct of_clk_provider *cp;
4693
d6782c26 4694 mutex_lock(&of_clk_mutex);
766e6a4e
GL
4695 list_for_each_entry(cp, &of_clk_providers, link) {
4696 if (cp->node == np) {
4697 list_del(&cp->link);
3c9ea428 4698 fwnode_dev_initialized(&np->fwnode, false);
766e6a4e
GL
4699 of_node_put(cp->node);
4700 kfree(cp);
4701 break;
4702 }
4703 }
d6782c26 4704 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
4705}
4706EXPORT_SYMBOL_GPL(of_clk_del_provider);
4707
aa795c41
SB
4708static int devm_clk_provider_match(struct device *dev, void *res, void *data)
4709{
4710 struct device_node **np = res;
4711
4712 if (WARN_ON(!np || !*np))
4713 return 0;
4714
4715 return *np == data;
4716}
4717
e45838b5
MV
4718/**
4719 * devm_of_clk_del_provider() - Remove clock provider registered using devm
4720 * @dev: Device to whose lifetime the clock provider was bound
4721 */
aa795c41
SB
4722void devm_of_clk_del_provider(struct device *dev)
4723{
4724 int ret;
05502bf9 4725 struct device_node *np = get_clk_provider_node(dev);
aa795c41
SB
4726
4727 ret = devres_release(dev, devm_of_clk_release_provider,
05502bf9 4728 devm_clk_provider_match, np);
aa795c41
SB
4729
4730 WARN_ON(ret);
4731}
4732EXPORT_SYMBOL(devm_of_clk_del_provider);
4733
226fd702
SB
4734/**
4735 * of_parse_clkspec() - Parse a DT clock specifier for a given device node
4736 * @np: device node to parse clock specifier from
4737 * @index: index of phandle to parse clock out of. If index < 0, @name is used
4738 * @name: clock name to find and parse. If name is NULL, the index is used
4739 * @out_args: Result of parsing the clock specifier
4740 *
4741 * Parses a device node's "clocks" and "clock-names" properties to find the
4742 * phandle and cells for the index or name that is desired. The resulting clock
4743 * specifier is placed into @out_args, or an errno is returned when there's a
4744 * parsing error. The @index argument is ignored if @name is non-NULL.
4745 *
4746 * Example:
4747 *
4748 * phandle1: clock-controller@1 {
4749 * #clock-cells = <2>;
4750 * }
4751 *
4752 * phandle2: clock-controller@2 {
4753 * #clock-cells = <1>;
4754 * }
4755 *
4756 * clock-consumer@3 {
4757 * clocks = <&phandle1 1 2 &phandle2 3>;
4758 * clock-names = "name1", "name2";
4759 * }
4760 *
4761 * To get a device_node for `clock-controller@2' node you may call this
4762 * function a few different ways:
4763 *
4764 * of_parse_clkspec(clock-consumer@3, -1, "name2", &args);
4765 * of_parse_clkspec(clock-consumer@3, 1, NULL, &args);
4766 * of_parse_clkspec(clock-consumer@3, 1, "name2", &args);
4767 *
4768 * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT
4769 * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in
4770 * the "clock-names" property of @np.
5dc7e842 4771 */
cf13f289
SB
4772static int of_parse_clkspec(const struct device_node *np, int index,
4773 const char *name, struct of_phandle_args *out_args)
4472287a
SB
4774{
4775 int ret = -ENOENT;
4776
4777 /* Walk up the tree of devices looking for a clock property that matches */
4778 while (np) {
4779 /*
4780 * For named clocks, first look up the name in the
4781 * "clock-names" property. If it cannot be found, then index
4782 * will be an error code and of_parse_phandle_with_args() will
4783 * return -EINVAL.
4784 */
4785 if (name)
4786 index = of_property_match_string(np, "clock-names", name);
4787 ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells",
4788 index, out_args);
4789 if (!ret)
4790 break;
4791 if (name && index >= 0)
4792 break;
4793
4794 /*
4795 * No matching clock found on this node. If the parent node
4796 * has a "clock-ranges" property, then we can try one of its
4797 * clocks.
4798 */
4799 np = np->parent;
4800 if (np && !of_get_property(np, "clock-ranges", NULL))
4801 break;
4802 index = 0;
4803 }
4804
4805 return ret;
4806}
4807
0861e5b8
SB
4808static struct clk_hw *
4809__of_clk_get_hw_from_provider(struct of_clk_provider *provider,
4810 struct of_phandle_args *clkspec)
4811{
4812 struct clk *clk;
0861e5b8 4813
74002fcd
SB
4814 if (provider->get_hw)
4815 return provider->get_hw(clkspec, provider->data);
0861e5b8 4816
74002fcd
SB
4817 clk = provider->get(clkspec, provider->data);
4818 if (IS_ERR(clk))
4819 return ERR_CAST(clk);
4820 return __clk_get_hw(clk);
0861e5b8
SB
4821}
4822
cf13f289
SB
4823static struct clk_hw *
4824of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec)
766e6a4e
GL
4825{
4826 struct of_clk_provider *provider;
1df4046a 4827 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER);
766e6a4e 4828
306c342f
SB
4829 if (!clkspec)
4830 return ERR_PTR(-EINVAL);
4831
306c342f 4832 mutex_lock(&of_clk_mutex);
766e6a4e 4833 list_for_each_entry(provider, &of_clk_providers, link) {
f155d15b 4834 if (provider->node == clkspec->np) {
0861e5b8 4835 hw = __of_clk_get_hw_from_provider(provider, clkspec);
1df4046a
SB
4836 if (!IS_ERR(hw))
4837 break;
73e0e496 4838 }
766e6a4e 4839 }
306c342f 4840 mutex_unlock(&of_clk_mutex);
d6782c26 4841
4472287a 4842 return hw;
d6782c26
SN
4843}
4844
306c342f
SB
4845/**
4846 * of_clk_get_from_provider() - Lookup a clock from a clock provider
4847 * @clkspec: pointer to a clock specifier data structure
4848 *
4849 * This function looks up a struct clk from the registered list of clock
4850 * providers, an input is a clock specifier data structure as returned
4851 * from the of_parse_phandle_with_args() function call.
4852 */
d6782c26
SN
4853struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
4854{
4472287a
SB
4855 struct clk_hw *hw = of_clk_get_hw_from_clkspec(clkspec);
4856
efa85048 4857 return clk_hw_create_clk(NULL, hw, NULL, __func__);
766e6a4e 4858}
fb4dd222 4859EXPORT_SYMBOL_GPL(of_clk_get_from_provider);
766e6a4e 4860
cf13f289
SB
4861struct clk_hw *of_clk_get_hw(struct device_node *np, int index,
4862 const char *con_id)
4863{
4864 int ret;
4865 struct clk_hw *hw;
4866 struct of_phandle_args clkspec;
4867
4868 ret = of_parse_clkspec(np, index, con_id, &clkspec);
4869 if (ret)
4870 return ERR_PTR(ret);
4871
4872 hw = of_clk_get_hw_from_clkspec(&clkspec);
4873 of_node_put(clkspec.np);
4874
4875 return hw;
4876}
4877
4878static struct clk *__of_clk_get(struct device_node *np,
4879 int index, const char *dev_id,
4880 const char *con_id)
4881{
4882 struct clk_hw *hw = of_clk_get_hw(np, index, con_id);
4883
4884 return clk_hw_create_clk(NULL, hw, dev_id, con_id);
4885}
4886
4887struct clk *of_clk_get(struct device_node *np, int index)
4888{
4889 return __of_clk_get(np, index, np->full_name, NULL);
4890}
4891EXPORT_SYMBOL(of_clk_get);
4892
4893/**
4894 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node
4895 * @np: pointer to clock consumer node
4896 * @name: name of consumer's clock input, or NULL for the first clock reference
4897 *
4898 * This function parses the clocks and clock-names properties,
4899 * and uses them to look up the struct clk from the registered list of clock
4900 * providers.
4901 */
4902struct clk *of_clk_get_by_name(struct device_node *np, const char *name)
4903{
4904 if (!np)
4905 return ERR_PTR(-ENOENT);
4906
65cf20ad 4907 return __of_clk_get(np, 0, np->full_name, name);
cf13f289
SB
4908}
4909EXPORT_SYMBOL(of_clk_get_by_name);
4910
929e7f3b
SB
4911/**
4912 * of_clk_get_parent_count() - Count the number of clocks a device node has
4913 * @np: device node to count
4914 *
4915 * Returns: The number of clocks that are possible parents of this node
4916 */
4a4472fd 4917unsigned int of_clk_get_parent_count(const struct device_node *np)
f6102742 4918{
929e7f3b
SB
4919 int count;
4920
4921 count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
4922 if (count < 0)
4923 return 0;
4924
4925 return count;
f6102742
MT
4926}
4927EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
4928
4a4472fd 4929const char *of_clk_get_parent_name(const struct device_node *np, int index)
766e6a4e
GL
4930{
4931 struct of_phandle_args clkspec;
7a0fc1a3 4932 struct property *prop;
766e6a4e 4933 const char *clk_name;
7a0fc1a3
BD
4934 const __be32 *vp;
4935 u32 pv;
766e6a4e 4936 int rc;
7a0fc1a3 4937 int count;
0a4807c2 4938 struct clk *clk;
766e6a4e 4939
766e6a4e
GL
4940 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
4941 &clkspec);
4942 if (rc)
4943 return NULL;
4944
7a0fc1a3
BD
4945 index = clkspec.args_count ? clkspec.args[0] : 0;
4946 count = 0;
4947
4948 /* if there is an indices property, use it to transfer the index
4949 * specified into an array offset for the clock-output-names property.
4950 */
4951 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
4952 if (index == pv) {
4953 index = count;
4954 break;
4955 }
4956 count++;
4957 }
8da411cc
MY
4958 /* We went off the end of 'clock-indices' without finding it */
4959 if (prop && !vp)
4960 return NULL;
7a0fc1a3 4961
766e6a4e 4962 if (of_property_read_string_index(clkspec.np, "clock-output-names",
7a0fc1a3 4963 index,
0a4807c2
SB
4964 &clk_name) < 0) {
4965 /*
4966 * Best effort to get the name if the clock has been
4967 * registered with the framework. If the clock isn't
4968 * registered, we return the node name as the name of
4969 * the clock as long as #clock-cells = 0.
4970 */
4971 clk = of_clk_get_from_provider(&clkspec);
4972 if (IS_ERR(clk)) {
4973 if (clkspec.args_count == 0)
4974 clk_name = clkspec.np->name;
4975 else
4976 clk_name = NULL;
4977 } else {
4978 clk_name = __clk_get_name(clk);
4979 clk_put(clk);
4980 }
4981 }
4982
766e6a4e
GL
4983
4984 of_node_put(clkspec.np);
4985 return clk_name;
4986}
4987EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
4988
2e61dfb3
DN
4989/**
4990 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
4991 * number of parents
4992 * @np: Device node pointer associated with clock provider
4993 * @parents: pointer to char array that hold the parents' names
4994 * @size: size of the @parents array
4995 *
4996 * Return: number of parents for the clock node.
4997 */
4998int of_clk_parent_fill(struct device_node *np, const char **parents,
4999 unsigned int size)
5000{
5001 unsigned int i = 0;
5002
5003 while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
5004 i++;
5005
5006 return i;
5007}
5008EXPORT_SYMBOL_GPL(of_clk_parent_fill);
5009
1771b10d 5010struct clock_provider {
a5970433 5011 void (*clk_init_cb)(struct device_node *);
1771b10d
GC
5012 struct device_node *np;
5013 struct list_head node;
5014};
5015
1771b10d
GC
5016/*
5017 * This function looks for a parent clock. If there is one, then it
5018 * checks that the provider for this parent clock was initialized, in
5019 * this case the parent clock will be ready.
5020 */
5021static int parent_ready(struct device_node *np)
5022{
5023 int i = 0;
5024
5025 while (true) {
5026 struct clk *clk = of_clk_get(np, i);
5027
5028 /* this parent is ready we can check the next one */
5029 if (!IS_ERR(clk)) {
5030 clk_put(clk);
5031 i++;
5032 continue;
5033 }
5034
5035 /* at least one parent is not ready, we exit now */
5036 if (PTR_ERR(clk) == -EPROBE_DEFER)
5037 return 0;
5038
5039 /*
5040 * Here we make assumption that the device tree is
5041 * written correctly. So an error means that there is
5042 * no more parent. As we didn't exit yet, then the
5043 * previous parent are ready. If there is no clock
5044 * parent, no need to wait for them, then we can
5045 * consider their absence as being ready
5046 */
5047 return 1;
5048 }
5049}
5050
d56f8994
LJ
5051/**
5052 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
5053 * @np: Device node pointer associated with clock provider
5054 * @index: clock index
f7ae7503 5055 * @flags: pointer to top-level framework flags
d56f8994
LJ
5056 *
5057 * Detects if the clock-critical property exists and, if so, sets the
5058 * corresponding CLK_IS_CRITICAL flag.
5059 *
5060 * Do not use this function. It exists only for legacy Device Tree
5061 * bindings, such as the one-clock-per-node style that are outdated.
5062 * Those bindings typically put all clock data into .dts and the Linux
5063 * driver has no clock data, thus making it impossible to set this flag
5064 * correctly from the driver. Only those drivers may call
5065 * of_clk_detect_critical from their setup functions.
5066 *
5067 * Return: error code or zero on success
5068 */
be545c79
GU
5069int of_clk_detect_critical(struct device_node *np, int index,
5070 unsigned long *flags)
d56f8994
LJ
5071{
5072 struct property *prop;
5073 const __be32 *cur;
5074 uint32_t idx;
5075
5076 if (!np || !flags)
5077 return -EINVAL;
5078
5079 of_property_for_each_u32(np, "clock-critical", prop, cur, idx)
5080 if (index == idx)
5081 *flags |= CLK_IS_CRITICAL;
5082
5083 return 0;
5084}
5085
766e6a4e
GL
5086/**
5087 * of_clk_init() - Scan and init clock providers from the DT
5088 * @matches: array of compatible values and init functions for providers.
5089 *
1771b10d 5090 * This function scans the device tree for matching clock providers
e5ca8fb4 5091 * and calls their initialization functions. It also does it by trying
1771b10d 5092 * to follow the dependencies.
766e6a4e
GL
5093 */
5094void __init of_clk_init(const struct of_device_id *matches)
5095{
7f7ed584 5096 const struct of_device_id *match;
766e6a4e 5097 struct device_node *np;
1771b10d
GC
5098 struct clock_provider *clk_provider, *next;
5099 bool is_init_done;
5100 bool force = false;
2573a02a 5101 LIST_HEAD(clk_provider_list);
766e6a4e 5102
f2f6c255 5103 if (!matches)
819b4861 5104 matches = &__clk_of_table;
f2f6c255 5105
1771b10d 5106 /* First prepare the list of the clocks providers */
7f7ed584 5107 for_each_matching_node_and_match(np, matches, &match) {
2e3b19f1
SB
5108 struct clock_provider *parent;
5109
3e5dd6f6
GU
5110 if (!of_device_is_available(np))
5111 continue;
5112
2e3b19f1
SB
5113 parent = kzalloc(sizeof(*parent), GFP_KERNEL);
5114 if (!parent) {
5115 list_for_each_entry_safe(clk_provider, next,
5116 &clk_provider_list, node) {
5117 list_del(&clk_provider->node);
6bc9d9d6 5118 of_node_put(clk_provider->np);
2e3b19f1
SB
5119 kfree(clk_provider);
5120 }
6bc9d9d6 5121 of_node_put(np);
2e3b19f1
SB
5122 return;
5123 }
1771b10d
GC
5124
5125 parent->clk_init_cb = match->data;
6bc9d9d6 5126 parent->np = of_node_get(np);
3f6d439f 5127 list_add_tail(&parent->node, &clk_provider_list);
1771b10d
GC
5128 }
5129
5130 while (!list_empty(&clk_provider_list)) {
5131 is_init_done = false;
5132 list_for_each_entry_safe(clk_provider, next,
5133 &clk_provider_list, node) {
5134 if (force || parent_ready(clk_provider->np)) {
86be408b 5135
989eafd0
RRD
5136 /* Don't populate platform devices */
5137 of_node_set_flag(clk_provider->np,
5138 OF_POPULATED);
5139
1771b10d 5140 clk_provider->clk_init_cb(clk_provider->np);
86be408b
SN
5141 of_clk_set_defaults(clk_provider->np, true);
5142
1771b10d 5143 list_del(&clk_provider->node);
6bc9d9d6 5144 of_node_put(clk_provider->np);
1771b10d
GC
5145 kfree(clk_provider);
5146 is_init_done = true;
5147 }
5148 }
5149
5150 /*
e5ca8fb4 5151 * We didn't manage to initialize any of the
1771b10d
GC
5152 * remaining providers during the last loop, so now we
5153 * initialize all the remaining ones unconditionally
5154 * in case the clock parent was not mandatory
5155 */
5156 if (!is_init_done)
5157 force = true;
766e6a4e
GL
5158 }
5159}
5160#endif