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ebafb63d | 1 | // SPDX-License-Identifier: GPL-2.0 |
b2476490 MT |
2 | /* |
3 | * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> | |
4 | * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> | |
5 | * | |
5fb94e9c | 6 | * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst |
b2476490 MT |
7 | */ |
8 | ||
3c373117 | 9 | #include <linux/clk.h> |
b09d6d99 | 10 | #include <linux/clk-provider.h> |
86be408b | 11 | #include <linux/clk/clk-conf.h> |
b2476490 MT |
12 | #include <linux/module.h> |
13 | #include <linux/mutex.h> | |
14 | #include <linux/spinlock.h> | |
15 | #include <linux/err.h> | |
16 | #include <linux/list.h> | |
17 | #include <linux/slab.h> | |
766e6a4e | 18 | #include <linux/of.h> |
46c8773a | 19 | #include <linux/device.h> |
f2f6c255 | 20 | #include <linux/init.h> |
9a34b453 | 21 | #include <linux/pm_runtime.h> |
533ddeb1 | 22 | #include <linux/sched.h> |
562ef0b0 | 23 | #include <linux/clkdev.h> |
b2476490 | 24 | |
d6782c26 SN |
25 | #include "clk.h" |
26 | ||
b2476490 MT |
27 | static DEFINE_SPINLOCK(enable_lock); |
28 | static DEFINE_MUTEX(prepare_lock); | |
29 | ||
533ddeb1 MT |
30 | static struct task_struct *prepare_owner; |
31 | static struct task_struct *enable_owner; | |
32 | ||
33 | static int prepare_refcnt; | |
34 | static int enable_refcnt; | |
35 | ||
b2476490 MT |
36 | static HLIST_HEAD(clk_root_list); |
37 | static HLIST_HEAD(clk_orphan_list); | |
38 | static LIST_HEAD(clk_notifier_list); | |
39 | ||
75061a6f | 40 | static const struct hlist_head *all_lists[] = { |
bdcf1dc2 SB |
41 | &clk_root_list, |
42 | &clk_orphan_list, | |
43 | NULL, | |
44 | }; | |
45 | ||
b09d6d99 MT |
46 | /*** private data structures ***/ |
47 | ||
fc0c209c SB |
48 | struct clk_parent_map { |
49 | const struct clk_hw *hw; | |
50 | struct clk_core *core; | |
51 | const char *fw_name; | |
52 | const char *name; | |
601b6e93 | 53 | int index; |
fc0c209c SB |
54 | }; |
55 | ||
b09d6d99 MT |
56 | struct clk_core { |
57 | const char *name; | |
58 | const struct clk_ops *ops; | |
59 | struct clk_hw *hw; | |
60 | struct module *owner; | |
9a34b453 | 61 | struct device *dev; |
89a5ddcc | 62 | struct device_node *of_node; |
b09d6d99 | 63 | struct clk_core *parent; |
fc0c209c | 64 | struct clk_parent_map *parents; |
b09d6d99 MT |
65 | u8 num_parents; |
66 | u8 new_parent_index; | |
67 | unsigned long rate; | |
1c8e6004 | 68 | unsigned long req_rate; |
b09d6d99 MT |
69 | unsigned long new_rate; |
70 | struct clk_core *new_parent; | |
71 | struct clk_core *new_child; | |
72 | unsigned long flags; | |
e6500344 | 73 | bool orphan; |
24478839 | 74 | bool rpm_enabled; |
b09d6d99 MT |
75 | unsigned int enable_count; |
76 | unsigned int prepare_count; | |
e55a839a | 77 | unsigned int protect_count; |
9783c0d9 SB |
78 | unsigned long min_rate; |
79 | unsigned long max_rate; | |
b09d6d99 MT |
80 | unsigned long accuracy; |
81 | int phase; | |
9fba738a | 82 | struct clk_duty duty; |
b09d6d99 MT |
83 | struct hlist_head children; |
84 | struct hlist_node child_node; | |
1c8e6004 | 85 | struct hlist_head clks; |
b09d6d99 MT |
86 | unsigned int notifier_count; |
87 | #ifdef CONFIG_DEBUG_FS | |
88 | struct dentry *dentry; | |
8c9a8a8f | 89 | struct hlist_node debug_node; |
b09d6d99 MT |
90 | #endif |
91 | struct kref ref; | |
92 | }; | |
93 | ||
dfc202ea SB |
94 | #define CREATE_TRACE_POINTS |
95 | #include <trace/events/clk.h> | |
96 | ||
b09d6d99 MT |
97 | struct clk { |
98 | struct clk_core *core; | |
efa85048 | 99 | struct device *dev; |
b09d6d99 MT |
100 | const char *dev_id; |
101 | const char *con_id; | |
1c8e6004 TV |
102 | unsigned long min_rate; |
103 | unsigned long max_rate; | |
55e9b8b7 | 104 | unsigned int exclusive_count; |
50595f8b | 105 | struct hlist_node clks_node; |
b09d6d99 MT |
106 | }; |
107 | ||
9a34b453 MS |
108 | /*** runtime pm ***/ |
109 | static int clk_pm_runtime_get(struct clk_core *core) | |
110 | { | |
24478839 | 111 | if (!core->rpm_enabled) |
9a34b453 MS |
112 | return 0; |
113 | ||
3196a605 | 114 | return pm_runtime_resume_and_get(core->dev); |
9a34b453 MS |
115 | } |
116 | ||
117 | static void clk_pm_runtime_put(struct clk_core *core) | |
118 | { | |
24478839 | 119 | if (!core->rpm_enabled) |
9a34b453 MS |
120 | return; |
121 | ||
122 | pm_runtime_put_sync(core->dev); | |
123 | } | |
124 | ||
eab89f69 MT |
125 | /*** locking ***/ |
126 | static void clk_prepare_lock(void) | |
127 | { | |
533ddeb1 MT |
128 | if (!mutex_trylock(&prepare_lock)) { |
129 | if (prepare_owner == current) { | |
130 | prepare_refcnt++; | |
131 | return; | |
132 | } | |
133 | mutex_lock(&prepare_lock); | |
134 | } | |
135 | WARN_ON_ONCE(prepare_owner != NULL); | |
136 | WARN_ON_ONCE(prepare_refcnt != 0); | |
137 | prepare_owner = current; | |
138 | prepare_refcnt = 1; | |
eab89f69 MT |
139 | } |
140 | ||
141 | static void clk_prepare_unlock(void) | |
142 | { | |
533ddeb1 MT |
143 | WARN_ON_ONCE(prepare_owner != current); |
144 | WARN_ON_ONCE(prepare_refcnt == 0); | |
145 | ||
146 | if (--prepare_refcnt) | |
147 | return; | |
148 | prepare_owner = NULL; | |
eab89f69 MT |
149 | mutex_unlock(&prepare_lock); |
150 | } | |
151 | ||
152 | static unsigned long clk_enable_lock(void) | |
a57aa185 | 153 | __acquires(enable_lock) |
eab89f69 MT |
154 | { |
155 | unsigned long flags; | |
533ddeb1 | 156 | |
a12aa8a6 DL |
157 | /* |
158 | * On UP systems, spin_trylock_irqsave() always returns true, even if | |
159 | * we already hold the lock. So, in that case, we rely only on | |
160 | * reference counting. | |
161 | */ | |
162 | if (!IS_ENABLED(CONFIG_SMP) || | |
163 | !spin_trylock_irqsave(&enable_lock, flags)) { | |
533ddeb1 MT |
164 | if (enable_owner == current) { |
165 | enable_refcnt++; | |
a57aa185 | 166 | __acquire(enable_lock); |
a12aa8a6 DL |
167 | if (!IS_ENABLED(CONFIG_SMP)) |
168 | local_save_flags(flags); | |
533ddeb1 MT |
169 | return flags; |
170 | } | |
171 | spin_lock_irqsave(&enable_lock, flags); | |
172 | } | |
173 | WARN_ON_ONCE(enable_owner != NULL); | |
174 | WARN_ON_ONCE(enable_refcnt != 0); | |
175 | enable_owner = current; | |
176 | enable_refcnt = 1; | |
eab89f69 MT |
177 | return flags; |
178 | } | |
179 | ||
180 | static void clk_enable_unlock(unsigned long flags) | |
a57aa185 | 181 | __releases(enable_lock) |
eab89f69 | 182 | { |
533ddeb1 MT |
183 | WARN_ON_ONCE(enable_owner != current); |
184 | WARN_ON_ONCE(enable_refcnt == 0); | |
185 | ||
a57aa185 SB |
186 | if (--enable_refcnt) { |
187 | __release(enable_lock); | |
533ddeb1 | 188 | return; |
a57aa185 | 189 | } |
533ddeb1 | 190 | enable_owner = NULL; |
eab89f69 MT |
191 | spin_unlock_irqrestore(&enable_lock, flags); |
192 | } | |
193 | ||
e55a839a JB |
194 | static bool clk_core_rate_is_protected(struct clk_core *core) |
195 | { | |
196 | return core->protect_count; | |
197 | } | |
198 | ||
4dff95dc SB |
199 | static bool clk_core_is_prepared(struct clk_core *core) |
200 | { | |
9a34b453 MS |
201 | bool ret = false; |
202 | ||
4dff95dc SB |
203 | /* |
204 | * .is_prepared is optional for clocks that can prepare | |
205 | * fall back to software usage counter if it is missing | |
206 | */ | |
207 | if (!core->ops->is_prepared) | |
208 | return core->prepare_count; | |
b2476490 | 209 | |
9a34b453 MS |
210 | if (!clk_pm_runtime_get(core)) { |
211 | ret = core->ops->is_prepared(core->hw); | |
212 | clk_pm_runtime_put(core); | |
213 | } | |
214 | ||
215 | return ret; | |
4dff95dc | 216 | } |
b2476490 | 217 | |
4dff95dc SB |
218 | static bool clk_core_is_enabled(struct clk_core *core) |
219 | { | |
9a34b453 MS |
220 | bool ret = false; |
221 | ||
4dff95dc SB |
222 | /* |
223 | * .is_enabled is only mandatory for clocks that gate | |
224 | * fall back to software usage counter if .is_enabled is missing | |
225 | */ | |
226 | if (!core->ops->is_enabled) | |
227 | return core->enable_count; | |
6b44c854 | 228 | |
9a34b453 MS |
229 | /* |
230 | * Check if clock controller's device is runtime active before | |
231 | * calling .is_enabled callback. If not, assume that clock is | |
232 | * disabled, because we might be called from atomic context, from | |
233 | * which pm_runtime_get() is not allowed. | |
234 | * This function is called mainly from clk_disable_unused_subtree, | |
235 | * which ensures proper runtime pm activation of controller before | |
236 | * taking enable spinlock, but the below check is needed if one tries | |
237 | * to call it from other places. | |
238 | */ | |
24478839 | 239 | if (core->rpm_enabled) { |
9a34b453 MS |
240 | pm_runtime_get_noresume(core->dev); |
241 | if (!pm_runtime_active(core->dev)) { | |
242 | ret = false; | |
243 | goto done; | |
244 | } | |
245 | } | |
246 | ||
79200d58 CYT |
247 | /* |
248 | * This could be called with the enable lock held, or from atomic | |
249 | * context. If the parent isn't enabled already, we can't do | |
250 | * anything here. We can also assume this clock isn't enabled. | |
251 | */ | |
252 | if ((core->flags & CLK_OPS_PARENT_ENABLE) && core->parent) | |
253 | if (!clk_core_is_enabled(core->parent)) { | |
254 | ret = false; | |
255 | goto done; | |
256 | } | |
257 | ||
9a34b453 MS |
258 | ret = core->ops->is_enabled(core->hw); |
259 | done: | |
24478839 | 260 | if (core->rpm_enabled) |
756efe13 | 261 | pm_runtime_put(core->dev); |
9a34b453 MS |
262 | |
263 | return ret; | |
4dff95dc | 264 | } |
6b44c854 | 265 | |
4dff95dc | 266 | /*** helper functions ***/ |
1af599df | 267 | |
b76281cb | 268 | const char *__clk_get_name(const struct clk *clk) |
1af599df | 269 | { |
4dff95dc | 270 | return !clk ? NULL : clk->core->name; |
1af599df | 271 | } |
4dff95dc | 272 | EXPORT_SYMBOL_GPL(__clk_get_name); |
1af599df | 273 | |
e7df6f6e | 274 | const char *clk_hw_get_name(const struct clk_hw *hw) |
1a9c069c SB |
275 | { |
276 | return hw->core->name; | |
277 | } | |
278 | EXPORT_SYMBOL_GPL(clk_hw_get_name); | |
279 | ||
4dff95dc SB |
280 | struct clk_hw *__clk_get_hw(struct clk *clk) |
281 | { | |
282 | return !clk ? NULL : clk->core->hw; | |
283 | } | |
284 | EXPORT_SYMBOL_GPL(__clk_get_hw); | |
1af599df | 285 | |
e7df6f6e | 286 | unsigned int clk_hw_get_num_parents(const struct clk_hw *hw) |
1a9c069c SB |
287 | { |
288 | return hw->core->num_parents; | |
289 | } | |
290 | EXPORT_SYMBOL_GPL(clk_hw_get_num_parents); | |
291 | ||
e7df6f6e | 292 | struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw) |
1a9c069c SB |
293 | { |
294 | return hw->core->parent ? hw->core->parent->hw : NULL; | |
295 | } | |
296 | EXPORT_SYMBOL_GPL(clk_hw_get_parent); | |
297 | ||
4dff95dc SB |
298 | static struct clk_core *__clk_lookup_subtree(const char *name, |
299 | struct clk_core *core) | |
bddca894 | 300 | { |
035a61c3 | 301 | struct clk_core *child; |
4dff95dc | 302 | struct clk_core *ret; |
bddca894 | 303 | |
4dff95dc SB |
304 | if (!strcmp(core->name, name)) |
305 | return core; | |
bddca894 | 306 | |
4dff95dc SB |
307 | hlist_for_each_entry(child, &core->children, child_node) { |
308 | ret = __clk_lookup_subtree(name, child); | |
309 | if (ret) | |
310 | return ret; | |
bddca894 PG |
311 | } |
312 | ||
4dff95dc | 313 | return NULL; |
bddca894 PG |
314 | } |
315 | ||
4dff95dc | 316 | static struct clk_core *clk_core_lookup(const char *name) |
bddca894 | 317 | { |
4dff95dc SB |
318 | struct clk_core *root_clk; |
319 | struct clk_core *ret; | |
bddca894 | 320 | |
4dff95dc SB |
321 | if (!name) |
322 | return NULL; | |
bddca894 | 323 | |
4dff95dc SB |
324 | /* search the 'proper' clk tree first */ |
325 | hlist_for_each_entry(root_clk, &clk_root_list, child_node) { | |
326 | ret = __clk_lookup_subtree(name, root_clk); | |
327 | if (ret) | |
328 | return ret; | |
bddca894 PG |
329 | } |
330 | ||
4dff95dc SB |
331 | /* if not found, then search the orphan tree */ |
332 | hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) { | |
333 | ret = __clk_lookup_subtree(name, root_clk); | |
334 | if (ret) | |
335 | return ret; | |
336 | } | |
bddca894 | 337 | |
4dff95dc | 338 | return NULL; |
bddca894 PG |
339 | } |
340 | ||
4f8c6aba SB |
341 | #ifdef CONFIG_OF |
342 | static int of_parse_clkspec(const struct device_node *np, int index, | |
343 | const char *name, struct of_phandle_args *out_args); | |
344 | static struct clk_hw * | |
345 | of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec); | |
346 | #else | |
347 | static inline int of_parse_clkspec(const struct device_node *np, int index, | |
348 | const char *name, | |
349 | struct of_phandle_args *out_args) | |
350 | { | |
351 | return -ENOENT; | |
352 | } | |
353 | static inline struct clk_hw * | |
354 | of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec) | |
355 | { | |
356 | return ERR_PTR(-ENOENT); | |
357 | } | |
358 | #endif | |
359 | ||
fc0c209c | 360 | /** |
dde4eff4 | 361 | * clk_core_get - Find the clk_core parent of a clk |
fc0c209c | 362 | * @core: clk to find parent of |
1a079560 | 363 | * @p_index: parent index to search for |
fc0c209c SB |
364 | * |
365 | * This is the preferred method for clk providers to find the parent of a | |
366 | * clk when that parent is external to the clk controller. The parent_names | |
367 | * array is indexed and treated as a local name matching a string in the device | |
dde4eff4 SB |
368 | * node's 'clock-names' property or as the 'con_id' matching the device's |
369 | * dev_name() in a clk_lookup. This allows clk providers to use their own | |
fc0c209c SB |
370 | * namespace instead of looking for a globally unique parent string. |
371 | * | |
372 | * For example the following DT snippet would allow a clock registered by the | |
373 | * clock-controller@c001 that has a clk_init_data::parent_data array | |
374 | * with 'xtal' in the 'name' member to find the clock provided by the | |
375 | * clock-controller@f00abcd without needing to get the globally unique name of | |
376 | * the xtal clk. | |
377 | * | |
378 | * parent: clock-controller@f00abcd { | |
379 | * reg = <0xf00abcd 0xabcd>; | |
380 | * #clock-cells = <0>; | |
381 | * }; | |
382 | * | |
383 | * clock-controller@c001 { | |
384 | * reg = <0xc001 0xf00d>; | |
385 | * clocks = <&parent>; | |
386 | * clock-names = "xtal"; | |
387 | * #clock-cells = <1>; | |
388 | * }; | |
389 | * | |
390 | * Returns: -ENOENT when the provider can't be found or the clk doesn't | |
4f8c6aba SB |
391 | * exist in the provider or the name can't be found in the DT node or |
392 | * in a clkdev lookup. NULL when the provider knows about the clk but it | |
393 | * isn't provided on this system. | |
fc0c209c SB |
394 | * A valid clk_core pointer when the clk can be found in the provider. |
395 | */ | |
1a079560 | 396 | static struct clk_core *clk_core_get(struct clk_core *core, u8 p_index) |
fc0c209c | 397 | { |
1a079560 SB |
398 | const char *name = core->parents[p_index].fw_name; |
399 | int index = core->parents[p_index].index; | |
dde4eff4 SB |
400 | struct clk_hw *hw = ERR_PTR(-ENOENT); |
401 | struct device *dev = core->dev; | |
402 | const char *dev_id = dev ? dev_name(dev) : NULL; | |
fc0c209c | 403 | struct device_node *np = core->of_node; |
4f8c6aba | 404 | struct of_phandle_args clkspec; |
fc0c209c | 405 | |
4f8c6aba SB |
406 | if (np && (name || index >= 0) && |
407 | !of_parse_clkspec(np, index, name, &clkspec)) { | |
408 | hw = of_clk_get_hw_from_clkspec(&clkspec); | |
409 | of_node_put(clkspec.np); | |
410 | } else if (name) { | |
411 | /* | |
412 | * If the DT search above couldn't find the provider fallback to | |
413 | * looking up via clkdev based clk_lookups. | |
414 | */ | |
dde4eff4 | 415 | hw = clk_find_hw(dev_id, name); |
4f8c6aba | 416 | } |
dde4eff4 SB |
417 | |
418 | if (IS_ERR(hw)) | |
fc0c209c SB |
419 | return ERR_CAST(hw); |
420 | ||
421 | return hw->core; | |
422 | } | |
423 | ||
424 | static void clk_core_fill_parent_index(struct clk_core *core, u8 index) | |
425 | { | |
426 | struct clk_parent_map *entry = &core->parents[index]; | |
6a178497 | 427 | struct clk_core *parent; |
fc0c209c SB |
428 | |
429 | if (entry->hw) { | |
430 | parent = entry->hw->core; | |
fc0c209c | 431 | } else { |
1a079560 | 432 | parent = clk_core_get(core, index); |
45586c70 | 433 | if (PTR_ERR(parent) == -ENOENT && entry->name) |
fc0c209c SB |
434 | parent = clk_core_lookup(entry->name); |
435 | } | |
436 | ||
5c1c42c4 SB |
437 | /* |
438 | * We have a direct reference but it isn't registered yet? | |
439 | * Orphan it and let clk_reparent() update the orphan status | |
440 | * when the parent is registered. | |
441 | */ | |
442 | if (!parent) | |
443 | parent = ERR_PTR(-EPROBE_DEFER); | |
444 | ||
fc0c209c SB |
445 | /* Only cache it if it's not an error */ |
446 | if (!IS_ERR(parent)) | |
447 | entry->core = parent; | |
448 | } | |
449 | ||
4dff95dc SB |
450 | static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core, |
451 | u8 index) | |
bddca894 | 452 | { |
fc0c209c | 453 | if (!core || index >= core->num_parents || !core->parents) |
4dff95dc | 454 | return NULL; |
88cfbef2 | 455 | |
fc0c209c SB |
456 | if (!core->parents[index].core) |
457 | clk_core_fill_parent_index(core, index); | |
88cfbef2 | 458 | |
fc0c209c | 459 | return core->parents[index].core; |
bddca894 PG |
460 | } |
461 | ||
e7df6f6e SB |
462 | struct clk_hw * |
463 | clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index) | |
1a9c069c SB |
464 | { |
465 | struct clk_core *parent; | |
466 | ||
467 | parent = clk_core_get_parent_by_index(hw->core, index); | |
468 | ||
469 | return !parent ? NULL : parent->hw; | |
470 | } | |
471 | EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index); | |
472 | ||
4dff95dc SB |
473 | unsigned int __clk_get_enable_count(struct clk *clk) |
474 | { | |
475 | return !clk ? 0 : clk->core->enable_count; | |
476 | } | |
b2476490 | 477 | |
4dff95dc SB |
478 | static unsigned long clk_core_get_rate_nolock(struct clk_core *core) |
479 | { | |
73d4f945 SB |
480 | if (!core) |
481 | return 0; | |
c646cbf1 | 482 | |
73d4f945 SB |
483 | if (!core->num_parents || core->parent) |
484 | return core->rate; | |
b2476490 | 485 | |
73d4f945 SB |
486 | /* |
487 | * Clk must have a parent because num_parents > 0 but the parent isn't | |
488 | * known yet. Best to return 0 as the rate of this clk until we can | |
489 | * properly recalc the rate based on the parent's rate. | |
490 | */ | |
491 | return 0; | |
b2476490 MT |
492 | } |
493 | ||
e7df6f6e | 494 | unsigned long clk_hw_get_rate(const struct clk_hw *hw) |
1a9c069c SB |
495 | { |
496 | return clk_core_get_rate_nolock(hw->core); | |
497 | } | |
498 | EXPORT_SYMBOL_GPL(clk_hw_get_rate); | |
499 | ||
0daa376d | 500 | static unsigned long clk_core_get_accuracy_no_lock(struct clk_core *core) |
4dff95dc SB |
501 | { |
502 | if (!core) | |
503 | return 0; | |
b2476490 | 504 | |
4dff95dc | 505 | return core->accuracy; |
b2476490 MT |
506 | } |
507 | ||
e7df6f6e | 508 | unsigned long clk_hw_get_flags(const struct clk_hw *hw) |
1a9c069c SB |
509 | { |
510 | return hw->core->flags; | |
511 | } | |
512 | EXPORT_SYMBOL_GPL(clk_hw_get_flags); | |
513 | ||
e7df6f6e | 514 | bool clk_hw_is_prepared(const struct clk_hw *hw) |
1a9c069c SB |
515 | { |
516 | return clk_core_is_prepared(hw->core); | |
517 | } | |
12aa377b | 518 | EXPORT_SYMBOL_GPL(clk_hw_is_prepared); |
1a9c069c | 519 | |
e55a839a JB |
520 | bool clk_hw_rate_is_protected(const struct clk_hw *hw) |
521 | { | |
522 | return clk_core_rate_is_protected(hw->core); | |
523 | } | |
12aa377b | 524 | EXPORT_SYMBOL_GPL(clk_hw_rate_is_protected); |
e55a839a | 525 | |
be68bf88 JE |
526 | bool clk_hw_is_enabled(const struct clk_hw *hw) |
527 | { | |
528 | return clk_core_is_enabled(hw->core); | |
529 | } | |
12aa377b | 530 | EXPORT_SYMBOL_GPL(clk_hw_is_enabled); |
be68bf88 | 531 | |
4dff95dc | 532 | bool __clk_is_enabled(struct clk *clk) |
b2476490 | 533 | { |
4dff95dc SB |
534 | if (!clk) |
535 | return false; | |
b2476490 | 536 | |
4dff95dc SB |
537 | return clk_core_is_enabled(clk->core); |
538 | } | |
539 | EXPORT_SYMBOL_GPL(__clk_is_enabled); | |
b2476490 | 540 | |
4dff95dc SB |
541 | static bool mux_is_better_rate(unsigned long rate, unsigned long now, |
542 | unsigned long best, unsigned long flags) | |
543 | { | |
544 | if (flags & CLK_MUX_ROUND_CLOSEST) | |
545 | return abs(now - rate) < abs(best - rate); | |
1af599df | 546 | |
4dff95dc SB |
547 | return now <= rate && now > best; |
548 | } | |
bddca894 | 549 | |
262ca38f MR |
550 | static void clk_core_init_rate_req(struct clk_core * const core, |
551 | struct clk_rate_request *req, | |
552 | unsigned long rate); | |
553 | ||
666650b2 MR |
554 | static int clk_core_round_rate_nolock(struct clk_core *core, |
555 | struct clk_rate_request *req); | |
556 | ||
1234a2c4 MR |
557 | static bool clk_core_has_parent(struct clk_core *core, const struct clk_core *parent) |
558 | { | |
559 | struct clk_core *tmp; | |
560 | unsigned int i; | |
561 | ||
562 | /* Optimize for the case where the parent is already the parent. */ | |
563 | if (core->parent == parent) | |
564 | return true; | |
565 | ||
566 | for (i = 0; i < core->num_parents; i++) { | |
567 | tmp = clk_core_get_parent_by_index(core, i); | |
568 | if (!tmp) | |
569 | continue; | |
570 | ||
571 | if (tmp == parent) | |
572 | return true; | |
573 | } | |
574 | ||
575 | return false; | |
576 | } | |
577 | ||
262ca38f MR |
578 | static void |
579 | clk_core_forward_rate_req(struct clk_core *core, | |
580 | const struct clk_rate_request *old_req, | |
581 | struct clk_core *parent, | |
582 | struct clk_rate_request *req, | |
583 | unsigned long parent_rate) | |
584 | { | |
585 | if (WARN_ON(!clk_core_has_parent(core, parent))) | |
586 | return; | |
587 | ||
588 | clk_core_init_rate_req(parent, req, parent_rate); | |
589 | ||
590 | if (req->min_rate < old_req->min_rate) | |
591 | req->min_rate = old_req->min_rate; | |
592 | ||
593 | if (req->max_rate > old_req->max_rate) | |
594 | req->max_rate = old_req->max_rate; | |
595 | } | |
596 | ||
4ad69b80 JB |
597 | int clk_mux_determine_rate_flags(struct clk_hw *hw, |
598 | struct clk_rate_request *req, | |
599 | unsigned long flags) | |
4dff95dc SB |
600 | { |
601 | struct clk_core *core = hw->core, *parent, *best_parent = NULL; | |
0817b62c BB |
602 | int i, num_parents, ret; |
603 | unsigned long best = 0; | |
b2476490 | 604 | |
4dff95dc SB |
605 | /* if NO_REPARENT flag set, pass through to current parent */ |
606 | if (core->flags & CLK_SET_RATE_NO_REPARENT) { | |
607 | parent = core->parent; | |
0817b62c | 608 | if (core->flags & CLK_SET_RATE_PARENT) { |
262ca38f MR |
609 | struct clk_rate_request parent_req; |
610 | ||
666650b2 MR |
611 | if (!parent) { |
612 | req->rate = 0; | |
613 | return 0; | |
614 | } | |
615 | ||
262ca38f | 616 | clk_core_forward_rate_req(core, req, parent, &parent_req, req->rate); |
49e62e0d MR |
617 | |
618 | trace_clk_rate_request_start(&parent_req); | |
619 | ||
666650b2 | 620 | ret = clk_core_round_rate_nolock(parent, &parent_req); |
0817b62c BB |
621 | if (ret) |
622 | return ret; | |
623 | ||
49e62e0d MR |
624 | trace_clk_rate_request_done(&parent_req); |
625 | ||
0817b62c BB |
626 | best = parent_req.rate; |
627 | } else if (parent) { | |
4dff95dc | 628 | best = clk_core_get_rate_nolock(parent); |
0817b62c | 629 | } else { |
4dff95dc | 630 | best = clk_core_get_rate_nolock(core); |
0817b62c BB |
631 | } |
632 | ||
4dff95dc SB |
633 | goto out; |
634 | } | |
b2476490 | 635 | |
4dff95dc SB |
636 | /* find the parent that can provide the fastest rate <= rate */ |
637 | num_parents = core->num_parents; | |
638 | for (i = 0; i < num_parents; i++) { | |
262ca38f MR |
639 | unsigned long parent_rate; |
640 | ||
4dff95dc SB |
641 | parent = clk_core_get_parent_by_index(core, i); |
642 | if (!parent) | |
643 | continue; | |
0817b62c BB |
644 | |
645 | if (core->flags & CLK_SET_RATE_PARENT) { | |
262ca38f MR |
646 | struct clk_rate_request parent_req; |
647 | ||
648 | clk_core_forward_rate_req(core, req, parent, &parent_req, req->rate); | |
49e62e0d MR |
649 | |
650 | trace_clk_rate_request_start(&parent_req); | |
651 | ||
666650b2 | 652 | ret = clk_core_round_rate_nolock(parent, &parent_req); |
0817b62c BB |
653 | if (ret) |
654 | continue; | |
262ca38f | 655 | |
49e62e0d MR |
656 | trace_clk_rate_request_done(&parent_req); |
657 | ||
262ca38f | 658 | parent_rate = parent_req.rate; |
0817b62c | 659 | } else { |
262ca38f | 660 | parent_rate = clk_core_get_rate_nolock(parent); |
0817b62c BB |
661 | } |
662 | ||
262ca38f | 663 | if (mux_is_better_rate(req->rate, parent_rate, |
0817b62c | 664 | best, flags)) { |
4dff95dc | 665 | best_parent = parent; |
262ca38f | 666 | best = parent_rate; |
4dff95dc SB |
667 | } |
668 | } | |
b2476490 | 669 | |
57d866e6 BB |
670 | if (!best_parent) |
671 | return -EINVAL; | |
672 | ||
4dff95dc SB |
673 | out: |
674 | if (best_parent) | |
0817b62c BB |
675 | req->best_parent_hw = best_parent->hw; |
676 | req->best_parent_rate = best; | |
677 | req->rate = best; | |
b2476490 | 678 | |
0817b62c | 679 | return 0; |
b33d212f | 680 | } |
4ad69b80 | 681 | EXPORT_SYMBOL_GPL(clk_mux_determine_rate_flags); |
4dff95dc SB |
682 | |
683 | struct clk *__clk_lookup(const char *name) | |
fcb0ee6a | 684 | { |
4dff95dc SB |
685 | struct clk_core *core = clk_core_lookup(name); |
686 | ||
687 | return !core ? NULL : core->hw->clk; | |
fcb0ee6a | 688 | } |
b2476490 | 689 | |
4dff95dc SB |
690 | static void clk_core_get_boundaries(struct clk_core *core, |
691 | unsigned long *min_rate, | |
692 | unsigned long *max_rate) | |
1c155b3d | 693 | { |
4dff95dc | 694 | struct clk *clk_user; |
1c155b3d | 695 | |
9f776722 LC |
696 | lockdep_assert_held(&prepare_lock); |
697 | ||
9783c0d9 SB |
698 | *min_rate = core->min_rate; |
699 | *max_rate = core->max_rate; | |
496eadf8 | 700 | |
4dff95dc SB |
701 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
702 | *min_rate = max(*min_rate, clk_user->min_rate); | |
1c155b3d | 703 | |
4dff95dc SB |
704 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
705 | *max_rate = min(*max_rate, clk_user->max_rate); | |
706 | } | |
1c155b3d | 707 | |
25399325 MR |
708 | /* |
709 | * clk_hw_get_rate_range() - returns the clock rate range for a hw clk | |
710 | * @hw: the hw clk we want to get the range from | |
711 | * @min_rate: pointer to the variable that will hold the minimum | |
712 | * @max_rate: pointer to the variable that will hold the maximum | |
713 | * | |
714 | * Fills the @min_rate and @max_rate variables with the minimum and | |
715 | * maximum that clock can reach. | |
716 | */ | |
717 | void clk_hw_get_rate_range(struct clk_hw *hw, unsigned long *min_rate, | |
718 | unsigned long *max_rate) | |
719 | { | |
720 | clk_core_get_boundaries(hw->core, min_rate, max_rate); | |
721 | } | |
722 | EXPORT_SYMBOL_GPL(clk_hw_get_rate_range); | |
723 | ||
10c46f2e MR |
724 | static bool clk_core_check_boundaries(struct clk_core *core, |
725 | unsigned long min_rate, | |
726 | unsigned long max_rate) | |
727 | { | |
728 | struct clk *user; | |
729 | ||
730 | lockdep_assert_held(&prepare_lock); | |
731 | ||
732 | if (min_rate > core->max_rate || max_rate < core->min_rate) | |
733 | return false; | |
734 | ||
735 | hlist_for_each_entry(user, &core->clks, clks_node) | |
736 | if (min_rate > user->max_rate || max_rate < user->min_rate) | |
737 | return false; | |
738 | ||
739 | return true; | |
740 | } | |
741 | ||
9783c0d9 SB |
742 | void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate, |
743 | unsigned long max_rate) | |
744 | { | |
745 | hw->core->min_rate = min_rate; | |
746 | hw->core->max_rate = max_rate; | |
747 | } | |
748 | EXPORT_SYMBOL_GPL(clk_hw_set_rate_range); | |
749 | ||
4dff95dc | 750 | /* |
777c1a40 SB |
751 | * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk |
752 | * @hw: mux type clk to determine rate on | |
753 | * @req: rate request, also used to return preferred parent and frequencies | |
754 | * | |
4dff95dc SB |
755 | * Helper for finding best parent to provide a given frequency. This can be used |
756 | * directly as a determine_rate callback (e.g. for a mux), or from a more | |
757 | * complex clock that may combine a mux with other operations. | |
777c1a40 SB |
758 | * |
759 | * Returns: 0 on success, -EERROR value on error | |
4dff95dc | 760 | */ |
0817b62c BB |
761 | int __clk_mux_determine_rate(struct clk_hw *hw, |
762 | struct clk_rate_request *req) | |
4dff95dc | 763 | { |
0817b62c | 764 | return clk_mux_determine_rate_flags(hw, req, 0); |
1c155b3d | 765 | } |
4dff95dc | 766 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); |
1c155b3d | 767 | |
0817b62c BB |
768 | int __clk_mux_determine_rate_closest(struct clk_hw *hw, |
769 | struct clk_rate_request *req) | |
b2476490 | 770 | { |
0817b62c | 771 | return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST); |
4dff95dc SB |
772 | } |
773 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); | |
b2476490 | 774 | |
4dff95dc | 775 | /*** clk api ***/ |
496eadf8 | 776 | |
e55a839a JB |
777 | static void clk_core_rate_unprotect(struct clk_core *core) |
778 | { | |
779 | lockdep_assert_held(&prepare_lock); | |
780 | ||
781 | if (!core) | |
782 | return; | |
783 | ||
ab525dcc FE |
784 | if (WARN(core->protect_count == 0, |
785 | "%s already unprotected\n", core->name)) | |
e55a839a JB |
786 | return; |
787 | ||
788 | if (--core->protect_count > 0) | |
789 | return; | |
790 | ||
791 | clk_core_rate_unprotect(core->parent); | |
792 | } | |
793 | ||
794 | static int clk_core_rate_nuke_protect(struct clk_core *core) | |
795 | { | |
796 | int ret; | |
797 | ||
798 | lockdep_assert_held(&prepare_lock); | |
799 | ||
800 | if (!core) | |
801 | return -EINVAL; | |
802 | ||
803 | if (core->protect_count == 0) | |
804 | return 0; | |
805 | ||
806 | ret = core->protect_count; | |
807 | core->protect_count = 1; | |
808 | clk_core_rate_unprotect(core); | |
809 | ||
810 | return ret; | |
811 | } | |
812 | ||
55e9b8b7 JB |
813 | /** |
814 | * clk_rate_exclusive_put - release exclusivity over clock rate control | |
815 | * @clk: the clk over which the exclusivity is released | |
816 | * | |
817 | * clk_rate_exclusive_put() completes a critical section during which a clock | |
818 | * consumer cannot tolerate any other consumer making any operation on the | |
819 | * clock which could result in a rate change or rate glitch. Exclusive clocks | |
820 | * cannot have their rate changed, either directly or indirectly due to changes | |
821 | * further up the parent chain of clocks. As a result, clocks up parent chain | |
822 | * also get under exclusive control of the calling consumer. | |
823 | * | |
824 | * If exlusivity is claimed more than once on clock, even by the same consumer, | |
825 | * the rate effectively gets locked as exclusivity can't be preempted. | |
826 | * | |
827 | * Calls to clk_rate_exclusive_put() must be balanced with calls to | |
828 | * clk_rate_exclusive_get(). Calls to this function may sleep, and do not return | |
829 | * error status. | |
830 | */ | |
831 | void clk_rate_exclusive_put(struct clk *clk) | |
832 | { | |
833 | if (!clk) | |
834 | return; | |
835 | ||
836 | clk_prepare_lock(); | |
837 | ||
838 | /* | |
839 | * if there is something wrong with this consumer protect count, stop | |
840 | * here before messing with the provider | |
841 | */ | |
842 | if (WARN_ON(clk->exclusive_count <= 0)) | |
843 | goto out; | |
844 | ||
845 | clk_core_rate_unprotect(clk->core); | |
846 | clk->exclusive_count--; | |
847 | out: | |
848 | clk_prepare_unlock(); | |
849 | } | |
850 | EXPORT_SYMBOL_GPL(clk_rate_exclusive_put); | |
851 | ||
e55a839a JB |
852 | static void clk_core_rate_protect(struct clk_core *core) |
853 | { | |
854 | lockdep_assert_held(&prepare_lock); | |
855 | ||
856 | if (!core) | |
857 | return; | |
858 | ||
859 | if (core->protect_count == 0) | |
860 | clk_core_rate_protect(core->parent); | |
861 | ||
862 | core->protect_count++; | |
863 | } | |
864 | ||
865 | static void clk_core_rate_restore_protect(struct clk_core *core, int count) | |
866 | { | |
867 | lockdep_assert_held(&prepare_lock); | |
868 | ||
869 | if (!core) | |
870 | return; | |
871 | ||
872 | if (count == 0) | |
873 | return; | |
874 | ||
875 | clk_core_rate_protect(core); | |
876 | core->protect_count = count; | |
877 | } | |
878 | ||
55e9b8b7 JB |
879 | /** |
880 | * clk_rate_exclusive_get - get exclusivity over the clk rate control | |
881 | * @clk: the clk over which the exclusity of rate control is requested | |
882 | * | |
a37a5a9d | 883 | * clk_rate_exclusive_get() begins a critical section during which a clock |
55e9b8b7 JB |
884 | * consumer cannot tolerate any other consumer making any operation on the |
885 | * clock which could result in a rate change or rate glitch. Exclusive clocks | |
886 | * cannot have their rate changed, either directly or indirectly due to changes | |
887 | * further up the parent chain of clocks. As a result, clocks up parent chain | |
888 | * also get under exclusive control of the calling consumer. | |
889 | * | |
890 | * If exlusivity is claimed more than once on clock, even by the same consumer, | |
891 | * the rate effectively gets locked as exclusivity can't be preempted. | |
892 | * | |
893 | * Calls to clk_rate_exclusive_get() should be balanced with calls to | |
894 | * clk_rate_exclusive_put(). Calls to this function may sleep. | |
895 | * Returns 0 on success, -EERROR otherwise | |
896 | */ | |
897 | int clk_rate_exclusive_get(struct clk *clk) | |
898 | { | |
899 | if (!clk) | |
900 | return 0; | |
901 | ||
902 | clk_prepare_lock(); | |
903 | clk_core_rate_protect(clk->core); | |
904 | clk->exclusive_count++; | |
905 | clk_prepare_unlock(); | |
906 | ||
907 | return 0; | |
908 | } | |
909 | EXPORT_SYMBOL_GPL(clk_rate_exclusive_get); | |
910 | ||
4dff95dc SB |
911 | static void clk_core_unprepare(struct clk_core *core) |
912 | { | |
a6334725 SB |
913 | lockdep_assert_held(&prepare_lock); |
914 | ||
4dff95dc SB |
915 | if (!core) |
916 | return; | |
b2476490 | 917 | |
ab525dcc FE |
918 | if (WARN(core->prepare_count == 0, |
919 | "%s already unprepared\n", core->name)) | |
4dff95dc | 920 | return; |
b2476490 | 921 | |
ab525dcc FE |
922 | if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL, |
923 | "Unpreparing critical %s\n", core->name)) | |
2e20fbf5 LJ |
924 | return; |
925 | ||
9461f7b3 JB |
926 | if (core->flags & CLK_SET_RATE_GATE) |
927 | clk_core_rate_unprotect(core); | |
928 | ||
4dff95dc SB |
929 | if (--core->prepare_count > 0) |
930 | return; | |
b2476490 | 931 | |
ab525dcc | 932 | WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name); |
b2476490 | 933 | |
4dff95dc | 934 | trace_clk_unprepare(core); |
b2476490 | 935 | |
4dff95dc SB |
936 | if (core->ops->unprepare) |
937 | core->ops->unprepare(core->hw); | |
938 | ||
939 | trace_clk_unprepare_complete(core); | |
940 | clk_core_unprepare(core->parent); | |
4b592061 | 941 | clk_pm_runtime_put(core); |
b2476490 MT |
942 | } |
943 | ||
a6adc30b DA |
944 | static void clk_core_unprepare_lock(struct clk_core *core) |
945 | { | |
946 | clk_prepare_lock(); | |
947 | clk_core_unprepare(core); | |
948 | clk_prepare_unlock(); | |
949 | } | |
950 | ||
4dff95dc SB |
951 | /** |
952 | * clk_unprepare - undo preparation of a clock source | |
953 | * @clk: the clk being unprepared | |
954 | * | |
955 | * clk_unprepare may sleep, which differentiates it from clk_disable. In a | |
956 | * simple case, clk_unprepare can be used instead of clk_disable to gate a clk | |
957 | * if the operation may sleep. One example is a clk which is accessed over | |
958 | * I2c. In the complex case a clk gate operation may require a fast and a slow | |
959 | * part. It is this reason that clk_unprepare and clk_disable are not mutually | |
960 | * exclusive. In fact clk_disable must be called before clk_unprepare. | |
961 | */ | |
962 | void clk_unprepare(struct clk *clk) | |
1e435256 | 963 | { |
4dff95dc SB |
964 | if (IS_ERR_OR_NULL(clk)) |
965 | return; | |
966 | ||
a6adc30b | 967 | clk_core_unprepare_lock(clk->core); |
1e435256 | 968 | } |
4dff95dc | 969 | EXPORT_SYMBOL_GPL(clk_unprepare); |
1e435256 | 970 | |
4dff95dc | 971 | static int clk_core_prepare(struct clk_core *core) |
b2476490 | 972 | { |
4dff95dc | 973 | int ret = 0; |
b2476490 | 974 | |
a6334725 SB |
975 | lockdep_assert_held(&prepare_lock); |
976 | ||
4dff95dc | 977 | if (!core) |
1e435256 | 978 | return 0; |
1e435256 | 979 | |
4dff95dc | 980 | if (core->prepare_count == 0) { |
9a34b453 | 981 | ret = clk_pm_runtime_get(core); |
4dff95dc SB |
982 | if (ret) |
983 | return ret; | |
b2476490 | 984 | |
9a34b453 MS |
985 | ret = clk_core_prepare(core->parent); |
986 | if (ret) | |
987 | goto runtime_put; | |
988 | ||
4dff95dc | 989 | trace_clk_prepare(core); |
b2476490 | 990 | |
4dff95dc SB |
991 | if (core->ops->prepare) |
992 | ret = core->ops->prepare(core->hw); | |
b2476490 | 993 | |
4dff95dc | 994 | trace_clk_prepare_complete(core); |
1c155b3d | 995 | |
9a34b453 MS |
996 | if (ret) |
997 | goto unprepare; | |
4dff95dc | 998 | } |
1c155b3d | 999 | |
4dff95dc | 1000 | core->prepare_count++; |
b2476490 | 1001 | |
9461f7b3 JB |
1002 | /* |
1003 | * CLK_SET_RATE_GATE is a special case of clock protection | |
1004 | * Instead of a consumer claiming exclusive rate control, it is | |
1005 | * actually the provider which prevents any consumer from making any | |
1006 | * operation which could result in a rate change or rate glitch while | |
1007 | * the clock is prepared. | |
1008 | */ | |
1009 | if (core->flags & CLK_SET_RATE_GATE) | |
1010 | clk_core_rate_protect(core); | |
1011 | ||
b2476490 | 1012 | return 0; |
9a34b453 MS |
1013 | unprepare: |
1014 | clk_core_unprepare(core->parent); | |
1015 | runtime_put: | |
1016 | clk_pm_runtime_put(core); | |
1017 | return ret; | |
b2476490 | 1018 | } |
b2476490 | 1019 | |
a6adc30b DA |
1020 | static int clk_core_prepare_lock(struct clk_core *core) |
1021 | { | |
1022 | int ret; | |
1023 | ||
1024 | clk_prepare_lock(); | |
1025 | ret = clk_core_prepare(core); | |
1026 | clk_prepare_unlock(); | |
1027 | ||
1028 | return ret; | |
1029 | } | |
1030 | ||
4dff95dc SB |
1031 | /** |
1032 | * clk_prepare - prepare a clock source | |
1033 | * @clk: the clk being prepared | |
1034 | * | |
1035 | * clk_prepare may sleep, which differentiates it from clk_enable. In a simple | |
1036 | * case, clk_prepare can be used instead of clk_enable to ungate a clk if the | |
1037 | * operation may sleep. One example is a clk which is accessed over I2c. In | |
1038 | * the complex case a clk ungate operation may require a fast and a slow part. | |
1039 | * It is this reason that clk_prepare and clk_enable are not mutually | |
1040 | * exclusive. In fact clk_prepare must be called before clk_enable. | |
1041 | * Returns 0 on success, -EERROR otherwise. | |
1042 | */ | |
1043 | int clk_prepare(struct clk *clk) | |
b2476490 | 1044 | { |
4dff95dc SB |
1045 | if (!clk) |
1046 | return 0; | |
b2476490 | 1047 | |
a6adc30b | 1048 | return clk_core_prepare_lock(clk->core); |
b2476490 | 1049 | } |
4dff95dc | 1050 | EXPORT_SYMBOL_GPL(clk_prepare); |
b2476490 | 1051 | |
4dff95dc | 1052 | static void clk_core_disable(struct clk_core *core) |
b2476490 | 1053 | { |
a6334725 SB |
1054 | lockdep_assert_held(&enable_lock); |
1055 | ||
4dff95dc SB |
1056 | if (!core) |
1057 | return; | |
035a61c3 | 1058 | |
ab525dcc | 1059 | if (WARN(core->enable_count == 0, "%s already disabled\n", core->name)) |
4dff95dc | 1060 | return; |
b2476490 | 1061 | |
ab525dcc FE |
1062 | if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL, |
1063 | "Disabling critical %s\n", core->name)) | |
2e20fbf5 LJ |
1064 | return; |
1065 | ||
4dff95dc SB |
1066 | if (--core->enable_count > 0) |
1067 | return; | |
035a61c3 | 1068 | |
ca502fc6 | 1069 | trace_clk_disable(core); |
035a61c3 | 1070 | |
4dff95dc SB |
1071 | if (core->ops->disable) |
1072 | core->ops->disable(core->hw); | |
035a61c3 | 1073 | |
ca502fc6 | 1074 | trace_clk_disable_complete(core); |
035a61c3 | 1075 | |
4dff95dc | 1076 | clk_core_disable(core->parent); |
035a61c3 | 1077 | } |
7ef3dcc8 | 1078 | |
a6adc30b DA |
1079 | static void clk_core_disable_lock(struct clk_core *core) |
1080 | { | |
1081 | unsigned long flags; | |
1082 | ||
1083 | flags = clk_enable_lock(); | |
1084 | clk_core_disable(core); | |
1085 | clk_enable_unlock(flags); | |
1086 | } | |
1087 | ||
4dff95dc SB |
1088 | /** |
1089 | * clk_disable - gate a clock | |
1090 | * @clk: the clk being gated | |
1091 | * | |
1092 | * clk_disable must not sleep, which differentiates it from clk_unprepare. In | |
1093 | * a simple case, clk_disable can be used instead of clk_unprepare to gate a | |
1094 | * clk if the operation is fast and will never sleep. One example is a | |
1095 | * SoC-internal clk which is controlled via simple register writes. In the | |
1096 | * complex case a clk gate operation may require a fast and a slow part. It is | |
1097 | * this reason that clk_unprepare and clk_disable are not mutually exclusive. | |
1098 | * In fact clk_disable must be called before clk_unprepare. | |
1099 | */ | |
1100 | void clk_disable(struct clk *clk) | |
b2476490 | 1101 | { |
4dff95dc SB |
1102 | if (IS_ERR_OR_NULL(clk)) |
1103 | return; | |
1104 | ||
a6adc30b | 1105 | clk_core_disable_lock(clk->core); |
b2476490 | 1106 | } |
4dff95dc | 1107 | EXPORT_SYMBOL_GPL(clk_disable); |
b2476490 | 1108 | |
4dff95dc | 1109 | static int clk_core_enable(struct clk_core *core) |
b2476490 | 1110 | { |
4dff95dc | 1111 | int ret = 0; |
b2476490 | 1112 | |
a6334725 SB |
1113 | lockdep_assert_held(&enable_lock); |
1114 | ||
4dff95dc SB |
1115 | if (!core) |
1116 | return 0; | |
b2476490 | 1117 | |
ab525dcc FE |
1118 | if (WARN(core->prepare_count == 0, |
1119 | "Enabling unprepared %s\n", core->name)) | |
4dff95dc | 1120 | return -ESHUTDOWN; |
b2476490 | 1121 | |
4dff95dc SB |
1122 | if (core->enable_count == 0) { |
1123 | ret = clk_core_enable(core->parent); | |
b2476490 | 1124 | |
4dff95dc SB |
1125 | if (ret) |
1126 | return ret; | |
b2476490 | 1127 | |
ca502fc6 | 1128 | trace_clk_enable(core); |
035a61c3 | 1129 | |
4dff95dc SB |
1130 | if (core->ops->enable) |
1131 | ret = core->ops->enable(core->hw); | |
035a61c3 | 1132 | |
ca502fc6 | 1133 | trace_clk_enable_complete(core); |
4dff95dc SB |
1134 | |
1135 | if (ret) { | |
1136 | clk_core_disable(core->parent); | |
1137 | return ret; | |
1138 | } | |
1139 | } | |
1140 | ||
1141 | core->enable_count++; | |
1142 | return 0; | |
035a61c3 | 1143 | } |
b2476490 | 1144 | |
a6adc30b DA |
1145 | static int clk_core_enable_lock(struct clk_core *core) |
1146 | { | |
1147 | unsigned long flags; | |
1148 | int ret; | |
1149 | ||
1150 | flags = clk_enable_lock(); | |
1151 | ret = clk_core_enable(core); | |
1152 | clk_enable_unlock(flags); | |
1153 | ||
1154 | return ret; | |
1155 | } | |
1156 | ||
43536548 K |
1157 | /** |
1158 | * clk_gate_restore_context - restore context for poweroff | |
1159 | * @hw: the clk_hw pointer of clock whose state is to be restored | |
1160 | * | |
1161 | * The clock gate restore context function enables or disables | |
1162 | * the gate clocks based on the enable_count. This is done in cases | |
1163 | * where the clock context is lost and based on the enable_count | |
1164 | * the clock either needs to be enabled/disabled. This | |
1165 | * helps restore the state of gate clocks. | |
1166 | */ | |
1167 | void clk_gate_restore_context(struct clk_hw *hw) | |
1168 | { | |
9be76627 SB |
1169 | struct clk_core *core = hw->core; |
1170 | ||
1171 | if (core->enable_count) | |
1172 | core->ops->enable(hw); | |
43536548 | 1173 | else |
9be76627 | 1174 | core->ops->disable(hw); |
43536548 K |
1175 | } |
1176 | EXPORT_SYMBOL_GPL(clk_gate_restore_context); | |
1177 | ||
9be76627 | 1178 | static int clk_core_save_context(struct clk_core *core) |
8b95d1ce RD |
1179 | { |
1180 | struct clk_core *child; | |
1181 | int ret = 0; | |
1182 | ||
9be76627 SB |
1183 | hlist_for_each_entry(child, &core->children, child_node) { |
1184 | ret = clk_core_save_context(child); | |
8b95d1ce RD |
1185 | if (ret < 0) |
1186 | return ret; | |
1187 | } | |
1188 | ||
9be76627 SB |
1189 | if (core->ops && core->ops->save_context) |
1190 | ret = core->ops->save_context(core->hw); | |
8b95d1ce RD |
1191 | |
1192 | return ret; | |
1193 | } | |
1194 | ||
9be76627 | 1195 | static void clk_core_restore_context(struct clk_core *core) |
8b95d1ce RD |
1196 | { |
1197 | struct clk_core *child; | |
1198 | ||
9be76627 SB |
1199 | if (core->ops && core->ops->restore_context) |
1200 | core->ops->restore_context(core->hw); | |
8b95d1ce | 1201 | |
9be76627 SB |
1202 | hlist_for_each_entry(child, &core->children, child_node) |
1203 | clk_core_restore_context(child); | |
8b95d1ce RD |
1204 | } |
1205 | ||
1206 | /** | |
1207 | * clk_save_context - save clock context for poweroff | |
1208 | * | |
1209 | * Saves the context of the clock register for powerstates in which the | |
1210 | * contents of the registers will be lost. Occurs deep within the suspend | |
1211 | * code. Returns 0 on success. | |
1212 | */ | |
1213 | int clk_save_context(void) | |
1214 | { | |
1215 | struct clk_core *clk; | |
1216 | int ret; | |
1217 | ||
1218 | hlist_for_each_entry(clk, &clk_root_list, child_node) { | |
9be76627 | 1219 | ret = clk_core_save_context(clk); |
8b95d1ce RD |
1220 | if (ret < 0) |
1221 | return ret; | |
1222 | } | |
1223 | ||
1224 | hlist_for_each_entry(clk, &clk_orphan_list, child_node) { | |
9be76627 | 1225 | ret = clk_core_save_context(clk); |
8b95d1ce RD |
1226 | if (ret < 0) |
1227 | return ret; | |
1228 | } | |
1229 | ||
1230 | return 0; | |
1231 | } | |
1232 | EXPORT_SYMBOL_GPL(clk_save_context); | |
1233 | ||
1234 | /** | |
1235 | * clk_restore_context - restore clock context after poweroff | |
1236 | * | |
1237 | * Restore the saved clock context upon resume. | |
1238 | * | |
1239 | */ | |
1240 | void clk_restore_context(void) | |
1241 | { | |
9be76627 | 1242 | struct clk_core *core; |
8b95d1ce | 1243 | |
9be76627 SB |
1244 | hlist_for_each_entry(core, &clk_root_list, child_node) |
1245 | clk_core_restore_context(core); | |
8b95d1ce | 1246 | |
9be76627 SB |
1247 | hlist_for_each_entry(core, &clk_orphan_list, child_node) |
1248 | clk_core_restore_context(core); | |
8b95d1ce RD |
1249 | } |
1250 | EXPORT_SYMBOL_GPL(clk_restore_context); | |
1251 | ||
4dff95dc SB |
1252 | /** |
1253 | * clk_enable - ungate a clock | |
1254 | * @clk: the clk being ungated | |
1255 | * | |
1256 | * clk_enable must not sleep, which differentiates it from clk_prepare. In a | |
1257 | * simple case, clk_enable can be used instead of clk_prepare to ungate a clk | |
1258 | * if the operation will never sleep. One example is a SoC-internal clk which | |
1259 | * is controlled via simple register writes. In the complex case a clk ungate | |
1260 | * operation may require a fast and a slow part. It is this reason that | |
1261 | * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare | |
1262 | * must be called before clk_enable. Returns 0 on success, -EERROR | |
1263 | * otherwise. | |
1264 | */ | |
1265 | int clk_enable(struct clk *clk) | |
5279fc40 | 1266 | { |
4dff95dc | 1267 | if (!clk) |
5279fc40 BB |
1268 | return 0; |
1269 | ||
a6adc30b DA |
1270 | return clk_core_enable_lock(clk->core); |
1271 | } | |
1272 | EXPORT_SYMBOL_GPL(clk_enable); | |
1273 | ||
0bfa0820 NP |
1274 | /** |
1275 | * clk_is_enabled_when_prepared - indicate if preparing a clock also enables it. | |
1276 | * @clk: clock source | |
1277 | * | |
1278 | * Returns true if clk_prepare() implicitly enables the clock, effectively | |
1279 | * making clk_enable()/clk_disable() no-ops, false otherwise. | |
1280 | * | |
1281 | * This is of interest mainly to power management code where actually | |
1282 | * disabling the clock also requires unpreparing it to have any material | |
1283 | * effect. | |
1284 | * | |
1285 | * Regardless of the value returned here, the caller must always invoke | |
1286 | * clk_enable() or clk_prepare_enable() and counterparts for usage counts | |
1287 | * to be right. | |
1288 | */ | |
1289 | bool clk_is_enabled_when_prepared(struct clk *clk) | |
1290 | { | |
1291 | return clk && !(clk->core->ops->enable && clk->core->ops->disable); | |
1292 | } | |
1293 | EXPORT_SYMBOL_GPL(clk_is_enabled_when_prepared); | |
1294 | ||
a6adc30b DA |
1295 | static int clk_core_prepare_enable(struct clk_core *core) |
1296 | { | |
1297 | int ret; | |
1298 | ||
1299 | ret = clk_core_prepare_lock(core); | |
1300 | if (ret) | |
1301 | return ret; | |
1302 | ||
1303 | ret = clk_core_enable_lock(core); | |
1304 | if (ret) | |
1305 | clk_core_unprepare_lock(core); | |
5279fc40 | 1306 | |
4dff95dc | 1307 | return ret; |
b2476490 | 1308 | } |
a6adc30b DA |
1309 | |
1310 | static void clk_core_disable_unprepare(struct clk_core *core) | |
1311 | { | |
1312 | clk_core_disable_lock(core); | |
1313 | clk_core_unprepare_lock(core); | |
1314 | } | |
b2476490 | 1315 | |
564f86d3 | 1316 | static void __init clk_unprepare_unused_subtree(struct clk_core *core) |
7ec986ef DA |
1317 | { |
1318 | struct clk_core *child; | |
1319 | ||
1320 | lockdep_assert_held(&prepare_lock); | |
1321 | ||
1322 | hlist_for_each_entry(child, &core->children, child_node) | |
1323 | clk_unprepare_unused_subtree(child); | |
1324 | ||
1325 | if (core->prepare_count) | |
1326 | return; | |
1327 | ||
1328 | if (core->flags & CLK_IGNORE_UNUSED) | |
1329 | return; | |
1330 | ||
9a34b453 MS |
1331 | if (clk_pm_runtime_get(core)) |
1332 | return; | |
1333 | ||
7ec986ef DA |
1334 | if (clk_core_is_prepared(core)) { |
1335 | trace_clk_unprepare(core); | |
1336 | if (core->ops->unprepare_unused) | |
1337 | core->ops->unprepare_unused(core->hw); | |
1338 | else if (core->ops->unprepare) | |
1339 | core->ops->unprepare(core->hw); | |
1340 | trace_clk_unprepare_complete(core); | |
1341 | } | |
9a34b453 MS |
1342 | |
1343 | clk_pm_runtime_put(core); | |
7ec986ef DA |
1344 | } |
1345 | ||
564f86d3 | 1346 | static void __init clk_disable_unused_subtree(struct clk_core *core) |
7ec986ef DA |
1347 | { |
1348 | struct clk_core *child; | |
1349 | unsigned long flags; | |
1350 | ||
1351 | lockdep_assert_held(&prepare_lock); | |
1352 | ||
1353 | hlist_for_each_entry(child, &core->children, child_node) | |
1354 | clk_disable_unused_subtree(child); | |
1355 | ||
a4b3518d DA |
1356 | if (core->flags & CLK_OPS_PARENT_ENABLE) |
1357 | clk_core_prepare_enable(core->parent); | |
1358 | ||
9a34b453 MS |
1359 | if (clk_pm_runtime_get(core)) |
1360 | goto unprepare_out; | |
1361 | ||
7ec986ef DA |
1362 | flags = clk_enable_lock(); |
1363 | ||
1364 | if (core->enable_count) | |
1365 | goto unlock_out; | |
1366 | ||
1367 | if (core->flags & CLK_IGNORE_UNUSED) | |
1368 | goto unlock_out; | |
1369 | ||
1370 | /* | |
1371 | * some gate clocks have special needs during the disable-unused | |
1372 | * sequence. call .disable_unused if available, otherwise fall | |
1373 | * back to .disable | |
1374 | */ | |
1375 | if (clk_core_is_enabled(core)) { | |
1376 | trace_clk_disable(core); | |
1377 | if (core->ops->disable_unused) | |
1378 | core->ops->disable_unused(core->hw); | |
1379 | else if (core->ops->disable) | |
1380 | core->ops->disable(core->hw); | |
1381 | trace_clk_disable_complete(core); | |
1382 | } | |
1383 | ||
1384 | unlock_out: | |
1385 | clk_enable_unlock(flags); | |
9a34b453 MS |
1386 | clk_pm_runtime_put(core); |
1387 | unprepare_out: | |
a4b3518d DA |
1388 | if (core->flags & CLK_OPS_PARENT_ENABLE) |
1389 | clk_core_disable_unprepare(core->parent); | |
7ec986ef DA |
1390 | } |
1391 | ||
564f86d3 | 1392 | static bool clk_ignore_unused __initdata; |
7ec986ef DA |
1393 | static int __init clk_ignore_unused_setup(char *__unused) |
1394 | { | |
1395 | clk_ignore_unused = true; | |
1396 | return 1; | |
1397 | } | |
1398 | __setup("clk_ignore_unused", clk_ignore_unused_setup); | |
1399 | ||
564f86d3 | 1400 | static int __init clk_disable_unused(void) |
7ec986ef DA |
1401 | { |
1402 | struct clk_core *core; | |
1403 | ||
1404 | if (clk_ignore_unused) { | |
1405 | pr_warn("clk: Not disabling unused clocks\n"); | |
1406 | return 0; | |
1407 | } | |
1408 | ||
12ca59b9 KD |
1409 | pr_info("clk: Disabling unused clocks\n"); |
1410 | ||
7ec986ef DA |
1411 | clk_prepare_lock(); |
1412 | ||
1413 | hlist_for_each_entry(core, &clk_root_list, child_node) | |
1414 | clk_disable_unused_subtree(core); | |
1415 | ||
1416 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
1417 | clk_disable_unused_subtree(core); | |
1418 | ||
1419 | hlist_for_each_entry(core, &clk_root_list, child_node) | |
1420 | clk_unprepare_unused_subtree(core); | |
1421 | ||
1422 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
1423 | clk_unprepare_unused_subtree(core); | |
1424 | ||
1425 | clk_prepare_unlock(); | |
1426 | ||
1427 | return 0; | |
1428 | } | |
1429 | late_initcall_sync(clk_disable_unused); | |
1430 | ||
0f6cc2b8 JB |
1431 | static int clk_core_determine_round_nolock(struct clk_core *core, |
1432 | struct clk_rate_request *req) | |
3d6ee287 | 1433 | { |
0817b62c | 1434 | long rate; |
4dff95dc SB |
1435 | |
1436 | lockdep_assert_held(&prepare_lock); | |
3d6ee287 | 1437 | |
d6968fca | 1438 | if (!core) |
4dff95dc | 1439 | return 0; |
3d6ee287 | 1440 | |
facf949b MR |
1441 | /* |
1442 | * Some clock providers hand-craft their clk_rate_requests and | |
1443 | * might not fill min_rate and max_rate. | |
1444 | * | |
1445 | * If it's the case, clamping the rate is equivalent to setting | |
1446 | * the rate to 0 which is bad. Skip the clamping but complain so | |
1447 | * that it gets fixed, hopefully. | |
1448 | */ | |
1449 | if (!req->min_rate && !req->max_rate) | |
1450 | pr_warn("%s: %s: clk_rate_request has initialized min or max rate.\n", | |
1451 | __func__, core->name); | |
1452 | else | |
1453 | req->rate = clamp(req->rate, req->min_rate, req->max_rate); | |
948fb096 | 1454 | |
55e9b8b7 | 1455 | /* |
e27453ad | 1456 | * At this point, core protection will be disabled |
55e9b8b7 JB |
1457 | * - if the provider is not protected at all |
1458 | * - if the calling consumer is the only one which has exclusivity | |
1459 | * over the provider | |
1460 | */ | |
e55a839a JB |
1461 | if (clk_core_rate_is_protected(core)) { |
1462 | req->rate = core->rate; | |
1463 | } else if (core->ops->determine_rate) { | |
0817b62c BB |
1464 | return core->ops->determine_rate(core->hw, req); |
1465 | } else if (core->ops->round_rate) { | |
1466 | rate = core->ops->round_rate(core->hw, req->rate, | |
1467 | &req->best_parent_rate); | |
1468 | if (rate < 0) | |
1469 | return rate; | |
1470 | ||
1471 | req->rate = rate; | |
0817b62c | 1472 | } else { |
0f6cc2b8 | 1473 | return -EINVAL; |
0817b62c BB |
1474 | } |
1475 | ||
1476 | return 0; | |
3d6ee287 UH |
1477 | } |
1478 | ||
0f6cc2b8 | 1479 | static void clk_core_init_rate_req(struct clk_core * const core, |
718af795 MR |
1480 | struct clk_rate_request *req, |
1481 | unsigned long rate) | |
0f6cc2b8 JB |
1482 | { |
1483 | struct clk_core *parent; | |
1484 | ||
2079d029 | 1485 | if (WARN_ON(!req)) |
0f6cc2b8 JB |
1486 | return; |
1487 | ||
b46fd8db | 1488 | memset(req, 0, sizeof(*req)); |
774560cf | 1489 | req->max_rate = ULONG_MAX; |
b46fd8db | 1490 | |
2079d029 MR |
1491 | if (!core) |
1492 | return; | |
1493 | ||
ef13f8b6 | 1494 | req->core = core; |
718af795 | 1495 | req->rate = rate; |
11c84a38 | 1496 | clk_core_get_boundaries(core, &req->min_rate, &req->max_rate); |
718af795 | 1497 | |
0f6cc2b8 JB |
1498 | parent = core->parent; |
1499 | if (parent) { | |
1500 | req->best_parent_hw = parent->hw; | |
1501 | req->best_parent_rate = parent->rate; | |
1502 | } else { | |
1503 | req->best_parent_hw = NULL; | |
1504 | req->best_parent_rate = 0; | |
0817b62c | 1505 | } |
0f6cc2b8 | 1506 | } |
0817b62c | 1507 | |
c35e84b0 MR |
1508 | /** |
1509 | * clk_hw_init_rate_request - Initializes a clk_rate_request | |
1510 | * @hw: the clk for which we want to submit a rate request | |
1511 | * @req: the clk_rate_request structure we want to initialise | |
1512 | * @rate: the rate which is to be requested | |
1513 | * | |
1514 | * Initializes a clk_rate_request structure to submit to | |
1515 | * __clk_determine_rate() or similar functions. | |
1516 | */ | |
1517 | void clk_hw_init_rate_request(const struct clk_hw *hw, | |
1518 | struct clk_rate_request *req, | |
1519 | unsigned long rate) | |
1520 | { | |
1521 | if (WARN_ON(!hw || !req)) | |
1522 | return; | |
1523 | ||
1524 | clk_core_init_rate_req(hw->core, req, rate); | |
1525 | } | |
1526 | EXPORT_SYMBOL_GPL(clk_hw_init_rate_request); | |
1527 | ||
262ca38f MR |
1528 | /** |
1529 | * clk_hw_forward_rate_request - Forwards a clk_rate_request to a clock's parent | |
1530 | * @hw: the original clock that got the rate request | |
1531 | * @old_req: the original clk_rate_request structure we want to forward | |
1532 | * @parent: the clk we want to forward @old_req to | |
1533 | * @req: the clk_rate_request structure we want to initialise | |
1534 | * @parent_rate: The rate which is to be requested to @parent | |
1535 | * | |
1536 | * Initializes a clk_rate_request structure to submit to a clock parent | |
1537 | * in __clk_determine_rate() or similar functions. | |
1538 | */ | |
1539 | void clk_hw_forward_rate_request(const struct clk_hw *hw, | |
1540 | const struct clk_rate_request *old_req, | |
1541 | const struct clk_hw *parent, | |
1542 | struct clk_rate_request *req, | |
1543 | unsigned long parent_rate) | |
1544 | { | |
1545 | if (WARN_ON(!hw || !old_req || !parent || !req)) | |
1546 | return; | |
1547 | ||
1548 | clk_core_forward_rate_req(hw->core, old_req, | |
1549 | parent->core, req, | |
1550 | parent_rate); | |
1551 | } | |
1552 | ||
0f6cc2b8 JB |
1553 | static bool clk_core_can_round(struct clk_core * const core) |
1554 | { | |
eef1f1b6 | 1555 | return core->ops->determine_rate || core->ops->round_rate; |
0f6cc2b8 JB |
1556 | } |
1557 | ||
1558 | static int clk_core_round_rate_nolock(struct clk_core *core, | |
1559 | struct clk_rate_request *req) | |
1560 | { | |
262ca38f MR |
1561 | int ret; |
1562 | ||
0f6cc2b8 JB |
1563 | lockdep_assert_held(&prepare_lock); |
1564 | ||
04bf9ab3 JB |
1565 | if (!core) { |
1566 | req->rate = 0; | |
0f6cc2b8 | 1567 | return 0; |
04bf9ab3 | 1568 | } |
0817b62c | 1569 | |
0f6cc2b8 JB |
1570 | if (clk_core_can_round(core)) |
1571 | return clk_core_determine_round_nolock(core, req); | |
262ca38f MR |
1572 | |
1573 | if (core->flags & CLK_SET_RATE_PARENT) { | |
1574 | struct clk_rate_request parent_req; | |
1575 | ||
1576 | clk_core_forward_rate_req(core, req, core->parent, &parent_req, req->rate); | |
49e62e0d MR |
1577 | |
1578 | trace_clk_rate_request_start(&parent_req); | |
1579 | ||
262ca38f MR |
1580 | ret = clk_core_round_rate_nolock(core->parent, &parent_req); |
1581 | if (ret) | |
1582 | return ret; | |
1583 | ||
49e62e0d MR |
1584 | trace_clk_rate_request_done(&parent_req); |
1585 | ||
262ca38f MR |
1586 | req->best_parent_rate = parent_req.rate; |
1587 | req->rate = parent_req.rate; | |
1588 | ||
1589 | return 0; | |
1590 | } | |
0f6cc2b8 JB |
1591 | |
1592 | req->rate = core->rate; | |
0817b62c | 1593 | return 0; |
3d6ee287 UH |
1594 | } |
1595 | ||
4dff95dc SB |
1596 | /** |
1597 | * __clk_determine_rate - get the closest rate actually supported by a clock | |
1598 | * @hw: determine the rate of this clock | |
2d5b520c | 1599 | * @req: target rate request |
4dff95dc | 1600 | * |
6e5ab41b | 1601 | * Useful for clk_ops such as .set_rate and .determine_rate. |
4dff95dc | 1602 | */ |
0817b62c | 1603 | int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) |
035a61c3 | 1604 | { |
0817b62c BB |
1605 | if (!hw) { |
1606 | req->rate = 0; | |
4dff95dc | 1607 | return 0; |
0817b62c | 1608 | } |
035a61c3 | 1609 | |
0817b62c | 1610 | return clk_core_round_rate_nolock(hw->core, req); |
035a61c3 | 1611 | } |
4dff95dc | 1612 | EXPORT_SYMBOL_GPL(__clk_determine_rate); |
035a61c3 | 1613 | |
e8c849c2 SM |
1614 | /** |
1615 | * clk_hw_round_rate() - round the given rate for a hw clk | |
1616 | * @hw: the hw clk for which we are rounding a rate | |
1617 | * @rate: the rate which is to be rounded | |
1618 | * | |
1619 | * Takes in a rate as input and rounds it to a rate that the clk can actually | |
1620 | * use. | |
1621 | * | |
1622 | * Context: prepare_lock must be held. | |
1623 | * For clk providers to call from within clk_ops such as .round_rate, | |
1624 | * .determine_rate. | |
1625 | * | |
1626 | * Return: returns rounded rate of hw clk if clk supports round_rate operation | |
1627 | * else returns the parent rate. | |
1628 | */ | |
1a9c069c SB |
1629 | unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate) |
1630 | { | |
1631 | int ret; | |
1632 | struct clk_rate_request req; | |
1633 | ||
8cd9c39d | 1634 | clk_core_init_rate_req(hw->core, &req, rate); |
1a9c069c | 1635 | |
49e62e0d MR |
1636 | trace_clk_rate_request_start(&req); |
1637 | ||
1a9c069c SB |
1638 | ret = clk_core_round_rate_nolock(hw->core, &req); |
1639 | if (ret) | |
1640 | return 0; | |
1641 | ||
49e62e0d MR |
1642 | trace_clk_rate_request_done(&req); |
1643 | ||
1a9c069c SB |
1644 | return req.rate; |
1645 | } | |
1646 | EXPORT_SYMBOL_GPL(clk_hw_round_rate); | |
1647 | ||
4dff95dc SB |
1648 | /** |
1649 | * clk_round_rate - round the given rate for a clk | |
1650 | * @clk: the clk for which we are rounding a rate | |
1651 | * @rate: the rate which is to be rounded | |
1652 | * | |
1653 | * Takes in a rate as input and rounds it to a rate that the clk can actually | |
1654 | * use which is then returned. If clk doesn't support round_rate operation | |
1655 | * then the parent rate is returned. | |
1656 | */ | |
1657 | long clk_round_rate(struct clk *clk, unsigned long rate) | |
035a61c3 | 1658 | { |
fc4a05d4 SB |
1659 | struct clk_rate_request req; |
1660 | int ret; | |
4dff95dc | 1661 | |
035a61c3 | 1662 | if (!clk) |
4dff95dc | 1663 | return 0; |
035a61c3 | 1664 | |
4dff95dc | 1665 | clk_prepare_lock(); |
fc4a05d4 | 1666 | |
55e9b8b7 JB |
1667 | if (clk->exclusive_count) |
1668 | clk_core_rate_unprotect(clk->core); | |
1669 | ||
8cd9c39d | 1670 | clk_core_init_rate_req(clk->core, &req, rate); |
fc4a05d4 | 1671 | |
49e62e0d MR |
1672 | trace_clk_rate_request_start(&req); |
1673 | ||
fc4a05d4 | 1674 | ret = clk_core_round_rate_nolock(clk->core, &req); |
55e9b8b7 | 1675 | |
49e62e0d MR |
1676 | trace_clk_rate_request_done(&req); |
1677 | ||
55e9b8b7 JB |
1678 | if (clk->exclusive_count) |
1679 | clk_core_rate_protect(clk->core); | |
1680 | ||
4dff95dc SB |
1681 | clk_prepare_unlock(); |
1682 | ||
fc4a05d4 SB |
1683 | if (ret) |
1684 | return ret; | |
1685 | ||
1686 | return req.rate; | |
035a61c3 | 1687 | } |
4dff95dc | 1688 | EXPORT_SYMBOL_GPL(clk_round_rate); |
b2476490 | 1689 | |
4dff95dc SB |
1690 | /** |
1691 | * __clk_notify - call clk notifier chain | |
1692 | * @core: clk that is changing rate | |
1693 | * @msg: clk notifier type (see include/linux/clk.h) | |
1694 | * @old_rate: old clk rate | |
1695 | * @new_rate: new clk rate | |
1696 | * | |
1697 | * Triggers a notifier call chain on the clk rate-change notification | |
1698 | * for 'clk'. Passes a pointer to the struct clk and the previous | |
1699 | * and current rates to the notifier callback. Intended to be called by | |
1700 | * internal clock code only. Returns NOTIFY_DONE from the last driver | |
1701 | * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if | |
1702 | * a driver returns that. | |
1703 | */ | |
1704 | static int __clk_notify(struct clk_core *core, unsigned long msg, | |
1705 | unsigned long old_rate, unsigned long new_rate) | |
b2476490 | 1706 | { |
4dff95dc SB |
1707 | struct clk_notifier *cn; |
1708 | struct clk_notifier_data cnd; | |
1709 | int ret = NOTIFY_DONE; | |
b2476490 | 1710 | |
4dff95dc SB |
1711 | cnd.old_rate = old_rate; |
1712 | cnd.new_rate = new_rate; | |
b2476490 | 1713 | |
4dff95dc SB |
1714 | list_for_each_entry(cn, &clk_notifier_list, node) { |
1715 | if (cn->clk->core == core) { | |
1716 | cnd.clk = cn->clk; | |
1717 | ret = srcu_notifier_call_chain(&cn->notifier_head, msg, | |
1718 | &cnd); | |
17c34c56 PDS |
1719 | if (ret & NOTIFY_STOP_MASK) |
1720 | return ret; | |
4dff95dc | 1721 | } |
b2476490 MT |
1722 | } |
1723 | ||
4dff95dc | 1724 | return ret; |
b2476490 MT |
1725 | } |
1726 | ||
4dff95dc SB |
1727 | /** |
1728 | * __clk_recalc_accuracies | |
1729 | * @core: first clk in the subtree | |
1730 | * | |
1731 | * Walks the subtree of clks starting with clk and recalculates accuracies as | |
1732 | * it goes. Note that if a clk does not implement the .recalc_accuracy | |
6e5ab41b | 1733 | * callback then it is assumed that the clock will take on the accuracy of its |
4dff95dc | 1734 | * parent. |
4dff95dc SB |
1735 | */ |
1736 | static void __clk_recalc_accuracies(struct clk_core *core) | |
b2476490 | 1737 | { |
4dff95dc SB |
1738 | unsigned long parent_accuracy = 0; |
1739 | struct clk_core *child; | |
b2476490 | 1740 | |
4dff95dc | 1741 | lockdep_assert_held(&prepare_lock); |
b2476490 | 1742 | |
4dff95dc SB |
1743 | if (core->parent) |
1744 | parent_accuracy = core->parent->accuracy; | |
b2476490 | 1745 | |
4dff95dc SB |
1746 | if (core->ops->recalc_accuracy) |
1747 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
1748 | parent_accuracy); | |
1749 | else | |
1750 | core->accuracy = parent_accuracy; | |
b2476490 | 1751 | |
4dff95dc SB |
1752 | hlist_for_each_entry(child, &core->children, child_node) |
1753 | __clk_recalc_accuracies(child); | |
b2476490 MT |
1754 | } |
1755 | ||
0daa376d | 1756 | static long clk_core_get_accuracy_recalc(struct clk_core *core) |
e366fdd7 | 1757 | { |
4dff95dc SB |
1758 | if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE)) |
1759 | __clk_recalc_accuracies(core); | |
15a02c1f | 1760 | |
0daa376d | 1761 | return clk_core_get_accuracy_no_lock(core); |
e366fdd7 | 1762 | } |
15a02c1f | 1763 | |
4dff95dc SB |
1764 | /** |
1765 | * clk_get_accuracy - return the accuracy of clk | |
1766 | * @clk: the clk whose accuracy is being returned | |
1767 | * | |
1768 | * Simply returns the cached accuracy of the clk, unless | |
1769 | * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be | |
1770 | * issued. | |
1771 | * If clk is NULL then returns 0. | |
1772 | */ | |
1773 | long clk_get_accuracy(struct clk *clk) | |
035a61c3 | 1774 | { |
0daa376d SB |
1775 | long accuracy; |
1776 | ||
4dff95dc SB |
1777 | if (!clk) |
1778 | return 0; | |
035a61c3 | 1779 | |
0daa376d SB |
1780 | clk_prepare_lock(); |
1781 | accuracy = clk_core_get_accuracy_recalc(clk->core); | |
1782 | clk_prepare_unlock(); | |
1783 | ||
1784 | return accuracy; | |
035a61c3 | 1785 | } |
4dff95dc | 1786 | EXPORT_SYMBOL_GPL(clk_get_accuracy); |
035a61c3 | 1787 | |
4dff95dc SB |
1788 | static unsigned long clk_recalc(struct clk_core *core, |
1789 | unsigned long parent_rate) | |
1c8e6004 | 1790 | { |
9a34b453 MS |
1791 | unsigned long rate = parent_rate; |
1792 | ||
1793 | if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) { | |
1794 | rate = core->ops->recalc_rate(core->hw, parent_rate); | |
1795 | clk_pm_runtime_put(core); | |
1796 | } | |
1797 | return rate; | |
1c8e6004 TV |
1798 | } |
1799 | ||
4dff95dc SB |
1800 | /** |
1801 | * __clk_recalc_rates | |
1802 | * @core: first clk in the subtree | |
096f2a0c | 1803 | * @update_req: Whether req_rate should be updated with the new rate |
4dff95dc SB |
1804 | * @msg: notification type (see include/linux/clk.h) |
1805 | * | |
1806 | * Walks the subtree of clks starting with clk and recalculates rates as it | |
1807 | * goes. Note that if a clk does not implement the .recalc_rate callback then | |
1808 | * it is assumed that the clock will take on the rate of its parent. | |
1809 | * | |
1810 | * clk_recalc_rates also propagates the POST_RATE_CHANGE notification, | |
1811 | * if necessary. | |
15a02c1f | 1812 | */ |
096f2a0c MR |
1813 | static void __clk_recalc_rates(struct clk_core *core, bool update_req, |
1814 | unsigned long msg) | |
15a02c1f | 1815 | { |
4dff95dc SB |
1816 | unsigned long old_rate; |
1817 | unsigned long parent_rate = 0; | |
1818 | struct clk_core *child; | |
e366fdd7 | 1819 | |
4dff95dc | 1820 | lockdep_assert_held(&prepare_lock); |
15a02c1f | 1821 | |
4dff95dc | 1822 | old_rate = core->rate; |
b2476490 | 1823 | |
4dff95dc SB |
1824 | if (core->parent) |
1825 | parent_rate = core->parent->rate; | |
b2476490 | 1826 | |
4dff95dc | 1827 | core->rate = clk_recalc(core, parent_rate); |
096f2a0c MR |
1828 | if (update_req) |
1829 | core->req_rate = core->rate; | |
b2476490 | 1830 | |
4dff95dc SB |
1831 | /* |
1832 | * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE | |
1833 | * & ABORT_RATE_CHANGE notifiers | |
1834 | */ | |
1835 | if (core->notifier_count && msg) | |
1836 | __clk_notify(core, msg, old_rate, core->rate); | |
b2476490 | 1837 | |
4dff95dc | 1838 | hlist_for_each_entry(child, &core->children, child_node) |
096f2a0c | 1839 | __clk_recalc_rates(child, update_req, msg); |
4dff95dc | 1840 | } |
b2476490 | 1841 | |
0daa376d | 1842 | static unsigned long clk_core_get_rate_recalc(struct clk_core *core) |
4dff95dc | 1843 | { |
4dff95dc | 1844 | if (core && (core->flags & CLK_GET_RATE_NOCACHE)) |
096f2a0c | 1845 | __clk_recalc_rates(core, false, 0); |
4dff95dc | 1846 | |
0daa376d | 1847 | return clk_core_get_rate_nolock(core); |
b2476490 MT |
1848 | } |
1849 | ||
1850 | /** | |
4dff95dc SB |
1851 | * clk_get_rate - return the rate of clk |
1852 | * @clk: the clk whose rate is being returned | |
b2476490 | 1853 | * |
4dff95dc | 1854 | * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag |
bde8870c MR |
1855 | * is set, which means a recalc_rate will be issued. Can be called regardless of |
1856 | * the clock enabledness. If clk is NULL, or if an error occurred, then returns | |
1857 | * 0. | |
b2476490 | 1858 | */ |
4dff95dc | 1859 | unsigned long clk_get_rate(struct clk *clk) |
b2476490 | 1860 | { |
0daa376d SB |
1861 | unsigned long rate; |
1862 | ||
4dff95dc SB |
1863 | if (!clk) |
1864 | return 0; | |
63589e92 | 1865 | |
0daa376d SB |
1866 | clk_prepare_lock(); |
1867 | rate = clk_core_get_rate_recalc(clk->core); | |
1868 | clk_prepare_unlock(); | |
1869 | ||
1870 | return rate; | |
b2476490 | 1871 | } |
4dff95dc | 1872 | EXPORT_SYMBOL_GPL(clk_get_rate); |
b2476490 | 1873 | |
4dff95dc SB |
1874 | static int clk_fetch_parent_index(struct clk_core *core, |
1875 | struct clk_core *parent) | |
b2476490 | 1876 | { |
4dff95dc | 1877 | int i; |
b2476490 | 1878 | |
508f884a MY |
1879 | if (!parent) |
1880 | return -EINVAL; | |
1881 | ||
ede77858 | 1882 | for (i = 0; i < core->num_parents; i++) { |
1a079560 | 1883 | /* Found it first try! */ |
fc0c209c | 1884 | if (core->parents[i].core == parent) |
4dff95dc | 1885 | return i; |
b2476490 | 1886 | |
1a079560 | 1887 | /* Something else is here, so keep looking */ |
fc0c209c | 1888 | if (core->parents[i].core) |
ede77858 DB |
1889 | continue; |
1890 | ||
1a079560 SB |
1891 | /* Maybe core hasn't been cached but the hw is all we know? */ |
1892 | if (core->parents[i].hw) { | |
1893 | if (core->parents[i].hw == parent->hw) | |
1894 | break; | |
1895 | ||
1896 | /* Didn't match, but we're expecting a clk_hw */ | |
1897 | continue; | |
ede77858 | 1898 | } |
1a079560 SB |
1899 | |
1900 | /* Maybe it hasn't been cached (clk_set_parent() path) */ | |
1901 | if (parent == clk_core_get(core, i)) | |
1902 | break; | |
1903 | ||
1904 | /* Fallback to comparing globally unique names */ | |
24876f09 MB |
1905 | if (core->parents[i].name && |
1906 | !strcmp(parent->name, core->parents[i].name)) | |
1a079560 | 1907 | break; |
ede77858 DB |
1908 | } |
1909 | ||
1a079560 SB |
1910 | if (i == core->num_parents) |
1911 | return -EINVAL; | |
1912 | ||
1913 | core->parents[i].core = parent; | |
1914 | return i; | |
b2476490 MT |
1915 | } |
1916 | ||
d9b86cc4 SK |
1917 | /** |
1918 | * clk_hw_get_parent_index - return the index of the parent clock | |
1919 | * @hw: clk_hw associated with the clk being consumed | |
1920 | * | |
1921 | * Fetches and returns the index of parent clock. Returns -EINVAL if the given | |
1922 | * clock does not have a current parent. | |
1923 | */ | |
1924 | int clk_hw_get_parent_index(struct clk_hw *hw) | |
1925 | { | |
1926 | struct clk_hw *parent = clk_hw_get_parent(hw); | |
1927 | ||
1928 | if (WARN_ON(parent == NULL)) | |
1929 | return -EINVAL; | |
1930 | ||
1931 | return clk_fetch_parent_index(hw->core, parent->core); | |
1932 | } | |
1933 | EXPORT_SYMBOL_GPL(clk_hw_get_parent_index); | |
1934 | ||
e6500344 HS |
1935 | /* |
1936 | * Update the orphan status of @core and all its children. | |
1937 | */ | |
1938 | static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan) | |
1939 | { | |
1940 | struct clk_core *child; | |
1941 | ||
1942 | core->orphan = is_orphan; | |
1943 | ||
1944 | hlist_for_each_entry(child, &core->children, child_node) | |
1945 | clk_core_update_orphan_status(child, is_orphan); | |
1946 | } | |
1947 | ||
4dff95dc | 1948 | static void clk_reparent(struct clk_core *core, struct clk_core *new_parent) |
b2476490 | 1949 | { |
e6500344 HS |
1950 | bool was_orphan = core->orphan; |
1951 | ||
4dff95dc | 1952 | hlist_del(&core->child_node); |
035a61c3 | 1953 | |
4dff95dc | 1954 | if (new_parent) { |
e6500344 HS |
1955 | bool becomes_orphan = new_parent->orphan; |
1956 | ||
4dff95dc SB |
1957 | /* avoid duplicate POST_RATE_CHANGE notifications */ |
1958 | if (new_parent->new_child == core) | |
1959 | new_parent->new_child = NULL; | |
b2476490 | 1960 | |
4dff95dc | 1961 | hlist_add_head(&core->child_node, &new_parent->children); |
e6500344 HS |
1962 | |
1963 | if (was_orphan != becomes_orphan) | |
1964 | clk_core_update_orphan_status(core, becomes_orphan); | |
4dff95dc SB |
1965 | } else { |
1966 | hlist_add_head(&core->child_node, &clk_orphan_list); | |
e6500344 HS |
1967 | if (!was_orphan) |
1968 | clk_core_update_orphan_status(core, true); | |
4dff95dc | 1969 | } |
dfc202ea | 1970 | |
4dff95dc | 1971 | core->parent = new_parent; |
035a61c3 TV |
1972 | } |
1973 | ||
4dff95dc SB |
1974 | static struct clk_core *__clk_set_parent_before(struct clk_core *core, |
1975 | struct clk_core *parent) | |
b2476490 MT |
1976 | { |
1977 | unsigned long flags; | |
4dff95dc | 1978 | struct clk_core *old_parent = core->parent; |
b2476490 | 1979 | |
4dff95dc | 1980 | /* |
fc8726a2 DA |
1981 | * 1. enable parents for CLK_OPS_PARENT_ENABLE clock |
1982 | * | |
1983 | * 2. Migrate prepare state between parents and prevent race with | |
4dff95dc SB |
1984 | * clk_enable(). |
1985 | * | |
1986 | * If the clock is not prepared, then a race with | |
1987 | * clk_enable/disable() is impossible since we already have the | |
1988 | * prepare lock (future calls to clk_enable() need to be preceded by | |
1989 | * a clk_prepare()). | |
1990 | * | |
1991 | * If the clock is prepared, migrate the prepared state to the new | |
1992 | * parent and also protect against a race with clk_enable() by | |
1993 | * forcing the clock and the new parent on. This ensures that all | |
1994 | * future calls to clk_enable() are practically NOPs with respect to | |
1995 | * hardware and software states. | |
1996 | * | |
1997 | * See also: Comment for clk_set_parent() below. | |
1998 | */ | |
fc8726a2 DA |
1999 | |
2000 | /* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */ | |
2001 | if (core->flags & CLK_OPS_PARENT_ENABLE) { | |
2002 | clk_core_prepare_enable(old_parent); | |
2003 | clk_core_prepare_enable(parent); | |
2004 | } | |
2005 | ||
2006 | /* migrate prepare count if > 0 */ | |
4dff95dc | 2007 | if (core->prepare_count) { |
fc8726a2 DA |
2008 | clk_core_prepare_enable(parent); |
2009 | clk_core_enable_lock(core); | |
4dff95dc | 2010 | } |
63589e92 | 2011 | |
4dff95dc | 2012 | /* update the clk tree topology */ |
eab89f69 | 2013 | flags = clk_enable_lock(); |
4dff95dc | 2014 | clk_reparent(core, parent); |
eab89f69 | 2015 | clk_enable_unlock(flags); |
4dff95dc SB |
2016 | |
2017 | return old_parent; | |
b2476490 | 2018 | } |
b2476490 | 2019 | |
4dff95dc SB |
2020 | static void __clk_set_parent_after(struct clk_core *core, |
2021 | struct clk_core *parent, | |
2022 | struct clk_core *old_parent) | |
b2476490 | 2023 | { |
4dff95dc SB |
2024 | /* |
2025 | * Finish the migration of prepare state and undo the changes done | |
2026 | * for preventing a race with clk_enable(). | |
2027 | */ | |
2028 | if (core->prepare_count) { | |
fc8726a2 DA |
2029 | clk_core_disable_lock(core); |
2030 | clk_core_disable_unprepare(old_parent); | |
2031 | } | |
2032 | ||
2033 | /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */ | |
2034 | if (core->flags & CLK_OPS_PARENT_ENABLE) { | |
2035 | clk_core_disable_unprepare(parent); | |
2036 | clk_core_disable_unprepare(old_parent); | |
4dff95dc SB |
2037 | } |
2038 | } | |
b2476490 | 2039 | |
4dff95dc SB |
2040 | static int __clk_set_parent(struct clk_core *core, struct clk_core *parent, |
2041 | u8 p_index) | |
2042 | { | |
2043 | unsigned long flags; | |
2044 | int ret = 0; | |
2045 | struct clk_core *old_parent; | |
b2476490 | 2046 | |
4dff95dc | 2047 | old_parent = __clk_set_parent_before(core, parent); |
b2476490 | 2048 | |
4dff95dc | 2049 | trace_clk_set_parent(core, parent); |
b2476490 | 2050 | |
4dff95dc SB |
2051 | /* change clock input source */ |
2052 | if (parent && core->ops->set_parent) | |
2053 | ret = core->ops->set_parent(core->hw, p_index); | |
dfc202ea | 2054 | |
4dff95dc | 2055 | trace_clk_set_parent_complete(core, parent); |
dfc202ea | 2056 | |
4dff95dc SB |
2057 | if (ret) { |
2058 | flags = clk_enable_lock(); | |
2059 | clk_reparent(core, old_parent); | |
2060 | clk_enable_unlock(flags); | |
cb1b1dd9 | 2061 | |
c660b2eb | 2062 | __clk_set_parent_after(core, old_parent, parent); |
dfc202ea | 2063 | |
4dff95dc | 2064 | return ret; |
b2476490 MT |
2065 | } |
2066 | ||
4dff95dc SB |
2067 | __clk_set_parent_after(core, parent, old_parent); |
2068 | ||
b2476490 MT |
2069 | return 0; |
2070 | } | |
2071 | ||
2072 | /** | |
4dff95dc SB |
2073 | * __clk_speculate_rates |
2074 | * @core: first clk in the subtree | |
2075 | * @parent_rate: the "future" rate of clk's parent | |
b2476490 | 2076 | * |
4dff95dc SB |
2077 | * Walks the subtree of clks starting with clk, speculating rates as it |
2078 | * goes and firing off PRE_RATE_CHANGE notifications as necessary. | |
2079 | * | |
2080 | * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending | |
2081 | * pre-rate change notifications and returns early if no clks in the | |
2082 | * subtree have subscribed to the notifications. Note that if a clk does not | |
2083 | * implement the .recalc_rate callback then it is assumed that the clock will | |
2084 | * take on the rate of its parent. | |
b2476490 | 2085 | */ |
4dff95dc SB |
2086 | static int __clk_speculate_rates(struct clk_core *core, |
2087 | unsigned long parent_rate) | |
b2476490 | 2088 | { |
4dff95dc SB |
2089 | struct clk_core *child; |
2090 | unsigned long new_rate; | |
2091 | int ret = NOTIFY_DONE; | |
b2476490 | 2092 | |
4dff95dc | 2093 | lockdep_assert_held(&prepare_lock); |
864e160a | 2094 | |
4dff95dc SB |
2095 | new_rate = clk_recalc(core, parent_rate); |
2096 | ||
2097 | /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */ | |
2098 | if (core->notifier_count) | |
2099 | ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate); | |
2100 | ||
2101 | if (ret & NOTIFY_STOP_MASK) { | |
2102 | pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", | |
2103 | __func__, core->name, ret); | |
2104 | goto out; | |
2105 | } | |
2106 | ||
2107 | hlist_for_each_entry(child, &core->children, child_node) { | |
2108 | ret = __clk_speculate_rates(child, new_rate); | |
2109 | if (ret & NOTIFY_STOP_MASK) | |
2110 | break; | |
2111 | } | |
b2476490 | 2112 | |
4dff95dc | 2113 | out: |
b2476490 MT |
2114 | return ret; |
2115 | } | |
b2476490 | 2116 | |
4dff95dc SB |
2117 | static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate, |
2118 | struct clk_core *new_parent, u8 p_index) | |
b2476490 | 2119 | { |
4dff95dc | 2120 | struct clk_core *child; |
b2476490 | 2121 | |
4dff95dc SB |
2122 | core->new_rate = new_rate; |
2123 | core->new_parent = new_parent; | |
2124 | core->new_parent_index = p_index; | |
2125 | /* include clk in new parent's PRE_RATE_CHANGE notifications */ | |
2126 | core->new_child = NULL; | |
2127 | if (new_parent && new_parent != core->parent) | |
2128 | new_parent->new_child = core; | |
496eadf8 | 2129 | |
4dff95dc SB |
2130 | hlist_for_each_entry(child, &core->children, child_node) { |
2131 | child->new_rate = clk_recalc(child, new_rate); | |
2132 | clk_calc_subtree(child, child->new_rate, NULL, 0); | |
2133 | } | |
2134 | } | |
b2476490 | 2135 | |
4dff95dc SB |
2136 | /* |
2137 | * calculate the new rates returning the topmost clock that has to be | |
2138 | * changed. | |
2139 | */ | |
2140 | static struct clk_core *clk_calc_new_rates(struct clk_core *core, | |
2141 | unsigned long rate) | |
2142 | { | |
2143 | struct clk_core *top = core; | |
2144 | struct clk_core *old_parent, *parent; | |
4dff95dc SB |
2145 | unsigned long best_parent_rate = 0; |
2146 | unsigned long new_rate; | |
2147 | unsigned long min_rate; | |
2148 | unsigned long max_rate; | |
2149 | int p_index = 0; | |
2150 | long ret; | |
2151 | ||
2152 | /* sanity */ | |
2153 | if (IS_ERR_OR_NULL(core)) | |
2154 | return NULL; | |
2155 | ||
2156 | /* save parent rate, if it exists */ | |
2157 | parent = old_parent = core->parent; | |
71472c0c | 2158 | if (parent) |
4dff95dc | 2159 | best_parent_rate = parent->rate; |
71472c0c | 2160 | |
4dff95dc SB |
2161 | clk_core_get_boundaries(core, &min_rate, &max_rate); |
2162 | ||
2163 | /* find the closest rate and parent clk/rate */ | |
0f6cc2b8 | 2164 | if (clk_core_can_round(core)) { |
0817b62c BB |
2165 | struct clk_rate_request req; |
2166 | ||
718af795 | 2167 | clk_core_init_rate_req(core, &req, rate); |
0f6cc2b8 | 2168 | |
49e62e0d MR |
2169 | trace_clk_rate_request_start(&req); |
2170 | ||
0f6cc2b8 | 2171 | ret = clk_core_determine_round_nolock(core, &req); |
4dff95dc SB |
2172 | if (ret < 0) |
2173 | return NULL; | |
1c8e6004 | 2174 | |
49e62e0d MR |
2175 | trace_clk_rate_request_done(&req); |
2176 | ||
0817b62c BB |
2177 | best_parent_rate = req.best_parent_rate; |
2178 | new_rate = req.rate; | |
2179 | parent = req.best_parent_hw ? req.best_parent_hw->core : NULL; | |
035a61c3 | 2180 | |
4dff95dc SB |
2181 | if (new_rate < min_rate || new_rate > max_rate) |
2182 | return NULL; | |
2183 | } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) { | |
2184 | /* pass-through clock without adjustable parent */ | |
2185 | core->new_rate = core->rate; | |
2186 | return NULL; | |
2187 | } else { | |
2188 | /* pass-through clock with adjustable parent */ | |
2189 | top = clk_calc_new_rates(parent, rate); | |
2190 | new_rate = parent->new_rate; | |
2191 | goto out; | |
2192 | } | |
1c8e6004 | 2193 | |
4dff95dc SB |
2194 | /* some clocks must be gated to change parent */ |
2195 | if (parent != old_parent && | |
2196 | (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
2197 | pr_debug("%s: %s not gated but wants to reparent\n", | |
2198 | __func__, core->name); | |
2199 | return NULL; | |
2200 | } | |
b2476490 | 2201 | |
4dff95dc SB |
2202 | /* try finding the new parent index */ |
2203 | if (parent && core->num_parents > 1) { | |
2204 | p_index = clk_fetch_parent_index(core, parent); | |
2205 | if (p_index < 0) { | |
2206 | pr_debug("%s: clk %s can not be parent of clk %s\n", | |
2207 | __func__, parent->name, core->name); | |
2208 | return NULL; | |
2209 | } | |
2210 | } | |
b2476490 | 2211 | |
4dff95dc SB |
2212 | if ((core->flags & CLK_SET_RATE_PARENT) && parent && |
2213 | best_parent_rate != parent->rate) | |
2214 | top = clk_calc_new_rates(parent, best_parent_rate); | |
035a61c3 | 2215 | |
4dff95dc SB |
2216 | out: |
2217 | clk_calc_subtree(core, new_rate, parent, p_index); | |
b2476490 | 2218 | |
4dff95dc | 2219 | return top; |
b2476490 | 2220 | } |
b2476490 | 2221 | |
4dff95dc SB |
2222 | /* |
2223 | * Notify about rate changes in a subtree. Always walk down the whole tree | |
2224 | * so that in case of an error we can walk down the whole tree again and | |
2225 | * abort the change. | |
b2476490 | 2226 | */ |
4dff95dc SB |
2227 | static struct clk_core *clk_propagate_rate_change(struct clk_core *core, |
2228 | unsigned long event) | |
b2476490 | 2229 | { |
4dff95dc | 2230 | struct clk_core *child, *tmp_clk, *fail_clk = NULL; |
b2476490 MT |
2231 | int ret = NOTIFY_DONE; |
2232 | ||
4dff95dc SB |
2233 | if (core->rate == core->new_rate) |
2234 | return NULL; | |
b2476490 | 2235 | |
4dff95dc SB |
2236 | if (core->notifier_count) { |
2237 | ret = __clk_notify(core, event, core->rate, core->new_rate); | |
2238 | if (ret & NOTIFY_STOP_MASK) | |
2239 | fail_clk = core; | |
b2476490 MT |
2240 | } |
2241 | ||
4dff95dc SB |
2242 | hlist_for_each_entry(child, &core->children, child_node) { |
2243 | /* Skip children who will be reparented to another clock */ | |
2244 | if (child->new_parent && child->new_parent != core) | |
2245 | continue; | |
2246 | tmp_clk = clk_propagate_rate_change(child, event); | |
2247 | if (tmp_clk) | |
2248 | fail_clk = tmp_clk; | |
2249 | } | |
5279fc40 | 2250 | |
4dff95dc SB |
2251 | /* handle the new child who might not be in core->children yet */ |
2252 | if (core->new_child) { | |
2253 | tmp_clk = clk_propagate_rate_change(core->new_child, event); | |
2254 | if (tmp_clk) | |
2255 | fail_clk = tmp_clk; | |
2256 | } | |
5279fc40 | 2257 | |
4dff95dc | 2258 | return fail_clk; |
5279fc40 BB |
2259 | } |
2260 | ||
4dff95dc SB |
2261 | /* |
2262 | * walk down a subtree and set the new rates notifying the rate | |
2263 | * change on the way | |
2264 | */ | |
2265 | static void clk_change_rate(struct clk_core *core) | |
035a61c3 | 2266 | { |
4dff95dc SB |
2267 | struct clk_core *child; |
2268 | struct hlist_node *tmp; | |
2269 | unsigned long old_rate; | |
2270 | unsigned long best_parent_rate = 0; | |
2271 | bool skip_set_rate = false; | |
2272 | struct clk_core *old_parent; | |
fc8726a2 | 2273 | struct clk_core *parent = NULL; |
035a61c3 | 2274 | |
4dff95dc | 2275 | old_rate = core->rate; |
035a61c3 | 2276 | |
fc8726a2 DA |
2277 | if (core->new_parent) { |
2278 | parent = core->new_parent; | |
4dff95dc | 2279 | best_parent_rate = core->new_parent->rate; |
fc8726a2 DA |
2280 | } else if (core->parent) { |
2281 | parent = core->parent; | |
4dff95dc | 2282 | best_parent_rate = core->parent->rate; |
fc8726a2 | 2283 | } |
035a61c3 | 2284 | |
588fb54b MS |
2285 | if (clk_pm_runtime_get(core)) |
2286 | return; | |
2287 | ||
2eb8c710 | 2288 | if (core->flags & CLK_SET_RATE_UNGATE) { |
2eb8c710 | 2289 | clk_core_prepare(core); |
35a79631 | 2290 | clk_core_enable_lock(core); |
2eb8c710 HS |
2291 | } |
2292 | ||
4dff95dc SB |
2293 | if (core->new_parent && core->new_parent != core->parent) { |
2294 | old_parent = __clk_set_parent_before(core, core->new_parent); | |
2295 | trace_clk_set_parent(core, core->new_parent); | |
5279fc40 | 2296 | |
4dff95dc SB |
2297 | if (core->ops->set_rate_and_parent) { |
2298 | skip_set_rate = true; | |
2299 | core->ops->set_rate_and_parent(core->hw, core->new_rate, | |
2300 | best_parent_rate, | |
2301 | core->new_parent_index); | |
2302 | } else if (core->ops->set_parent) { | |
2303 | core->ops->set_parent(core->hw, core->new_parent_index); | |
2304 | } | |
5279fc40 | 2305 | |
4dff95dc SB |
2306 | trace_clk_set_parent_complete(core, core->new_parent); |
2307 | __clk_set_parent_after(core, core->new_parent, old_parent); | |
2308 | } | |
8f2c2db1 | 2309 | |
fc8726a2 DA |
2310 | if (core->flags & CLK_OPS_PARENT_ENABLE) |
2311 | clk_core_prepare_enable(parent); | |
2312 | ||
4dff95dc | 2313 | trace_clk_set_rate(core, core->new_rate); |
b2476490 | 2314 | |
4dff95dc SB |
2315 | if (!skip_set_rate && core->ops->set_rate) |
2316 | core->ops->set_rate(core->hw, core->new_rate, best_parent_rate); | |
496eadf8 | 2317 | |
4dff95dc | 2318 | trace_clk_set_rate_complete(core, core->new_rate); |
b2476490 | 2319 | |
4dff95dc | 2320 | core->rate = clk_recalc(core, best_parent_rate); |
b2476490 | 2321 | |
2eb8c710 | 2322 | if (core->flags & CLK_SET_RATE_UNGATE) { |
35a79631 | 2323 | clk_core_disable_lock(core); |
2eb8c710 HS |
2324 | clk_core_unprepare(core); |
2325 | } | |
2326 | ||
fc8726a2 DA |
2327 | if (core->flags & CLK_OPS_PARENT_ENABLE) |
2328 | clk_core_disable_unprepare(parent); | |
2329 | ||
4dff95dc SB |
2330 | if (core->notifier_count && old_rate != core->rate) |
2331 | __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); | |
b2476490 | 2332 | |
85e88fab MT |
2333 | if (core->flags & CLK_RECALC_NEW_RATES) |
2334 | (void)clk_calc_new_rates(core, core->new_rate); | |
d8d91987 | 2335 | |
b2476490 | 2336 | /* |
4dff95dc SB |
2337 | * Use safe iteration, as change_rate can actually swap parents |
2338 | * for certain clock types. | |
b2476490 | 2339 | */ |
4dff95dc SB |
2340 | hlist_for_each_entry_safe(child, tmp, &core->children, child_node) { |
2341 | /* Skip children who will be reparented to another clock */ | |
2342 | if (child->new_parent && child->new_parent != core) | |
2343 | continue; | |
2344 | clk_change_rate(child); | |
2345 | } | |
b2476490 | 2346 | |
4dff95dc SB |
2347 | /* handle the new child who might not be in core->children yet */ |
2348 | if (core->new_child) | |
2349 | clk_change_rate(core->new_child); | |
588fb54b MS |
2350 | |
2351 | clk_pm_runtime_put(core); | |
b2476490 MT |
2352 | } |
2353 | ||
ca5e089a JB |
2354 | static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core, |
2355 | unsigned long req_rate) | |
2356 | { | |
e55a839a | 2357 | int ret, cnt; |
ca5e089a JB |
2358 | struct clk_rate_request req; |
2359 | ||
2360 | lockdep_assert_held(&prepare_lock); | |
2361 | ||
2362 | if (!core) | |
2363 | return 0; | |
2364 | ||
e55a839a JB |
2365 | /* simulate what the rate would be if it could be freely set */ |
2366 | cnt = clk_core_rate_nuke_protect(core); | |
2367 | if (cnt < 0) | |
2368 | return cnt; | |
2369 | ||
8cd9c39d | 2370 | clk_core_init_rate_req(core, &req, req_rate); |
ca5e089a | 2371 | |
49e62e0d MR |
2372 | trace_clk_rate_request_start(&req); |
2373 | ||
ca5e089a JB |
2374 | ret = clk_core_round_rate_nolock(core, &req); |
2375 | ||
49e62e0d MR |
2376 | trace_clk_rate_request_done(&req); |
2377 | ||
e55a839a JB |
2378 | /* restore the protection */ |
2379 | clk_core_rate_restore_protect(core, cnt); | |
2380 | ||
ca5e089a | 2381 | return ret ? 0 : req.rate; |
b2476490 MT |
2382 | } |
2383 | ||
4dff95dc SB |
2384 | static int clk_core_set_rate_nolock(struct clk_core *core, |
2385 | unsigned long req_rate) | |
a093bde2 | 2386 | { |
4dff95dc | 2387 | struct clk_core *top, *fail_clk; |
ca5e089a | 2388 | unsigned long rate; |
75569a03 | 2389 | int ret; |
a093bde2 | 2390 | |
4dff95dc SB |
2391 | if (!core) |
2392 | return 0; | |
a093bde2 | 2393 | |
ca5e089a JB |
2394 | rate = clk_core_req_round_rate_nolock(core, req_rate); |
2395 | ||
4dff95dc SB |
2396 | /* bail early if nothing to do */ |
2397 | if (rate == clk_core_get_rate_nolock(core)) | |
2398 | return 0; | |
a093bde2 | 2399 | |
e55a839a JB |
2400 | /* fail on a direct rate set of a protected provider */ |
2401 | if (clk_core_rate_is_protected(core)) | |
2402 | return -EBUSY; | |
2403 | ||
4dff95dc | 2404 | /* calculate new rates and get the topmost changed clock */ |
ca5e089a | 2405 | top = clk_calc_new_rates(core, req_rate); |
4dff95dc SB |
2406 | if (!top) |
2407 | return -EINVAL; | |
2408 | ||
9a34b453 MS |
2409 | ret = clk_pm_runtime_get(core); |
2410 | if (ret) | |
2411 | return ret; | |
2412 | ||
4dff95dc SB |
2413 | /* notify that we are about to change rates */ |
2414 | fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); | |
2415 | if (fail_clk) { | |
2416 | pr_debug("%s: failed to set %s rate\n", __func__, | |
2417 | fail_clk->name); | |
2418 | clk_propagate_rate_change(top, ABORT_RATE_CHANGE); | |
9a34b453 MS |
2419 | ret = -EBUSY; |
2420 | goto err; | |
4dff95dc SB |
2421 | } |
2422 | ||
2423 | /* change the rates */ | |
2424 | clk_change_rate(top); | |
2425 | ||
2426 | core->req_rate = req_rate; | |
9a34b453 MS |
2427 | err: |
2428 | clk_pm_runtime_put(core); | |
4dff95dc | 2429 | |
9a34b453 | 2430 | return ret; |
a093bde2 | 2431 | } |
035a61c3 TV |
2432 | |
2433 | /** | |
4dff95dc SB |
2434 | * clk_set_rate - specify a new rate for clk |
2435 | * @clk: the clk whose rate is being changed | |
2436 | * @rate: the new rate for clk | |
035a61c3 | 2437 | * |
4dff95dc SB |
2438 | * In the simplest case clk_set_rate will only adjust the rate of clk. |
2439 | * | |
2440 | * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to | |
2441 | * propagate up to clk's parent; whether or not this happens depends on the | |
2442 | * outcome of clk's .round_rate implementation. If *parent_rate is unchanged | |
2443 | * after calling .round_rate then upstream parent propagation is ignored. If | |
2444 | * *parent_rate comes back with a new rate for clk's parent then we propagate | |
2445 | * up to clk's parent and set its rate. Upward propagation will continue | |
2446 | * until either a clk does not support the CLK_SET_RATE_PARENT flag or | |
2447 | * .round_rate stops requesting changes to clk's parent_rate. | |
2448 | * | |
2449 | * Rate changes are accomplished via tree traversal that also recalculates the | |
2450 | * rates for the clocks and fires off POST_RATE_CHANGE notifiers. | |
2451 | * | |
2452 | * Returns 0 on success, -EERROR otherwise. | |
035a61c3 | 2453 | */ |
4dff95dc | 2454 | int clk_set_rate(struct clk *clk, unsigned long rate) |
035a61c3 | 2455 | { |
4dff95dc SB |
2456 | int ret; |
2457 | ||
035a61c3 TV |
2458 | if (!clk) |
2459 | return 0; | |
2460 | ||
4dff95dc SB |
2461 | /* prevent racing with updates to the clock topology */ |
2462 | clk_prepare_lock(); | |
da0f0b2c | 2463 | |
55e9b8b7 JB |
2464 | if (clk->exclusive_count) |
2465 | clk_core_rate_unprotect(clk->core); | |
2466 | ||
4dff95dc | 2467 | ret = clk_core_set_rate_nolock(clk->core, rate); |
da0f0b2c | 2468 | |
55e9b8b7 JB |
2469 | if (clk->exclusive_count) |
2470 | clk_core_rate_protect(clk->core); | |
2471 | ||
4dff95dc | 2472 | clk_prepare_unlock(); |
4935b22c | 2473 | |
4dff95dc | 2474 | return ret; |
4935b22c | 2475 | } |
4dff95dc | 2476 | EXPORT_SYMBOL_GPL(clk_set_rate); |
4935b22c | 2477 | |
55e9b8b7 | 2478 | /** |
65e2218d | 2479 | * clk_set_rate_exclusive - specify a new rate and get exclusive control |
55e9b8b7 JB |
2480 | * @clk: the clk whose rate is being changed |
2481 | * @rate: the new rate for clk | |
2482 | * | |
2483 | * This is a combination of clk_set_rate() and clk_rate_exclusive_get() | |
2484 | * within a critical section | |
2485 | * | |
2486 | * This can be used initially to ensure that at least 1 consumer is | |
65e2218d | 2487 | * satisfied when several consumers are competing for exclusivity over the |
55e9b8b7 JB |
2488 | * same clock provider. |
2489 | * | |
2490 | * The exclusivity is not applied if setting the rate failed. | |
2491 | * | |
2492 | * Calls to clk_rate_exclusive_get() should be balanced with calls to | |
2493 | * clk_rate_exclusive_put(). | |
2494 | * | |
2495 | * Returns 0 on success, -EERROR otherwise. | |
2496 | */ | |
2497 | int clk_set_rate_exclusive(struct clk *clk, unsigned long rate) | |
2498 | { | |
2499 | int ret; | |
2500 | ||
2501 | if (!clk) | |
2502 | return 0; | |
2503 | ||
2504 | /* prevent racing with updates to the clock topology */ | |
2505 | clk_prepare_lock(); | |
2506 | ||
2507 | /* | |
2508 | * The temporary protection removal is not here, on purpose | |
2509 | * This function is meant to be used instead of clk_rate_protect, | |
2510 | * so before the consumer code path protect the clock provider | |
2511 | */ | |
2512 | ||
2513 | ret = clk_core_set_rate_nolock(clk->core, rate); | |
2514 | if (!ret) { | |
2515 | clk_core_rate_protect(clk->core); | |
2516 | clk->exclusive_count++; | |
2517 | } | |
2518 | ||
2519 | clk_prepare_unlock(); | |
2520 | ||
2521 | return ret; | |
2522 | } | |
2523 | EXPORT_SYMBOL_GPL(clk_set_rate_exclusive); | |
2524 | ||
d7738822 MR |
2525 | static int clk_set_rate_range_nolock(struct clk *clk, |
2526 | unsigned long min, | |
2527 | unsigned long max) | |
4935b22c | 2528 | { |
4dff95dc | 2529 | int ret = 0; |
6562fbcf | 2530 | unsigned long old_min, old_max, rate; |
4935b22c | 2531 | |
d7738822 MR |
2532 | lockdep_assert_held(&prepare_lock); |
2533 | ||
4dff95dc SB |
2534 | if (!clk) |
2535 | return 0; | |
903efc55 | 2536 | |
03813d9b MR |
2537 | trace_clk_set_rate_range(clk->core, min, max); |
2538 | ||
4dff95dc SB |
2539 | if (min > max) { |
2540 | pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n", | |
2541 | __func__, clk->core->name, clk->dev_id, clk->con_id, | |
2542 | min, max); | |
2543 | return -EINVAL; | |
903efc55 | 2544 | } |
4935b22c | 2545 | |
55e9b8b7 JB |
2546 | if (clk->exclusive_count) |
2547 | clk_core_rate_unprotect(clk->core); | |
2548 | ||
6562fbcf JB |
2549 | /* Save the current values in case we need to rollback the change */ |
2550 | old_min = clk->min_rate; | |
2551 | old_max = clk->max_rate; | |
2552 | clk->min_rate = min; | |
2553 | clk->max_rate = max; | |
2554 | ||
10c46f2e MR |
2555 | if (!clk_core_check_boundaries(clk->core, min, max)) { |
2556 | ret = -EINVAL; | |
2557 | goto out; | |
2558 | } | |
6562fbcf | 2559 | |
3afb0723 MR |
2560 | rate = clk->core->req_rate; |
2561 | if (clk->core->flags & CLK_GET_RATE_NOCACHE) | |
2562 | rate = clk_core_get_rate_recalc(clk->core); | |
2563 | ||
c80ac50c MR |
2564 | /* |
2565 | * Since the boundaries have been changed, let's give the | |
2566 | * opportunity to the provider to adjust the clock rate based on | |
2567 | * the new boundaries. | |
2568 | * | |
2569 | * We also need to handle the case where the clock is currently | |
2570 | * outside of the boundaries. Clamping the last requested rate | |
2571 | * to the current minimum and maximum will also handle this. | |
2572 | * | |
2573 | * FIXME: | |
2574 | * There is a catch. It may fail for the usual reason (clock | |
2575 | * broken, clock protected, etc) but also because: | |
2576 | * - round_rate() was not favorable and fell on the wrong | |
2577 | * side of the boundary | |
2578 | * - the determine_rate() callback does not really check for | |
2579 | * this corner case when determining the rate | |
2580 | */ | |
3afb0723 | 2581 | rate = clamp(rate, min, max); |
c80ac50c MR |
2582 | ret = clk_core_set_rate_nolock(clk->core, rate); |
2583 | if (ret) { | |
2584 | /* rollback the changes */ | |
2585 | clk->min_rate = old_min; | |
2586 | clk->max_rate = old_max; | |
4935b22c JH |
2587 | } |
2588 | ||
10c46f2e | 2589 | out: |
55e9b8b7 JB |
2590 | if (clk->exclusive_count) |
2591 | clk_core_rate_protect(clk->core); | |
2592 | ||
d7738822 MR |
2593 | return ret; |
2594 | } | |
2595 | ||
2596 | /** | |
2597 | * clk_set_rate_range - set a rate range for a clock source | |
2598 | * @clk: clock source | |
2599 | * @min: desired minimum clock rate in Hz, inclusive | |
2600 | * @max: desired maximum clock rate in Hz, inclusive | |
2601 | * | |
2602 | * Return: 0 for success or negative errno on failure. | |
2603 | */ | |
2604 | int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) | |
2605 | { | |
2606 | int ret; | |
2607 | ||
2608 | if (!clk) | |
2609 | return 0; | |
2610 | ||
2611 | clk_prepare_lock(); | |
2612 | ||
2613 | ret = clk_set_rate_range_nolock(clk, min, max); | |
2614 | ||
4dff95dc | 2615 | clk_prepare_unlock(); |
4935b22c | 2616 | |
4dff95dc | 2617 | return ret; |
3fa2252b | 2618 | } |
4dff95dc | 2619 | EXPORT_SYMBOL_GPL(clk_set_rate_range); |
3fa2252b | 2620 | |
4dff95dc SB |
2621 | /** |
2622 | * clk_set_min_rate - set a minimum clock rate for a clock source | |
2623 | * @clk: clock source | |
2624 | * @rate: desired minimum clock rate in Hz, inclusive | |
2625 | * | |
2626 | * Returns success (0) or negative errno. | |
2627 | */ | |
2628 | int clk_set_min_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 2629 | { |
4dff95dc SB |
2630 | if (!clk) |
2631 | return 0; | |
2632 | ||
03813d9b MR |
2633 | trace_clk_set_min_rate(clk->core, rate); |
2634 | ||
4dff95dc | 2635 | return clk_set_rate_range(clk, rate, clk->max_rate); |
3fa2252b | 2636 | } |
4dff95dc | 2637 | EXPORT_SYMBOL_GPL(clk_set_min_rate); |
3fa2252b | 2638 | |
4dff95dc SB |
2639 | /** |
2640 | * clk_set_max_rate - set a maximum clock rate for a clock source | |
2641 | * @clk: clock source | |
2642 | * @rate: desired maximum clock rate in Hz, inclusive | |
2643 | * | |
2644 | * Returns success (0) or negative errno. | |
2645 | */ | |
2646 | int clk_set_max_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 2647 | { |
4dff95dc SB |
2648 | if (!clk) |
2649 | return 0; | |
4935b22c | 2650 | |
03813d9b MR |
2651 | trace_clk_set_max_rate(clk->core, rate); |
2652 | ||
4dff95dc | 2653 | return clk_set_rate_range(clk, clk->min_rate, rate); |
4935b22c | 2654 | } |
4dff95dc | 2655 | EXPORT_SYMBOL_GPL(clk_set_max_rate); |
4935b22c | 2656 | |
b2476490 | 2657 | /** |
4dff95dc SB |
2658 | * clk_get_parent - return the parent of a clk |
2659 | * @clk: the clk whose parent gets returned | |
b2476490 | 2660 | * |
4dff95dc | 2661 | * Simply returns clk->parent. Returns NULL if clk is NULL. |
b2476490 | 2662 | */ |
4dff95dc | 2663 | struct clk *clk_get_parent(struct clk *clk) |
b2476490 | 2664 | { |
4dff95dc | 2665 | struct clk *parent; |
b2476490 | 2666 | |
fc4a05d4 SB |
2667 | if (!clk) |
2668 | return NULL; | |
2669 | ||
4dff95dc | 2670 | clk_prepare_lock(); |
fc4a05d4 SB |
2671 | /* TODO: Create a per-user clk and change callers to call clk_put */ |
2672 | parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk; | |
4dff95dc | 2673 | clk_prepare_unlock(); |
496eadf8 | 2674 | |
4dff95dc SB |
2675 | return parent; |
2676 | } | |
2677 | EXPORT_SYMBOL_GPL(clk_get_parent); | |
b2476490 | 2678 | |
4dff95dc SB |
2679 | static struct clk_core *__clk_init_parent(struct clk_core *core) |
2680 | { | |
5146e0b0 | 2681 | u8 index = 0; |
4dff95dc | 2682 | |
2430a94d | 2683 | if (core->num_parents > 1 && core->ops->get_parent) |
5146e0b0 | 2684 | index = core->ops->get_parent(core->hw); |
b2476490 | 2685 | |
5146e0b0 | 2686 | return clk_core_get_parent_by_index(core, index); |
b2476490 MT |
2687 | } |
2688 | ||
4dff95dc SB |
2689 | static void clk_core_reparent(struct clk_core *core, |
2690 | struct clk_core *new_parent) | |
b2476490 | 2691 | { |
4dff95dc SB |
2692 | clk_reparent(core, new_parent); |
2693 | __clk_recalc_accuracies(core); | |
096f2a0c | 2694 | __clk_recalc_rates(core, true, POST_RATE_CHANGE); |
b2476490 MT |
2695 | } |
2696 | ||
42c86547 TV |
2697 | void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent) |
2698 | { | |
2699 | if (!hw) | |
2700 | return; | |
2701 | ||
2702 | clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core); | |
2703 | } | |
2704 | ||
4dff95dc SB |
2705 | /** |
2706 | * clk_has_parent - check if a clock is a possible parent for another | |
2707 | * @clk: clock source | |
2708 | * @parent: parent clock source | |
2709 | * | |
2710 | * This function can be used in drivers that need to check that a clock can be | |
2711 | * the parent of another without actually changing the parent. | |
2712 | * | |
2713 | * Returns true if @parent is a possible parent for @clk, false otherwise. | |
b2476490 | 2714 | */ |
22fb0e28 | 2715 | bool clk_has_parent(const struct clk *clk, const struct clk *parent) |
b2476490 | 2716 | { |
4dff95dc SB |
2717 | /* NULL clocks should be nops, so return success if either is NULL. */ |
2718 | if (!clk || !parent) | |
2719 | return true; | |
7452b219 | 2720 | |
1234a2c4 | 2721 | return clk_core_has_parent(clk->core, parent->core); |
4dff95dc SB |
2722 | } |
2723 | EXPORT_SYMBOL_GPL(clk_has_parent); | |
03bc10ab | 2724 | |
91baa9ff JB |
2725 | static int clk_core_set_parent_nolock(struct clk_core *core, |
2726 | struct clk_core *parent) | |
4dff95dc SB |
2727 | { |
2728 | int ret = 0; | |
2729 | int p_index = 0; | |
2730 | unsigned long p_rate = 0; | |
2731 | ||
91baa9ff JB |
2732 | lockdep_assert_held(&prepare_lock); |
2733 | ||
4dff95dc SB |
2734 | if (!core) |
2735 | return 0; | |
2736 | ||
4dff95dc | 2737 | if (core->parent == parent) |
91baa9ff | 2738 | return 0; |
4dff95dc | 2739 | |
ef13e55c | 2740 | /* verify ops for multi-parent clks */ |
91baa9ff JB |
2741 | if (core->num_parents > 1 && !core->ops->set_parent) |
2742 | return -EPERM; | |
7452b219 | 2743 | |
4dff95dc | 2744 | /* check that we are allowed to re-parent if the clock is in use */ |
91baa9ff JB |
2745 | if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) |
2746 | return -EBUSY; | |
b2476490 | 2747 | |
e55a839a JB |
2748 | if (clk_core_rate_is_protected(core)) |
2749 | return -EBUSY; | |
b2476490 | 2750 | |
71472c0c | 2751 | /* try finding the new parent index */ |
4dff95dc | 2752 | if (parent) { |
d6968fca | 2753 | p_index = clk_fetch_parent_index(core, parent); |
f1c8b2ed | 2754 | if (p_index < 0) { |
71472c0c | 2755 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
4dff95dc | 2756 | __func__, parent->name, core->name); |
91baa9ff | 2757 | return p_index; |
71472c0c | 2758 | } |
e8f0e68e | 2759 | p_rate = parent->rate; |
b2476490 MT |
2760 | } |
2761 | ||
9a34b453 MS |
2762 | ret = clk_pm_runtime_get(core); |
2763 | if (ret) | |
91baa9ff | 2764 | return ret; |
9a34b453 | 2765 | |
4dff95dc SB |
2766 | /* propagate PRE_RATE_CHANGE notifications */ |
2767 | ret = __clk_speculate_rates(core, p_rate); | |
b2476490 | 2768 | |
4dff95dc SB |
2769 | /* abort if a driver objects */ |
2770 | if (ret & NOTIFY_STOP_MASK) | |
9a34b453 | 2771 | goto runtime_put; |
b2476490 | 2772 | |
4dff95dc SB |
2773 | /* do the re-parent */ |
2774 | ret = __clk_set_parent(core, parent, p_index); | |
b2476490 | 2775 | |
4dff95dc SB |
2776 | /* propagate rate an accuracy recalculation accordingly */ |
2777 | if (ret) { | |
096f2a0c | 2778 | __clk_recalc_rates(core, true, ABORT_RATE_CHANGE); |
4dff95dc | 2779 | } else { |
096f2a0c | 2780 | __clk_recalc_rates(core, true, POST_RATE_CHANGE); |
4dff95dc | 2781 | __clk_recalc_accuracies(core); |
b2476490 MT |
2782 | } |
2783 | ||
9a34b453 MS |
2784 | runtime_put: |
2785 | clk_pm_runtime_put(core); | |
71472c0c | 2786 | |
4dff95dc SB |
2787 | return ret; |
2788 | } | |
b2476490 | 2789 | |
3567894b NA |
2790 | int clk_hw_set_parent(struct clk_hw *hw, struct clk_hw *parent) |
2791 | { | |
2792 | return clk_core_set_parent_nolock(hw->core, parent->core); | |
2793 | } | |
2794 | EXPORT_SYMBOL_GPL(clk_hw_set_parent); | |
2795 | ||
4dff95dc SB |
2796 | /** |
2797 | * clk_set_parent - switch the parent of a mux clk | |
2798 | * @clk: the mux clk whose input we are switching | |
2799 | * @parent: the new input to clk | |
2800 | * | |
2801 | * Re-parent clk to use parent as its new input source. If clk is in | |
2802 | * prepared state, the clk will get enabled for the duration of this call. If | |
2803 | * that's not acceptable for a specific clk (Eg: the consumer can't handle | |
2804 | * that, the reparenting is glitchy in hardware, etc), use the | |
2805 | * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared. | |
2806 | * | |
2807 | * After successfully changing clk's parent clk_set_parent will update the | |
2808 | * clk topology, sysfs topology and propagate rate recalculation via | |
2809 | * __clk_recalc_rates. | |
2810 | * | |
2811 | * Returns 0 on success, -EERROR otherwise. | |
2812 | */ | |
2813 | int clk_set_parent(struct clk *clk, struct clk *parent) | |
2814 | { | |
91baa9ff JB |
2815 | int ret; |
2816 | ||
4dff95dc SB |
2817 | if (!clk) |
2818 | return 0; | |
2819 | ||
91baa9ff | 2820 | clk_prepare_lock(); |
55e9b8b7 JB |
2821 | |
2822 | if (clk->exclusive_count) | |
2823 | clk_core_rate_unprotect(clk->core); | |
2824 | ||
91baa9ff JB |
2825 | ret = clk_core_set_parent_nolock(clk->core, |
2826 | parent ? parent->core : NULL); | |
55e9b8b7 JB |
2827 | |
2828 | if (clk->exclusive_count) | |
2829 | clk_core_rate_protect(clk->core); | |
2830 | ||
91baa9ff JB |
2831 | clk_prepare_unlock(); |
2832 | ||
2833 | return ret; | |
b2476490 | 2834 | } |
4dff95dc | 2835 | EXPORT_SYMBOL_GPL(clk_set_parent); |
b2476490 | 2836 | |
9e4d04ad JB |
2837 | static int clk_core_set_phase_nolock(struct clk_core *core, int degrees) |
2838 | { | |
2839 | int ret = -EINVAL; | |
2840 | ||
2841 | lockdep_assert_held(&prepare_lock); | |
2842 | ||
2843 | if (!core) | |
2844 | return 0; | |
2845 | ||
e55a839a JB |
2846 | if (clk_core_rate_is_protected(core)) |
2847 | return -EBUSY; | |
2848 | ||
9e4d04ad JB |
2849 | trace_clk_set_phase(core, degrees); |
2850 | ||
7f95beea | 2851 | if (core->ops->set_phase) { |
9e4d04ad | 2852 | ret = core->ops->set_phase(core->hw, degrees); |
7f95beea SL |
2853 | if (!ret) |
2854 | core->phase = degrees; | |
2855 | } | |
9e4d04ad JB |
2856 | |
2857 | trace_clk_set_phase_complete(core, degrees); | |
2858 | ||
2859 | return ret; | |
2860 | } | |
2861 | ||
4dff95dc SB |
2862 | /** |
2863 | * clk_set_phase - adjust the phase shift of a clock signal | |
2864 | * @clk: clock signal source | |
2865 | * @degrees: number of degrees the signal is shifted | |
2866 | * | |
2867 | * Shifts the phase of a clock signal by the specified | |
2868 | * degrees. Returns 0 on success, -EERROR otherwise. | |
2869 | * | |
2870 | * This function makes no distinction about the input or reference | |
2871 | * signal that we adjust the clock signal phase against. For example | |
2872 | * phase locked-loop clock signal generators we may shift phase with | |
2873 | * respect to feedback clock signal input, but for other cases the | |
2874 | * clock phase may be shifted with respect to some other, unspecified | |
2875 | * signal. | |
2876 | * | |
2877 | * Additionally the concept of phase shift does not propagate through | |
2878 | * the clock tree hierarchy, which sets it apart from clock rates and | |
2879 | * clock accuracy. A parent clock phase attribute does not have an | |
2880 | * impact on the phase attribute of a child clock. | |
b2476490 | 2881 | */ |
4dff95dc | 2882 | int clk_set_phase(struct clk *clk, int degrees) |
b2476490 | 2883 | { |
9e4d04ad | 2884 | int ret; |
b2476490 | 2885 | |
4dff95dc SB |
2886 | if (!clk) |
2887 | return 0; | |
b2476490 | 2888 | |
4dff95dc SB |
2889 | /* sanity check degrees */ |
2890 | degrees %= 360; | |
2891 | if (degrees < 0) | |
2892 | degrees += 360; | |
bf47b4fd | 2893 | |
4dff95dc | 2894 | clk_prepare_lock(); |
3fa2252b | 2895 | |
55e9b8b7 JB |
2896 | if (clk->exclusive_count) |
2897 | clk_core_rate_unprotect(clk->core); | |
3fa2252b | 2898 | |
9e4d04ad | 2899 | ret = clk_core_set_phase_nolock(clk->core, degrees); |
3fa2252b | 2900 | |
55e9b8b7 JB |
2901 | if (clk->exclusive_count) |
2902 | clk_core_rate_protect(clk->core); | |
b2476490 | 2903 | |
4dff95dc | 2904 | clk_prepare_unlock(); |
dfc202ea | 2905 | |
4dff95dc SB |
2906 | return ret; |
2907 | } | |
2908 | EXPORT_SYMBOL_GPL(clk_set_phase); | |
b2476490 | 2909 | |
4dff95dc SB |
2910 | static int clk_core_get_phase(struct clk_core *core) |
2911 | { | |
2912 | int ret; | |
b2476490 | 2913 | |
f21cf9c7 SB |
2914 | lockdep_assert_held(&prepare_lock); |
2915 | if (!core->ops->get_phase) | |
2916 | return 0; | |
2917 | ||
1f9c63e8 | 2918 | /* Always try to update cached phase if possible */ |
f21cf9c7 SB |
2919 | ret = core->ops->get_phase(core->hw); |
2920 | if (ret >= 0) | |
2921 | core->phase = ret; | |
71472c0c | 2922 | |
4dff95dc | 2923 | return ret; |
b2476490 MT |
2924 | } |
2925 | ||
4dff95dc SB |
2926 | /** |
2927 | * clk_get_phase - return the phase shift of a clock signal | |
2928 | * @clk: clock signal source | |
2929 | * | |
2930 | * Returns the phase shift of a clock node in degrees, otherwise returns | |
2931 | * -EERROR. | |
2932 | */ | |
2933 | int clk_get_phase(struct clk *clk) | |
1c8e6004 | 2934 | { |
f21cf9c7 SB |
2935 | int ret; |
2936 | ||
4dff95dc | 2937 | if (!clk) |
1c8e6004 TV |
2938 | return 0; |
2939 | ||
f21cf9c7 SB |
2940 | clk_prepare_lock(); |
2941 | ret = clk_core_get_phase(clk->core); | |
2942 | clk_prepare_unlock(); | |
2943 | ||
2944 | return ret; | |
4dff95dc SB |
2945 | } |
2946 | EXPORT_SYMBOL_GPL(clk_get_phase); | |
1c8e6004 | 2947 | |
9fba738a JB |
2948 | static void clk_core_reset_duty_cycle_nolock(struct clk_core *core) |
2949 | { | |
2950 | /* Assume a default value of 50% */ | |
2951 | core->duty.num = 1; | |
2952 | core->duty.den = 2; | |
2953 | } | |
2954 | ||
2955 | static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core); | |
2956 | ||
2957 | static int clk_core_update_duty_cycle_nolock(struct clk_core *core) | |
2958 | { | |
2959 | struct clk_duty *duty = &core->duty; | |
2960 | int ret = 0; | |
2961 | ||
2962 | if (!core->ops->get_duty_cycle) | |
2963 | return clk_core_update_duty_cycle_parent_nolock(core); | |
2964 | ||
2965 | ret = core->ops->get_duty_cycle(core->hw, duty); | |
2966 | if (ret) | |
2967 | goto reset; | |
2968 | ||
2969 | /* Don't trust the clock provider too much */ | |
2970 | if (duty->den == 0 || duty->num > duty->den) { | |
2971 | ret = -EINVAL; | |
2972 | goto reset; | |
2973 | } | |
2974 | ||
2975 | return 0; | |
2976 | ||
2977 | reset: | |
2978 | clk_core_reset_duty_cycle_nolock(core); | |
2979 | return ret; | |
2980 | } | |
2981 | ||
2982 | static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core) | |
2983 | { | |
2984 | int ret = 0; | |
2985 | ||
2986 | if (core->parent && | |
2987 | core->flags & CLK_DUTY_CYCLE_PARENT) { | |
2988 | ret = clk_core_update_duty_cycle_nolock(core->parent); | |
2989 | memcpy(&core->duty, &core->parent->duty, sizeof(core->duty)); | |
2990 | } else { | |
2991 | clk_core_reset_duty_cycle_nolock(core); | |
2992 | } | |
2993 | ||
2994 | return ret; | |
2995 | } | |
2996 | ||
2997 | static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core, | |
2998 | struct clk_duty *duty); | |
2999 | ||
3000 | static int clk_core_set_duty_cycle_nolock(struct clk_core *core, | |
3001 | struct clk_duty *duty) | |
3002 | { | |
3003 | int ret; | |
3004 | ||
3005 | lockdep_assert_held(&prepare_lock); | |
3006 | ||
3007 | if (clk_core_rate_is_protected(core)) | |
3008 | return -EBUSY; | |
3009 | ||
3010 | trace_clk_set_duty_cycle(core, duty); | |
3011 | ||
3012 | if (!core->ops->set_duty_cycle) | |
3013 | return clk_core_set_duty_cycle_parent_nolock(core, duty); | |
3014 | ||
3015 | ret = core->ops->set_duty_cycle(core->hw, duty); | |
3016 | if (!ret) | |
3017 | memcpy(&core->duty, duty, sizeof(*duty)); | |
3018 | ||
3019 | trace_clk_set_duty_cycle_complete(core, duty); | |
3020 | ||
3021 | return ret; | |
3022 | } | |
3023 | ||
3024 | static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core, | |
3025 | struct clk_duty *duty) | |
3026 | { | |
3027 | int ret = 0; | |
3028 | ||
3029 | if (core->parent && | |
3030 | core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) { | |
3031 | ret = clk_core_set_duty_cycle_nolock(core->parent, duty); | |
3032 | memcpy(&core->duty, &core->parent->duty, sizeof(core->duty)); | |
3033 | } | |
3034 | ||
3035 | return ret; | |
3036 | } | |
3037 | ||
3038 | /** | |
3039 | * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal | |
3040 | * @clk: clock signal source | |
3041 | * @num: numerator of the duty cycle ratio to be applied | |
3042 | * @den: denominator of the duty cycle ratio to be applied | |
3043 | * | |
3044 | * Apply the duty cycle ratio if the ratio is valid and the clock can | |
3045 | * perform this operation | |
3046 | * | |
3047 | * Returns (0) on success, a negative errno otherwise. | |
3048 | */ | |
3049 | int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den) | |
3050 | { | |
3051 | int ret; | |
3052 | struct clk_duty duty; | |
3053 | ||
3054 | if (!clk) | |
3055 | return 0; | |
3056 | ||
3057 | /* sanity check the ratio */ | |
3058 | if (den == 0 || num > den) | |
3059 | return -EINVAL; | |
3060 | ||
3061 | duty.num = num; | |
3062 | duty.den = den; | |
3063 | ||
3064 | clk_prepare_lock(); | |
3065 | ||
3066 | if (clk->exclusive_count) | |
3067 | clk_core_rate_unprotect(clk->core); | |
3068 | ||
3069 | ret = clk_core_set_duty_cycle_nolock(clk->core, &duty); | |
3070 | ||
3071 | if (clk->exclusive_count) | |
3072 | clk_core_rate_protect(clk->core); | |
3073 | ||
3074 | clk_prepare_unlock(); | |
3075 | ||
3076 | return ret; | |
3077 | } | |
3078 | EXPORT_SYMBOL_GPL(clk_set_duty_cycle); | |
3079 | ||
3080 | static int clk_core_get_scaled_duty_cycle(struct clk_core *core, | |
3081 | unsigned int scale) | |
3082 | { | |
3083 | struct clk_duty *duty = &core->duty; | |
3084 | int ret; | |
3085 | ||
3086 | clk_prepare_lock(); | |
3087 | ||
3088 | ret = clk_core_update_duty_cycle_nolock(core); | |
3089 | if (!ret) | |
3090 | ret = mult_frac(scale, duty->num, duty->den); | |
3091 | ||
3092 | clk_prepare_unlock(); | |
3093 | ||
3094 | return ret; | |
3095 | } | |
3096 | ||
3097 | /** | |
3098 | * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal | |
3099 | * @clk: clock signal source | |
3100 | * @scale: scaling factor to be applied to represent the ratio as an integer | |
3101 | * | |
3102 | * Returns the duty cycle ratio of a clock node multiplied by the provided | |
3103 | * scaling factor, or negative errno on error. | |
3104 | */ | |
3105 | int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale) | |
3106 | { | |
3107 | if (!clk) | |
3108 | return 0; | |
3109 | ||
3110 | return clk_core_get_scaled_duty_cycle(clk->core, scale); | |
3111 | } | |
3112 | EXPORT_SYMBOL_GPL(clk_get_scaled_duty_cycle); | |
3113 | ||
4dff95dc SB |
3114 | /** |
3115 | * clk_is_match - check if two clk's point to the same hardware clock | |
3116 | * @p: clk compared against q | |
3117 | * @q: clk compared against p | |
3118 | * | |
3119 | * Returns true if the two struct clk pointers both point to the same hardware | |
3120 | * clock node. Put differently, returns true if struct clk *p and struct clk *q | |
3121 | * share the same struct clk_core object. | |
3122 | * | |
3123 | * Returns false otherwise. Note that two NULL clks are treated as matching. | |
3124 | */ | |
3125 | bool clk_is_match(const struct clk *p, const struct clk *q) | |
3126 | { | |
3127 | /* trivial case: identical struct clk's or both NULL */ | |
3128 | if (p == q) | |
3129 | return true; | |
1c8e6004 | 3130 | |
3fe003f9 | 3131 | /* true if clk->core pointers match. Avoid dereferencing garbage */ |
4dff95dc SB |
3132 | if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q)) |
3133 | if (p->core == q->core) | |
3134 | return true; | |
1c8e6004 | 3135 | |
4dff95dc SB |
3136 | return false; |
3137 | } | |
3138 | EXPORT_SYMBOL_GPL(clk_is_match); | |
1c8e6004 | 3139 | |
4dff95dc | 3140 | /*** debugfs support ***/ |
1c8e6004 | 3141 | |
4dff95dc SB |
3142 | #ifdef CONFIG_DEBUG_FS |
3143 | #include <linux/debugfs.h> | |
1c8e6004 | 3144 | |
4dff95dc SB |
3145 | static struct dentry *rootdir; |
3146 | static int inited = 0; | |
3147 | static DEFINE_MUTEX(clk_debug_lock); | |
3148 | static HLIST_HEAD(clk_debug_list); | |
1c8e6004 | 3149 | |
4dff95dc SB |
3150 | static struct hlist_head *orphan_list[] = { |
3151 | &clk_orphan_list, | |
3152 | NULL, | |
3153 | }; | |
3154 | ||
3155 | static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, | |
3156 | int level) | |
b2476490 | 3157 | { |
f21cf9c7 SB |
3158 | int phase; |
3159 | ||
3160 | seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu ", | |
4dff95dc SB |
3161 | level * 3 + 1, "", |
3162 | 30 - level * 3, c->name, | |
e55a839a | 3163 | c->enable_count, c->prepare_count, c->protect_count, |
0daa376d SB |
3164 | clk_core_get_rate_recalc(c), |
3165 | clk_core_get_accuracy_recalc(c)); | |
f21cf9c7 SB |
3166 | |
3167 | phase = clk_core_get_phase(c); | |
3168 | if (phase >= 0) | |
3169 | seq_printf(s, "%5d", phase); | |
3170 | else | |
3171 | seq_puts(s, "-----"); | |
3172 | ||
bf6d43d7 DO |
3173 | seq_printf(s, " %6d", clk_core_get_scaled_duty_cycle(c, 100000)); |
3174 | ||
3175 | if (c->ops->is_enabled) | |
3176 | seq_printf(s, " %9c\n", clk_core_is_enabled(c) ? 'Y' : 'N'); | |
3177 | else if (!c->ops->enable) | |
3178 | seq_printf(s, " %9c\n", 'Y'); | |
3179 | else | |
3180 | seq_printf(s, " %9c\n", '?'); | |
4dff95dc | 3181 | } |
89ac8d7a | 3182 | |
4dff95dc SB |
3183 | static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, |
3184 | int level) | |
3185 | { | |
3186 | struct clk_core *child; | |
b2476490 | 3187 | |
1bb294a7 | 3188 | clk_pm_runtime_get(c); |
4dff95dc | 3189 | clk_summary_show_one(s, c, level); |
1bb294a7 | 3190 | clk_pm_runtime_put(c); |
0e1c0301 | 3191 | |
4dff95dc SB |
3192 | hlist_for_each_entry(child, &c->children, child_node) |
3193 | clk_summary_show_subtree(s, child, level + 1); | |
1c8e6004 | 3194 | } |
b2476490 | 3195 | |
4dff95dc | 3196 | static int clk_summary_show(struct seq_file *s, void *data) |
1c8e6004 | 3197 | { |
4dff95dc | 3198 | struct clk_core *c; |
5b1a1c1a | 3199 | struct hlist_head **lists = s->private; |
1c8e6004 | 3200 | |
bf6d43d7 DO |
3201 | seq_puts(s, " enable prepare protect duty hardware\n"); |
3202 | seq_puts(s, " clock count count count rate accuracy phase cycle enable\n"); | |
3203 | seq_puts(s, "-------------------------------------------------------------------------------------------------------\n"); | |
b2476490 | 3204 | |
1c8e6004 TV |
3205 | clk_prepare_lock(); |
3206 | ||
4dff95dc SB |
3207 | for (; *lists; lists++) |
3208 | hlist_for_each_entry(c, *lists, child_node) | |
3209 | clk_summary_show_subtree(s, c, 0); | |
b2476490 | 3210 | |
eab89f69 | 3211 | clk_prepare_unlock(); |
b2476490 | 3212 | |
4dff95dc | 3213 | return 0; |
b2476490 | 3214 | } |
fec0ef3f | 3215 | DEFINE_SHOW_ATTRIBUTE(clk_summary); |
b2476490 | 3216 | |
4dff95dc SB |
3217 | static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) |
3218 | { | |
f21cf9c7 | 3219 | int phase; |
1bd37a46 LC |
3220 | unsigned long min_rate, max_rate; |
3221 | ||
1bd37a46 | 3222 | clk_core_get_boundaries(c, &min_rate, &max_rate); |
b2476490 | 3223 | |
7cb81136 | 3224 | /* This should be JSON format, i.e. elements separated with a comma */ |
4dff95dc SB |
3225 | seq_printf(s, "\"%s\": { ", c->name); |
3226 | seq_printf(s, "\"enable_count\": %d,", c->enable_count); | |
3227 | seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); | |
e55a839a | 3228 | seq_printf(s, "\"protect_count\": %d,", c->protect_count); |
0daa376d | 3229 | seq_printf(s, "\"rate\": %lu,", clk_core_get_rate_recalc(c)); |
1bd37a46 LC |
3230 | seq_printf(s, "\"min_rate\": %lu,", min_rate); |
3231 | seq_printf(s, "\"max_rate\": %lu,", max_rate); | |
0daa376d | 3232 | seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy_recalc(c)); |
f21cf9c7 SB |
3233 | phase = clk_core_get_phase(c); |
3234 | if (phase >= 0) | |
3235 | seq_printf(s, "\"phase\": %d,", phase); | |
9fba738a JB |
3236 | seq_printf(s, "\"duty_cycle\": %u", |
3237 | clk_core_get_scaled_duty_cycle(c, 100000)); | |
b2476490 | 3238 | } |
b2476490 | 3239 | |
4dff95dc | 3240 | static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) |
b2476490 | 3241 | { |
4dff95dc | 3242 | struct clk_core *child; |
b2476490 | 3243 | |
4dff95dc | 3244 | clk_dump_one(s, c, level); |
b2476490 | 3245 | |
4dff95dc | 3246 | hlist_for_each_entry(child, &c->children, child_node) { |
4d327586 | 3247 | seq_putc(s, ','); |
4dff95dc | 3248 | clk_dump_subtree(s, child, level + 1); |
b2476490 MT |
3249 | } |
3250 | ||
4d327586 | 3251 | seq_putc(s, '}'); |
b2476490 MT |
3252 | } |
3253 | ||
fec0ef3f | 3254 | static int clk_dump_show(struct seq_file *s, void *data) |
4e88f3de | 3255 | { |
4dff95dc SB |
3256 | struct clk_core *c; |
3257 | bool first_node = true; | |
5b1a1c1a | 3258 | struct hlist_head **lists = s->private; |
4e88f3de | 3259 | |
4d327586 | 3260 | seq_putc(s, '{'); |
4dff95dc | 3261 | clk_prepare_lock(); |
035a61c3 | 3262 | |
4dff95dc SB |
3263 | for (; *lists; lists++) { |
3264 | hlist_for_each_entry(c, *lists, child_node) { | |
3265 | if (!first_node) | |
4d327586 | 3266 | seq_putc(s, ','); |
4dff95dc SB |
3267 | first_node = false; |
3268 | clk_dump_subtree(s, c, 0); | |
3269 | } | |
3270 | } | |
4e88f3de | 3271 | |
4dff95dc | 3272 | clk_prepare_unlock(); |
4e88f3de | 3273 | |
70e9f4dd | 3274 | seq_puts(s, "}\n"); |
4dff95dc | 3275 | return 0; |
4e88f3de | 3276 | } |
fec0ef3f | 3277 | DEFINE_SHOW_ATTRIBUTE(clk_dump); |
89ac8d7a | 3278 | |
37215da5 GU |
3279 | #undef CLOCK_ALLOW_WRITE_DEBUGFS |
3280 | #ifdef CLOCK_ALLOW_WRITE_DEBUGFS | |
3281 | /* | |
3282 | * This can be dangerous, therefore don't provide any real compile time | |
3283 | * configuration option for this feature. | |
3284 | * People who want to use this will need to modify the source code directly. | |
3285 | */ | |
3286 | static int clk_rate_set(void *data, u64 val) | |
3287 | { | |
3288 | struct clk_core *core = data; | |
3289 | int ret; | |
3290 | ||
3291 | clk_prepare_lock(); | |
3292 | ret = clk_core_set_rate_nolock(core, val); | |
3293 | clk_prepare_unlock(); | |
3294 | ||
3295 | return ret; | |
3296 | } | |
3297 | ||
3298 | #define clk_rate_mode 0644 | |
03111b10 MT |
3299 | |
3300 | static int clk_prepare_enable_set(void *data, u64 val) | |
3301 | { | |
3302 | struct clk_core *core = data; | |
3303 | int ret = 0; | |
3304 | ||
3305 | if (val) | |
3306 | ret = clk_prepare_enable(core->hw->clk); | |
3307 | else | |
3308 | clk_disable_unprepare(core->hw->clk); | |
3309 | ||
3310 | return ret; | |
3311 | } | |
3312 | ||
3313 | static int clk_prepare_enable_get(void *data, u64 *val) | |
3314 | { | |
3315 | struct clk_core *core = data; | |
3316 | ||
3317 | *val = core->enable_count && core->prepare_count; | |
3318 | return 0; | |
3319 | } | |
3320 | ||
3321 | DEFINE_DEBUGFS_ATTRIBUTE(clk_prepare_enable_fops, clk_prepare_enable_get, | |
3322 | clk_prepare_enable_set, "%llu\n"); | |
3323 | ||
37215da5 GU |
3324 | #else |
3325 | #define clk_rate_set NULL | |
3326 | #define clk_rate_mode 0444 | |
3327 | #endif | |
3328 | ||
3329 | static int clk_rate_get(void *data, u64 *val) | |
3330 | { | |
3331 | struct clk_core *core = data; | |
3332 | ||
dd742cac CB |
3333 | clk_prepare_lock(); |
3334 | *val = clk_core_get_rate_recalc(core); | |
3335 | clk_prepare_unlock(); | |
3336 | ||
37215da5 GU |
3337 | return 0; |
3338 | } | |
3339 | ||
3340 | DEFINE_DEBUGFS_ATTRIBUTE(clk_rate_fops, clk_rate_get, clk_rate_set, "%llu\n"); | |
3341 | ||
a6059ab9 GU |
3342 | static const struct { |
3343 | unsigned long flag; | |
3344 | const char *name; | |
3345 | } clk_flags[] = { | |
40dd71c7 | 3346 | #define ENTRY(f) { f, #f } |
a6059ab9 GU |
3347 | ENTRY(CLK_SET_RATE_GATE), |
3348 | ENTRY(CLK_SET_PARENT_GATE), | |
3349 | ENTRY(CLK_SET_RATE_PARENT), | |
3350 | ENTRY(CLK_IGNORE_UNUSED), | |
a6059ab9 GU |
3351 | ENTRY(CLK_GET_RATE_NOCACHE), |
3352 | ENTRY(CLK_SET_RATE_NO_REPARENT), | |
3353 | ENTRY(CLK_GET_ACCURACY_NOCACHE), | |
3354 | ENTRY(CLK_RECALC_NEW_RATES), | |
3355 | ENTRY(CLK_SET_RATE_UNGATE), | |
3356 | ENTRY(CLK_IS_CRITICAL), | |
3357 | ENTRY(CLK_OPS_PARENT_ENABLE), | |
9fba738a | 3358 | ENTRY(CLK_DUTY_CYCLE_PARENT), |
a6059ab9 GU |
3359 | #undef ENTRY |
3360 | }; | |
3361 | ||
fec0ef3f | 3362 | static int clk_flags_show(struct seq_file *s, void *data) |
a6059ab9 GU |
3363 | { |
3364 | struct clk_core *core = s->private; | |
3365 | unsigned long flags = core->flags; | |
3366 | unsigned int i; | |
3367 | ||
3368 | for (i = 0; flags && i < ARRAY_SIZE(clk_flags); i++) { | |
3369 | if (flags & clk_flags[i].flag) { | |
3370 | seq_printf(s, "%s\n", clk_flags[i].name); | |
3371 | flags &= ~clk_flags[i].flag; | |
3372 | } | |
3373 | } | |
3374 | if (flags) { | |
3375 | /* Unknown flags */ | |
3376 | seq_printf(s, "0x%lx\n", flags); | |
3377 | } | |
3378 | ||
3379 | return 0; | |
3380 | } | |
fec0ef3f | 3381 | DEFINE_SHOW_ATTRIBUTE(clk_flags); |
a6059ab9 | 3382 | |
11f6c230 SB |
3383 | static void possible_parent_show(struct seq_file *s, struct clk_core *core, |
3384 | unsigned int i, char terminator) | |
92031575 | 3385 | { |
2d156b78 | 3386 | struct clk_core *parent; |
92031575 | 3387 | |
2d156b78 CYT |
3388 | /* |
3389 | * Go through the following options to fetch a parent's name. | |
3390 | * | |
3391 | * 1. Fetch the registered parent clock and use its name | |
3392 | * 2. Use the global (fallback) name if specified | |
3393 | * 3. Use the local fw_name if provided | |
3394 | * 4. Fetch parent clock's clock-output-name if DT index was set | |
3395 | * | |
3396 | * This may still fail in some cases, such as when the parent is | |
3397 | * specified directly via a struct clk_hw pointer, but it isn't | |
3398 | * registered (yet). | |
3399 | */ | |
2d156b78 CYT |
3400 | parent = clk_core_get_parent_by_index(core, i); |
3401 | if (parent) | |
1ccc0ddf | 3402 | seq_puts(s, parent->name); |
2d156b78 | 3403 | else if (core->parents[i].name) |
1ccc0ddf | 3404 | seq_puts(s, core->parents[i].name); |
2d156b78 CYT |
3405 | else if (core->parents[i].fw_name) |
3406 | seq_printf(s, "<%s>(fw)", core->parents[i].fw_name); | |
3407 | else if (core->parents[i].index >= 0) | |
1ccc0ddf ME |
3408 | seq_puts(s, |
3409 | of_clk_get_parent_name(core->of_node, | |
3410 | core->parents[i].index)); | |
2d156b78 CYT |
3411 | else |
3412 | seq_puts(s, "(missing)"); | |
92031575 | 3413 | |
11f6c230 SB |
3414 | seq_putc(s, terminator); |
3415 | } | |
3416 | ||
fec0ef3f | 3417 | static int possible_parents_show(struct seq_file *s, void *data) |
92031575 PDS |
3418 | { |
3419 | struct clk_core *core = s->private; | |
3420 | int i; | |
3421 | ||
3422 | for (i = 0; i < core->num_parents - 1; i++) | |
11f6c230 | 3423 | possible_parent_show(s, core, i, ' '); |
92031575 | 3424 | |
11f6c230 | 3425 | possible_parent_show(s, core, i, '\n'); |
92031575 PDS |
3426 | |
3427 | return 0; | |
3428 | } | |
fec0ef3f | 3429 | DEFINE_SHOW_ATTRIBUTE(possible_parents); |
92031575 | 3430 | |
e5e89247 LC |
3431 | static int current_parent_show(struct seq_file *s, void *data) |
3432 | { | |
3433 | struct clk_core *core = s->private; | |
3434 | ||
3435 | if (core->parent) | |
3436 | seq_printf(s, "%s\n", core->parent->name); | |
3437 | ||
3438 | return 0; | |
3439 | } | |
3440 | DEFINE_SHOW_ATTRIBUTE(current_parent); | |
3441 | ||
a331659e SP |
3442 | #ifdef CLOCK_ALLOW_WRITE_DEBUGFS |
3443 | static ssize_t current_parent_write(struct file *file, const char __user *ubuf, | |
3444 | size_t count, loff_t *ppos) | |
3445 | { | |
3446 | struct seq_file *s = file->private_data; | |
3447 | struct clk_core *core = s->private; | |
3448 | struct clk_core *parent; | |
3449 | u8 idx; | |
3450 | int err; | |
3451 | ||
3452 | err = kstrtou8_from_user(ubuf, count, 0, &idx); | |
3453 | if (err < 0) | |
3454 | return err; | |
3455 | ||
3456 | parent = clk_core_get_parent_by_index(core, idx); | |
3457 | if (!parent) | |
3458 | return -ENOENT; | |
3459 | ||
3460 | clk_prepare_lock(); | |
3461 | err = clk_core_set_parent_nolock(core, parent); | |
3462 | clk_prepare_unlock(); | |
3463 | if (err) | |
3464 | return err; | |
3465 | ||
3466 | return count; | |
3467 | } | |
3468 | ||
3469 | static const struct file_operations current_parent_rw_fops = { | |
3470 | .open = current_parent_open, | |
3471 | .write = current_parent_write, | |
3472 | .read = seq_read, | |
3473 | .llseek = seq_lseek, | |
3474 | .release = single_release, | |
3475 | }; | |
3476 | #endif | |
3477 | ||
9fba738a JB |
3478 | static int clk_duty_cycle_show(struct seq_file *s, void *data) |
3479 | { | |
3480 | struct clk_core *core = s->private; | |
3481 | struct clk_duty *duty = &core->duty; | |
3482 | ||
3483 | seq_printf(s, "%u/%u\n", duty->num, duty->den); | |
3484 | ||
3485 | return 0; | |
3486 | } | |
3487 | DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle); | |
3488 | ||
1bd37a46 LC |
3489 | static int clk_min_rate_show(struct seq_file *s, void *data) |
3490 | { | |
3491 | struct clk_core *core = s->private; | |
3492 | unsigned long min_rate, max_rate; | |
3493 | ||
3494 | clk_prepare_lock(); | |
3495 | clk_core_get_boundaries(core, &min_rate, &max_rate); | |
3496 | clk_prepare_unlock(); | |
3497 | seq_printf(s, "%lu\n", min_rate); | |
3498 | ||
3499 | return 0; | |
3500 | } | |
3501 | DEFINE_SHOW_ATTRIBUTE(clk_min_rate); | |
3502 | ||
3503 | static int clk_max_rate_show(struct seq_file *s, void *data) | |
3504 | { | |
3505 | struct clk_core *core = s->private; | |
3506 | unsigned long min_rate, max_rate; | |
3507 | ||
3508 | clk_prepare_lock(); | |
3509 | clk_core_get_boundaries(core, &min_rate, &max_rate); | |
3510 | clk_prepare_unlock(); | |
3511 | seq_printf(s, "%lu\n", max_rate); | |
3512 | ||
3513 | return 0; | |
3514 | } | |
3515 | DEFINE_SHOW_ATTRIBUTE(clk_max_rate); | |
3516 | ||
8a26bbbb | 3517 | static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) |
4dff95dc | 3518 | { |
8a26bbbb | 3519 | struct dentry *root; |
b61c43c0 | 3520 | |
8a26bbbb GKH |
3521 | if (!core || !pdentry) |
3522 | return; | |
b2476490 | 3523 | |
8a26bbbb GKH |
3524 | root = debugfs_create_dir(core->name, pdentry); |
3525 | core->dentry = root; | |
92031575 | 3526 | |
37215da5 GU |
3527 | debugfs_create_file("clk_rate", clk_rate_mode, root, core, |
3528 | &clk_rate_fops); | |
1bd37a46 LC |
3529 | debugfs_create_file("clk_min_rate", 0444, root, core, &clk_min_rate_fops); |
3530 | debugfs_create_file("clk_max_rate", 0444, root, core, &clk_max_rate_fops); | |
8a26bbbb GKH |
3531 | debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy); |
3532 | debugfs_create_u32("clk_phase", 0444, root, &core->phase); | |
3533 | debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops); | |
3534 | debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count); | |
3535 | debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count); | |
3536 | debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count); | |
3537 | debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count); | |
9fba738a JB |
3538 | debugfs_create_file("clk_duty_cycle", 0444, root, core, |
3539 | &clk_duty_cycle_fops); | |
03111b10 MT |
3540 | #ifdef CLOCK_ALLOW_WRITE_DEBUGFS |
3541 | debugfs_create_file("clk_prepare_enable", 0644, root, core, | |
3542 | &clk_prepare_enable_fops); | |
b2476490 | 3543 | |
a331659e SP |
3544 | if (core->num_parents > 1) |
3545 | debugfs_create_file("clk_parent", 0644, root, core, | |
3546 | ¤t_parent_rw_fops); | |
3547 | else | |
3548 | #endif | |
e5e89247 LC |
3549 | if (core->num_parents > 0) |
3550 | debugfs_create_file("clk_parent", 0444, root, core, | |
3551 | ¤t_parent_fops); | |
3552 | ||
8a26bbbb GKH |
3553 | if (core->num_parents > 1) |
3554 | debugfs_create_file("clk_possible_parents", 0444, root, core, | |
3555 | &possible_parents_fops); | |
b2476490 | 3556 | |
8a26bbbb GKH |
3557 | if (core->ops->debug_init) |
3558 | core->ops->debug_init(core->hw, core->dentry); | |
b2476490 | 3559 | } |
035a61c3 TV |
3560 | |
3561 | /** | |
6e5ab41b SB |
3562 | * clk_debug_register - add a clk node to the debugfs clk directory |
3563 | * @core: the clk being added to the debugfs clk directory | |
035a61c3 | 3564 | * |
6e5ab41b SB |
3565 | * Dynamically adds a clk to the debugfs clk directory if debugfs has been |
3566 | * initialized. Otherwise it bails out early since the debugfs clk directory | |
4dff95dc | 3567 | * will be created lazily by clk_debug_init as part of a late_initcall. |
035a61c3 | 3568 | */ |
8a26bbbb | 3569 | static void clk_debug_register(struct clk_core *core) |
035a61c3 | 3570 | { |
4dff95dc SB |
3571 | mutex_lock(&clk_debug_lock); |
3572 | hlist_add_head(&core->debug_node, &clk_debug_list); | |
db3188fa | 3573 | if (inited) |
8a26bbbb | 3574 | clk_debug_create_one(core, rootdir); |
4dff95dc | 3575 | mutex_unlock(&clk_debug_lock); |
035a61c3 | 3576 | } |
b2476490 | 3577 | |
4dff95dc | 3578 | /** |
6e5ab41b SB |
3579 | * clk_debug_unregister - remove a clk node from the debugfs clk directory |
3580 | * @core: the clk being removed from the debugfs clk directory | |
e59c5371 | 3581 | * |
6e5ab41b SB |
3582 | * Dynamically removes a clk and all its child nodes from the |
3583 | * debugfs clk directory if clk->dentry points to debugfs created by | |
706d5c73 | 3584 | * clk_debug_register in __clk_core_init. |
e59c5371 | 3585 | */ |
4dff95dc | 3586 | static void clk_debug_unregister(struct clk_core *core) |
e59c5371 | 3587 | { |
4dff95dc SB |
3588 | mutex_lock(&clk_debug_lock); |
3589 | hlist_del_init(&core->debug_node); | |
3590 | debugfs_remove_recursive(core->dentry); | |
3591 | core->dentry = NULL; | |
3592 | mutex_unlock(&clk_debug_lock); | |
3593 | } | |
e59c5371 | 3594 | |
4dff95dc | 3595 | /** |
6e5ab41b | 3596 | * clk_debug_init - lazily populate the debugfs clk directory |
4dff95dc | 3597 | * |
6e5ab41b SB |
3598 | * clks are often initialized very early during boot before memory can be |
3599 | * dynamically allocated and well before debugfs is setup. This function | |
3600 | * populates the debugfs clk directory once at boot-time when we know that | |
3601 | * debugfs is setup. It should only be called once at boot-time, all other clks | |
3602 | * added dynamically will be done so with clk_debug_register. | |
4dff95dc SB |
3603 | */ |
3604 | static int __init clk_debug_init(void) | |
3605 | { | |
3606 | struct clk_core *core; | |
dfc202ea | 3607 | |
489a7196 SB |
3608 | #ifdef CLOCK_ALLOW_WRITE_DEBUGFS |
3609 | pr_warn("\n"); | |
3610 | pr_warn("********************************************************************\n"); | |
3611 | pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **\n"); | |
3612 | pr_warn("** **\n"); | |
3613 | pr_warn("** WRITEABLE clk DebugFS SUPPORT HAS BEEN ENABLED IN THIS KERNEL **\n"); | |
3614 | pr_warn("** **\n"); | |
3615 | pr_warn("** This means that this kernel is built to expose clk operations **\n"); | |
3616 | pr_warn("** such as parent or rate setting, enabling, disabling, etc. **\n"); | |
3617 | pr_warn("** to userspace, which may compromise security on your system. **\n"); | |
3618 | pr_warn("** **\n"); | |
3619 | pr_warn("** If you see this message and you are not debugging the **\n"); | |
3620 | pr_warn("** kernel, report this immediately to your vendor! **\n"); | |
3621 | pr_warn("** **\n"); | |
3622 | pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **\n"); | |
3623 | pr_warn("********************************************************************\n"); | |
3624 | #endif | |
3625 | ||
4dff95dc | 3626 | rootdir = debugfs_create_dir("clk", NULL); |
e59c5371 | 3627 | |
8a26bbbb GKH |
3628 | debugfs_create_file("clk_summary", 0444, rootdir, &all_lists, |
3629 | &clk_summary_fops); | |
3630 | debugfs_create_file("clk_dump", 0444, rootdir, &all_lists, | |
3631 | &clk_dump_fops); | |
3632 | debugfs_create_file("clk_orphan_summary", 0444, rootdir, &orphan_list, | |
3633 | &clk_summary_fops); | |
3634 | debugfs_create_file("clk_orphan_dump", 0444, rootdir, &orphan_list, | |
3635 | &clk_dump_fops); | |
e59c5371 | 3636 | |
4dff95dc SB |
3637 | mutex_lock(&clk_debug_lock); |
3638 | hlist_for_each_entry(core, &clk_debug_list, debug_node) | |
3639 | clk_debug_create_one(core, rootdir); | |
e59c5371 | 3640 | |
4dff95dc SB |
3641 | inited = 1; |
3642 | mutex_unlock(&clk_debug_lock); | |
e59c5371 | 3643 | |
4dff95dc SB |
3644 | return 0; |
3645 | } | |
3646 | late_initcall(clk_debug_init); | |
3647 | #else | |
8a26bbbb | 3648 | static inline void clk_debug_register(struct clk_core *core) { } |
4dff95dc | 3649 | static inline void clk_debug_unregister(struct clk_core *core) |
3d3801ef | 3650 | { |
3d3801ef | 3651 | } |
4dff95dc | 3652 | #endif |
3d3801ef | 3653 | |
66d95064 JB |
3654 | static void clk_core_reparent_orphans_nolock(void) |
3655 | { | |
3656 | struct clk_core *orphan; | |
3657 | struct hlist_node *tmp2; | |
3658 | ||
3659 | /* | |
3660 | * walk the list of orphan clocks and reparent any that newly finds a | |
3661 | * parent. | |
3662 | */ | |
3663 | hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { | |
3664 | struct clk_core *parent = __clk_init_parent(orphan); | |
3665 | ||
3666 | /* | |
3667 | * We need to use __clk_set_parent_before() and _after() to | |
3378d0cc | 3668 | * properly migrate any prepare/enable count of the orphan |
66d95064 JB |
3669 | * clock. This is important for CLK_IS_CRITICAL clocks, which |
3670 | * are enabled during init but might not have a parent yet. | |
3671 | */ | |
3672 | if (parent) { | |
3673 | /* update the clk tree topology */ | |
3674 | __clk_set_parent_before(orphan, parent); | |
3675 | __clk_set_parent_after(orphan, parent, NULL); | |
3676 | __clk_recalc_accuracies(orphan); | |
096f2a0c | 3677 | __clk_recalc_rates(orphan, true, 0); |
5f7e2af0 MR |
3678 | |
3679 | /* | |
3680 | * __clk_init_parent() will set the initial req_rate to | |
3681 | * 0 if the clock doesn't have clk_ops::recalc_rate and | |
3682 | * is an orphan when it's registered. | |
3683 | * | |
3684 | * 'req_rate' is used by clk_set_rate_range() and | |
3685 | * clk_put() to trigger a clk_set_rate() call whenever | |
3686 | * the boundaries are modified. Let's make sure | |
3687 | * 'req_rate' is set to something non-zero so that | |
3688 | * clk_set_rate_range() doesn't drop the frequency. | |
3689 | */ | |
3690 | orphan->req_rate = orphan->rate; | |
66d95064 JB |
3691 | } |
3692 | } | |
3693 | } | |
3694 | ||
b2476490 | 3695 | /** |
be45ebf2 | 3696 | * __clk_core_init - initialize the data structures in a struct clk_core |
d35c80c2 | 3697 | * @core: clk_core being initialized |
b2476490 | 3698 | * |
035a61c3 | 3699 | * Initializes the lists in struct clk_core, queries the hardware for the |
b2476490 | 3700 | * parent and rate and sets them both. |
b2476490 | 3701 | */ |
be45ebf2 | 3702 | static int __clk_core_init(struct clk_core *core) |
b2476490 | 3703 | { |
fc0c209c | 3704 | int ret; |
768a5d4f | 3705 | struct clk_core *parent; |
1c8e6004 | 3706 | unsigned long rate; |
c3944ec8 | 3707 | int phase; |
b2476490 | 3708 | |
eab89f69 | 3709 | clk_prepare_lock(); |
b2476490 | 3710 | |
54baf56e MT |
3711 | /* |
3712 | * Set hw->core after grabbing the prepare_lock to synchronize with | |
3713 | * callers of clk_core_fill_parent_index() where we treat hw->core | |
3714 | * being NULL as the clk not being registered yet. This is crucial so | |
3715 | * that clks aren't parented until their parent is fully registered. | |
3716 | */ | |
3717 | core->hw->core = core; | |
3718 | ||
9a34b453 MS |
3719 | ret = clk_pm_runtime_get(core); |
3720 | if (ret) | |
3721 | goto unlock; | |
3722 | ||
b2476490 | 3723 | /* check to see if a clock with this name is already registered */ |
d6968fca | 3724 | if (clk_core_lookup(core->name)) { |
d1302a36 | 3725 | pr_debug("%s: clk %s already initialized\n", |
d6968fca | 3726 | __func__, core->name); |
d1302a36 | 3727 | ret = -EEXIST; |
b2476490 | 3728 | goto out; |
d1302a36 | 3729 | } |
b2476490 | 3730 | |
5fb94e9c | 3731 | /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */ |
d6968fca SB |
3732 | if (core->ops->set_rate && |
3733 | !((core->ops->round_rate || core->ops->determine_rate) && | |
3734 | core->ops->recalc_rate)) { | |
c44fccb5 MY |
3735 | pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", |
3736 | __func__, core->name); | |
d1302a36 | 3737 | ret = -EINVAL; |
d4d7e3dd MT |
3738 | goto out; |
3739 | } | |
3740 | ||
d6968fca | 3741 | if (core->ops->set_parent && !core->ops->get_parent) { |
c44fccb5 MY |
3742 | pr_err("%s: %s must implement .get_parent & .set_parent\n", |
3743 | __func__, core->name); | |
d1302a36 | 3744 | ret = -EINVAL; |
d4d7e3dd MT |
3745 | goto out; |
3746 | } | |
3747 | ||
3c8e77dd MY |
3748 | if (core->num_parents > 1 && !core->ops->get_parent) { |
3749 | pr_err("%s: %s must implement .get_parent as it has multi parents\n", | |
3750 | __func__, core->name); | |
3751 | ret = -EINVAL; | |
3752 | goto out; | |
3753 | } | |
3754 | ||
d6968fca SB |
3755 | if (core->ops->set_rate_and_parent && |
3756 | !(core->ops->set_parent && core->ops->set_rate)) { | |
c44fccb5 | 3757 | pr_err("%s: %s must implement .set_parent & .set_rate\n", |
d6968fca | 3758 | __func__, core->name); |
3fa2252b SB |
3759 | ret = -EINVAL; |
3760 | goto out; | |
3761 | } | |
3762 | ||
f6fa75ca JB |
3763 | /* |
3764 | * optional platform-specific magic | |
3765 | * | |
3766 | * The .init callback is not used by any of the basic clock types, but | |
89d079dc JB |
3767 | * exists for weird hardware that must perform initialization magic for |
3768 | * CCF to get an accurate view of clock for any other callbacks. It may | |
3769 | * also be used needs to perform dynamic allocations. Such allocation | |
3770 | * must be freed in the terminate() callback. | |
3771 | * This callback shall not be used to initialize the parameters state, | |
3772 | * such as rate, parent, etc ... | |
f6fa75ca JB |
3773 | * |
3774 | * If it exist, this callback should called before any other callback of | |
3775 | * the clock | |
3776 | */ | |
89d079dc JB |
3777 | if (core->ops->init) { |
3778 | ret = core->ops->init(core->hw); | |
3779 | if (ret) | |
3780 | goto out; | |
3781 | } | |
f6fa75ca | 3782 | |
768a5d4f | 3783 | parent = core->parent = __clk_init_parent(core); |
b2476490 MT |
3784 | |
3785 | /* | |
706d5c73 SB |
3786 | * Populate core->parent if parent has already been clk_core_init'd. If |
3787 | * parent has not yet been clk_core_init'd then place clk in the orphan | |
47b0eeb3 | 3788 | * list. If clk doesn't have any parents then place it in the root |
b2476490 MT |
3789 | * clk list. |
3790 | * | |
3791 | * Every time a new clk is clk_init'd then we walk the list of orphan | |
3792 | * clocks and re-parent any that are children of the clock currently | |
3793 | * being clk_init'd. | |
3794 | */ | |
768a5d4f SB |
3795 | if (parent) { |
3796 | hlist_add_head(&core->child_node, &parent->children); | |
3797 | core->orphan = parent->orphan; | |
47b0eeb3 | 3798 | } else if (!core->num_parents) { |
d6968fca | 3799 | hlist_add_head(&core->child_node, &clk_root_list); |
e6500344 HS |
3800 | core->orphan = false; |
3801 | } else { | |
d6968fca | 3802 | hlist_add_head(&core->child_node, &clk_orphan_list); |
e6500344 HS |
3803 | core->orphan = true; |
3804 | } | |
b2476490 | 3805 | |
5279fc40 BB |
3806 | /* |
3807 | * Set clk's accuracy. The preferred method is to use | |
3808 | * .recalc_accuracy. For simple clocks and lazy developers the default | |
3809 | * fallback is to use the parent's accuracy. If a clock doesn't have a | |
3810 | * parent (or is orphaned) then accuracy is set to zero (perfect | |
3811 | * clock). | |
3812 | */ | |
d6968fca SB |
3813 | if (core->ops->recalc_accuracy) |
3814 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
0daa376d | 3815 | clk_core_get_accuracy_no_lock(parent)); |
768a5d4f SB |
3816 | else if (parent) |
3817 | core->accuracy = parent->accuracy; | |
5279fc40 | 3818 | else |
d6968fca | 3819 | core->accuracy = 0; |
5279fc40 | 3820 | |
9824cf73 | 3821 | /* |
f21cf9c7 | 3822 | * Set clk's phase by clk_core_get_phase() caching the phase. |
9824cf73 MR |
3823 | * Since a phase is by definition relative to its parent, just |
3824 | * query the current clock phase, or just assume it's in phase. | |
3825 | */ | |
c3944ec8 MR |
3826 | phase = clk_core_get_phase(core); |
3827 | if (phase < 0) { | |
3828 | ret = phase; | |
27608786 SB |
3829 | pr_warn("%s: Failed to get phase for clk '%s'\n", __func__, |
3830 | core->name); | |
3831 | goto out; | |
3832 | } | |
9824cf73 | 3833 | |
9fba738a JB |
3834 | /* |
3835 | * Set clk's duty cycle. | |
3836 | */ | |
3837 | clk_core_update_duty_cycle_nolock(core); | |
3838 | ||
b2476490 MT |
3839 | /* |
3840 | * Set clk's rate. The preferred method is to use .recalc_rate. For | |
3841 | * simple clocks and lazy developers the default fallback is to use the | |
3842 | * parent's rate. If a clock doesn't have a parent (or is orphaned) | |
3843 | * then rate is set to zero. | |
3844 | */ | |
d6968fca SB |
3845 | if (core->ops->recalc_rate) |
3846 | rate = core->ops->recalc_rate(core->hw, | |
768a5d4f SB |
3847 | clk_core_get_rate_nolock(parent)); |
3848 | else if (parent) | |
3849 | rate = parent->rate; | |
b2476490 | 3850 | else |
1c8e6004 | 3851 | rate = 0; |
d6968fca | 3852 | core->rate = core->req_rate = rate; |
b2476490 | 3853 | |
99652a46 JB |
3854 | /* |
3855 | * Enable CLK_IS_CRITICAL clocks so newly added critical clocks | |
3856 | * don't get accidentally disabled when walking the orphan tree and | |
3857 | * reparenting clocks | |
3858 | */ | |
3859 | if (core->flags & CLK_IS_CRITICAL) { | |
12ead774 | 3860 | ret = clk_core_prepare(core); |
2d269992 SB |
3861 | if (ret) { |
3862 | pr_warn("%s: critical clk '%s' failed to prepare\n", | |
3863 | __func__, core->name); | |
12ead774 | 3864 | goto out; |
2d269992 | 3865 | } |
99652a46 | 3866 | |
35a79631 | 3867 | ret = clk_core_enable_lock(core); |
12ead774 | 3868 | if (ret) { |
2d269992 SB |
3869 | pr_warn("%s: critical clk '%s' failed to enable\n", |
3870 | __func__, core->name); | |
12ead774 GR |
3871 | clk_core_unprepare(core); |
3872 | goto out; | |
3873 | } | |
99652a46 JB |
3874 | } |
3875 | ||
66d95064 | 3876 | clk_core_reparent_orphans_nolock(); |
1f61e5f1 | 3877 | |
d6968fca | 3878 | kref_init(&core->ref); |
b2476490 | 3879 | out: |
9a34b453 MS |
3880 | clk_pm_runtime_put(core); |
3881 | unlock: | |
54baf56e | 3882 | if (ret) { |
018d4671 | 3883 | hlist_del_init(&core->child_node); |
54baf56e MT |
3884 | core->hw->core = NULL; |
3885 | } | |
018d4671 | 3886 | |
eab89f69 | 3887 | clk_prepare_unlock(); |
b2476490 | 3888 | |
89f7e9de | 3889 | if (!ret) |
d6968fca | 3890 | clk_debug_register(core); |
89f7e9de | 3891 | |
d1302a36 | 3892 | return ret; |
b2476490 MT |
3893 | } |
3894 | ||
1df4046a SB |
3895 | /** |
3896 | * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core | |
3897 | * @core: clk to add consumer to | |
3898 | * @clk: consumer to link to a clk | |
3899 | */ | |
3900 | static void clk_core_link_consumer(struct clk_core *core, struct clk *clk) | |
3901 | { | |
3902 | clk_prepare_lock(); | |
3903 | hlist_add_head(&clk->clks_node, &core->clks); | |
3904 | clk_prepare_unlock(); | |
3905 | } | |
3906 | ||
3907 | /** | |
3908 | * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core | |
3909 | * @clk: consumer to unlink | |
3910 | */ | |
3911 | static void clk_core_unlink_consumer(struct clk *clk) | |
3912 | { | |
3913 | lockdep_assert_held(&prepare_lock); | |
3914 | hlist_del(&clk->clks_node); | |
3915 | } | |
3916 | ||
3917 | /** | |
3918 | * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core | |
3919 | * @core: clk to allocate a consumer for | |
3920 | * @dev_id: string describing device name | |
3921 | * @con_id: connection ID string on device | |
3922 | * | |
3923 | * Returns: clk consumer left unlinked from the consumer list | |
3924 | */ | |
3925 | static struct clk *alloc_clk(struct clk_core *core, const char *dev_id, | |
035a61c3 | 3926 | const char *con_id) |
0197b3ea | 3927 | { |
0197b3ea SK |
3928 | struct clk *clk; |
3929 | ||
035a61c3 TV |
3930 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); |
3931 | if (!clk) | |
3932 | return ERR_PTR(-ENOMEM); | |
3933 | ||
1df4046a | 3934 | clk->core = core; |
035a61c3 | 3935 | clk->dev_id = dev_id; |
253160a8 | 3936 | clk->con_id = kstrdup_const(con_id, GFP_KERNEL); |
1c8e6004 TV |
3937 | clk->max_rate = ULONG_MAX; |
3938 | ||
0197b3ea SK |
3939 | return clk; |
3940 | } | |
035a61c3 | 3941 | |
1df4046a SB |
3942 | /** |
3943 | * free_clk - Free a clk consumer | |
3944 | * @clk: clk consumer to free | |
3945 | * | |
3946 | * Note, this assumes the clk has been unlinked from the clk_core consumer | |
3947 | * list. | |
3948 | */ | |
3949 | static void free_clk(struct clk *clk) | |
1c8e6004 | 3950 | { |
253160a8 | 3951 | kfree_const(clk->con_id); |
1c8e6004 TV |
3952 | kfree(clk); |
3953 | } | |
0197b3ea | 3954 | |
1df4046a SB |
3955 | /** |
3956 | * clk_hw_create_clk: Allocate and link a clk consumer to a clk_core given | |
3957 | * a clk_hw | |
efa85048 | 3958 | * @dev: clk consumer device |
1df4046a SB |
3959 | * @hw: clk_hw associated with the clk being consumed |
3960 | * @dev_id: string describing device name | |
3961 | * @con_id: connection ID string on device | |
3962 | * | |
3963 | * This is the main function used to create a clk pointer for use by clk | |
3964 | * consumers. It connects a consumer to the clk_core and clk_hw structures | |
3965 | * used by the framework and clk provider respectively. | |
3966 | */ | |
efa85048 | 3967 | struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw, |
1df4046a SB |
3968 | const char *dev_id, const char *con_id) |
3969 | { | |
3970 | struct clk *clk; | |
3971 | struct clk_core *core; | |
3972 | ||
3973 | /* This is to allow this function to be chained to others */ | |
3974 | if (IS_ERR_OR_NULL(hw)) | |
3975 | return ERR_CAST(hw); | |
3976 | ||
3977 | core = hw->core; | |
3978 | clk = alloc_clk(core, dev_id, con_id); | |
3979 | if (IS_ERR(clk)) | |
3980 | return clk; | |
efa85048 | 3981 | clk->dev = dev; |
1df4046a SB |
3982 | |
3983 | if (!try_module_get(core->owner)) { | |
3984 | free_clk(clk); | |
3985 | return ERR_PTR(-ENOENT); | |
3986 | } | |
3987 | ||
3988 | kref_get(&core->ref); | |
3989 | clk_core_link_consumer(core, clk); | |
3990 | ||
3991 | return clk; | |
3992 | } | |
3993 | ||
30d6f8c1 JB |
3994 | /** |
3995 | * clk_hw_get_clk - get clk consumer given an clk_hw | |
3996 | * @hw: clk_hw associated with the clk being consumed | |
3997 | * @con_id: connection ID string on device | |
3998 | * | |
3999 | * Returns: new clk consumer | |
4000 | * This is the function to be used by providers which need | |
4001 | * to get a consumer clk and act on the clock element | |
4002 | * Calls to this function must be balanced with calls clk_put() | |
4003 | */ | |
4004 | struct clk *clk_hw_get_clk(struct clk_hw *hw, const char *con_id) | |
4005 | { | |
4006 | struct device *dev = hw->core->dev; | |
0c1b56df | 4007 | const char *name = dev ? dev_name(dev) : NULL; |
30d6f8c1 | 4008 | |
0c1b56df | 4009 | return clk_hw_create_clk(dev, hw, name, con_id); |
30d6f8c1 JB |
4010 | } |
4011 | EXPORT_SYMBOL(clk_hw_get_clk); | |
4012 | ||
fc0c209c | 4013 | static int clk_cpy_name(const char **dst_p, const char *src, bool must_exist) |
b2476490 | 4014 | { |
fc0c209c SB |
4015 | const char *dst; |
4016 | ||
4017 | if (!src) { | |
4018 | if (must_exist) | |
4019 | return -EINVAL; | |
4020 | return 0; | |
4021 | } | |
4022 | ||
4023 | *dst_p = dst = kstrdup_const(src, GFP_KERNEL); | |
4024 | if (!dst) | |
4025 | return -ENOMEM; | |
4026 | ||
4027 | return 0; | |
4028 | } | |
4029 | ||
0214f33c SB |
4030 | static int clk_core_populate_parent_map(struct clk_core *core, |
4031 | const struct clk_init_data *init) | |
fc0c209c | 4032 | { |
fc0c209c SB |
4033 | u8 num_parents = init->num_parents; |
4034 | const char * const *parent_names = init->parent_names; | |
4035 | const struct clk_hw **parent_hws = init->parent_hws; | |
4036 | const struct clk_parent_data *parent_data = init->parent_data; | |
4037 | int i, ret = 0; | |
4038 | struct clk_parent_map *parents, *parent; | |
4039 | ||
4040 | if (!num_parents) | |
4041 | return 0; | |
4042 | ||
4043 | /* | |
4044 | * Avoid unnecessary string look-ups of clk_core's possible parents by | |
4045 | * having a cache of names/clk_hw pointers to clk_core pointers. | |
4046 | */ | |
4047 | parents = kcalloc(num_parents, sizeof(*parents), GFP_KERNEL); | |
4048 | core->parents = parents; | |
4049 | if (!parents) | |
4050 | return -ENOMEM; | |
4051 | ||
4052 | /* Copy everything over because it might be __initdata */ | |
4053 | for (i = 0, parent = parents; i < num_parents; i++, parent++) { | |
601b6e93 | 4054 | parent->index = -1; |
fc0c209c SB |
4055 | if (parent_names) { |
4056 | /* throw a WARN if any entries are NULL */ | |
4057 | WARN(!parent_names[i], | |
4058 | "%s: invalid NULL in %s's .parent_names\n", | |
4059 | __func__, core->name); | |
4060 | ret = clk_cpy_name(&parent->name, parent_names[i], | |
4061 | true); | |
4062 | } else if (parent_data) { | |
4063 | parent->hw = parent_data[i].hw; | |
601b6e93 | 4064 | parent->index = parent_data[i].index; |
fc0c209c SB |
4065 | ret = clk_cpy_name(&parent->fw_name, |
4066 | parent_data[i].fw_name, false); | |
4067 | if (!ret) | |
4068 | ret = clk_cpy_name(&parent->name, | |
4069 | parent_data[i].name, | |
4070 | false); | |
4071 | } else if (parent_hws) { | |
4072 | parent->hw = parent_hws[i]; | |
4073 | } else { | |
4074 | ret = -EINVAL; | |
4075 | WARN(1, "Must specify parents if num_parents > 0\n"); | |
4076 | } | |
4077 | ||
4078 | if (ret) { | |
4079 | do { | |
4080 | kfree_const(parents[i].name); | |
4081 | kfree_const(parents[i].fw_name); | |
4082 | } while (--i >= 0); | |
4083 | kfree(parents); | |
4084 | ||
4085 | return ret; | |
4086 | } | |
4087 | } | |
4088 | ||
4089 | return 0; | |
4090 | } | |
4091 | ||
4092 | static void clk_core_free_parent_map(struct clk_core *core) | |
4093 | { | |
4094 | int i = core->num_parents; | |
4095 | ||
4096 | if (!core->num_parents) | |
4097 | return; | |
4098 | ||
4099 | while (--i >= 0) { | |
4100 | kfree_const(core->parents[i].name); | |
4101 | kfree_const(core->parents[i].fw_name); | |
4102 | } | |
4103 | ||
4104 | kfree(core->parents); | |
4105 | } | |
4106 | ||
89a5ddcc SB |
4107 | static struct clk * |
4108 | __clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw) | |
b2476490 | 4109 | { |
fc0c209c | 4110 | int ret; |
d6968fca | 4111 | struct clk_core *core; |
0214f33c SB |
4112 | const struct clk_init_data *init = hw->init; |
4113 | ||
4114 | /* | |
4115 | * The init data is not supposed to be used outside of registration path. | |
4116 | * Set it to NULL so that provider drivers can't use it either and so that | |
4117 | * we catch use of hw->init early on in the core. | |
4118 | */ | |
4119 | hw->init = NULL; | |
293ba3b4 | 4120 | |
d6968fca SB |
4121 | core = kzalloc(sizeof(*core), GFP_KERNEL); |
4122 | if (!core) { | |
293ba3b4 SB |
4123 | ret = -ENOMEM; |
4124 | goto fail_out; | |
4125 | } | |
b2476490 | 4126 | |
0214f33c | 4127 | core->name = kstrdup_const(init->name, GFP_KERNEL); |
d6968fca | 4128 | if (!core->name) { |
0197b3ea SK |
4129 | ret = -ENOMEM; |
4130 | goto fail_name; | |
4131 | } | |
29fd2a34 | 4132 | |
0214f33c | 4133 | if (WARN_ON(!init->ops)) { |
29fd2a34 JB |
4134 | ret = -EINVAL; |
4135 | goto fail_ops; | |
4136 | } | |
0214f33c | 4137 | core->ops = init->ops; |
29fd2a34 | 4138 | |
9a34b453 | 4139 | if (dev && pm_runtime_enabled(dev)) |
24478839 MR |
4140 | core->rpm_enabled = true; |
4141 | core->dev = dev; | |
89a5ddcc | 4142 | core->of_node = np; |
ac2df527 | 4143 | if (dev && dev->driver) |
d6968fca SB |
4144 | core->owner = dev->driver->owner; |
4145 | core->hw = hw; | |
0214f33c SB |
4146 | core->flags = init->flags; |
4147 | core->num_parents = init->num_parents; | |
9783c0d9 SB |
4148 | core->min_rate = 0; |
4149 | core->max_rate = ULONG_MAX; | |
b2476490 | 4150 | |
0214f33c | 4151 | ret = clk_core_populate_parent_map(core, init); |
fc0c209c | 4152 | if (ret) |
176d1169 | 4153 | goto fail_parents; |
176d1169 | 4154 | |
d6968fca | 4155 | INIT_HLIST_HEAD(&core->clks); |
1c8e6004 | 4156 | |
1df4046a SB |
4157 | /* |
4158 | * Don't call clk_hw_create_clk() here because that would pin the | |
4159 | * provider module to itself and prevent it from ever being removed. | |
4160 | */ | |
4161 | hw->clk = alloc_clk(core, NULL, NULL); | |
035a61c3 | 4162 | if (IS_ERR(hw->clk)) { |
035a61c3 | 4163 | ret = PTR_ERR(hw->clk); |
fc0c209c | 4164 | goto fail_create_clk; |
035a61c3 TV |
4165 | } |
4166 | ||
54baf56e | 4167 | clk_core_link_consumer(core, hw->clk); |
1df4046a | 4168 | |
be45ebf2 | 4169 | ret = __clk_core_init(core); |
d1302a36 | 4170 | if (!ret) |
035a61c3 | 4171 | return hw->clk; |
b2476490 | 4172 | |
1df4046a SB |
4173 | clk_prepare_lock(); |
4174 | clk_core_unlink_consumer(hw->clk); | |
4175 | clk_prepare_unlock(); | |
4176 | ||
4177 | free_clk(hw->clk); | |
035a61c3 | 4178 | hw->clk = NULL; |
b2476490 | 4179 | |
fc0c209c SB |
4180 | fail_create_clk: |
4181 | clk_core_free_parent_map(core); | |
176d1169 | 4182 | fail_parents: |
29fd2a34 | 4183 | fail_ops: |
d6968fca | 4184 | kfree_const(core->name); |
0197b3ea | 4185 | fail_name: |
d6968fca | 4186 | kfree(core); |
d1302a36 MT |
4187 | fail_out: |
4188 | return ERR_PTR(ret); | |
b2476490 | 4189 | } |
fceaa7d8 | 4190 | |
9011f926 SB |
4191 | /** |
4192 | * dev_or_parent_of_node() - Get device node of @dev or @dev's parent | |
4193 | * @dev: Device to get device node of | |
4194 | * | |
4195 | * Return: device node pointer of @dev, or the device node pointer of | |
4196 | * @dev->parent if dev doesn't have a device node, or NULL if neither | |
4197 | * @dev or @dev->parent have a device node. | |
4198 | */ | |
4199 | static struct device_node *dev_or_parent_of_node(struct device *dev) | |
4200 | { | |
4201 | struct device_node *np; | |
4202 | ||
4203 | if (!dev) | |
4204 | return NULL; | |
4205 | ||
4206 | np = dev_of_node(dev); | |
4207 | if (!np) | |
4208 | np = dev_of_node(dev->parent); | |
4209 | ||
4210 | return np; | |
4211 | } | |
4212 | ||
fceaa7d8 SB |
4213 | /** |
4214 | * clk_register - allocate a new clock, register it and return an opaque cookie | |
4215 | * @dev: device that is registering this clock | |
4216 | * @hw: link to hardware-specific clock data | |
4217 | * | |
c1157f60 SB |
4218 | * clk_register is the *deprecated* interface for populating the clock tree with |
4219 | * new clock nodes. Use clk_hw_register() instead. | |
4220 | * | |
4221 | * Returns: a pointer to the newly allocated struct clk which | |
fceaa7d8 SB |
4222 | * cannot be dereferenced by driver code but may be used in conjunction with the |
4223 | * rest of the clock API. In the event of an error clk_register will return an | |
4224 | * error code; drivers must test for an error code after calling clk_register. | |
4225 | */ | |
4226 | struct clk *clk_register(struct device *dev, struct clk_hw *hw) | |
4227 | { | |
9011f926 | 4228 | return __clk_register(dev, dev_or_parent_of_node(dev), hw); |
fceaa7d8 | 4229 | } |
b2476490 MT |
4230 | EXPORT_SYMBOL_GPL(clk_register); |
4231 | ||
4143804c SB |
4232 | /** |
4233 | * clk_hw_register - register a clk_hw and return an error code | |
4234 | * @dev: device that is registering this clock | |
4235 | * @hw: link to hardware-specific clock data | |
4236 | * | |
4237 | * clk_hw_register is the primary interface for populating the clock tree with | |
4238 | * new clock nodes. It returns an integer equal to zero indicating success or | |
4239 | * less than zero indicating failure. Drivers must test for an error code after | |
4240 | * calling clk_hw_register(). | |
4241 | */ | |
4242 | int clk_hw_register(struct device *dev, struct clk_hw *hw) | |
4243 | { | |
9011f926 SB |
4244 | return PTR_ERR_OR_ZERO(__clk_register(dev, dev_or_parent_of_node(dev), |
4245 | hw)); | |
4143804c SB |
4246 | } |
4247 | EXPORT_SYMBOL_GPL(clk_hw_register); | |
4248 | ||
89a5ddcc SB |
4249 | /* |
4250 | * of_clk_hw_register - register a clk_hw and return an error code | |
4251 | * @node: device_node of device that is registering this clock | |
4252 | * @hw: link to hardware-specific clock data | |
4253 | * | |
4254 | * of_clk_hw_register() is the primary interface for populating the clock tree | |
4255 | * with new clock nodes when a struct device is not available, but a struct | |
4256 | * device_node is. It returns an integer equal to zero indicating success or | |
4257 | * less than zero indicating failure. Drivers must test for an error code after | |
4258 | * calling of_clk_hw_register(). | |
4259 | */ | |
4260 | int of_clk_hw_register(struct device_node *node, struct clk_hw *hw) | |
4261 | { | |
4262 | return PTR_ERR_OR_ZERO(__clk_register(NULL, node, hw)); | |
4263 | } | |
4264 | EXPORT_SYMBOL_GPL(of_clk_hw_register); | |
4265 | ||
6e5ab41b | 4266 | /* Free memory allocated for a clock. */ |
fcb0ee6a SN |
4267 | static void __clk_release(struct kref *ref) |
4268 | { | |
d6968fca | 4269 | struct clk_core *core = container_of(ref, struct clk_core, ref); |
fcb0ee6a | 4270 | |
496eadf8 KK |
4271 | lockdep_assert_held(&prepare_lock); |
4272 | ||
fc0c209c | 4273 | clk_core_free_parent_map(core); |
d6968fca SB |
4274 | kfree_const(core->name); |
4275 | kfree(core); | |
fcb0ee6a SN |
4276 | } |
4277 | ||
4278 | /* | |
4279 | * Empty clk_ops for unregistered clocks. These are used temporarily | |
4280 | * after clk_unregister() was called on a clock and until last clock | |
4281 | * consumer calls clk_put() and the struct clk object is freed. | |
4282 | */ | |
4283 | static int clk_nodrv_prepare_enable(struct clk_hw *hw) | |
4284 | { | |
4285 | return -ENXIO; | |
4286 | } | |
4287 | ||
4288 | static void clk_nodrv_disable_unprepare(struct clk_hw *hw) | |
4289 | { | |
4290 | WARN_ON_ONCE(1); | |
4291 | } | |
4292 | ||
4293 | static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate, | |
4294 | unsigned long parent_rate) | |
4295 | { | |
4296 | return -ENXIO; | |
4297 | } | |
4298 | ||
4299 | static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) | |
4300 | { | |
4301 | return -ENXIO; | |
4302 | } | |
4303 | ||
4304 | static const struct clk_ops clk_nodrv_ops = { | |
4305 | .enable = clk_nodrv_prepare_enable, | |
4306 | .disable = clk_nodrv_disable_unprepare, | |
4307 | .prepare = clk_nodrv_prepare_enable, | |
4308 | .unprepare = clk_nodrv_disable_unprepare, | |
4309 | .set_rate = clk_nodrv_set_rate, | |
4310 | .set_parent = clk_nodrv_set_parent, | |
4311 | }; | |
4312 | ||
bdcf1dc2 | 4313 | static void clk_core_evict_parent_cache_subtree(struct clk_core *root, |
8df64183 | 4314 | const struct clk_core *target) |
bdcf1dc2 SB |
4315 | { |
4316 | int i; | |
4317 | struct clk_core *child; | |
4318 | ||
4319 | for (i = 0; i < root->num_parents; i++) | |
4320 | if (root->parents[i].core == target) | |
4321 | root->parents[i].core = NULL; | |
4322 | ||
4323 | hlist_for_each_entry(child, &root->children, child_node) | |
4324 | clk_core_evict_parent_cache_subtree(child, target); | |
4325 | } | |
4326 | ||
4327 | /* Remove this clk from all parent caches */ | |
4328 | static void clk_core_evict_parent_cache(struct clk_core *core) | |
4329 | { | |
75061a6f | 4330 | const struct hlist_head **lists; |
bdcf1dc2 SB |
4331 | struct clk_core *root; |
4332 | ||
4333 | lockdep_assert_held(&prepare_lock); | |
4334 | ||
4335 | for (lists = all_lists; *lists; lists++) | |
4336 | hlist_for_each_entry(root, *lists, child_node) | |
4337 | clk_core_evict_parent_cache_subtree(root, core); | |
4338 | ||
4339 | } | |
4340 | ||
1df5c939 MB |
4341 | /** |
4342 | * clk_unregister - unregister a currently registered clock | |
4343 | * @clk: clock to unregister | |
1df5c939 | 4344 | */ |
fcb0ee6a SN |
4345 | void clk_unregister(struct clk *clk) |
4346 | { | |
4347 | unsigned long flags; | |
f873744c | 4348 | const struct clk_ops *ops; |
fcb0ee6a | 4349 | |
6314b679 SB |
4350 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
4351 | return; | |
4352 | ||
035a61c3 | 4353 | clk_debug_unregister(clk->core); |
fcb0ee6a SN |
4354 | |
4355 | clk_prepare_lock(); | |
4356 | ||
f873744c JB |
4357 | ops = clk->core->ops; |
4358 | if (ops == &clk_nodrv_ops) { | |
035a61c3 TV |
4359 | pr_err("%s: unregistered clock: %s\n", __func__, |
4360 | clk->core->name); | |
4106a3d9 | 4361 | goto unlock; |
fcb0ee6a SN |
4362 | } |
4363 | /* | |
4364 | * Assign empty clock ops for consumers that might still hold | |
4365 | * a reference to this clock. | |
4366 | */ | |
4367 | flags = clk_enable_lock(); | |
035a61c3 | 4368 | clk->core->ops = &clk_nodrv_ops; |
fcb0ee6a SN |
4369 | clk_enable_unlock(flags); |
4370 | ||
f873744c JB |
4371 | if (ops->terminate) |
4372 | ops->terminate(clk->core->hw); | |
4373 | ||
035a61c3 TV |
4374 | if (!hlist_empty(&clk->core->children)) { |
4375 | struct clk_core *child; | |
874f224c | 4376 | struct hlist_node *t; |
fcb0ee6a SN |
4377 | |
4378 | /* Reparent all children to the orphan list. */ | |
035a61c3 TV |
4379 | hlist_for_each_entry_safe(child, t, &clk->core->children, |
4380 | child_node) | |
91baa9ff | 4381 | clk_core_set_parent_nolock(child, NULL); |
fcb0ee6a SN |
4382 | } |
4383 | ||
bdcf1dc2 SB |
4384 | clk_core_evict_parent_cache(clk->core); |
4385 | ||
035a61c3 | 4386 | hlist_del_init(&clk->core->child_node); |
fcb0ee6a | 4387 | |
035a61c3 | 4388 | if (clk->core->prepare_count) |
fcb0ee6a | 4389 | pr_warn("%s: unregistering prepared clock: %s\n", |
035a61c3 | 4390 | __func__, clk->core->name); |
e55a839a JB |
4391 | |
4392 | if (clk->core->protect_count) | |
4393 | pr_warn("%s: unregistering protected clock: %s\n", | |
4394 | __func__, clk->core->name); | |
4395 | ||
035a61c3 | 4396 | kref_put(&clk->core->ref, __clk_release); |
82474707 | 4397 | free_clk(clk); |
4106a3d9 | 4398 | unlock: |
fcb0ee6a SN |
4399 | clk_prepare_unlock(); |
4400 | } | |
1df5c939 MB |
4401 | EXPORT_SYMBOL_GPL(clk_unregister); |
4402 | ||
4143804c SB |
4403 | /** |
4404 | * clk_hw_unregister - unregister a currently registered clk_hw | |
4405 | * @hw: hardware-specific clock data to unregister | |
4406 | */ | |
4407 | void clk_hw_unregister(struct clk_hw *hw) | |
4408 | { | |
4409 | clk_unregister(hw->clk); | |
4410 | } | |
4411 | EXPORT_SYMBOL_GPL(clk_hw_unregister); | |
4412 | ||
e5a4b9b9 | 4413 | static void devm_clk_unregister_cb(struct device *dev, void *res) |
46c8773a | 4414 | { |
293ba3b4 | 4415 | clk_unregister(*(struct clk **)res); |
46c8773a SB |
4416 | } |
4417 | ||
e5a4b9b9 | 4418 | static void devm_clk_hw_unregister_cb(struct device *dev, void *res) |
4143804c SB |
4419 | { |
4420 | clk_hw_unregister(*(struct clk_hw **)res); | |
4421 | } | |
4422 | ||
46c8773a SB |
4423 | /** |
4424 | * devm_clk_register - resource managed clk_register() | |
4425 | * @dev: device that is registering this clock | |
4426 | * @hw: link to hardware-specific clock data | |
4427 | * | |
9fe9b7ab SB |
4428 | * Managed clk_register(). This function is *deprecated*, use devm_clk_hw_register() instead. |
4429 | * | |
4430 | * Clocks returned from this function are automatically clk_unregister()ed on | |
4431 | * driver detach. See clk_register() for more information. | |
46c8773a SB |
4432 | */ |
4433 | struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) | |
4434 | { | |
4435 | struct clk *clk; | |
293ba3b4 | 4436 | struct clk **clkp; |
46c8773a | 4437 | |
e5a4b9b9 | 4438 | clkp = devres_alloc(devm_clk_unregister_cb, sizeof(*clkp), GFP_KERNEL); |
293ba3b4 | 4439 | if (!clkp) |
46c8773a SB |
4440 | return ERR_PTR(-ENOMEM); |
4441 | ||
293ba3b4 SB |
4442 | clk = clk_register(dev, hw); |
4443 | if (!IS_ERR(clk)) { | |
4444 | *clkp = clk; | |
4445 | devres_add(dev, clkp); | |
46c8773a | 4446 | } else { |
293ba3b4 | 4447 | devres_free(clkp); |
46c8773a SB |
4448 | } |
4449 | ||
4450 | return clk; | |
4451 | } | |
4452 | EXPORT_SYMBOL_GPL(devm_clk_register); | |
4453 | ||
4143804c SB |
4454 | /** |
4455 | * devm_clk_hw_register - resource managed clk_hw_register() | |
4456 | * @dev: device that is registering this clock | |
4457 | * @hw: link to hardware-specific clock data | |
4458 | * | |
c47265ad | 4459 | * Managed clk_hw_register(). Clocks registered by this function are |
4143804c SB |
4460 | * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register() |
4461 | * for more information. | |
4462 | */ | |
4463 | int devm_clk_hw_register(struct device *dev, struct clk_hw *hw) | |
4464 | { | |
4465 | struct clk_hw **hwp; | |
4466 | int ret; | |
4467 | ||
e5a4b9b9 | 4468 | hwp = devres_alloc(devm_clk_hw_unregister_cb, sizeof(*hwp), GFP_KERNEL); |
4143804c SB |
4469 | if (!hwp) |
4470 | return -ENOMEM; | |
4471 | ||
4472 | ret = clk_hw_register(dev, hw); | |
4473 | if (!ret) { | |
4474 | *hwp = hw; | |
4475 | devres_add(dev, hwp); | |
4476 | } else { | |
4477 | devres_free(hwp); | |
4478 | } | |
4479 | ||
4480 | return ret; | |
4481 | } | |
4482 | EXPORT_SYMBOL_GPL(devm_clk_hw_register); | |
4483 | ||
30d6f8c1 JB |
4484 | static void devm_clk_release(struct device *dev, void *res) |
4485 | { | |
4486 | clk_put(*(struct clk **)res); | |
4487 | } | |
4488 | ||
4489 | /** | |
4490 | * devm_clk_hw_get_clk - resource managed clk_hw_get_clk() | |
4491 | * @dev: device that is registering this clock | |
4492 | * @hw: clk_hw associated with the clk being consumed | |
4493 | * @con_id: connection ID string on device | |
4494 | * | |
4495 | * Managed clk_hw_get_clk(). Clocks got with this function are | |
4496 | * automatically clk_put() on driver detach. See clk_put() | |
4497 | * for more information. | |
4498 | */ | |
4499 | struct clk *devm_clk_hw_get_clk(struct device *dev, struct clk_hw *hw, | |
4500 | const char *con_id) | |
4501 | { | |
4502 | struct clk *clk; | |
4503 | struct clk **clkp; | |
4504 | ||
4505 | /* This should not happen because it would mean we have drivers | |
4506 | * passing around clk_hw pointers instead of having the caller use | |
4507 | * proper clk_get() style APIs | |
4508 | */ | |
4509 | WARN_ON_ONCE(dev != hw->core->dev); | |
4510 | ||
4511 | clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); | |
4512 | if (!clkp) | |
4513 | return ERR_PTR(-ENOMEM); | |
4514 | ||
4515 | clk = clk_hw_get_clk(hw, con_id); | |
4516 | if (!IS_ERR(clk)) { | |
4517 | *clkp = clk; | |
4518 | devres_add(dev, clkp); | |
4519 | } else { | |
4520 | devres_free(clkp); | |
4521 | } | |
4522 | ||
4523 | return clk; | |
4524 | } | |
4525 | EXPORT_SYMBOL_GPL(devm_clk_hw_get_clk); | |
4526 | ||
ac2df527 SN |
4527 | /* |
4528 | * clkdev helpers | |
4529 | */ | |
ac2df527 SN |
4530 | |
4531 | void __clk_put(struct clk *clk) | |
4532 | { | |
10cdfe54 TV |
4533 | struct module *owner; |
4534 | ||
00efcb1c | 4535 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
ac2df527 SN |
4536 | return; |
4537 | ||
fcb0ee6a | 4538 | clk_prepare_lock(); |
1c8e6004 | 4539 | |
55e9b8b7 JB |
4540 | /* |
4541 | * Before calling clk_put, all calls to clk_rate_exclusive_get() from a | |
4542 | * given user should be balanced with calls to clk_rate_exclusive_put() | |
4543 | * and by that same consumer | |
4544 | */ | |
4545 | if (WARN_ON(clk->exclusive_count)) { | |
4546 | /* We voiced our concern, let's sanitize the situation */ | |
4547 | clk->core->protect_count -= (clk->exclusive_count - 1); | |
4548 | clk_core_rate_unprotect(clk->core); | |
4549 | clk->exclusive_count = 0; | |
4550 | } | |
4551 | ||
50595f8b | 4552 | hlist_del(&clk->clks_node); |
d7738822 MR |
4553 | |
4554 | /* If we had any boundaries on that clock, let's drop them. */ | |
4555 | if (clk->min_rate > 0 || clk->max_rate < ULONG_MAX) | |
4556 | clk_set_rate_range_nolock(clk, 0, ULONG_MAX); | |
ec02ace8 | 4557 | |
1c8e6004 TV |
4558 | owner = clk->core->owner; |
4559 | kref_put(&clk->core->ref, __clk_release); | |
4560 | ||
fcb0ee6a SN |
4561 | clk_prepare_unlock(); |
4562 | ||
10cdfe54 | 4563 | module_put(owner); |
035a61c3 | 4564 | |
1df4046a | 4565 | free_clk(clk); |
ac2df527 SN |
4566 | } |
4567 | ||
b2476490 MT |
4568 | /*** clk rate change notifiers ***/ |
4569 | ||
4570 | /** | |
4571 | * clk_notifier_register - add a clk rate change notifier | |
4572 | * @clk: struct clk * to watch | |
4573 | * @nb: struct notifier_block * with callback info | |
4574 | * | |
4575 | * Request notification when clk's rate changes. This uses an SRCU | |
4576 | * notifier because we want it to block and notifier unregistrations are | |
4577 | * uncommon. The callbacks associated with the notifier must not | |
4578 | * re-enter into the clk framework by calling any top-level clk APIs; | |
4579 | * this will cause a nested prepare_lock mutex. | |
4580 | * | |
198bb594 MY |
4581 | * In all notification cases (pre, post and abort rate change) the original |
4582 | * clock rate is passed to the callback via struct clk_notifier_data.old_rate | |
4583 | * and the new frequency is passed via struct clk_notifier_data.new_rate. | |
b2476490 | 4584 | * |
b2476490 MT |
4585 | * clk_notifier_register() must be called from non-atomic context. |
4586 | * Returns -EINVAL if called with null arguments, -ENOMEM upon | |
4587 | * allocation failure; otherwise, passes along the return value of | |
4588 | * srcu_notifier_chain_register(). | |
4589 | */ | |
4590 | int clk_notifier_register(struct clk *clk, struct notifier_block *nb) | |
4591 | { | |
4592 | struct clk_notifier *cn; | |
4593 | int ret = -ENOMEM; | |
4594 | ||
4595 | if (!clk || !nb) | |
4596 | return -EINVAL; | |
4597 | ||
eab89f69 | 4598 | clk_prepare_lock(); |
b2476490 MT |
4599 | |
4600 | /* search the list of notifiers for this clk */ | |
4601 | list_for_each_entry(cn, &clk_notifier_list, node) | |
4602 | if (cn->clk == clk) | |
8d3c0c01 | 4603 | goto found; |
b2476490 MT |
4604 | |
4605 | /* if clk wasn't in the notifier list, allocate new clk_notifier */ | |
8d3c0c01 LB |
4606 | cn = kzalloc(sizeof(*cn), GFP_KERNEL); |
4607 | if (!cn) | |
4608 | goto out; | |
b2476490 | 4609 | |
8d3c0c01 LB |
4610 | cn->clk = clk; |
4611 | srcu_init_notifier_head(&cn->notifier_head); | |
b2476490 | 4612 | |
8d3c0c01 | 4613 | list_add(&cn->node, &clk_notifier_list); |
b2476490 | 4614 | |
8d3c0c01 | 4615 | found: |
b2476490 MT |
4616 | ret = srcu_notifier_chain_register(&cn->notifier_head, nb); |
4617 | ||
035a61c3 | 4618 | clk->core->notifier_count++; |
b2476490 MT |
4619 | |
4620 | out: | |
eab89f69 | 4621 | clk_prepare_unlock(); |
b2476490 MT |
4622 | |
4623 | return ret; | |
4624 | } | |
4625 | EXPORT_SYMBOL_GPL(clk_notifier_register); | |
4626 | ||
4627 | /** | |
4628 | * clk_notifier_unregister - remove a clk rate change notifier | |
4629 | * @clk: struct clk * | |
4630 | * @nb: struct notifier_block * with callback info | |
4631 | * | |
4632 | * Request no further notification for changes to 'clk' and frees memory | |
4633 | * allocated in clk_notifier_register. | |
4634 | * | |
4635 | * Returns -EINVAL if called with null arguments; otherwise, passes | |
4636 | * along the return value of srcu_notifier_chain_unregister(). | |
4637 | */ | |
4638 | int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) | |
4639 | { | |
70454655 LB |
4640 | struct clk_notifier *cn; |
4641 | int ret = -ENOENT; | |
b2476490 MT |
4642 | |
4643 | if (!clk || !nb) | |
4644 | return -EINVAL; | |
4645 | ||
eab89f69 | 4646 | clk_prepare_lock(); |
b2476490 | 4647 | |
70454655 LB |
4648 | list_for_each_entry(cn, &clk_notifier_list, node) { |
4649 | if (cn->clk == clk) { | |
4650 | ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); | |
b2476490 | 4651 | |
70454655 | 4652 | clk->core->notifier_count--; |
b2476490 | 4653 | |
70454655 LB |
4654 | /* XXX the notifier code should handle this better */ |
4655 | if (!cn->notifier_head.head) { | |
4656 | srcu_cleanup_notifier_head(&cn->notifier_head); | |
4657 | list_del(&cn->node); | |
4658 | kfree(cn); | |
4659 | } | |
4660 | break; | |
b2476490 | 4661 | } |
b2476490 MT |
4662 | } |
4663 | ||
eab89f69 | 4664 | clk_prepare_unlock(); |
b2476490 MT |
4665 | |
4666 | return ret; | |
4667 | } | |
4668 | EXPORT_SYMBOL_GPL(clk_notifier_unregister); | |
766e6a4e | 4669 | |
6d30d50d JB |
4670 | struct clk_notifier_devres { |
4671 | struct clk *clk; | |
4672 | struct notifier_block *nb; | |
4673 | }; | |
4674 | ||
4675 | static void devm_clk_notifier_release(struct device *dev, void *res) | |
4676 | { | |
4677 | struct clk_notifier_devres *devres = res; | |
4678 | ||
4679 | clk_notifier_unregister(devres->clk, devres->nb); | |
4680 | } | |
4681 | ||
4682 | int devm_clk_notifier_register(struct device *dev, struct clk *clk, | |
4683 | struct notifier_block *nb) | |
4684 | { | |
4685 | struct clk_notifier_devres *devres; | |
4686 | int ret; | |
4687 | ||
4688 | devres = devres_alloc(devm_clk_notifier_release, | |
4689 | sizeof(*devres), GFP_KERNEL); | |
4690 | ||
4691 | if (!devres) | |
4692 | return -ENOMEM; | |
4693 | ||
4694 | ret = clk_notifier_register(clk, nb); | |
4695 | if (!ret) { | |
4696 | devres->clk = clk; | |
4697 | devres->nb = nb; | |
4698 | } else { | |
4699 | devres_free(devres); | |
4700 | } | |
4701 | ||
4702 | return ret; | |
4703 | } | |
4704 | EXPORT_SYMBOL_GPL(devm_clk_notifier_register); | |
4705 | ||
766e6a4e | 4706 | #ifdef CONFIG_OF |
c771256e OJ |
4707 | static void clk_core_reparent_orphans(void) |
4708 | { | |
4709 | clk_prepare_lock(); | |
4710 | clk_core_reparent_orphans_nolock(); | |
4711 | clk_prepare_unlock(); | |
4712 | } | |
4713 | ||
766e6a4e GL |
4714 | /** |
4715 | * struct of_clk_provider - Clock provider registration structure | |
4716 | * @link: Entry in global list of clock providers | |
4717 | * @node: Pointer to device tree node of clock provider | |
4718 | * @get: Get clock callback. Returns NULL or a struct clk for the | |
4719 | * given clock specifier | |
6378cfdc SB |
4720 | * @get_hw: Get clk_hw callback. Returns NULL, ERR_PTR or a |
4721 | * struct clk_hw for the given clock specifier | |
766e6a4e GL |
4722 | * @data: context pointer to be passed into @get callback |
4723 | */ | |
4724 | struct of_clk_provider { | |
4725 | struct list_head link; | |
4726 | ||
4727 | struct device_node *node; | |
4728 | struct clk *(*get)(struct of_phandle_args *clkspec, void *data); | |
0861e5b8 | 4729 | struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data); |
766e6a4e GL |
4730 | void *data; |
4731 | }; | |
4732 | ||
30d5a945 | 4733 | extern struct of_device_id __clk_of_table; |
f2f6c255 | 4734 | static const struct of_device_id __clk_of_table_sentinel |
33def849 | 4735 | __used __section("__clk_of_table_end"); |
f2f6c255 | 4736 | |
766e6a4e | 4737 | static LIST_HEAD(of_clk_providers); |
d6782c26 SN |
4738 | static DEFINE_MUTEX(of_clk_mutex); |
4739 | ||
766e6a4e GL |
4740 | struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, |
4741 | void *data) | |
4742 | { | |
4743 | return data; | |
4744 | } | |
4745 | EXPORT_SYMBOL_GPL(of_clk_src_simple_get); | |
4746 | ||
0861e5b8 SB |
4747 | struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data) |
4748 | { | |
4749 | return data; | |
4750 | } | |
4751 | EXPORT_SYMBOL_GPL(of_clk_hw_simple_get); | |
4752 | ||
494bfec9 SG |
4753 | struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data) |
4754 | { | |
4755 | struct clk_onecell_data *clk_data = data; | |
4756 | unsigned int idx = clkspec->args[0]; | |
4757 | ||
4758 | if (idx >= clk_data->clk_num) { | |
7e96353c | 4759 | pr_err("%s: invalid clock index %u\n", __func__, idx); |
494bfec9 SG |
4760 | return ERR_PTR(-EINVAL); |
4761 | } | |
4762 | ||
4763 | return clk_data->clks[idx]; | |
4764 | } | |
4765 | EXPORT_SYMBOL_GPL(of_clk_src_onecell_get); | |
4766 | ||
0861e5b8 SB |
4767 | struct clk_hw * |
4768 | of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data) | |
4769 | { | |
4770 | struct clk_hw_onecell_data *hw_data = data; | |
4771 | unsigned int idx = clkspec->args[0]; | |
4772 | ||
4773 | if (idx >= hw_data->num) { | |
4774 | pr_err("%s: invalid index %u\n", __func__, idx); | |
4775 | return ERR_PTR(-EINVAL); | |
4776 | } | |
4777 | ||
4778 | return hw_data->hws[idx]; | |
4779 | } | |
4780 | EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get); | |
4781 | ||
766e6a4e GL |
4782 | /** |
4783 | * of_clk_add_provider() - Register a clock provider for a node | |
4784 | * @np: Device node pointer associated with clock provider | |
4785 | * @clk_src_get: callback for decoding clock | |
4786 | * @data: context pointer for @clk_src_get callback. | |
9fe9b7ab SB |
4787 | * |
4788 | * This function is *deprecated*. Use of_clk_add_hw_provider() instead. | |
766e6a4e GL |
4789 | */ |
4790 | int of_clk_add_provider(struct device_node *np, | |
4791 | struct clk *(*clk_src_get)(struct of_phandle_args *clkspec, | |
4792 | void *data), | |
4793 | void *data) | |
4794 | { | |
4795 | struct of_clk_provider *cp; | |
86be408b | 4796 | int ret; |
766e6a4e | 4797 | |
bb4031b8 TA |
4798 | if (!np) |
4799 | return 0; | |
4800 | ||
1808a320 | 4801 | cp = kzalloc(sizeof(*cp), GFP_KERNEL); |
766e6a4e GL |
4802 | if (!cp) |
4803 | return -ENOMEM; | |
4804 | ||
4805 | cp->node = of_node_get(np); | |
4806 | cp->data = data; | |
4807 | cp->get = clk_src_get; | |
4808 | ||
d6782c26 | 4809 | mutex_lock(&of_clk_mutex); |
766e6a4e | 4810 | list_add(&cp->link, &of_clk_providers); |
d6782c26 | 4811 | mutex_unlock(&of_clk_mutex); |
16673931 | 4812 | pr_debug("Added clock from %pOF\n", np); |
766e6a4e | 4813 | |
66d95064 JB |
4814 | clk_core_reparent_orphans(); |
4815 | ||
86be408b SN |
4816 | ret = of_clk_set_defaults(np, true); |
4817 | if (ret < 0) | |
4818 | of_clk_del_provider(np); | |
4819 | ||
3c9ea428 SK |
4820 | fwnode_dev_initialized(&np->fwnode, true); |
4821 | ||
86be408b | 4822 | return ret; |
766e6a4e GL |
4823 | } |
4824 | EXPORT_SYMBOL_GPL(of_clk_add_provider); | |
4825 | ||
0861e5b8 SB |
4826 | /** |
4827 | * of_clk_add_hw_provider() - Register a clock provider for a node | |
4828 | * @np: Device node pointer associated with clock provider | |
4829 | * @get: callback for decoding clk_hw | |
4830 | * @data: context pointer for @get callback. | |
4831 | */ | |
4832 | int of_clk_add_hw_provider(struct device_node *np, | |
4833 | struct clk_hw *(*get)(struct of_phandle_args *clkspec, | |
4834 | void *data), | |
4835 | void *data) | |
4836 | { | |
4837 | struct of_clk_provider *cp; | |
4838 | int ret; | |
4839 | ||
bb4031b8 TA |
4840 | if (!np) |
4841 | return 0; | |
4842 | ||
0861e5b8 SB |
4843 | cp = kzalloc(sizeof(*cp), GFP_KERNEL); |
4844 | if (!cp) | |
4845 | return -ENOMEM; | |
4846 | ||
4847 | cp->node = of_node_get(np); | |
4848 | cp->data = data; | |
4849 | cp->get_hw = get; | |
4850 | ||
4851 | mutex_lock(&of_clk_mutex); | |
4852 | list_add(&cp->link, &of_clk_providers); | |
4853 | mutex_unlock(&of_clk_mutex); | |
16673931 | 4854 | pr_debug("Added clk_hw provider from %pOF\n", np); |
0861e5b8 | 4855 | |
66d95064 JB |
4856 | clk_core_reparent_orphans(); |
4857 | ||
0861e5b8 SB |
4858 | ret = of_clk_set_defaults(np, true); |
4859 | if (ret < 0) | |
4860 | of_clk_del_provider(np); | |
4861 | ||
6579c8d9 TA |
4862 | fwnode_dev_initialized(&np->fwnode, true); |
4863 | ||
0861e5b8 SB |
4864 | return ret; |
4865 | } | |
4866 | EXPORT_SYMBOL_GPL(of_clk_add_hw_provider); | |
4867 | ||
aa795c41 SB |
4868 | static void devm_of_clk_release_provider(struct device *dev, void *res) |
4869 | { | |
4870 | of_clk_del_provider(*(struct device_node **)res); | |
4871 | } | |
4872 | ||
05502bf9 MV |
4873 | /* |
4874 | * We allow a child device to use its parent device as the clock provider node | |
4875 | * for cases like MFD sub-devices where the child device driver wants to use | |
4876 | * devm_*() APIs but not list the device in DT as a sub-node. | |
4877 | */ | |
4878 | static struct device_node *get_clk_provider_node(struct device *dev) | |
4879 | { | |
4880 | struct device_node *np, *parent_np; | |
4881 | ||
4882 | np = dev->of_node; | |
4883 | parent_np = dev->parent ? dev->parent->of_node : NULL; | |
4884 | ||
d02fddf2 RH |
4885 | if (!of_property_present(np, "#clock-cells")) |
4886 | if (of_property_present(parent_np, "#clock-cells")) | |
05502bf9 MV |
4887 | np = parent_np; |
4888 | ||
4889 | return np; | |
4890 | } | |
4891 | ||
e45838b5 MV |
4892 | /** |
4893 | * devm_of_clk_add_hw_provider() - Managed clk provider node registration | |
4894 | * @dev: Device acting as the clock provider (used for DT node and lifetime) | |
4895 | * @get: callback for decoding clk_hw | |
4896 | * @data: context pointer for @get callback | |
4897 | * | |
05502bf9 MV |
4898 | * Registers clock provider for given device's node. If the device has no DT |
4899 | * node or if the device node lacks of clock provider information (#clock-cells) | |
4900 | * then the parent device's node is scanned for this information. If parent node | |
4901 | * has the #clock-cells then it is used in registration. Provider is | |
4902 | * automatically released at device exit. | |
e45838b5 MV |
4903 | * |
4904 | * Return: 0 on success or an errno on failure. | |
4905 | */ | |
aa795c41 SB |
4906 | int devm_of_clk_add_hw_provider(struct device *dev, |
4907 | struct clk_hw *(*get)(struct of_phandle_args *clkspec, | |
4908 | void *data), | |
4909 | void *data) | |
4910 | { | |
4911 | struct device_node **ptr, *np; | |
4912 | int ret; | |
4913 | ||
4914 | ptr = devres_alloc(devm_of_clk_release_provider, sizeof(*ptr), | |
4915 | GFP_KERNEL); | |
4916 | if (!ptr) | |
4917 | return -ENOMEM; | |
4918 | ||
05502bf9 | 4919 | np = get_clk_provider_node(dev); |
aa795c41 SB |
4920 | ret = of_clk_add_hw_provider(np, get, data); |
4921 | if (!ret) { | |
4922 | *ptr = np; | |
4923 | devres_add(dev, ptr); | |
4924 | } else { | |
4925 | devres_free(ptr); | |
4926 | } | |
4927 | ||
4928 | return ret; | |
4929 | } | |
4930 | EXPORT_SYMBOL_GPL(devm_of_clk_add_hw_provider); | |
4931 | ||
766e6a4e GL |
4932 | /** |
4933 | * of_clk_del_provider() - Remove a previously registered clock provider | |
4934 | * @np: Device node pointer associated with clock provider | |
4935 | */ | |
4936 | void of_clk_del_provider(struct device_node *np) | |
4937 | { | |
4938 | struct of_clk_provider *cp; | |
4939 | ||
bb4031b8 TA |
4940 | if (!np) |
4941 | return; | |
4942 | ||
d6782c26 | 4943 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
4944 | list_for_each_entry(cp, &of_clk_providers, link) { |
4945 | if (cp->node == np) { | |
4946 | list_del(&cp->link); | |
3c9ea428 | 4947 | fwnode_dev_initialized(&np->fwnode, false); |
766e6a4e GL |
4948 | of_node_put(cp->node); |
4949 | kfree(cp); | |
4950 | break; | |
4951 | } | |
4952 | } | |
d6782c26 | 4953 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
4954 | } |
4955 | EXPORT_SYMBOL_GPL(of_clk_del_provider); | |
4956 | ||
226fd702 SB |
4957 | /** |
4958 | * of_parse_clkspec() - Parse a DT clock specifier for a given device node | |
4959 | * @np: device node to parse clock specifier from | |
4960 | * @index: index of phandle to parse clock out of. If index < 0, @name is used | |
4961 | * @name: clock name to find and parse. If name is NULL, the index is used | |
4962 | * @out_args: Result of parsing the clock specifier | |
4963 | * | |
4964 | * Parses a device node's "clocks" and "clock-names" properties to find the | |
4965 | * phandle and cells for the index or name that is desired. The resulting clock | |
4966 | * specifier is placed into @out_args, or an errno is returned when there's a | |
4967 | * parsing error. The @index argument is ignored if @name is non-NULL. | |
4968 | * | |
4969 | * Example: | |
4970 | * | |
4971 | * phandle1: clock-controller@1 { | |
4972 | * #clock-cells = <2>; | |
4973 | * } | |
4974 | * | |
4975 | * phandle2: clock-controller@2 { | |
4976 | * #clock-cells = <1>; | |
4977 | * } | |
4978 | * | |
4979 | * clock-consumer@3 { | |
4980 | * clocks = <&phandle1 1 2 &phandle2 3>; | |
4981 | * clock-names = "name1", "name2"; | |
4982 | * } | |
4983 | * | |
4984 | * To get a device_node for `clock-controller@2' node you may call this | |
4985 | * function a few different ways: | |
4986 | * | |
4987 | * of_parse_clkspec(clock-consumer@3, -1, "name2", &args); | |
4988 | * of_parse_clkspec(clock-consumer@3, 1, NULL, &args); | |
4989 | * of_parse_clkspec(clock-consumer@3, 1, "name2", &args); | |
4990 | * | |
4991 | * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT | |
4992 | * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in | |
4993 | * the "clock-names" property of @np. | |
5dc7e842 | 4994 | */ |
cf13f289 SB |
4995 | static int of_parse_clkspec(const struct device_node *np, int index, |
4996 | const char *name, struct of_phandle_args *out_args) | |
4472287a SB |
4997 | { |
4998 | int ret = -ENOENT; | |
4999 | ||
5000 | /* Walk up the tree of devices looking for a clock property that matches */ | |
5001 | while (np) { | |
5002 | /* | |
5003 | * For named clocks, first look up the name in the | |
5004 | * "clock-names" property. If it cannot be found, then index | |
5005 | * will be an error code and of_parse_phandle_with_args() will | |
5006 | * return -EINVAL. | |
5007 | */ | |
5008 | if (name) | |
5009 | index = of_property_match_string(np, "clock-names", name); | |
5010 | ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells", | |
5011 | index, out_args); | |
5012 | if (!ret) | |
5013 | break; | |
5014 | if (name && index >= 0) | |
5015 | break; | |
5016 | ||
5017 | /* | |
5018 | * No matching clock found on this node. If the parent node | |
5019 | * has a "clock-ranges" property, then we can try one of its | |
5020 | * clocks. | |
5021 | */ | |
5022 | np = np->parent; | |
5023 | if (np && !of_get_property(np, "clock-ranges", NULL)) | |
5024 | break; | |
5025 | index = 0; | |
5026 | } | |
5027 | ||
5028 | return ret; | |
5029 | } | |
5030 | ||
0861e5b8 SB |
5031 | static struct clk_hw * |
5032 | __of_clk_get_hw_from_provider(struct of_clk_provider *provider, | |
5033 | struct of_phandle_args *clkspec) | |
5034 | { | |
5035 | struct clk *clk; | |
0861e5b8 | 5036 | |
74002fcd SB |
5037 | if (provider->get_hw) |
5038 | return provider->get_hw(clkspec, provider->data); | |
0861e5b8 | 5039 | |
74002fcd SB |
5040 | clk = provider->get(clkspec, provider->data); |
5041 | if (IS_ERR(clk)) | |
5042 | return ERR_CAST(clk); | |
5043 | return __clk_get_hw(clk); | |
0861e5b8 SB |
5044 | } |
5045 | ||
cf13f289 SB |
5046 | static struct clk_hw * |
5047 | of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec) | |
766e6a4e GL |
5048 | { |
5049 | struct of_clk_provider *provider; | |
1df4046a | 5050 | struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER); |
766e6a4e | 5051 | |
306c342f SB |
5052 | if (!clkspec) |
5053 | return ERR_PTR(-EINVAL); | |
5054 | ||
306c342f | 5055 | mutex_lock(&of_clk_mutex); |
766e6a4e | 5056 | list_for_each_entry(provider, &of_clk_providers, link) { |
f155d15b | 5057 | if (provider->node == clkspec->np) { |
0861e5b8 | 5058 | hw = __of_clk_get_hw_from_provider(provider, clkspec); |
1df4046a SB |
5059 | if (!IS_ERR(hw)) |
5060 | break; | |
73e0e496 | 5061 | } |
766e6a4e | 5062 | } |
306c342f | 5063 | mutex_unlock(&of_clk_mutex); |
d6782c26 | 5064 | |
4472287a | 5065 | return hw; |
d6782c26 SN |
5066 | } |
5067 | ||
306c342f SB |
5068 | /** |
5069 | * of_clk_get_from_provider() - Lookup a clock from a clock provider | |
5070 | * @clkspec: pointer to a clock specifier data structure | |
5071 | * | |
5072 | * This function looks up a struct clk from the registered list of clock | |
5073 | * providers, an input is a clock specifier data structure as returned | |
5074 | * from the of_parse_phandle_with_args() function call. | |
5075 | */ | |
d6782c26 SN |
5076 | struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) |
5077 | { | |
4472287a SB |
5078 | struct clk_hw *hw = of_clk_get_hw_from_clkspec(clkspec); |
5079 | ||
efa85048 | 5080 | return clk_hw_create_clk(NULL, hw, NULL, __func__); |
766e6a4e | 5081 | } |
fb4dd222 | 5082 | EXPORT_SYMBOL_GPL(of_clk_get_from_provider); |
766e6a4e | 5083 | |
cf13f289 SB |
5084 | struct clk_hw *of_clk_get_hw(struct device_node *np, int index, |
5085 | const char *con_id) | |
5086 | { | |
5087 | int ret; | |
5088 | struct clk_hw *hw; | |
5089 | struct of_phandle_args clkspec; | |
5090 | ||
5091 | ret = of_parse_clkspec(np, index, con_id, &clkspec); | |
5092 | if (ret) | |
5093 | return ERR_PTR(ret); | |
5094 | ||
5095 | hw = of_clk_get_hw_from_clkspec(&clkspec); | |
5096 | of_node_put(clkspec.np); | |
5097 | ||
5098 | return hw; | |
5099 | } | |
5100 | ||
5101 | static struct clk *__of_clk_get(struct device_node *np, | |
5102 | int index, const char *dev_id, | |
5103 | const char *con_id) | |
5104 | { | |
5105 | struct clk_hw *hw = of_clk_get_hw(np, index, con_id); | |
5106 | ||
5107 | return clk_hw_create_clk(NULL, hw, dev_id, con_id); | |
5108 | } | |
5109 | ||
5110 | struct clk *of_clk_get(struct device_node *np, int index) | |
5111 | { | |
5112 | return __of_clk_get(np, index, np->full_name, NULL); | |
5113 | } | |
5114 | EXPORT_SYMBOL(of_clk_get); | |
5115 | ||
5116 | /** | |
5117 | * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node | |
5118 | * @np: pointer to clock consumer node | |
5119 | * @name: name of consumer's clock input, or NULL for the first clock reference | |
5120 | * | |
5121 | * This function parses the clocks and clock-names properties, | |
5122 | * and uses them to look up the struct clk from the registered list of clock | |
5123 | * providers. | |
5124 | */ | |
5125 | struct clk *of_clk_get_by_name(struct device_node *np, const char *name) | |
5126 | { | |
5127 | if (!np) | |
5128 | return ERR_PTR(-ENOENT); | |
5129 | ||
65cf20ad | 5130 | return __of_clk_get(np, 0, np->full_name, name); |
cf13f289 SB |
5131 | } |
5132 | EXPORT_SYMBOL(of_clk_get_by_name); | |
5133 | ||
929e7f3b SB |
5134 | /** |
5135 | * of_clk_get_parent_count() - Count the number of clocks a device node has | |
5136 | * @np: device node to count | |
5137 | * | |
5138 | * Returns: The number of clocks that are possible parents of this node | |
5139 | */ | |
4a4472fd | 5140 | unsigned int of_clk_get_parent_count(const struct device_node *np) |
f6102742 | 5141 | { |
929e7f3b SB |
5142 | int count; |
5143 | ||
5144 | count = of_count_phandle_with_args(np, "clocks", "#clock-cells"); | |
5145 | if (count < 0) | |
5146 | return 0; | |
5147 | ||
5148 | return count; | |
f6102742 MT |
5149 | } |
5150 | EXPORT_SYMBOL_GPL(of_clk_get_parent_count); | |
5151 | ||
4a4472fd | 5152 | const char *of_clk_get_parent_name(const struct device_node *np, int index) |
766e6a4e GL |
5153 | { |
5154 | struct of_phandle_args clkspec; | |
7a0fc1a3 | 5155 | struct property *prop; |
766e6a4e | 5156 | const char *clk_name; |
7a0fc1a3 BD |
5157 | const __be32 *vp; |
5158 | u32 pv; | |
766e6a4e | 5159 | int rc; |
7a0fc1a3 | 5160 | int count; |
0a4807c2 | 5161 | struct clk *clk; |
766e6a4e | 5162 | |
766e6a4e GL |
5163 | rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, |
5164 | &clkspec); | |
5165 | if (rc) | |
5166 | return NULL; | |
5167 | ||
7a0fc1a3 BD |
5168 | index = clkspec.args_count ? clkspec.args[0] : 0; |
5169 | count = 0; | |
5170 | ||
5171 | /* if there is an indices property, use it to transfer the index | |
5172 | * specified into an array offset for the clock-output-names property. | |
5173 | */ | |
5174 | of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { | |
5175 | if (index == pv) { | |
5176 | index = count; | |
5177 | break; | |
5178 | } | |
5179 | count++; | |
5180 | } | |
8da411cc MY |
5181 | /* We went off the end of 'clock-indices' without finding it */ |
5182 | if (prop && !vp) | |
5183 | return NULL; | |
7a0fc1a3 | 5184 | |
766e6a4e | 5185 | if (of_property_read_string_index(clkspec.np, "clock-output-names", |
7a0fc1a3 | 5186 | index, |
0a4807c2 SB |
5187 | &clk_name) < 0) { |
5188 | /* | |
5189 | * Best effort to get the name if the clock has been | |
5190 | * registered with the framework. If the clock isn't | |
5191 | * registered, we return the node name as the name of | |
5192 | * the clock as long as #clock-cells = 0. | |
5193 | */ | |
5194 | clk = of_clk_get_from_provider(&clkspec); | |
5195 | if (IS_ERR(clk)) { | |
5196 | if (clkspec.args_count == 0) | |
5197 | clk_name = clkspec.np->name; | |
5198 | else | |
5199 | clk_name = NULL; | |
5200 | } else { | |
5201 | clk_name = __clk_get_name(clk); | |
5202 | clk_put(clk); | |
5203 | } | |
5204 | } | |
5205 | ||
766e6a4e GL |
5206 | |
5207 | of_node_put(clkspec.np); | |
5208 | return clk_name; | |
5209 | } | |
5210 | EXPORT_SYMBOL_GPL(of_clk_get_parent_name); | |
5211 | ||
2e61dfb3 DN |
5212 | /** |
5213 | * of_clk_parent_fill() - Fill @parents with names of @np's parents and return | |
5214 | * number of parents | |
5215 | * @np: Device node pointer associated with clock provider | |
5216 | * @parents: pointer to char array that hold the parents' names | |
5217 | * @size: size of the @parents array | |
5218 | * | |
5219 | * Return: number of parents for the clock node. | |
5220 | */ | |
5221 | int of_clk_parent_fill(struct device_node *np, const char **parents, | |
5222 | unsigned int size) | |
5223 | { | |
5224 | unsigned int i = 0; | |
5225 | ||
5226 | while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL) | |
5227 | i++; | |
5228 | ||
5229 | return i; | |
5230 | } | |
5231 | EXPORT_SYMBOL_GPL(of_clk_parent_fill); | |
5232 | ||
1771b10d | 5233 | struct clock_provider { |
a5970433 | 5234 | void (*clk_init_cb)(struct device_node *); |
1771b10d GC |
5235 | struct device_node *np; |
5236 | struct list_head node; | |
5237 | }; | |
5238 | ||
1771b10d GC |
5239 | /* |
5240 | * This function looks for a parent clock. If there is one, then it | |
5241 | * checks that the provider for this parent clock was initialized, in | |
5242 | * this case the parent clock will be ready. | |
5243 | */ | |
5244 | static int parent_ready(struct device_node *np) | |
5245 | { | |
5246 | int i = 0; | |
5247 | ||
5248 | while (true) { | |
5249 | struct clk *clk = of_clk_get(np, i); | |
5250 | ||
5251 | /* this parent is ready we can check the next one */ | |
5252 | if (!IS_ERR(clk)) { | |
5253 | clk_put(clk); | |
5254 | i++; | |
5255 | continue; | |
5256 | } | |
5257 | ||
5258 | /* at least one parent is not ready, we exit now */ | |
5259 | if (PTR_ERR(clk) == -EPROBE_DEFER) | |
5260 | return 0; | |
5261 | ||
5262 | /* | |
5263 | * Here we make assumption that the device tree is | |
5264 | * written correctly. So an error means that there is | |
5265 | * no more parent. As we didn't exit yet, then the | |
5266 | * previous parent are ready. If there is no clock | |
5267 | * parent, no need to wait for them, then we can | |
5268 | * consider their absence as being ready | |
5269 | */ | |
5270 | return 1; | |
5271 | } | |
5272 | } | |
5273 | ||
d56f8994 LJ |
5274 | /** |
5275 | * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree | |
5276 | * @np: Device node pointer associated with clock provider | |
5277 | * @index: clock index | |
f7ae7503 | 5278 | * @flags: pointer to top-level framework flags |
d56f8994 LJ |
5279 | * |
5280 | * Detects if the clock-critical property exists and, if so, sets the | |
5281 | * corresponding CLK_IS_CRITICAL flag. | |
5282 | * | |
5283 | * Do not use this function. It exists only for legacy Device Tree | |
5284 | * bindings, such as the one-clock-per-node style that are outdated. | |
5285 | * Those bindings typically put all clock data into .dts and the Linux | |
5286 | * driver has no clock data, thus making it impossible to set this flag | |
5287 | * correctly from the driver. Only those drivers may call | |
5288 | * of_clk_detect_critical from their setup functions. | |
5289 | * | |
5290 | * Return: error code or zero on success | |
5291 | */ | |
be545c79 GU |
5292 | int of_clk_detect_critical(struct device_node *np, int index, |
5293 | unsigned long *flags) | |
d56f8994 LJ |
5294 | { |
5295 | struct property *prop; | |
5296 | const __be32 *cur; | |
5297 | uint32_t idx; | |
5298 | ||
5299 | if (!np || !flags) | |
5300 | return -EINVAL; | |
5301 | ||
5302 | of_property_for_each_u32(np, "clock-critical", prop, cur, idx) | |
5303 | if (index == idx) | |
5304 | *flags |= CLK_IS_CRITICAL; | |
5305 | ||
5306 | return 0; | |
5307 | } | |
5308 | ||
766e6a4e GL |
5309 | /** |
5310 | * of_clk_init() - Scan and init clock providers from the DT | |
5311 | * @matches: array of compatible values and init functions for providers. | |
5312 | * | |
1771b10d | 5313 | * This function scans the device tree for matching clock providers |
e5ca8fb4 | 5314 | * and calls their initialization functions. It also does it by trying |
1771b10d | 5315 | * to follow the dependencies. |
766e6a4e GL |
5316 | */ |
5317 | void __init of_clk_init(const struct of_device_id *matches) | |
5318 | { | |
7f7ed584 | 5319 | const struct of_device_id *match; |
766e6a4e | 5320 | struct device_node *np; |
1771b10d GC |
5321 | struct clock_provider *clk_provider, *next; |
5322 | bool is_init_done; | |
5323 | bool force = false; | |
2573a02a | 5324 | LIST_HEAD(clk_provider_list); |
766e6a4e | 5325 | |
f2f6c255 | 5326 | if (!matches) |
819b4861 | 5327 | matches = &__clk_of_table; |
f2f6c255 | 5328 | |
1771b10d | 5329 | /* First prepare the list of the clocks providers */ |
7f7ed584 | 5330 | for_each_matching_node_and_match(np, matches, &match) { |
2e3b19f1 SB |
5331 | struct clock_provider *parent; |
5332 | ||
3e5dd6f6 GU |
5333 | if (!of_device_is_available(np)) |
5334 | continue; | |
5335 | ||
2e3b19f1 SB |
5336 | parent = kzalloc(sizeof(*parent), GFP_KERNEL); |
5337 | if (!parent) { | |
5338 | list_for_each_entry_safe(clk_provider, next, | |
5339 | &clk_provider_list, node) { | |
5340 | list_del(&clk_provider->node); | |
6bc9d9d6 | 5341 | of_node_put(clk_provider->np); |
2e3b19f1 SB |
5342 | kfree(clk_provider); |
5343 | } | |
6bc9d9d6 | 5344 | of_node_put(np); |
2e3b19f1 SB |
5345 | return; |
5346 | } | |
1771b10d GC |
5347 | |
5348 | parent->clk_init_cb = match->data; | |
6bc9d9d6 | 5349 | parent->np = of_node_get(np); |
3f6d439f | 5350 | list_add_tail(&parent->node, &clk_provider_list); |
1771b10d GC |
5351 | } |
5352 | ||
5353 | while (!list_empty(&clk_provider_list)) { | |
5354 | is_init_done = false; | |
5355 | list_for_each_entry_safe(clk_provider, next, | |
5356 | &clk_provider_list, node) { | |
5357 | if (force || parent_ready(clk_provider->np)) { | |
86be408b | 5358 | |
989eafd0 RRD |
5359 | /* Don't populate platform devices */ |
5360 | of_node_set_flag(clk_provider->np, | |
5361 | OF_POPULATED); | |
5362 | ||
1771b10d | 5363 | clk_provider->clk_init_cb(clk_provider->np); |
86be408b SN |
5364 | of_clk_set_defaults(clk_provider->np, true); |
5365 | ||
1771b10d | 5366 | list_del(&clk_provider->node); |
6bc9d9d6 | 5367 | of_node_put(clk_provider->np); |
1771b10d GC |
5368 | kfree(clk_provider); |
5369 | is_init_done = true; | |
5370 | } | |
5371 | } | |
5372 | ||
5373 | /* | |
e5ca8fb4 | 5374 | * We didn't manage to initialize any of the |
1771b10d GC |
5375 | * remaining providers during the last loop, so now we |
5376 | * initialize all the remaining ones unconditionally | |
5377 | * in case the clock parent was not mandatory | |
5378 | */ | |
5379 | if (!is_init_done) | |
5380 | force = true; | |
766e6a4e GL |
5381 | } |
5382 | } | |
5383 | #endif |