Commit | Line | Data |
---|---|---|
b2476490 MT |
1 | /* |
2 | * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> | |
3 | * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * Standard functionality for the common clock API. See Documentation/clk.txt | |
10 | */ | |
11 | ||
b09d6d99 | 12 | #include <linux/clk-provider.h> |
86be408b | 13 | #include <linux/clk/clk-conf.h> |
b2476490 MT |
14 | #include <linux/module.h> |
15 | #include <linux/mutex.h> | |
16 | #include <linux/spinlock.h> | |
17 | #include <linux/err.h> | |
18 | #include <linux/list.h> | |
19 | #include <linux/slab.h> | |
766e6a4e | 20 | #include <linux/of.h> |
46c8773a | 21 | #include <linux/device.h> |
f2f6c255 | 22 | #include <linux/init.h> |
533ddeb1 | 23 | #include <linux/sched.h> |
b2476490 | 24 | |
d6782c26 SN |
25 | #include "clk.h" |
26 | ||
b2476490 MT |
27 | static DEFINE_SPINLOCK(enable_lock); |
28 | static DEFINE_MUTEX(prepare_lock); | |
29 | ||
533ddeb1 MT |
30 | static struct task_struct *prepare_owner; |
31 | static struct task_struct *enable_owner; | |
32 | ||
33 | static int prepare_refcnt; | |
34 | static int enable_refcnt; | |
35 | ||
b2476490 MT |
36 | static HLIST_HEAD(clk_root_list); |
37 | static HLIST_HEAD(clk_orphan_list); | |
38 | static LIST_HEAD(clk_notifier_list); | |
39 | ||
035a61c3 TV |
40 | static long clk_core_get_accuracy(struct clk_core *clk); |
41 | static unsigned long clk_core_get_rate(struct clk_core *clk); | |
42 | static int clk_core_get_phase(struct clk_core *clk); | |
43 | static bool clk_core_is_prepared(struct clk_core *clk); | |
44 | static bool clk_core_is_enabled(struct clk_core *clk); | |
035a61c3 TV |
45 | static struct clk_core *clk_core_lookup(const char *name); |
46 | ||
b09d6d99 MT |
47 | /*** private data structures ***/ |
48 | ||
49 | struct clk_core { | |
50 | const char *name; | |
51 | const struct clk_ops *ops; | |
52 | struct clk_hw *hw; | |
53 | struct module *owner; | |
54 | struct clk_core *parent; | |
55 | const char **parent_names; | |
56 | struct clk_core **parents; | |
57 | u8 num_parents; | |
58 | u8 new_parent_index; | |
59 | unsigned long rate; | |
1c8e6004 | 60 | unsigned long req_rate; |
b09d6d99 MT |
61 | unsigned long new_rate; |
62 | struct clk_core *new_parent; | |
63 | struct clk_core *new_child; | |
64 | unsigned long flags; | |
65 | unsigned int enable_count; | |
66 | unsigned int prepare_count; | |
67 | unsigned long accuracy; | |
68 | int phase; | |
69 | struct hlist_head children; | |
70 | struct hlist_node child_node; | |
71 | struct hlist_node debug_node; | |
1c8e6004 | 72 | struct hlist_head clks; |
b09d6d99 MT |
73 | unsigned int notifier_count; |
74 | #ifdef CONFIG_DEBUG_FS | |
75 | struct dentry *dentry; | |
76 | #endif | |
77 | struct kref ref; | |
78 | }; | |
79 | ||
80 | struct clk { | |
81 | struct clk_core *core; | |
82 | const char *dev_id; | |
83 | const char *con_id; | |
1c8e6004 TV |
84 | unsigned long min_rate; |
85 | unsigned long max_rate; | |
86 | struct hlist_node child_node; | |
b09d6d99 MT |
87 | }; |
88 | ||
eab89f69 MT |
89 | /*** locking ***/ |
90 | static void clk_prepare_lock(void) | |
91 | { | |
533ddeb1 MT |
92 | if (!mutex_trylock(&prepare_lock)) { |
93 | if (prepare_owner == current) { | |
94 | prepare_refcnt++; | |
95 | return; | |
96 | } | |
97 | mutex_lock(&prepare_lock); | |
98 | } | |
99 | WARN_ON_ONCE(prepare_owner != NULL); | |
100 | WARN_ON_ONCE(prepare_refcnt != 0); | |
101 | prepare_owner = current; | |
102 | prepare_refcnt = 1; | |
eab89f69 MT |
103 | } |
104 | ||
105 | static void clk_prepare_unlock(void) | |
106 | { | |
533ddeb1 MT |
107 | WARN_ON_ONCE(prepare_owner != current); |
108 | WARN_ON_ONCE(prepare_refcnt == 0); | |
109 | ||
110 | if (--prepare_refcnt) | |
111 | return; | |
112 | prepare_owner = NULL; | |
eab89f69 MT |
113 | mutex_unlock(&prepare_lock); |
114 | } | |
115 | ||
116 | static unsigned long clk_enable_lock(void) | |
117 | { | |
118 | unsigned long flags; | |
533ddeb1 MT |
119 | |
120 | if (!spin_trylock_irqsave(&enable_lock, flags)) { | |
121 | if (enable_owner == current) { | |
122 | enable_refcnt++; | |
123 | return flags; | |
124 | } | |
125 | spin_lock_irqsave(&enable_lock, flags); | |
126 | } | |
127 | WARN_ON_ONCE(enable_owner != NULL); | |
128 | WARN_ON_ONCE(enable_refcnt != 0); | |
129 | enable_owner = current; | |
130 | enable_refcnt = 1; | |
eab89f69 MT |
131 | return flags; |
132 | } | |
133 | ||
134 | static void clk_enable_unlock(unsigned long flags) | |
135 | { | |
533ddeb1 MT |
136 | WARN_ON_ONCE(enable_owner != current); |
137 | WARN_ON_ONCE(enable_refcnt == 0); | |
138 | ||
139 | if (--enable_refcnt) | |
140 | return; | |
141 | enable_owner = NULL; | |
eab89f69 MT |
142 | spin_unlock_irqrestore(&enable_lock, flags); |
143 | } | |
144 | ||
b2476490 MT |
145 | /*** debugfs support ***/ |
146 | ||
ea72dc2c | 147 | #ifdef CONFIG_DEBUG_FS |
b2476490 MT |
148 | #include <linux/debugfs.h> |
149 | ||
150 | static struct dentry *rootdir; | |
b2476490 | 151 | static int inited = 0; |
6314b679 SB |
152 | static DEFINE_MUTEX(clk_debug_lock); |
153 | static HLIST_HEAD(clk_debug_list); | |
b2476490 | 154 | |
6b44c854 SK |
155 | static struct hlist_head *all_lists[] = { |
156 | &clk_root_list, | |
157 | &clk_orphan_list, | |
158 | NULL, | |
159 | }; | |
160 | ||
161 | static struct hlist_head *orphan_list[] = { | |
162 | &clk_orphan_list, | |
163 | NULL, | |
164 | }; | |
165 | ||
035a61c3 TV |
166 | static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, |
167 | int level) | |
1af599df PG |
168 | { |
169 | if (!c) | |
170 | return; | |
171 | ||
e59c5371 | 172 | seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n", |
1af599df PG |
173 | level * 3 + 1, "", |
174 | 30 - level * 3, c->name, | |
035a61c3 TV |
175 | c->enable_count, c->prepare_count, clk_core_get_rate(c), |
176 | clk_core_get_accuracy(c), clk_core_get_phase(c)); | |
1af599df PG |
177 | } |
178 | ||
035a61c3 | 179 | static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, |
1af599df PG |
180 | int level) |
181 | { | |
035a61c3 | 182 | struct clk_core *child; |
1af599df PG |
183 | |
184 | if (!c) | |
185 | return; | |
186 | ||
187 | clk_summary_show_one(s, c, level); | |
188 | ||
b67bfe0d | 189 | hlist_for_each_entry(child, &c->children, child_node) |
1af599df PG |
190 | clk_summary_show_subtree(s, child, level + 1); |
191 | } | |
192 | ||
193 | static int clk_summary_show(struct seq_file *s, void *data) | |
194 | { | |
035a61c3 | 195 | struct clk_core *c; |
27b8d5f7 | 196 | struct hlist_head **lists = (struct hlist_head **)s->private; |
1af599df | 197 | |
e59c5371 MT |
198 | seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n"); |
199 | seq_puts(s, "----------------------------------------------------------------------------------------\n"); | |
1af599df | 200 | |
eab89f69 | 201 | clk_prepare_lock(); |
1af599df | 202 | |
27b8d5f7 PDS |
203 | for (; *lists; lists++) |
204 | hlist_for_each_entry(c, *lists, child_node) | |
205 | clk_summary_show_subtree(s, c, 0); | |
1af599df | 206 | |
eab89f69 | 207 | clk_prepare_unlock(); |
1af599df PG |
208 | |
209 | return 0; | |
210 | } | |
211 | ||
212 | ||
213 | static int clk_summary_open(struct inode *inode, struct file *file) | |
214 | { | |
215 | return single_open(file, clk_summary_show, inode->i_private); | |
216 | } | |
217 | ||
218 | static const struct file_operations clk_summary_fops = { | |
219 | .open = clk_summary_open, | |
220 | .read = seq_read, | |
221 | .llseek = seq_lseek, | |
222 | .release = single_release, | |
223 | }; | |
224 | ||
035a61c3 | 225 | static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) |
bddca894 PG |
226 | { |
227 | if (!c) | |
228 | return; | |
229 | ||
230 | seq_printf(s, "\"%s\": { ", c->name); | |
231 | seq_printf(s, "\"enable_count\": %d,", c->enable_count); | |
232 | seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); | |
035a61c3 TV |
233 | seq_printf(s, "\"rate\": %lu", clk_core_get_rate(c)); |
234 | seq_printf(s, "\"accuracy\": %lu", clk_core_get_accuracy(c)); | |
235 | seq_printf(s, "\"phase\": %d", clk_core_get_phase(c)); | |
bddca894 PG |
236 | } |
237 | ||
035a61c3 | 238 | static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) |
bddca894 | 239 | { |
035a61c3 | 240 | struct clk_core *child; |
bddca894 PG |
241 | |
242 | if (!c) | |
243 | return; | |
244 | ||
245 | clk_dump_one(s, c, level); | |
246 | ||
b67bfe0d | 247 | hlist_for_each_entry(child, &c->children, child_node) { |
bddca894 PG |
248 | seq_printf(s, ","); |
249 | clk_dump_subtree(s, child, level + 1); | |
250 | } | |
251 | ||
252 | seq_printf(s, "}"); | |
253 | } | |
254 | ||
255 | static int clk_dump(struct seq_file *s, void *data) | |
256 | { | |
035a61c3 | 257 | struct clk_core *c; |
bddca894 | 258 | bool first_node = true; |
27b8d5f7 | 259 | struct hlist_head **lists = (struct hlist_head **)s->private; |
bddca894 PG |
260 | |
261 | seq_printf(s, "{"); | |
262 | ||
eab89f69 | 263 | clk_prepare_lock(); |
bddca894 | 264 | |
27b8d5f7 PDS |
265 | for (; *lists; lists++) { |
266 | hlist_for_each_entry(c, *lists, child_node) { | |
267 | if (!first_node) | |
268 | seq_puts(s, ","); | |
269 | first_node = false; | |
270 | clk_dump_subtree(s, c, 0); | |
271 | } | |
bddca894 PG |
272 | } |
273 | ||
eab89f69 | 274 | clk_prepare_unlock(); |
bddca894 PG |
275 | |
276 | seq_printf(s, "}"); | |
277 | return 0; | |
278 | } | |
279 | ||
280 | ||
281 | static int clk_dump_open(struct inode *inode, struct file *file) | |
282 | { | |
283 | return single_open(file, clk_dump, inode->i_private); | |
284 | } | |
285 | ||
286 | static const struct file_operations clk_dump_fops = { | |
287 | .open = clk_dump_open, | |
288 | .read = seq_read, | |
289 | .llseek = seq_lseek, | |
290 | .release = single_release, | |
291 | }; | |
292 | ||
035a61c3 | 293 | static int clk_debug_create_one(struct clk_core *clk, struct dentry *pdentry) |
b2476490 MT |
294 | { |
295 | struct dentry *d; | |
296 | int ret = -ENOMEM; | |
297 | ||
298 | if (!clk || !pdentry) { | |
299 | ret = -EINVAL; | |
300 | goto out; | |
301 | } | |
302 | ||
303 | d = debugfs_create_dir(clk->name, pdentry); | |
304 | if (!d) | |
305 | goto out; | |
306 | ||
307 | clk->dentry = d; | |
308 | ||
309 | d = debugfs_create_u32("clk_rate", S_IRUGO, clk->dentry, | |
310 | (u32 *)&clk->rate); | |
311 | if (!d) | |
312 | goto err_out; | |
313 | ||
5279fc40 BB |
314 | d = debugfs_create_u32("clk_accuracy", S_IRUGO, clk->dentry, |
315 | (u32 *)&clk->accuracy); | |
316 | if (!d) | |
317 | goto err_out; | |
318 | ||
e59c5371 MT |
319 | d = debugfs_create_u32("clk_phase", S_IRUGO, clk->dentry, |
320 | (u32 *)&clk->phase); | |
321 | if (!d) | |
322 | goto err_out; | |
323 | ||
b2476490 MT |
324 | d = debugfs_create_x32("clk_flags", S_IRUGO, clk->dentry, |
325 | (u32 *)&clk->flags); | |
326 | if (!d) | |
327 | goto err_out; | |
328 | ||
329 | d = debugfs_create_u32("clk_prepare_count", S_IRUGO, clk->dentry, | |
330 | (u32 *)&clk->prepare_count); | |
331 | if (!d) | |
332 | goto err_out; | |
333 | ||
334 | d = debugfs_create_u32("clk_enable_count", S_IRUGO, clk->dentry, | |
335 | (u32 *)&clk->enable_count); | |
336 | if (!d) | |
337 | goto err_out; | |
338 | ||
339 | d = debugfs_create_u32("clk_notifier_count", S_IRUGO, clk->dentry, | |
340 | (u32 *)&clk->notifier_count); | |
341 | if (!d) | |
342 | goto err_out; | |
343 | ||
abeab450 CB |
344 | if (clk->ops->debug_init) { |
345 | ret = clk->ops->debug_init(clk->hw, clk->dentry); | |
346 | if (ret) | |
c646cbf1 | 347 | goto err_out; |
abeab450 | 348 | } |
c646cbf1 | 349 | |
b2476490 MT |
350 | ret = 0; |
351 | goto out; | |
352 | ||
353 | err_out: | |
b5f98e65 AE |
354 | debugfs_remove_recursive(clk->dentry); |
355 | clk->dentry = NULL; | |
b2476490 MT |
356 | out: |
357 | return ret; | |
358 | } | |
359 | ||
b2476490 MT |
360 | /** |
361 | * clk_debug_register - add a clk node to the debugfs clk tree | |
362 | * @clk: the clk being added to the debugfs clk tree | |
363 | * | |
364 | * Dynamically adds a clk to the debugfs clk tree if debugfs has been | |
365 | * initialized. Otherwise it bails out early since the debugfs clk tree | |
366 | * will be created lazily by clk_debug_init as part of a late_initcall. | |
b2476490 | 367 | */ |
035a61c3 | 368 | static int clk_debug_register(struct clk_core *clk) |
b2476490 | 369 | { |
b2476490 MT |
370 | int ret = 0; |
371 | ||
6314b679 SB |
372 | mutex_lock(&clk_debug_lock); |
373 | hlist_add_head(&clk->debug_node, &clk_debug_list); | |
374 | ||
b2476490 | 375 | if (!inited) |
6314b679 | 376 | goto unlock; |
b2476490 | 377 | |
6314b679 SB |
378 | ret = clk_debug_create_one(clk, rootdir); |
379 | unlock: | |
380 | mutex_unlock(&clk_debug_lock); | |
b2476490 | 381 | |
b2476490 MT |
382 | return ret; |
383 | } | |
384 | ||
fcb0ee6a SN |
385 | /** |
386 | * clk_debug_unregister - remove a clk node from the debugfs clk tree | |
387 | * @clk: the clk being removed from the debugfs clk tree | |
388 | * | |
389 | * Dynamically removes a clk and all it's children clk nodes from the | |
390 | * debugfs clk tree if clk->dentry points to debugfs created by | |
391 | * clk_debug_register in __clk_init. | |
fcb0ee6a | 392 | */ |
035a61c3 | 393 | static void clk_debug_unregister(struct clk_core *clk) |
fcb0ee6a | 394 | { |
6314b679 | 395 | mutex_lock(&clk_debug_lock); |
6314b679 | 396 | hlist_del_init(&clk->debug_node); |
fcb0ee6a | 397 | debugfs_remove_recursive(clk->dentry); |
6314b679 | 398 | clk->dentry = NULL; |
6314b679 | 399 | mutex_unlock(&clk_debug_lock); |
fcb0ee6a SN |
400 | } |
401 | ||
61c7cddf | 402 | struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode, |
fb2b3c9f PDS |
403 | void *data, const struct file_operations *fops) |
404 | { | |
405 | struct dentry *d = NULL; | |
406 | ||
035a61c3 TV |
407 | if (hw->core->dentry) |
408 | d = debugfs_create_file(name, mode, hw->core->dentry, data, | |
409 | fops); | |
fb2b3c9f PDS |
410 | |
411 | return d; | |
412 | } | |
413 | EXPORT_SYMBOL_GPL(clk_debugfs_add_file); | |
414 | ||
b2476490 MT |
415 | /** |
416 | * clk_debug_init - lazily create the debugfs clk tree visualization | |
417 | * | |
418 | * clks are often initialized very early during boot before memory can | |
419 | * be dynamically allocated and well before debugfs is setup. | |
420 | * clk_debug_init walks the clk tree hierarchy while holding | |
421 | * prepare_lock and creates the topology as part of a late_initcall, | |
422 | * thus insuring that clks initialized very early will still be | |
423 | * represented in the debugfs clk tree. This function should only be | |
424 | * called once at boot-time, and all other clks added dynamically will | |
425 | * be done so with clk_debug_register. | |
426 | */ | |
427 | static int __init clk_debug_init(void) | |
428 | { | |
035a61c3 | 429 | struct clk_core *clk; |
1af599df | 430 | struct dentry *d; |
b2476490 MT |
431 | |
432 | rootdir = debugfs_create_dir("clk", NULL); | |
433 | ||
434 | if (!rootdir) | |
435 | return -ENOMEM; | |
436 | ||
27b8d5f7 | 437 | d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists, |
1af599df PG |
438 | &clk_summary_fops); |
439 | if (!d) | |
440 | return -ENOMEM; | |
441 | ||
27b8d5f7 | 442 | d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists, |
bddca894 PG |
443 | &clk_dump_fops); |
444 | if (!d) | |
445 | return -ENOMEM; | |
446 | ||
27b8d5f7 PDS |
447 | d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir, |
448 | &orphan_list, &clk_summary_fops); | |
449 | if (!d) | |
450 | return -ENOMEM; | |
b2476490 | 451 | |
27b8d5f7 PDS |
452 | d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir, |
453 | &orphan_list, &clk_dump_fops); | |
454 | if (!d) | |
b2476490 MT |
455 | return -ENOMEM; |
456 | ||
6314b679 SB |
457 | mutex_lock(&clk_debug_lock); |
458 | hlist_for_each_entry(clk, &clk_debug_list, debug_node) | |
459 | clk_debug_create_one(clk, rootdir); | |
b2476490 MT |
460 | |
461 | inited = 1; | |
6314b679 | 462 | mutex_unlock(&clk_debug_lock); |
b2476490 MT |
463 | |
464 | return 0; | |
465 | } | |
466 | late_initcall(clk_debug_init); | |
467 | #else | |
035a61c3 TV |
468 | static inline int clk_debug_register(struct clk_core *clk) { return 0; } |
469 | static inline void clk_debug_reparent(struct clk_core *clk, | |
470 | struct clk_core *new_parent) | |
b33d212f UH |
471 | { |
472 | } | |
035a61c3 | 473 | static inline void clk_debug_unregister(struct clk_core *clk) |
fcb0ee6a SN |
474 | { |
475 | } | |
70d347e6 | 476 | #endif |
b2476490 | 477 | |
1c155b3d | 478 | /* caller must hold prepare_lock */ |
035a61c3 | 479 | static void clk_unprepare_unused_subtree(struct clk_core *clk) |
1c155b3d | 480 | { |
035a61c3 | 481 | struct clk_core *child; |
1c155b3d UH |
482 | |
483 | hlist_for_each_entry(child, &clk->children, child_node) | |
484 | clk_unprepare_unused_subtree(child); | |
485 | ||
486 | if (clk->prepare_count) | |
487 | return; | |
488 | ||
489 | if (clk->flags & CLK_IGNORE_UNUSED) | |
490 | return; | |
491 | ||
035a61c3 | 492 | if (clk_core_is_prepared(clk)) { |
3cc8247f UH |
493 | if (clk->ops->unprepare_unused) |
494 | clk->ops->unprepare_unused(clk->hw); | |
495 | else if (clk->ops->unprepare) | |
1c155b3d | 496 | clk->ops->unprepare(clk->hw); |
3cc8247f | 497 | } |
1c155b3d UH |
498 | } |
499 | ||
b2476490 | 500 | /* caller must hold prepare_lock */ |
035a61c3 | 501 | static void clk_disable_unused_subtree(struct clk_core *clk) |
b2476490 | 502 | { |
035a61c3 | 503 | struct clk_core *child; |
b2476490 MT |
504 | unsigned long flags; |
505 | ||
b67bfe0d | 506 | hlist_for_each_entry(child, &clk->children, child_node) |
b2476490 MT |
507 | clk_disable_unused_subtree(child); |
508 | ||
eab89f69 | 509 | flags = clk_enable_lock(); |
b2476490 MT |
510 | |
511 | if (clk->enable_count) | |
512 | goto unlock_out; | |
513 | ||
514 | if (clk->flags & CLK_IGNORE_UNUSED) | |
515 | goto unlock_out; | |
516 | ||
7c045a55 MT |
517 | /* |
518 | * some gate clocks have special needs during the disable-unused | |
519 | * sequence. call .disable_unused if available, otherwise fall | |
520 | * back to .disable | |
521 | */ | |
035a61c3 | 522 | if (clk_core_is_enabled(clk)) { |
7c045a55 MT |
523 | if (clk->ops->disable_unused) |
524 | clk->ops->disable_unused(clk->hw); | |
525 | else if (clk->ops->disable) | |
526 | clk->ops->disable(clk->hw); | |
527 | } | |
b2476490 MT |
528 | |
529 | unlock_out: | |
eab89f69 | 530 | clk_enable_unlock(flags); |
b2476490 MT |
531 | } |
532 | ||
1e435256 OJ |
533 | static bool clk_ignore_unused; |
534 | static int __init clk_ignore_unused_setup(char *__unused) | |
535 | { | |
536 | clk_ignore_unused = true; | |
537 | return 1; | |
538 | } | |
539 | __setup("clk_ignore_unused", clk_ignore_unused_setup); | |
540 | ||
b2476490 MT |
541 | static int clk_disable_unused(void) |
542 | { | |
035a61c3 | 543 | struct clk_core *clk; |
b2476490 | 544 | |
1e435256 OJ |
545 | if (clk_ignore_unused) { |
546 | pr_warn("clk: Not disabling unused clocks\n"); | |
547 | return 0; | |
548 | } | |
549 | ||
eab89f69 | 550 | clk_prepare_lock(); |
b2476490 | 551 | |
b67bfe0d | 552 | hlist_for_each_entry(clk, &clk_root_list, child_node) |
b2476490 MT |
553 | clk_disable_unused_subtree(clk); |
554 | ||
b67bfe0d | 555 | hlist_for_each_entry(clk, &clk_orphan_list, child_node) |
b2476490 MT |
556 | clk_disable_unused_subtree(clk); |
557 | ||
1c155b3d UH |
558 | hlist_for_each_entry(clk, &clk_root_list, child_node) |
559 | clk_unprepare_unused_subtree(clk); | |
560 | ||
561 | hlist_for_each_entry(clk, &clk_orphan_list, child_node) | |
562 | clk_unprepare_unused_subtree(clk); | |
563 | ||
eab89f69 | 564 | clk_prepare_unlock(); |
b2476490 MT |
565 | |
566 | return 0; | |
567 | } | |
d41d5805 | 568 | late_initcall_sync(clk_disable_unused); |
b2476490 MT |
569 | |
570 | /*** helper functions ***/ | |
571 | ||
65800b2c | 572 | const char *__clk_get_name(struct clk *clk) |
b2476490 | 573 | { |
035a61c3 | 574 | return !clk ? NULL : clk->core->name; |
b2476490 | 575 | } |
4895084c | 576 | EXPORT_SYMBOL_GPL(__clk_get_name); |
b2476490 | 577 | |
65800b2c | 578 | struct clk_hw *__clk_get_hw(struct clk *clk) |
b2476490 | 579 | { |
035a61c3 | 580 | return !clk ? NULL : clk->core->hw; |
b2476490 | 581 | } |
0b7f04b8 | 582 | EXPORT_SYMBOL_GPL(__clk_get_hw); |
b2476490 | 583 | |
65800b2c | 584 | u8 __clk_get_num_parents(struct clk *clk) |
b2476490 | 585 | { |
035a61c3 | 586 | return !clk ? 0 : clk->core->num_parents; |
b2476490 | 587 | } |
0b7f04b8 | 588 | EXPORT_SYMBOL_GPL(__clk_get_num_parents); |
b2476490 | 589 | |
65800b2c | 590 | struct clk *__clk_get_parent(struct clk *clk) |
b2476490 | 591 | { |
035a61c3 TV |
592 | if (!clk) |
593 | return NULL; | |
594 | ||
595 | /* TODO: Create a per-user clk and change callers to call clk_put */ | |
596 | return !clk->core->parent ? NULL : clk->core->parent->hw->clk; | |
b2476490 | 597 | } |
0b7f04b8 | 598 | EXPORT_SYMBOL_GPL(__clk_get_parent); |
b2476490 | 599 | |
035a61c3 TV |
600 | static struct clk_core *clk_core_get_parent_by_index(struct clk_core *clk, |
601 | u8 index) | |
7ef3dcc8 JH |
602 | { |
603 | if (!clk || index >= clk->num_parents) | |
604 | return NULL; | |
605 | else if (!clk->parents) | |
035a61c3 | 606 | return clk_core_lookup(clk->parent_names[index]); |
7ef3dcc8 JH |
607 | else if (!clk->parents[index]) |
608 | return clk->parents[index] = | |
035a61c3 | 609 | clk_core_lookup(clk->parent_names[index]); |
7ef3dcc8 JH |
610 | else |
611 | return clk->parents[index]; | |
612 | } | |
035a61c3 TV |
613 | |
614 | struct clk *clk_get_parent_by_index(struct clk *clk, u8 index) | |
615 | { | |
616 | struct clk_core *parent; | |
617 | ||
618 | if (!clk) | |
619 | return NULL; | |
620 | ||
621 | parent = clk_core_get_parent_by_index(clk->core, index); | |
622 | ||
623 | return !parent ? NULL : parent->hw->clk; | |
624 | } | |
0b7f04b8 | 625 | EXPORT_SYMBOL_GPL(clk_get_parent_by_index); |
7ef3dcc8 | 626 | |
65800b2c | 627 | unsigned int __clk_get_enable_count(struct clk *clk) |
b2476490 | 628 | { |
035a61c3 | 629 | return !clk ? 0 : clk->core->enable_count; |
b2476490 MT |
630 | } |
631 | ||
035a61c3 | 632 | static unsigned long clk_core_get_rate_nolock(struct clk_core *clk) |
b2476490 MT |
633 | { |
634 | unsigned long ret; | |
635 | ||
636 | if (!clk) { | |
34e44fe8 | 637 | ret = 0; |
b2476490 MT |
638 | goto out; |
639 | } | |
640 | ||
641 | ret = clk->rate; | |
642 | ||
643 | if (clk->flags & CLK_IS_ROOT) | |
644 | goto out; | |
645 | ||
646 | if (!clk->parent) | |
34e44fe8 | 647 | ret = 0; |
b2476490 MT |
648 | |
649 | out: | |
650 | return ret; | |
651 | } | |
035a61c3 TV |
652 | |
653 | unsigned long __clk_get_rate(struct clk *clk) | |
654 | { | |
655 | if (!clk) | |
656 | return 0; | |
657 | ||
658 | return clk_core_get_rate_nolock(clk->core); | |
659 | } | |
0b7f04b8 | 660 | EXPORT_SYMBOL_GPL(__clk_get_rate); |
b2476490 | 661 | |
035a61c3 | 662 | static unsigned long __clk_get_accuracy(struct clk_core *clk) |
5279fc40 BB |
663 | { |
664 | if (!clk) | |
665 | return 0; | |
666 | ||
667 | return clk->accuracy; | |
668 | } | |
669 | ||
65800b2c | 670 | unsigned long __clk_get_flags(struct clk *clk) |
b2476490 | 671 | { |
035a61c3 | 672 | return !clk ? 0 : clk->core->flags; |
b2476490 | 673 | } |
b05c6836 | 674 | EXPORT_SYMBOL_GPL(__clk_get_flags); |
b2476490 | 675 | |
035a61c3 | 676 | static bool clk_core_is_prepared(struct clk_core *clk) |
3d6ee287 UH |
677 | { |
678 | int ret; | |
679 | ||
680 | if (!clk) | |
681 | return false; | |
682 | ||
683 | /* | |
684 | * .is_prepared is optional for clocks that can prepare | |
685 | * fall back to software usage counter if it is missing | |
686 | */ | |
687 | if (!clk->ops->is_prepared) { | |
688 | ret = clk->prepare_count ? 1 : 0; | |
689 | goto out; | |
690 | } | |
691 | ||
692 | ret = clk->ops->is_prepared(clk->hw); | |
693 | out: | |
694 | return !!ret; | |
695 | } | |
696 | ||
035a61c3 TV |
697 | bool __clk_is_prepared(struct clk *clk) |
698 | { | |
699 | if (!clk) | |
700 | return false; | |
701 | ||
702 | return clk_core_is_prepared(clk->core); | |
703 | } | |
704 | ||
705 | static bool clk_core_is_enabled(struct clk_core *clk) | |
b2476490 MT |
706 | { |
707 | int ret; | |
708 | ||
709 | if (!clk) | |
2ac6b1f5 | 710 | return false; |
b2476490 MT |
711 | |
712 | /* | |
713 | * .is_enabled is only mandatory for clocks that gate | |
714 | * fall back to software usage counter if .is_enabled is missing | |
715 | */ | |
716 | if (!clk->ops->is_enabled) { | |
717 | ret = clk->enable_count ? 1 : 0; | |
718 | goto out; | |
719 | } | |
720 | ||
721 | ret = clk->ops->is_enabled(clk->hw); | |
722 | out: | |
2ac6b1f5 | 723 | return !!ret; |
b2476490 | 724 | } |
035a61c3 TV |
725 | |
726 | bool __clk_is_enabled(struct clk *clk) | |
727 | { | |
728 | if (!clk) | |
729 | return false; | |
730 | ||
731 | return clk_core_is_enabled(clk->core); | |
732 | } | |
0b7f04b8 | 733 | EXPORT_SYMBOL_GPL(__clk_is_enabled); |
b2476490 | 734 | |
035a61c3 TV |
735 | static struct clk_core *__clk_lookup_subtree(const char *name, |
736 | struct clk_core *clk) | |
b2476490 | 737 | { |
035a61c3 TV |
738 | struct clk_core *child; |
739 | struct clk_core *ret; | |
b2476490 MT |
740 | |
741 | if (!strcmp(clk->name, name)) | |
742 | return clk; | |
743 | ||
b67bfe0d | 744 | hlist_for_each_entry(child, &clk->children, child_node) { |
b2476490 MT |
745 | ret = __clk_lookup_subtree(name, child); |
746 | if (ret) | |
747 | return ret; | |
748 | } | |
749 | ||
750 | return NULL; | |
751 | } | |
752 | ||
035a61c3 | 753 | static struct clk_core *clk_core_lookup(const char *name) |
b2476490 | 754 | { |
035a61c3 TV |
755 | struct clk_core *root_clk; |
756 | struct clk_core *ret; | |
b2476490 MT |
757 | |
758 | if (!name) | |
759 | return NULL; | |
760 | ||
761 | /* search the 'proper' clk tree first */ | |
b67bfe0d | 762 | hlist_for_each_entry(root_clk, &clk_root_list, child_node) { |
b2476490 MT |
763 | ret = __clk_lookup_subtree(name, root_clk); |
764 | if (ret) | |
765 | return ret; | |
766 | } | |
767 | ||
768 | /* if not found, then search the orphan tree */ | |
b67bfe0d | 769 | hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) { |
b2476490 MT |
770 | ret = __clk_lookup_subtree(name, root_clk); |
771 | if (ret) | |
772 | return ret; | |
773 | } | |
774 | ||
775 | return NULL; | |
776 | } | |
777 | ||
15a02c1f SB |
778 | static bool mux_is_better_rate(unsigned long rate, unsigned long now, |
779 | unsigned long best, unsigned long flags) | |
e366fdd7 | 780 | { |
15a02c1f SB |
781 | if (flags & CLK_MUX_ROUND_CLOSEST) |
782 | return abs(now - rate) < abs(best - rate); | |
783 | ||
784 | return now <= rate && now > best; | |
785 | } | |
786 | ||
787 | static long | |
788 | clk_mux_determine_rate_flags(struct clk_hw *hw, unsigned long rate, | |
1c8e6004 TV |
789 | unsigned long min_rate, |
790 | unsigned long max_rate, | |
15a02c1f SB |
791 | unsigned long *best_parent_rate, |
792 | struct clk_hw **best_parent_p, | |
793 | unsigned long flags) | |
e366fdd7 | 794 | { |
035a61c3 | 795 | struct clk_core *core = hw->core, *parent, *best_parent = NULL; |
e366fdd7 JH |
796 | int i, num_parents; |
797 | unsigned long parent_rate, best = 0; | |
798 | ||
799 | /* if NO_REPARENT flag set, pass through to current parent */ | |
035a61c3 TV |
800 | if (core->flags & CLK_SET_RATE_NO_REPARENT) { |
801 | parent = core->parent; | |
802 | if (core->flags & CLK_SET_RATE_PARENT) | |
9e0ad7d2 JMC |
803 | best = __clk_determine_rate(parent ? parent->hw : NULL, |
804 | rate, min_rate, max_rate); | |
e366fdd7 | 805 | else if (parent) |
035a61c3 | 806 | best = clk_core_get_rate_nolock(parent); |
e366fdd7 | 807 | else |
035a61c3 | 808 | best = clk_core_get_rate_nolock(core); |
e366fdd7 JH |
809 | goto out; |
810 | } | |
811 | ||
812 | /* find the parent that can provide the fastest rate <= rate */ | |
035a61c3 | 813 | num_parents = core->num_parents; |
e366fdd7 | 814 | for (i = 0; i < num_parents; i++) { |
035a61c3 | 815 | parent = clk_core_get_parent_by_index(core, i); |
e366fdd7 JH |
816 | if (!parent) |
817 | continue; | |
035a61c3 | 818 | if (core->flags & CLK_SET_RATE_PARENT) |
1c8e6004 TV |
819 | parent_rate = __clk_determine_rate(parent->hw, rate, |
820 | min_rate, | |
821 | max_rate); | |
e366fdd7 | 822 | else |
035a61c3 | 823 | parent_rate = clk_core_get_rate_nolock(parent); |
15a02c1f | 824 | if (mux_is_better_rate(rate, parent_rate, best, flags)) { |
e366fdd7 JH |
825 | best_parent = parent; |
826 | best = parent_rate; | |
827 | } | |
828 | } | |
829 | ||
830 | out: | |
831 | if (best_parent) | |
646cafc6 | 832 | *best_parent_p = best_parent->hw; |
e366fdd7 JH |
833 | *best_parent_rate = best; |
834 | ||
835 | return best; | |
836 | } | |
15a02c1f | 837 | |
035a61c3 TV |
838 | struct clk *__clk_lookup(const char *name) |
839 | { | |
840 | struct clk_core *core = clk_core_lookup(name); | |
841 | ||
842 | return !core ? NULL : core->hw->clk; | |
843 | } | |
844 | ||
1c8e6004 TV |
845 | static void clk_core_get_boundaries(struct clk_core *clk, |
846 | unsigned long *min_rate, | |
847 | unsigned long *max_rate) | |
848 | { | |
849 | struct clk *clk_user; | |
850 | ||
851 | *min_rate = 0; | |
852 | *max_rate = ULONG_MAX; | |
853 | ||
854 | hlist_for_each_entry(clk_user, &clk->clks, child_node) | |
855 | *min_rate = max(*min_rate, clk_user->min_rate); | |
856 | ||
857 | hlist_for_each_entry(clk_user, &clk->clks, child_node) | |
858 | *max_rate = min(*max_rate, clk_user->max_rate); | |
859 | } | |
860 | ||
15a02c1f SB |
861 | /* |
862 | * Helper for finding best parent to provide a given frequency. This can be used | |
863 | * directly as a determine_rate callback (e.g. for a mux), or from a more | |
864 | * complex clock that may combine a mux with other operations. | |
865 | */ | |
866 | long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate, | |
1c8e6004 TV |
867 | unsigned long min_rate, |
868 | unsigned long max_rate, | |
15a02c1f SB |
869 | unsigned long *best_parent_rate, |
870 | struct clk_hw **best_parent_p) | |
871 | { | |
1c8e6004 TV |
872 | return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate, |
873 | best_parent_rate, | |
15a02c1f SB |
874 | best_parent_p, 0); |
875 | } | |
0b7f04b8 | 876 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); |
e366fdd7 | 877 | |
15a02c1f | 878 | long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate, |
1c8e6004 TV |
879 | unsigned long min_rate, |
880 | unsigned long max_rate, | |
15a02c1f SB |
881 | unsigned long *best_parent_rate, |
882 | struct clk_hw **best_parent_p) | |
883 | { | |
1c8e6004 TV |
884 | return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate, |
885 | best_parent_rate, | |
15a02c1f SB |
886 | best_parent_p, |
887 | CLK_MUX_ROUND_CLOSEST); | |
888 | } | |
889 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); | |
890 | ||
b2476490 MT |
891 | /*** clk api ***/ |
892 | ||
035a61c3 | 893 | static void clk_core_unprepare(struct clk_core *clk) |
b2476490 MT |
894 | { |
895 | if (!clk) | |
896 | return; | |
897 | ||
898 | if (WARN_ON(clk->prepare_count == 0)) | |
899 | return; | |
900 | ||
901 | if (--clk->prepare_count > 0) | |
902 | return; | |
903 | ||
904 | WARN_ON(clk->enable_count > 0); | |
905 | ||
906 | if (clk->ops->unprepare) | |
907 | clk->ops->unprepare(clk->hw); | |
908 | ||
035a61c3 | 909 | clk_core_unprepare(clk->parent); |
b2476490 MT |
910 | } |
911 | ||
912 | /** | |
913 | * clk_unprepare - undo preparation of a clock source | |
24ee1a08 | 914 | * @clk: the clk being unprepared |
b2476490 MT |
915 | * |
916 | * clk_unprepare may sleep, which differentiates it from clk_disable. In a | |
917 | * simple case, clk_unprepare can be used instead of clk_disable to gate a clk | |
918 | * if the operation may sleep. One example is a clk which is accessed over | |
919 | * I2c. In the complex case a clk gate operation may require a fast and a slow | |
920 | * part. It is this reason that clk_unprepare and clk_disable are not mutually | |
921 | * exclusive. In fact clk_disable must be called before clk_unprepare. | |
922 | */ | |
923 | void clk_unprepare(struct clk *clk) | |
924 | { | |
63589e92 SB |
925 | if (IS_ERR_OR_NULL(clk)) |
926 | return; | |
927 | ||
eab89f69 | 928 | clk_prepare_lock(); |
035a61c3 | 929 | clk_core_unprepare(clk->core); |
eab89f69 | 930 | clk_prepare_unlock(); |
b2476490 MT |
931 | } |
932 | EXPORT_SYMBOL_GPL(clk_unprepare); | |
933 | ||
035a61c3 | 934 | static int clk_core_prepare(struct clk_core *clk) |
b2476490 MT |
935 | { |
936 | int ret = 0; | |
937 | ||
938 | if (!clk) | |
939 | return 0; | |
940 | ||
941 | if (clk->prepare_count == 0) { | |
035a61c3 | 942 | ret = clk_core_prepare(clk->parent); |
b2476490 MT |
943 | if (ret) |
944 | return ret; | |
945 | ||
946 | if (clk->ops->prepare) { | |
947 | ret = clk->ops->prepare(clk->hw); | |
948 | if (ret) { | |
035a61c3 | 949 | clk_core_unprepare(clk->parent); |
b2476490 MT |
950 | return ret; |
951 | } | |
952 | } | |
953 | } | |
954 | ||
955 | clk->prepare_count++; | |
956 | ||
957 | return 0; | |
958 | } | |
959 | ||
960 | /** | |
961 | * clk_prepare - prepare a clock source | |
962 | * @clk: the clk being prepared | |
963 | * | |
964 | * clk_prepare may sleep, which differentiates it from clk_enable. In a simple | |
965 | * case, clk_prepare can be used instead of clk_enable to ungate a clk if the | |
966 | * operation may sleep. One example is a clk which is accessed over I2c. In | |
967 | * the complex case a clk ungate operation may require a fast and a slow part. | |
968 | * It is this reason that clk_prepare and clk_enable are not mutually | |
969 | * exclusive. In fact clk_prepare must be called before clk_enable. | |
970 | * Returns 0 on success, -EERROR otherwise. | |
971 | */ | |
972 | int clk_prepare(struct clk *clk) | |
973 | { | |
974 | int ret; | |
975 | ||
035a61c3 TV |
976 | if (!clk) |
977 | return 0; | |
978 | ||
eab89f69 | 979 | clk_prepare_lock(); |
035a61c3 | 980 | ret = clk_core_prepare(clk->core); |
eab89f69 | 981 | clk_prepare_unlock(); |
b2476490 MT |
982 | |
983 | return ret; | |
984 | } | |
985 | EXPORT_SYMBOL_GPL(clk_prepare); | |
986 | ||
035a61c3 | 987 | static void clk_core_disable(struct clk_core *clk) |
b2476490 MT |
988 | { |
989 | if (!clk) | |
990 | return; | |
991 | ||
992 | if (WARN_ON(clk->enable_count == 0)) | |
993 | return; | |
994 | ||
995 | if (--clk->enable_count > 0) | |
996 | return; | |
997 | ||
998 | if (clk->ops->disable) | |
999 | clk->ops->disable(clk->hw); | |
1000 | ||
035a61c3 TV |
1001 | clk_core_disable(clk->parent); |
1002 | } | |
1003 | ||
1004 | static void __clk_disable(struct clk *clk) | |
1005 | { | |
1006 | if (!clk) | |
1007 | return; | |
1008 | ||
1009 | clk_core_disable(clk->core); | |
b2476490 MT |
1010 | } |
1011 | ||
1012 | /** | |
1013 | * clk_disable - gate a clock | |
1014 | * @clk: the clk being gated | |
1015 | * | |
1016 | * clk_disable must not sleep, which differentiates it from clk_unprepare. In | |
1017 | * a simple case, clk_disable can be used instead of clk_unprepare to gate a | |
1018 | * clk if the operation is fast and will never sleep. One example is a | |
1019 | * SoC-internal clk which is controlled via simple register writes. In the | |
1020 | * complex case a clk gate operation may require a fast and a slow part. It is | |
1021 | * this reason that clk_unprepare and clk_disable are not mutually exclusive. | |
1022 | * In fact clk_disable must be called before clk_unprepare. | |
1023 | */ | |
1024 | void clk_disable(struct clk *clk) | |
1025 | { | |
1026 | unsigned long flags; | |
1027 | ||
63589e92 SB |
1028 | if (IS_ERR_OR_NULL(clk)) |
1029 | return; | |
1030 | ||
eab89f69 | 1031 | flags = clk_enable_lock(); |
b2476490 | 1032 | __clk_disable(clk); |
eab89f69 | 1033 | clk_enable_unlock(flags); |
b2476490 MT |
1034 | } |
1035 | EXPORT_SYMBOL_GPL(clk_disable); | |
1036 | ||
035a61c3 | 1037 | static int clk_core_enable(struct clk_core *clk) |
b2476490 MT |
1038 | { |
1039 | int ret = 0; | |
1040 | ||
1041 | if (!clk) | |
1042 | return 0; | |
1043 | ||
1044 | if (WARN_ON(clk->prepare_count == 0)) | |
1045 | return -ESHUTDOWN; | |
1046 | ||
1047 | if (clk->enable_count == 0) { | |
035a61c3 | 1048 | ret = clk_core_enable(clk->parent); |
b2476490 MT |
1049 | |
1050 | if (ret) | |
1051 | return ret; | |
1052 | ||
1053 | if (clk->ops->enable) { | |
1054 | ret = clk->ops->enable(clk->hw); | |
1055 | if (ret) { | |
035a61c3 | 1056 | clk_core_disable(clk->parent); |
b2476490 MT |
1057 | return ret; |
1058 | } | |
1059 | } | |
1060 | } | |
1061 | ||
1062 | clk->enable_count++; | |
1063 | return 0; | |
1064 | } | |
1065 | ||
035a61c3 TV |
1066 | static int __clk_enable(struct clk *clk) |
1067 | { | |
1068 | if (!clk) | |
1069 | return 0; | |
1070 | ||
1071 | return clk_core_enable(clk->core); | |
1072 | } | |
1073 | ||
b2476490 MT |
1074 | /** |
1075 | * clk_enable - ungate a clock | |
1076 | * @clk: the clk being ungated | |
1077 | * | |
1078 | * clk_enable must not sleep, which differentiates it from clk_prepare. In a | |
1079 | * simple case, clk_enable can be used instead of clk_prepare to ungate a clk | |
1080 | * if the operation will never sleep. One example is a SoC-internal clk which | |
1081 | * is controlled via simple register writes. In the complex case a clk ungate | |
1082 | * operation may require a fast and a slow part. It is this reason that | |
1083 | * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare | |
1084 | * must be called before clk_enable. Returns 0 on success, -EERROR | |
1085 | * otherwise. | |
1086 | */ | |
1087 | int clk_enable(struct clk *clk) | |
1088 | { | |
1089 | unsigned long flags; | |
1090 | int ret; | |
1091 | ||
eab89f69 | 1092 | flags = clk_enable_lock(); |
b2476490 | 1093 | ret = __clk_enable(clk); |
eab89f69 | 1094 | clk_enable_unlock(flags); |
b2476490 MT |
1095 | |
1096 | return ret; | |
1097 | } | |
1098 | EXPORT_SYMBOL_GPL(clk_enable); | |
1099 | ||
035a61c3 | 1100 | static unsigned long clk_core_round_rate_nolock(struct clk_core *clk, |
1c8e6004 TV |
1101 | unsigned long rate, |
1102 | unsigned long min_rate, | |
1103 | unsigned long max_rate) | |
b2476490 | 1104 | { |
81536e07 | 1105 | unsigned long parent_rate = 0; |
035a61c3 | 1106 | struct clk_core *parent; |
646cafc6 | 1107 | struct clk_hw *parent_hw; |
b2476490 MT |
1108 | |
1109 | if (!clk) | |
2ac6b1f5 | 1110 | return 0; |
b2476490 | 1111 | |
71472c0c JH |
1112 | parent = clk->parent; |
1113 | if (parent) | |
1114 | parent_rate = parent->rate; | |
1115 | ||
646cafc6 TV |
1116 | if (clk->ops->determine_rate) { |
1117 | parent_hw = parent ? parent->hw : NULL; | |
1c8e6004 TV |
1118 | return clk->ops->determine_rate(clk->hw, rate, |
1119 | min_rate, max_rate, | |
1120 | &parent_rate, &parent_hw); | |
646cafc6 | 1121 | } else if (clk->ops->round_rate) |
71472c0c JH |
1122 | return clk->ops->round_rate(clk->hw, rate, &parent_rate); |
1123 | else if (clk->flags & CLK_SET_RATE_PARENT) | |
1c8e6004 TV |
1124 | return clk_core_round_rate_nolock(clk->parent, rate, min_rate, |
1125 | max_rate); | |
71472c0c JH |
1126 | else |
1127 | return clk->rate; | |
b2476490 | 1128 | } |
035a61c3 | 1129 | |
1c8e6004 TV |
1130 | /** |
1131 | * __clk_determine_rate - get the closest rate actually supported by a clock | |
1132 | * @hw: determine the rate of this clock | |
1133 | * @rate: target rate | |
1134 | * @min_rate: returned rate must be greater than this rate | |
1135 | * @max_rate: returned rate must be less than this rate | |
1136 | * | |
1137 | * Caller must hold prepare_lock. Useful for clk_ops such as .set_rate and | |
1138 | * .determine_rate. | |
1139 | */ | |
1140 | unsigned long __clk_determine_rate(struct clk_hw *hw, | |
1141 | unsigned long rate, | |
1142 | unsigned long min_rate, | |
1143 | unsigned long max_rate) | |
1144 | { | |
1145 | if (!hw) | |
1146 | return 0; | |
1147 | ||
1148 | return clk_core_round_rate_nolock(hw->core, rate, min_rate, max_rate); | |
1149 | } | |
1150 | EXPORT_SYMBOL_GPL(__clk_determine_rate); | |
1151 | ||
035a61c3 TV |
1152 | /** |
1153 | * __clk_round_rate - round the given rate for a clk | |
1154 | * @clk: round the rate of this clock | |
1155 | * @rate: the rate which is to be rounded | |
1156 | * | |
1157 | * Caller must hold prepare_lock. Useful for clk_ops such as .set_rate | |
1158 | */ | |
1159 | unsigned long __clk_round_rate(struct clk *clk, unsigned long rate) | |
1160 | { | |
1c8e6004 TV |
1161 | unsigned long min_rate; |
1162 | unsigned long max_rate; | |
1163 | ||
035a61c3 TV |
1164 | if (!clk) |
1165 | return 0; | |
1166 | ||
1c8e6004 TV |
1167 | clk_core_get_boundaries(clk->core, &min_rate, &max_rate); |
1168 | ||
1169 | return clk_core_round_rate_nolock(clk->core, rate, min_rate, max_rate); | |
035a61c3 | 1170 | } |
1cdf8ee2 | 1171 | EXPORT_SYMBOL_GPL(__clk_round_rate); |
b2476490 MT |
1172 | |
1173 | /** | |
1174 | * clk_round_rate - round the given rate for a clk | |
1175 | * @clk: the clk for which we are rounding a rate | |
1176 | * @rate: the rate which is to be rounded | |
1177 | * | |
1178 | * Takes in a rate as input and rounds it to a rate that the clk can actually | |
1179 | * use which is then returned. If clk doesn't support round_rate operation | |
1180 | * then the parent rate is returned. | |
1181 | */ | |
1182 | long clk_round_rate(struct clk *clk, unsigned long rate) | |
1183 | { | |
1184 | unsigned long ret; | |
1185 | ||
035a61c3 TV |
1186 | if (!clk) |
1187 | return 0; | |
1188 | ||
eab89f69 | 1189 | clk_prepare_lock(); |
b2476490 | 1190 | ret = __clk_round_rate(clk, rate); |
eab89f69 | 1191 | clk_prepare_unlock(); |
b2476490 MT |
1192 | |
1193 | return ret; | |
1194 | } | |
1195 | EXPORT_SYMBOL_GPL(clk_round_rate); | |
1196 | ||
1197 | /** | |
1198 | * __clk_notify - call clk notifier chain | |
1199 | * @clk: struct clk * that is changing rate | |
1200 | * @msg: clk notifier type (see include/linux/clk.h) | |
1201 | * @old_rate: old clk rate | |
1202 | * @new_rate: new clk rate | |
1203 | * | |
1204 | * Triggers a notifier call chain on the clk rate-change notification | |
1205 | * for 'clk'. Passes a pointer to the struct clk and the previous | |
1206 | * and current rates to the notifier callback. Intended to be called by | |
1207 | * internal clock code only. Returns NOTIFY_DONE from the last driver | |
1208 | * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if | |
1209 | * a driver returns that. | |
1210 | */ | |
035a61c3 | 1211 | static int __clk_notify(struct clk_core *clk, unsigned long msg, |
b2476490 MT |
1212 | unsigned long old_rate, unsigned long new_rate) |
1213 | { | |
1214 | struct clk_notifier *cn; | |
1215 | struct clk_notifier_data cnd; | |
1216 | int ret = NOTIFY_DONE; | |
1217 | ||
b2476490 MT |
1218 | cnd.old_rate = old_rate; |
1219 | cnd.new_rate = new_rate; | |
1220 | ||
1221 | list_for_each_entry(cn, &clk_notifier_list, node) { | |
035a61c3 TV |
1222 | if (cn->clk->core == clk) { |
1223 | cnd.clk = cn->clk; | |
b2476490 MT |
1224 | ret = srcu_notifier_call_chain(&cn->notifier_head, msg, |
1225 | &cnd); | |
b2476490 MT |
1226 | } |
1227 | } | |
1228 | ||
1229 | return ret; | |
1230 | } | |
1231 | ||
5279fc40 BB |
1232 | /** |
1233 | * __clk_recalc_accuracies | |
1234 | * @clk: first clk in the subtree | |
1235 | * | |
1236 | * Walks the subtree of clks starting with clk and recalculates accuracies as | |
1237 | * it goes. Note that if a clk does not implement the .recalc_accuracy | |
1238 | * callback then it is assumed that the clock will take on the accuracy of it's | |
1239 | * parent. | |
1240 | * | |
1241 | * Caller must hold prepare_lock. | |
1242 | */ | |
035a61c3 | 1243 | static void __clk_recalc_accuracies(struct clk_core *clk) |
5279fc40 BB |
1244 | { |
1245 | unsigned long parent_accuracy = 0; | |
035a61c3 | 1246 | struct clk_core *child; |
5279fc40 BB |
1247 | |
1248 | if (clk->parent) | |
1249 | parent_accuracy = clk->parent->accuracy; | |
1250 | ||
1251 | if (clk->ops->recalc_accuracy) | |
1252 | clk->accuracy = clk->ops->recalc_accuracy(clk->hw, | |
1253 | parent_accuracy); | |
1254 | else | |
1255 | clk->accuracy = parent_accuracy; | |
1256 | ||
1257 | hlist_for_each_entry(child, &clk->children, child_node) | |
1258 | __clk_recalc_accuracies(child); | |
1259 | } | |
1260 | ||
035a61c3 TV |
1261 | static long clk_core_get_accuracy(struct clk_core *clk) |
1262 | { | |
1263 | unsigned long accuracy; | |
1264 | ||
1265 | clk_prepare_lock(); | |
1266 | if (clk && (clk->flags & CLK_GET_ACCURACY_NOCACHE)) | |
1267 | __clk_recalc_accuracies(clk); | |
1268 | ||
1269 | accuracy = __clk_get_accuracy(clk); | |
1270 | clk_prepare_unlock(); | |
1271 | ||
1272 | return accuracy; | |
1273 | } | |
1274 | ||
5279fc40 BB |
1275 | /** |
1276 | * clk_get_accuracy - return the accuracy of clk | |
1277 | * @clk: the clk whose accuracy is being returned | |
1278 | * | |
1279 | * Simply returns the cached accuracy of the clk, unless | |
1280 | * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be | |
1281 | * issued. | |
1282 | * If clk is NULL then returns 0. | |
1283 | */ | |
1284 | long clk_get_accuracy(struct clk *clk) | |
1285 | { | |
035a61c3 TV |
1286 | if (!clk) |
1287 | return 0; | |
5279fc40 | 1288 | |
035a61c3 | 1289 | return clk_core_get_accuracy(clk->core); |
5279fc40 BB |
1290 | } |
1291 | EXPORT_SYMBOL_GPL(clk_get_accuracy); | |
1292 | ||
035a61c3 TV |
1293 | static unsigned long clk_recalc(struct clk_core *clk, |
1294 | unsigned long parent_rate) | |
8f2c2db1 SB |
1295 | { |
1296 | if (clk->ops->recalc_rate) | |
1297 | return clk->ops->recalc_rate(clk->hw, parent_rate); | |
1298 | return parent_rate; | |
1299 | } | |
1300 | ||
b2476490 MT |
1301 | /** |
1302 | * __clk_recalc_rates | |
1303 | * @clk: first clk in the subtree | |
1304 | * @msg: notification type (see include/linux/clk.h) | |
1305 | * | |
1306 | * Walks the subtree of clks starting with clk and recalculates rates as it | |
1307 | * goes. Note that if a clk does not implement the .recalc_rate callback then | |
24ee1a08 | 1308 | * it is assumed that the clock will take on the rate of its parent. |
b2476490 MT |
1309 | * |
1310 | * clk_recalc_rates also propagates the POST_RATE_CHANGE notification, | |
1311 | * if necessary. | |
1312 | * | |
1313 | * Caller must hold prepare_lock. | |
1314 | */ | |
035a61c3 | 1315 | static void __clk_recalc_rates(struct clk_core *clk, unsigned long msg) |
b2476490 MT |
1316 | { |
1317 | unsigned long old_rate; | |
1318 | unsigned long parent_rate = 0; | |
035a61c3 | 1319 | struct clk_core *child; |
b2476490 MT |
1320 | |
1321 | old_rate = clk->rate; | |
1322 | ||
1323 | if (clk->parent) | |
1324 | parent_rate = clk->parent->rate; | |
1325 | ||
8f2c2db1 | 1326 | clk->rate = clk_recalc(clk, parent_rate); |
b2476490 MT |
1327 | |
1328 | /* | |
1329 | * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE | |
1330 | * & ABORT_RATE_CHANGE notifiers | |
1331 | */ | |
1332 | if (clk->notifier_count && msg) | |
1333 | __clk_notify(clk, msg, old_rate, clk->rate); | |
1334 | ||
b67bfe0d | 1335 | hlist_for_each_entry(child, &clk->children, child_node) |
b2476490 MT |
1336 | __clk_recalc_rates(child, msg); |
1337 | } | |
1338 | ||
035a61c3 | 1339 | static unsigned long clk_core_get_rate(struct clk_core *clk) |
a093bde2 UH |
1340 | { |
1341 | unsigned long rate; | |
1342 | ||
eab89f69 | 1343 | clk_prepare_lock(); |
a093bde2 UH |
1344 | |
1345 | if (clk && (clk->flags & CLK_GET_RATE_NOCACHE)) | |
1346 | __clk_recalc_rates(clk, 0); | |
1347 | ||
035a61c3 | 1348 | rate = clk_core_get_rate_nolock(clk); |
eab89f69 | 1349 | clk_prepare_unlock(); |
a093bde2 UH |
1350 | |
1351 | return rate; | |
1352 | } | |
035a61c3 TV |
1353 | |
1354 | /** | |
1355 | * clk_get_rate - return the rate of clk | |
1356 | * @clk: the clk whose rate is being returned | |
1357 | * | |
1358 | * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag | |
1359 | * is set, which means a recalc_rate will be issued. | |
1360 | * If clk is NULL then returns 0. | |
1361 | */ | |
1362 | unsigned long clk_get_rate(struct clk *clk) | |
1363 | { | |
1364 | if (!clk) | |
1365 | return 0; | |
1366 | ||
1367 | return clk_core_get_rate(clk->core); | |
1368 | } | |
a093bde2 UH |
1369 | EXPORT_SYMBOL_GPL(clk_get_rate); |
1370 | ||
035a61c3 TV |
1371 | static int clk_fetch_parent_index(struct clk_core *clk, |
1372 | struct clk_core *parent) | |
4935b22c | 1373 | { |
f1c8b2ed | 1374 | int i; |
4935b22c | 1375 | |
f1c8b2ed | 1376 | if (!clk->parents) { |
96a7ed90 TF |
1377 | clk->parents = kcalloc(clk->num_parents, |
1378 | sizeof(struct clk *), GFP_KERNEL); | |
f1c8b2ed TF |
1379 | if (!clk->parents) |
1380 | return -ENOMEM; | |
1381 | } | |
4935b22c JH |
1382 | |
1383 | /* | |
1384 | * find index of new parent clock using cached parent ptrs, | |
1385 | * or if not yet cached, use string name comparison and cache | |
035a61c3 | 1386 | * them now to avoid future calls to clk_core_lookup. |
4935b22c JH |
1387 | */ |
1388 | for (i = 0; i < clk->num_parents; i++) { | |
da0f0b2c | 1389 | if (clk->parents[i] == parent) |
f1c8b2ed | 1390 | return i; |
da0f0b2c TF |
1391 | |
1392 | if (clk->parents[i]) | |
1393 | continue; | |
1394 | ||
1395 | if (!strcmp(clk->parent_names[i], parent->name)) { | |
035a61c3 | 1396 | clk->parents[i] = clk_core_lookup(parent->name); |
f1c8b2ed | 1397 | return i; |
4935b22c JH |
1398 | } |
1399 | } | |
1400 | ||
f1c8b2ed | 1401 | return -EINVAL; |
4935b22c JH |
1402 | } |
1403 | ||
035a61c3 | 1404 | static void clk_reparent(struct clk_core *clk, struct clk_core *new_parent) |
4935b22c JH |
1405 | { |
1406 | hlist_del(&clk->child_node); | |
1407 | ||
903efc55 JH |
1408 | if (new_parent) { |
1409 | /* avoid duplicate POST_RATE_CHANGE notifications */ | |
1410 | if (new_parent->new_child == clk) | |
1411 | new_parent->new_child = NULL; | |
1412 | ||
4935b22c | 1413 | hlist_add_head(&clk->child_node, &new_parent->children); |
903efc55 | 1414 | } else { |
4935b22c | 1415 | hlist_add_head(&clk->child_node, &clk_orphan_list); |
903efc55 | 1416 | } |
4935b22c JH |
1417 | |
1418 | clk->parent = new_parent; | |
1419 | } | |
1420 | ||
035a61c3 TV |
1421 | static struct clk_core *__clk_set_parent_before(struct clk_core *clk, |
1422 | struct clk_core *parent) | |
4935b22c JH |
1423 | { |
1424 | unsigned long flags; | |
035a61c3 | 1425 | struct clk_core *old_parent = clk->parent; |
4935b22c JH |
1426 | |
1427 | /* | |
1428 | * Migrate prepare state between parents and prevent race with | |
1429 | * clk_enable(). | |
1430 | * | |
1431 | * If the clock is not prepared, then a race with | |
1432 | * clk_enable/disable() is impossible since we already have the | |
1433 | * prepare lock (future calls to clk_enable() need to be preceded by | |
1434 | * a clk_prepare()). | |
1435 | * | |
1436 | * If the clock is prepared, migrate the prepared state to the new | |
1437 | * parent and also protect against a race with clk_enable() by | |
1438 | * forcing the clock and the new parent on. This ensures that all | |
1439 | * future calls to clk_enable() are practically NOPs with respect to | |
1440 | * hardware and software states. | |
1441 | * | |
1442 | * See also: Comment for clk_set_parent() below. | |
1443 | */ | |
1444 | if (clk->prepare_count) { | |
035a61c3 TV |
1445 | clk_core_prepare(parent); |
1446 | clk_core_enable(parent); | |
1447 | clk_core_enable(clk); | |
4935b22c JH |
1448 | } |
1449 | ||
1450 | /* update the clk tree topology */ | |
1451 | flags = clk_enable_lock(); | |
1452 | clk_reparent(clk, parent); | |
1453 | clk_enable_unlock(flags); | |
1454 | ||
3fa2252b SB |
1455 | return old_parent; |
1456 | } | |
1457 | ||
035a61c3 TV |
1458 | static void __clk_set_parent_after(struct clk_core *core, |
1459 | struct clk_core *parent, | |
1460 | struct clk_core *old_parent) | |
3fa2252b SB |
1461 | { |
1462 | /* | |
1463 | * Finish the migration of prepare state and undo the changes done | |
1464 | * for preventing a race with clk_enable(). | |
1465 | */ | |
035a61c3 TV |
1466 | if (core->prepare_count) { |
1467 | clk_core_disable(core); | |
1468 | clk_core_disable(old_parent); | |
1469 | clk_core_unprepare(old_parent); | |
3fa2252b | 1470 | } |
3fa2252b SB |
1471 | } |
1472 | ||
035a61c3 TV |
1473 | static int __clk_set_parent(struct clk_core *clk, struct clk_core *parent, |
1474 | u8 p_index) | |
3fa2252b SB |
1475 | { |
1476 | unsigned long flags; | |
1477 | int ret = 0; | |
035a61c3 | 1478 | struct clk_core *old_parent; |
3fa2252b SB |
1479 | |
1480 | old_parent = __clk_set_parent_before(clk, parent); | |
1481 | ||
4935b22c JH |
1482 | /* change clock input source */ |
1483 | if (parent && clk->ops->set_parent) | |
1484 | ret = clk->ops->set_parent(clk->hw, p_index); | |
1485 | ||
1486 | if (ret) { | |
1487 | flags = clk_enable_lock(); | |
1488 | clk_reparent(clk, old_parent); | |
1489 | clk_enable_unlock(flags); | |
1490 | ||
1491 | if (clk->prepare_count) { | |
035a61c3 TV |
1492 | clk_core_disable(clk); |
1493 | clk_core_disable(parent); | |
1494 | clk_core_unprepare(parent); | |
4935b22c JH |
1495 | } |
1496 | return ret; | |
1497 | } | |
1498 | ||
3fa2252b | 1499 | __clk_set_parent_after(clk, parent, old_parent); |
4935b22c | 1500 | |
4935b22c JH |
1501 | return 0; |
1502 | } | |
1503 | ||
b2476490 MT |
1504 | /** |
1505 | * __clk_speculate_rates | |
1506 | * @clk: first clk in the subtree | |
1507 | * @parent_rate: the "future" rate of clk's parent | |
1508 | * | |
1509 | * Walks the subtree of clks starting with clk, speculating rates as it | |
1510 | * goes and firing off PRE_RATE_CHANGE notifications as necessary. | |
1511 | * | |
1512 | * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending | |
1513 | * pre-rate change notifications and returns early if no clks in the | |
1514 | * subtree have subscribed to the notifications. Note that if a clk does not | |
1515 | * implement the .recalc_rate callback then it is assumed that the clock will | |
24ee1a08 | 1516 | * take on the rate of its parent. |
b2476490 MT |
1517 | * |
1518 | * Caller must hold prepare_lock. | |
1519 | */ | |
035a61c3 TV |
1520 | static int __clk_speculate_rates(struct clk_core *clk, |
1521 | unsigned long parent_rate) | |
b2476490 | 1522 | { |
035a61c3 | 1523 | struct clk_core *child; |
b2476490 MT |
1524 | unsigned long new_rate; |
1525 | int ret = NOTIFY_DONE; | |
1526 | ||
8f2c2db1 | 1527 | new_rate = clk_recalc(clk, parent_rate); |
b2476490 | 1528 | |
fb72a059 | 1529 | /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */ |
b2476490 MT |
1530 | if (clk->notifier_count) |
1531 | ret = __clk_notify(clk, PRE_RATE_CHANGE, clk->rate, new_rate); | |
1532 | ||
86bcfa2e MT |
1533 | if (ret & NOTIFY_STOP_MASK) { |
1534 | pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", | |
1535 | __func__, clk->name, ret); | |
b2476490 | 1536 | goto out; |
86bcfa2e | 1537 | } |
b2476490 | 1538 | |
b67bfe0d | 1539 | hlist_for_each_entry(child, &clk->children, child_node) { |
b2476490 | 1540 | ret = __clk_speculate_rates(child, new_rate); |
fb72a059 | 1541 | if (ret & NOTIFY_STOP_MASK) |
b2476490 MT |
1542 | break; |
1543 | } | |
1544 | ||
1545 | out: | |
1546 | return ret; | |
1547 | } | |
1548 | ||
035a61c3 TV |
1549 | static void clk_calc_subtree(struct clk_core *clk, unsigned long new_rate, |
1550 | struct clk_core *new_parent, u8 p_index) | |
b2476490 | 1551 | { |
035a61c3 | 1552 | struct clk_core *child; |
b2476490 MT |
1553 | |
1554 | clk->new_rate = new_rate; | |
71472c0c JH |
1555 | clk->new_parent = new_parent; |
1556 | clk->new_parent_index = p_index; | |
1557 | /* include clk in new parent's PRE_RATE_CHANGE notifications */ | |
1558 | clk->new_child = NULL; | |
1559 | if (new_parent && new_parent != clk->parent) | |
1560 | new_parent->new_child = clk; | |
b2476490 | 1561 | |
b67bfe0d | 1562 | hlist_for_each_entry(child, &clk->children, child_node) { |
8f2c2db1 | 1563 | child->new_rate = clk_recalc(child, new_rate); |
71472c0c | 1564 | clk_calc_subtree(child, child->new_rate, NULL, 0); |
b2476490 MT |
1565 | } |
1566 | } | |
1567 | ||
1568 | /* | |
1569 | * calculate the new rates returning the topmost clock that has to be | |
1570 | * changed. | |
1571 | */ | |
035a61c3 TV |
1572 | static struct clk_core *clk_calc_new_rates(struct clk_core *clk, |
1573 | unsigned long rate) | |
b2476490 | 1574 | { |
035a61c3 TV |
1575 | struct clk_core *top = clk; |
1576 | struct clk_core *old_parent, *parent; | |
646cafc6 | 1577 | struct clk_hw *parent_hw; |
81536e07 | 1578 | unsigned long best_parent_rate = 0; |
b2476490 | 1579 | unsigned long new_rate; |
1c8e6004 TV |
1580 | unsigned long min_rate; |
1581 | unsigned long max_rate; | |
f1c8b2ed | 1582 | int p_index = 0; |
b2476490 | 1583 | |
7452b219 MT |
1584 | /* sanity */ |
1585 | if (IS_ERR_OR_NULL(clk)) | |
1586 | return NULL; | |
1587 | ||
63f5c3b2 | 1588 | /* save parent rate, if it exists */ |
71472c0c JH |
1589 | parent = old_parent = clk->parent; |
1590 | if (parent) | |
1591 | best_parent_rate = parent->rate; | |
1592 | ||
1c8e6004 TV |
1593 | clk_core_get_boundaries(clk, &min_rate, &max_rate); |
1594 | ||
71472c0c JH |
1595 | /* find the closest rate and parent clk/rate */ |
1596 | if (clk->ops->determine_rate) { | |
646cafc6 | 1597 | parent_hw = parent ? parent->hw : NULL; |
71472c0c | 1598 | new_rate = clk->ops->determine_rate(clk->hw, rate, |
1c8e6004 TV |
1599 | min_rate, |
1600 | max_rate, | |
71472c0c | 1601 | &best_parent_rate, |
646cafc6 | 1602 | &parent_hw); |
035a61c3 | 1603 | parent = parent_hw ? parent_hw->core : NULL; |
71472c0c JH |
1604 | } else if (clk->ops->round_rate) { |
1605 | new_rate = clk->ops->round_rate(clk->hw, rate, | |
1606 | &best_parent_rate); | |
1c8e6004 TV |
1607 | if (new_rate < min_rate || new_rate > max_rate) |
1608 | return NULL; | |
71472c0c JH |
1609 | } else if (!parent || !(clk->flags & CLK_SET_RATE_PARENT)) { |
1610 | /* pass-through clock without adjustable parent */ | |
1611 | clk->new_rate = clk->rate; | |
1612 | return NULL; | |
1613 | } else { | |
1614 | /* pass-through clock with adjustable parent */ | |
1615 | top = clk_calc_new_rates(parent, rate); | |
1616 | new_rate = parent->new_rate; | |
63f5c3b2 | 1617 | goto out; |
7452b219 MT |
1618 | } |
1619 | ||
71472c0c JH |
1620 | /* some clocks must be gated to change parent */ |
1621 | if (parent != old_parent && | |
1622 | (clk->flags & CLK_SET_PARENT_GATE) && clk->prepare_count) { | |
1623 | pr_debug("%s: %s not gated but wants to reparent\n", | |
1624 | __func__, clk->name); | |
b2476490 MT |
1625 | return NULL; |
1626 | } | |
1627 | ||
71472c0c | 1628 | /* try finding the new parent index */ |
4526e7b8 | 1629 | if (parent && clk->num_parents > 1) { |
71472c0c | 1630 | p_index = clk_fetch_parent_index(clk, parent); |
f1c8b2ed | 1631 | if (p_index < 0) { |
71472c0c JH |
1632 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
1633 | __func__, parent->name, clk->name); | |
1634 | return NULL; | |
1635 | } | |
b2476490 MT |
1636 | } |
1637 | ||
71472c0c JH |
1638 | if ((clk->flags & CLK_SET_RATE_PARENT) && parent && |
1639 | best_parent_rate != parent->rate) | |
1640 | top = clk_calc_new_rates(parent, best_parent_rate); | |
b2476490 MT |
1641 | |
1642 | out: | |
71472c0c | 1643 | clk_calc_subtree(clk, new_rate, parent, p_index); |
b2476490 MT |
1644 | |
1645 | return top; | |
1646 | } | |
1647 | ||
1648 | /* | |
1649 | * Notify about rate changes in a subtree. Always walk down the whole tree | |
1650 | * so that in case of an error we can walk down the whole tree again and | |
1651 | * abort the change. | |
1652 | */ | |
035a61c3 TV |
1653 | static struct clk_core *clk_propagate_rate_change(struct clk_core *clk, |
1654 | unsigned long event) | |
b2476490 | 1655 | { |
035a61c3 | 1656 | struct clk_core *child, *tmp_clk, *fail_clk = NULL; |
b2476490 MT |
1657 | int ret = NOTIFY_DONE; |
1658 | ||
1659 | if (clk->rate == clk->new_rate) | |
5fda6858 | 1660 | return NULL; |
b2476490 MT |
1661 | |
1662 | if (clk->notifier_count) { | |
1663 | ret = __clk_notify(clk, event, clk->rate, clk->new_rate); | |
fb72a059 | 1664 | if (ret & NOTIFY_STOP_MASK) |
b2476490 MT |
1665 | fail_clk = clk; |
1666 | } | |
1667 | ||
b67bfe0d | 1668 | hlist_for_each_entry(child, &clk->children, child_node) { |
71472c0c JH |
1669 | /* Skip children who will be reparented to another clock */ |
1670 | if (child->new_parent && child->new_parent != clk) | |
1671 | continue; | |
1672 | tmp_clk = clk_propagate_rate_change(child, event); | |
1673 | if (tmp_clk) | |
1674 | fail_clk = tmp_clk; | |
1675 | } | |
1676 | ||
1677 | /* handle the new child who might not be in clk->children yet */ | |
1678 | if (clk->new_child) { | |
1679 | tmp_clk = clk_propagate_rate_change(clk->new_child, event); | |
1680 | if (tmp_clk) | |
1681 | fail_clk = tmp_clk; | |
b2476490 MT |
1682 | } |
1683 | ||
1684 | return fail_clk; | |
1685 | } | |
1686 | ||
1687 | /* | |
1688 | * walk down a subtree and set the new rates notifying the rate | |
1689 | * change on the way | |
1690 | */ | |
035a61c3 | 1691 | static void clk_change_rate(struct clk_core *clk) |
b2476490 | 1692 | { |
035a61c3 | 1693 | struct clk_core *child; |
067bb174 | 1694 | struct hlist_node *tmp; |
b2476490 | 1695 | unsigned long old_rate; |
bf47b4fd | 1696 | unsigned long best_parent_rate = 0; |
3fa2252b | 1697 | bool skip_set_rate = false; |
035a61c3 | 1698 | struct clk_core *old_parent; |
b2476490 MT |
1699 | |
1700 | old_rate = clk->rate; | |
1701 | ||
3fa2252b SB |
1702 | if (clk->new_parent) |
1703 | best_parent_rate = clk->new_parent->rate; | |
1704 | else if (clk->parent) | |
bf47b4fd PM |
1705 | best_parent_rate = clk->parent->rate; |
1706 | ||
3fa2252b SB |
1707 | if (clk->new_parent && clk->new_parent != clk->parent) { |
1708 | old_parent = __clk_set_parent_before(clk, clk->new_parent); | |
1709 | ||
1710 | if (clk->ops->set_rate_and_parent) { | |
1711 | skip_set_rate = true; | |
1712 | clk->ops->set_rate_and_parent(clk->hw, clk->new_rate, | |
1713 | best_parent_rate, | |
1714 | clk->new_parent_index); | |
1715 | } else if (clk->ops->set_parent) { | |
1716 | clk->ops->set_parent(clk->hw, clk->new_parent_index); | |
1717 | } | |
1718 | ||
1719 | __clk_set_parent_after(clk, clk->new_parent, old_parent); | |
1720 | } | |
1721 | ||
1722 | if (!skip_set_rate && clk->ops->set_rate) | |
bf47b4fd | 1723 | clk->ops->set_rate(clk->hw, clk->new_rate, best_parent_rate); |
b2476490 | 1724 | |
8f2c2db1 | 1725 | clk->rate = clk_recalc(clk, best_parent_rate); |
b2476490 MT |
1726 | |
1727 | if (clk->notifier_count && old_rate != clk->rate) | |
1728 | __clk_notify(clk, POST_RATE_CHANGE, old_rate, clk->rate); | |
1729 | ||
067bb174 TK |
1730 | /* |
1731 | * Use safe iteration, as change_rate can actually swap parents | |
1732 | * for certain clock types. | |
1733 | */ | |
1734 | hlist_for_each_entry_safe(child, tmp, &clk->children, child_node) { | |
71472c0c JH |
1735 | /* Skip children who will be reparented to another clock */ |
1736 | if (child->new_parent && child->new_parent != clk) | |
1737 | continue; | |
b2476490 | 1738 | clk_change_rate(child); |
71472c0c JH |
1739 | } |
1740 | ||
1741 | /* handle the new child who might not be in clk->children yet */ | |
1742 | if (clk->new_child) | |
1743 | clk_change_rate(clk->new_child); | |
b2476490 MT |
1744 | } |
1745 | ||
1c8e6004 TV |
1746 | static int clk_core_set_rate_nolock(struct clk_core *clk, |
1747 | unsigned long req_rate) | |
1748 | { | |
1749 | struct clk_core *top, *fail_clk; | |
1750 | unsigned long rate = req_rate; | |
1751 | int ret = 0; | |
1752 | ||
1753 | if (!clk) | |
1754 | return 0; | |
1755 | ||
1756 | /* bail early if nothing to do */ | |
1757 | if (rate == clk_core_get_rate_nolock(clk)) | |
1758 | return 0; | |
1759 | ||
1760 | if ((clk->flags & CLK_SET_RATE_GATE) && clk->prepare_count) | |
1761 | return -EBUSY; | |
1762 | ||
1763 | /* calculate new rates and get the topmost changed clock */ | |
1764 | top = clk_calc_new_rates(clk, rate); | |
1765 | if (!top) | |
1766 | return -EINVAL; | |
1767 | ||
1768 | /* notify that we are about to change rates */ | |
1769 | fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); | |
1770 | if (fail_clk) { | |
1771 | pr_debug("%s: failed to set %s rate\n", __func__, | |
1772 | fail_clk->name); | |
1773 | clk_propagate_rate_change(top, ABORT_RATE_CHANGE); | |
1774 | return -EBUSY; | |
1775 | } | |
1776 | ||
1777 | /* change the rates */ | |
1778 | clk_change_rate(top); | |
1779 | ||
1780 | clk->req_rate = req_rate; | |
1781 | ||
1782 | return ret; | |
1783 | } | |
1784 | ||
b2476490 MT |
1785 | /** |
1786 | * clk_set_rate - specify a new rate for clk | |
1787 | * @clk: the clk whose rate is being changed | |
1788 | * @rate: the new rate for clk | |
1789 | * | |
5654dc94 | 1790 | * In the simplest case clk_set_rate will only adjust the rate of clk. |
b2476490 | 1791 | * |
5654dc94 MT |
1792 | * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to |
1793 | * propagate up to clk's parent; whether or not this happens depends on the | |
1794 | * outcome of clk's .round_rate implementation. If *parent_rate is unchanged | |
1795 | * after calling .round_rate then upstream parent propagation is ignored. If | |
1796 | * *parent_rate comes back with a new rate for clk's parent then we propagate | |
24ee1a08 | 1797 | * up to clk's parent and set its rate. Upward propagation will continue |
5654dc94 MT |
1798 | * until either a clk does not support the CLK_SET_RATE_PARENT flag or |
1799 | * .round_rate stops requesting changes to clk's parent_rate. | |
b2476490 | 1800 | * |
5654dc94 MT |
1801 | * Rate changes are accomplished via tree traversal that also recalculates the |
1802 | * rates for the clocks and fires off POST_RATE_CHANGE notifiers. | |
b2476490 MT |
1803 | * |
1804 | * Returns 0 on success, -EERROR otherwise. | |
1805 | */ | |
1806 | int clk_set_rate(struct clk *clk, unsigned long rate) | |
1807 | { | |
1c8e6004 | 1808 | int ret; |
b2476490 | 1809 | |
89ac8d7a MT |
1810 | if (!clk) |
1811 | return 0; | |
1812 | ||
b2476490 | 1813 | /* prevent racing with updates to the clock topology */ |
eab89f69 | 1814 | clk_prepare_lock(); |
b2476490 | 1815 | |
1c8e6004 | 1816 | ret = clk_core_set_rate_nolock(clk->core, rate); |
b2476490 | 1817 | |
1c8e6004 | 1818 | clk_prepare_unlock(); |
0e1c0301 | 1819 | |
1c8e6004 TV |
1820 | return ret; |
1821 | } | |
1822 | EXPORT_SYMBOL_GPL(clk_set_rate); | |
b2476490 | 1823 | |
1c8e6004 TV |
1824 | /** |
1825 | * clk_set_rate_range - set a rate range for a clock source | |
1826 | * @clk: clock source | |
1827 | * @min: desired minimum clock rate in Hz, inclusive | |
1828 | * @max: desired maximum clock rate in Hz, inclusive | |
1829 | * | |
1830 | * Returns success (0) or negative errno. | |
1831 | */ | |
1832 | int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) | |
1833 | { | |
1834 | int ret = 0; | |
1835 | ||
1836 | if (!clk) | |
1837 | return 0; | |
1838 | ||
1839 | if (min > max) { | |
1840 | pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n", | |
1841 | __func__, clk->core->name, clk->dev_id, clk->con_id, | |
1842 | min, max); | |
1843 | return -EINVAL; | |
b2476490 MT |
1844 | } |
1845 | ||
1c8e6004 TV |
1846 | clk_prepare_lock(); |
1847 | ||
1848 | if (min != clk->min_rate || max != clk->max_rate) { | |
1849 | clk->min_rate = min; | |
1850 | clk->max_rate = max; | |
1851 | ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
1852 | } | |
b2476490 | 1853 | |
eab89f69 | 1854 | clk_prepare_unlock(); |
b2476490 MT |
1855 | |
1856 | return ret; | |
1857 | } | |
1c8e6004 TV |
1858 | EXPORT_SYMBOL_GPL(clk_set_rate_range); |
1859 | ||
1860 | /** | |
1861 | * clk_set_min_rate - set a minimum clock rate for a clock source | |
1862 | * @clk: clock source | |
1863 | * @rate: desired minimum clock rate in Hz, inclusive | |
1864 | * | |
1865 | * Returns success (0) or negative errno. | |
1866 | */ | |
1867 | int clk_set_min_rate(struct clk *clk, unsigned long rate) | |
1868 | { | |
1869 | if (!clk) | |
1870 | return 0; | |
1871 | ||
1872 | return clk_set_rate_range(clk, rate, clk->max_rate); | |
1873 | } | |
1874 | EXPORT_SYMBOL_GPL(clk_set_min_rate); | |
1875 | ||
1876 | /** | |
1877 | * clk_set_max_rate - set a maximum clock rate for a clock source | |
1878 | * @clk: clock source | |
1879 | * @rate: desired maximum clock rate in Hz, inclusive | |
1880 | * | |
1881 | * Returns success (0) or negative errno. | |
1882 | */ | |
1883 | int clk_set_max_rate(struct clk *clk, unsigned long rate) | |
1884 | { | |
1885 | if (!clk) | |
1886 | return 0; | |
1887 | ||
1888 | return clk_set_rate_range(clk, clk->min_rate, rate); | |
1889 | } | |
1890 | EXPORT_SYMBOL_GPL(clk_set_max_rate); | |
b2476490 MT |
1891 | |
1892 | /** | |
1893 | * clk_get_parent - return the parent of a clk | |
1894 | * @clk: the clk whose parent gets returned | |
1895 | * | |
1896 | * Simply returns clk->parent. Returns NULL if clk is NULL. | |
1897 | */ | |
1898 | struct clk *clk_get_parent(struct clk *clk) | |
1899 | { | |
1900 | struct clk *parent; | |
1901 | ||
eab89f69 | 1902 | clk_prepare_lock(); |
b2476490 | 1903 | parent = __clk_get_parent(clk); |
eab89f69 | 1904 | clk_prepare_unlock(); |
b2476490 MT |
1905 | |
1906 | return parent; | |
1907 | } | |
1908 | EXPORT_SYMBOL_GPL(clk_get_parent); | |
1909 | ||
1910 | /* | |
1911 | * .get_parent is mandatory for clocks with multiple possible parents. It is | |
1912 | * optional for single-parent clocks. Always call .get_parent if it is | |
1913 | * available and WARN if it is missing for multi-parent clocks. | |
1914 | * | |
1915 | * For single-parent clocks without .get_parent, first check to see if the | |
1916 | * .parents array exists, and if so use it to avoid an expensive tree | |
035a61c3 | 1917 | * traversal. If .parents does not exist then walk the tree. |
b2476490 | 1918 | */ |
035a61c3 | 1919 | static struct clk_core *__clk_init_parent(struct clk_core *clk) |
b2476490 | 1920 | { |
035a61c3 | 1921 | struct clk_core *ret = NULL; |
b2476490 MT |
1922 | u8 index; |
1923 | ||
1924 | /* handle the trivial cases */ | |
1925 | ||
1926 | if (!clk->num_parents) | |
1927 | goto out; | |
1928 | ||
1929 | if (clk->num_parents == 1) { | |
1930 | if (IS_ERR_OR_NULL(clk->parent)) | |
035a61c3 | 1931 | clk->parent = clk_core_lookup(clk->parent_names[0]); |
b2476490 MT |
1932 | ret = clk->parent; |
1933 | goto out; | |
1934 | } | |
1935 | ||
1936 | if (!clk->ops->get_parent) { | |
1937 | WARN(!clk->ops->get_parent, | |
1938 | "%s: multi-parent clocks must implement .get_parent\n", | |
1939 | __func__); | |
1940 | goto out; | |
1941 | }; | |
1942 | ||
1943 | /* | |
1944 | * Do our best to cache parent clocks in clk->parents. This prevents | |
035a61c3 TV |
1945 | * unnecessary and expensive lookups. We don't set clk->parent here; |
1946 | * that is done by the calling function. | |
b2476490 MT |
1947 | */ |
1948 | ||
1949 | index = clk->ops->get_parent(clk->hw); | |
1950 | ||
1951 | if (!clk->parents) | |
1952 | clk->parents = | |
96a7ed90 | 1953 | kcalloc(clk->num_parents, sizeof(struct clk *), |
b2476490 MT |
1954 | GFP_KERNEL); |
1955 | ||
035a61c3 | 1956 | ret = clk_core_get_parent_by_index(clk, index); |
b2476490 MT |
1957 | |
1958 | out: | |
1959 | return ret; | |
1960 | } | |
1961 | ||
035a61c3 TV |
1962 | static void clk_core_reparent(struct clk_core *clk, |
1963 | struct clk_core *new_parent) | |
b33d212f UH |
1964 | { |
1965 | clk_reparent(clk, new_parent); | |
5279fc40 | 1966 | __clk_recalc_accuracies(clk); |
b2476490 MT |
1967 | __clk_recalc_rates(clk, POST_RATE_CHANGE); |
1968 | } | |
1969 | ||
b2476490 | 1970 | /** |
4e88f3de TR |
1971 | * clk_has_parent - check if a clock is a possible parent for another |
1972 | * @clk: clock source | |
1973 | * @parent: parent clock source | |
b2476490 | 1974 | * |
4e88f3de TR |
1975 | * This function can be used in drivers that need to check that a clock can be |
1976 | * the parent of another without actually changing the parent. | |
f8aa0bd5 | 1977 | * |
4e88f3de | 1978 | * Returns true if @parent is a possible parent for @clk, false otherwise. |
b2476490 | 1979 | */ |
4e88f3de TR |
1980 | bool clk_has_parent(struct clk *clk, struct clk *parent) |
1981 | { | |
035a61c3 | 1982 | struct clk_core *core, *parent_core; |
4e88f3de TR |
1983 | unsigned int i; |
1984 | ||
1985 | /* NULL clocks should be nops, so return success if either is NULL. */ | |
1986 | if (!clk || !parent) | |
1987 | return true; | |
1988 | ||
035a61c3 TV |
1989 | core = clk->core; |
1990 | parent_core = parent->core; | |
1991 | ||
4e88f3de | 1992 | /* Optimize for the case where the parent is already the parent. */ |
035a61c3 | 1993 | if (core->parent == parent_core) |
4e88f3de TR |
1994 | return true; |
1995 | ||
035a61c3 TV |
1996 | for (i = 0; i < core->num_parents; i++) |
1997 | if (strcmp(core->parent_names[i], parent_core->name) == 0) | |
4e88f3de TR |
1998 | return true; |
1999 | ||
2000 | return false; | |
2001 | } | |
2002 | EXPORT_SYMBOL_GPL(clk_has_parent); | |
2003 | ||
035a61c3 | 2004 | static int clk_core_set_parent(struct clk_core *clk, struct clk_core *parent) |
b2476490 MT |
2005 | { |
2006 | int ret = 0; | |
f1c8b2ed | 2007 | int p_index = 0; |
031dcc9b | 2008 | unsigned long p_rate = 0; |
b2476490 | 2009 | |
89ac8d7a MT |
2010 | if (!clk) |
2011 | return 0; | |
2012 | ||
031dcc9b UH |
2013 | /* verify ops for for multi-parent clks */ |
2014 | if ((clk->num_parents > 1) && (!clk->ops->set_parent)) | |
b2476490 MT |
2015 | return -ENOSYS; |
2016 | ||
2017 | /* prevent racing with updates to the clock topology */ | |
eab89f69 | 2018 | clk_prepare_lock(); |
b2476490 MT |
2019 | |
2020 | if (clk->parent == parent) | |
2021 | goto out; | |
2022 | ||
031dcc9b UH |
2023 | /* check that we are allowed to re-parent if the clock is in use */ |
2024 | if ((clk->flags & CLK_SET_PARENT_GATE) && clk->prepare_count) { | |
2025 | ret = -EBUSY; | |
2026 | goto out; | |
2027 | } | |
2028 | ||
2029 | /* try finding the new parent index */ | |
2030 | if (parent) { | |
2031 | p_index = clk_fetch_parent_index(clk, parent); | |
2032 | p_rate = parent->rate; | |
f1c8b2ed | 2033 | if (p_index < 0) { |
031dcc9b UH |
2034 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
2035 | __func__, parent->name, clk->name); | |
f1c8b2ed | 2036 | ret = p_index; |
031dcc9b UH |
2037 | goto out; |
2038 | } | |
2039 | } | |
2040 | ||
b2476490 | 2041 | /* propagate PRE_RATE_CHANGE notifications */ |
f3aab5d6 | 2042 | ret = __clk_speculate_rates(clk, p_rate); |
b2476490 MT |
2043 | |
2044 | /* abort if a driver objects */ | |
fb72a059 | 2045 | if (ret & NOTIFY_STOP_MASK) |
b2476490 MT |
2046 | goto out; |
2047 | ||
031dcc9b UH |
2048 | /* do the re-parent */ |
2049 | ret = __clk_set_parent(clk, parent, p_index); | |
b2476490 | 2050 | |
5279fc40 BB |
2051 | /* propagate rate an accuracy recalculation accordingly */ |
2052 | if (ret) { | |
b2476490 | 2053 | __clk_recalc_rates(clk, ABORT_RATE_CHANGE); |
5279fc40 | 2054 | } else { |
a68de8e4 | 2055 | __clk_recalc_rates(clk, POST_RATE_CHANGE); |
5279fc40 BB |
2056 | __clk_recalc_accuracies(clk); |
2057 | } | |
b2476490 MT |
2058 | |
2059 | out: | |
eab89f69 | 2060 | clk_prepare_unlock(); |
b2476490 MT |
2061 | |
2062 | return ret; | |
2063 | } | |
035a61c3 TV |
2064 | |
2065 | /** | |
2066 | * clk_set_parent - switch the parent of a mux clk | |
2067 | * @clk: the mux clk whose input we are switching | |
2068 | * @parent: the new input to clk | |
2069 | * | |
2070 | * Re-parent clk to use parent as its new input source. If clk is in | |
2071 | * prepared state, the clk will get enabled for the duration of this call. If | |
2072 | * that's not acceptable for a specific clk (Eg: the consumer can't handle | |
2073 | * that, the reparenting is glitchy in hardware, etc), use the | |
2074 | * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared. | |
2075 | * | |
2076 | * After successfully changing clk's parent clk_set_parent will update the | |
2077 | * clk topology, sysfs topology and propagate rate recalculation via | |
2078 | * __clk_recalc_rates. | |
2079 | * | |
2080 | * Returns 0 on success, -EERROR otherwise. | |
2081 | */ | |
2082 | int clk_set_parent(struct clk *clk, struct clk *parent) | |
2083 | { | |
2084 | if (!clk) | |
2085 | return 0; | |
2086 | ||
2087 | return clk_core_set_parent(clk->core, parent ? parent->core : NULL); | |
2088 | } | |
b2476490 MT |
2089 | EXPORT_SYMBOL_GPL(clk_set_parent); |
2090 | ||
e59c5371 MT |
2091 | /** |
2092 | * clk_set_phase - adjust the phase shift of a clock signal | |
2093 | * @clk: clock signal source | |
2094 | * @degrees: number of degrees the signal is shifted | |
2095 | * | |
2096 | * Shifts the phase of a clock signal by the specified | |
2097 | * degrees. Returns 0 on success, -EERROR otherwise. | |
2098 | * | |
2099 | * This function makes no distinction about the input or reference | |
2100 | * signal that we adjust the clock signal phase against. For example | |
2101 | * phase locked-loop clock signal generators we may shift phase with | |
2102 | * respect to feedback clock signal input, but for other cases the | |
2103 | * clock phase may be shifted with respect to some other, unspecified | |
2104 | * signal. | |
2105 | * | |
2106 | * Additionally the concept of phase shift does not propagate through | |
2107 | * the clock tree hierarchy, which sets it apart from clock rates and | |
2108 | * clock accuracy. A parent clock phase attribute does not have an | |
2109 | * impact on the phase attribute of a child clock. | |
2110 | */ | |
2111 | int clk_set_phase(struct clk *clk, int degrees) | |
2112 | { | |
2113 | int ret = 0; | |
2114 | ||
2115 | if (!clk) | |
2116 | goto out; | |
2117 | ||
2118 | /* sanity check degrees */ | |
2119 | degrees %= 360; | |
2120 | if (degrees < 0) | |
2121 | degrees += 360; | |
2122 | ||
2123 | clk_prepare_lock(); | |
2124 | ||
035a61c3 | 2125 | if (!clk->core->ops->set_phase) |
e59c5371 MT |
2126 | goto out_unlock; |
2127 | ||
035a61c3 | 2128 | ret = clk->core->ops->set_phase(clk->core->hw, degrees); |
e59c5371 MT |
2129 | |
2130 | if (!ret) | |
035a61c3 | 2131 | clk->core->phase = degrees; |
e59c5371 MT |
2132 | |
2133 | out_unlock: | |
2134 | clk_prepare_unlock(); | |
2135 | ||
2136 | out: | |
2137 | return ret; | |
2138 | } | |
9767b04f | 2139 | EXPORT_SYMBOL_GPL(clk_set_phase); |
e59c5371 | 2140 | |
035a61c3 | 2141 | static int clk_core_get_phase(struct clk_core *clk) |
e59c5371 MT |
2142 | { |
2143 | int ret = 0; | |
2144 | ||
2145 | if (!clk) | |
2146 | goto out; | |
2147 | ||
2148 | clk_prepare_lock(); | |
2149 | ret = clk->phase; | |
2150 | clk_prepare_unlock(); | |
2151 | ||
2152 | out: | |
2153 | return ret; | |
2154 | } | |
9767b04f | 2155 | EXPORT_SYMBOL_GPL(clk_get_phase); |
e59c5371 | 2156 | |
035a61c3 TV |
2157 | /** |
2158 | * clk_get_phase - return the phase shift of a clock signal | |
2159 | * @clk: clock signal source | |
2160 | * | |
2161 | * Returns the phase shift of a clock node in degrees, otherwise returns | |
2162 | * -EERROR. | |
2163 | */ | |
2164 | int clk_get_phase(struct clk *clk) | |
2165 | { | |
2166 | if (!clk) | |
2167 | return 0; | |
2168 | ||
2169 | return clk_core_get_phase(clk->core); | |
2170 | } | |
e59c5371 | 2171 | |
3d3801ef MT |
2172 | /** |
2173 | * clk_is_match - check if two clk's point to the same hardware clock | |
2174 | * @p: clk compared against q | |
2175 | * @q: clk compared against p | |
2176 | * | |
2177 | * Returns true if the two struct clk pointers both point to the same hardware | |
2178 | * clock node. Put differently, returns true if struct clk *p and struct clk *q | |
2179 | * share the same struct clk_core object. | |
2180 | * | |
2181 | * Returns false otherwise. Note that two NULL clks are treated as matching. | |
2182 | */ | |
2183 | bool clk_is_match(const struct clk *p, const struct clk *q) | |
2184 | { | |
2185 | /* trivial case: identical struct clk's or both NULL */ | |
2186 | if (p == q) | |
2187 | return true; | |
2188 | ||
2189 | /* true if clk->core pointers match. Avoid derefing garbage */ | |
2190 | if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q)) | |
2191 | if (p->core == q->core) | |
2192 | return true; | |
2193 | ||
2194 | return false; | |
2195 | } | |
2196 | EXPORT_SYMBOL_GPL(clk_is_match); | |
2197 | ||
b2476490 MT |
2198 | /** |
2199 | * __clk_init - initialize the data structures in a struct clk | |
2200 | * @dev: device initializing this clk, placeholder for now | |
2201 | * @clk: clk being initialized | |
2202 | * | |
035a61c3 | 2203 | * Initializes the lists in struct clk_core, queries the hardware for the |
b2476490 | 2204 | * parent and rate and sets them both. |
b2476490 | 2205 | */ |
b09d6d99 | 2206 | static int __clk_init(struct device *dev, struct clk *clk_user) |
b2476490 | 2207 | { |
d1302a36 | 2208 | int i, ret = 0; |
035a61c3 | 2209 | struct clk_core *orphan; |
b67bfe0d | 2210 | struct hlist_node *tmp2; |
035a61c3 | 2211 | struct clk_core *clk; |
1c8e6004 | 2212 | unsigned long rate; |
b2476490 | 2213 | |
035a61c3 | 2214 | if (!clk_user) |
d1302a36 | 2215 | return -EINVAL; |
b2476490 | 2216 | |
035a61c3 TV |
2217 | clk = clk_user->core; |
2218 | ||
eab89f69 | 2219 | clk_prepare_lock(); |
b2476490 MT |
2220 | |
2221 | /* check to see if a clock with this name is already registered */ | |
035a61c3 | 2222 | if (clk_core_lookup(clk->name)) { |
d1302a36 MT |
2223 | pr_debug("%s: clk %s already initialized\n", |
2224 | __func__, clk->name); | |
2225 | ret = -EEXIST; | |
b2476490 | 2226 | goto out; |
d1302a36 | 2227 | } |
b2476490 | 2228 | |
d4d7e3dd MT |
2229 | /* check that clk_ops are sane. See Documentation/clk.txt */ |
2230 | if (clk->ops->set_rate && | |
71472c0c JH |
2231 | !((clk->ops->round_rate || clk->ops->determine_rate) && |
2232 | clk->ops->recalc_rate)) { | |
2233 | pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", | |
d4d7e3dd | 2234 | __func__, clk->name); |
d1302a36 | 2235 | ret = -EINVAL; |
d4d7e3dd MT |
2236 | goto out; |
2237 | } | |
2238 | ||
2239 | if (clk->ops->set_parent && !clk->ops->get_parent) { | |
2240 | pr_warning("%s: %s must implement .get_parent & .set_parent\n", | |
2241 | __func__, clk->name); | |
d1302a36 | 2242 | ret = -EINVAL; |
d4d7e3dd MT |
2243 | goto out; |
2244 | } | |
2245 | ||
3fa2252b SB |
2246 | if (clk->ops->set_rate_and_parent && |
2247 | !(clk->ops->set_parent && clk->ops->set_rate)) { | |
2248 | pr_warn("%s: %s must implement .set_parent & .set_rate\n", | |
2249 | __func__, clk->name); | |
2250 | ret = -EINVAL; | |
2251 | goto out; | |
2252 | } | |
2253 | ||
b2476490 MT |
2254 | /* throw a WARN if any entries in parent_names are NULL */ |
2255 | for (i = 0; i < clk->num_parents; i++) | |
2256 | WARN(!clk->parent_names[i], | |
2257 | "%s: invalid NULL in %s's .parent_names\n", | |
2258 | __func__, clk->name); | |
2259 | ||
2260 | /* | |
2261 | * Allocate an array of struct clk *'s to avoid unnecessary string | |
2262 | * look-ups of clk's possible parents. This can fail for clocks passed | |
2263 | * in to clk_init during early boot; thus any access to clk->parents[] | |
2264 | * must always check for a NULL pointer and try to populate it if | |
2265 | * necessary. | |
2266 | * | |
2267 | * If clk->parents is not NULL we skip this entire block. This allows | |
2268 | * for clock drivers to statically initialize clk->parents. | |
2269 | */ | |
9ca1c5a4 | 2270 | if (clk->num_parents > 1 && !clk->parents) { |
96a7ed90 TF |
2271 | clk->parents = kcalloc(clk->num_parents, sizeof(struct clk *), |
2272 | GFP_KERNEL); | |
b2476490 | 2273 | /* |
035a61c3 | 2274 | * clk_core_lookup returns NULL for parents that have not been |
b2476490 MT |
2275 | * clk_init'd; thus any access to clk->parents[] must check |
2276 | * for a NULL pointer. We can always perform lazy lookups for | |
2277 | * missing parents later on. | |
2278 | */ | |
2279 | if (clk->parents) | |
2280 | for (i = 0; i < clk->num_parents; i++) | |
2281 | clk->parents[i] = | |
035a61c3 | 2282 | clk_core_lookup(clk->parent_names[i]); |
b2476490 MT |
2283 | } |
2284 | ||
2285 | clk->parent = __clk_init_parent(clk); | |
2286 | ||
2287 | /* | |
2288 | * Populate clk->parent if parent has already been __clk_init'd. If | |
2289 | * parent has not yet been __clk_init'd then place clk in the orphan | |
2290 | * list. If clk has set the CLK_IS_ROOT flag then place it in the root | |
2291 | * clk list. | |
2292 | * | |
2293 | * Every time a new clk is clk_init'd then we walk the list of orphan | |
2294 | * clocks and re-parent any that are children of the clock currently | |
2295 | * being clk_init'd. | |
2296 | */ | |
2297 | if (clk->parent) | |
2298 | hlist_add_head(&clk->child_node, | |
2299 | &clk->parent->children); | |
2300 | else if (clk->flags & CLK_IS_ROOT) | |
2301 | hlist_add_head(&clk->child_node, &clk_root_list); | |
2302 | else | |
2303 | hlist_add_head(&clk->child_node, &clk_orphan_list); | |
2304 | ||
5279fc40 BB |
2305 | /* |
2306 | * Set clk's accuracy. The preferred method is to use | |
2307 | * .recalc_accuracy. For simple clocks and lazy developers the default | |
2308 | * fallback is to use the parent's accuracy. If a clock doesn't have a | |
2309 | * parent (or is orphaned) then accuracy is set to zero (perfect | |
2310 | * clock). | |
2311 | */ | |
2312 | if (clk->ops->recalc_accuracy) | |
2313 | clk->accuracy = clk->ops->recalc_accuracy(clk->hw, | |
2314 | __clk_get_accuracy(clk->parent)); | |
2315 | else if (clk->parent) | |
2316 | clk->accuracy = clk->parent->accuracy; | |
2317 | else | |
2318 | clk->accuracy = 0; | |
2319 | ||
9824cf73 MR |
2320 | /* |
2321 | * Set clk's phase. | |
2322 | * Since a phase is by definition relative to its parent, just | |
2323 | * query the current clock phase, or just assume it's in phase. | |
2324 | */ | |
2325 | if (clk->ops->get_phase) | |
2326 | clk->phase = clk->ops->get_phase(clk->hw); | |
2327 | else | |
2328 | clk->phase = 0; | |
2329 | ||
b2476490 MT |
2330 | /* |
2331 | * Set clk's rate. The preferred method is to use .recalc_rate. For | |
2332 | * simple clocks and lazy developers the default fallback is to use the | |
2333 | * parent's rate. If a clock doesn't have a parent (or is orphaned) | |
2334 | * then rate is set to zero. | |
2335 | */ | |
2336 | if (clk->ops->recalc_rate) | |
1c8e6004 | 2337 | rate = clk->ops->recalc_rate(clk->hw, |
035a61c3 | 2338 | clk_core_get_rate_nolock(clk->parent)); |
b2476490 | 2339 | else if (clk->parent) |
1c8e6004 | 2340 | rate = clk->parent->rate; |
b2476490 | 2341 | else |
1c8e6004 TV |
2342 | rate = 0; |
2343 | clk->rate = clk->req_rate = rate; | |
b2476490 MT |
2344 | |
2345 | /* | |
2346 | * walk the list of orphan clocks and reparent any that are children of | |
2347 | * this clock | |
2348 | */ | |
b67bfe0d | 2349 | hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { |
12d29886 | 2350 | if (orphan->num_parents && orphan->ops->get_parent) { |
1f61e5f1 MF |
2351 | i = orphan->ops->get_parent(orphan->hw); |
2352 | if (!strcmp(clk->name, orphan->parent_names[i])) | |
035a61c3 | 2353 | clk_core_reparent(orphan, clk); |
1f61e5f1 MF |
2354 | continue; |
2355 | } | |
2356 | ||
b2476490 MT |
2357 | for (i = 0; i < orphan->num_parents; i++) |
2358 | if (!strcmp(clk->name, orphan->parent_names[i])) { | |
035a61c3 | 2359 | clk_core_reparent(orphan, clk); |
b2476490 MT |
2360 | break; |
2361 | } | |
1f61e5f1 | 2362 | } |
b2476490 MT |
2363 | |
2364 | /* | |
2365 | * optional platform-specific magic | |
2366 | * | |
2367 | * The .init callback is not used by any of the basic clock types, but | |
2368 | * exists for weird hardware that must perform initialization magic. | |
2369 | * Please consider other ways of solving initialization problems before | |
24ee1a08 | 2370 | * using this callback, as its use is discouraged. |
b2476490 MT |
2371 | */ |
2372 | if (clk->ops->init) | |
2373 | clk->ops->init(clk->hw); | |
2374 | ||
fcb0ee6a | 2375 | kref_init(&clk->ref); |
b2476490 | 2376 | out: |
eab89f69 | 2377 | clk_prepare_unlock(); |
b2476490 | 2378 | |
89f7e9de SB |
2379 | if (!ret) |
2380 | clk_debug_register(clk); | |
2381 | ||
d1302a36 | 2382 | return ret; |
b2476490 MT |
2383 | } |
2384 | ||
035a61c3 TV |
2385 | struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id, |
2386 | const char *con_id) | |
0197b3ea | 2387 | { |
0197b3ea SK |
2388 | struct clk *clk; |
2389 | ||
035a61c3 TV |
2390 | /* This is to allow this function to be chained to others */ |
2391 | if (!hw || IS_ERR(hw)) | |
2392 | return (struct clk *) hw; | |
0197b3ea | 2393 | |
035a61c3 TV |
2394 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); |
2395 | if (!clk) | |
2396 | return ERR_PTR(-ENOMEM); | |
2397 | ||
2398 | clk->core = hw->core; | |
2399 | clk->dev_id = dev_id; | |
2400 | clk->con_id = con_id; | |
1c8e6004 TV |
2401 | clk->max_rate = ULONG_MAX; |
2402 | ||
2403 | clk_prepare_lock(); | |
2404 | hlist_add_head(&clk->child_node, &hw->core->clks); | |
2405 | clk_prepare_unlock(); | |
0197b3ea SK |
2406 | |
2407 | return clk; | |
2408 | } | |
035a61c3 | 2409 | |
73e0e496 | 2410 | void __clk_free_clk(struct clk *clk) |
1c8e6004 TV |
2411 | { |
2412 | clk_prepare_lock(); | |
2413 | hlist_del(&clk->child_node); | |
2414 | clk_prepare_unlock(); | |
2415 | ||
2416 | kfree(clk); | |
2417 | } | |
0197b3ea | 2418 | |
293ba3b4 SB |
2419 | /** |
2420 | * clk_register - allocate a new clock, register it and return an opaque cookie | |
2421 | * @dev: device that is registering this clock | |
2422 | * @hw: link to hardware-specific clock data | |
2423 | * | |
2424 | * clk_register is the primary interface for populating the clock tree with new | |
2425 | * clock nodes. It returns a pointer to the newly allocated struct clk which | |
2426 | * cannot be dereferenced by driver code but may be used in conjuction with the | |
2427 | * rest of the clock API. In the event of an error clk_register will return an | |
2428 | * error code; drivers must test for an error code after calling clk_register. | |
2429 | */ | |
2430 | struct clk *clk_register(struct device *dev, struct clk_hw *hw) | |
b2476490 | 2431 | { |
d1302a36 | 2432 | int i, ret; |
035a61c3 | 2433 | struct clk_core *clk; |
293ba3b4 SB |
2434 | |
2435 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); | |
2436 | if (!clk) { | |
2437 | pr_err("%s: could not allocate clk\n", __func__); | |
2438 | ret = -ENOMEM; | |
2439 | goto fail_out; | |
2440 | } | |
b2476490 | 2441 | |
612936f2 | 2442 | clk->name = kstrdup_const(hw->init->name, GFP_KERNEL); |
0197b3ea SK |
2443 | if (!clk->name) { |
2444 | pr_err("%s: could not allocate clk->name\n", __func__); | |
2445 | ret = -ENOMEM; | |
2446 | goto fail_name; | |
2447 | } | |
2448 | clk->ops = hw->init->ops; | |
ac2df527 SN |
2449 | if (dev && dev->driver) |
2450 | clk->owner = dev->driver->owner; | |
b2476490 | 2451 | clk->hw = hw; |
0197b3ea SK |
2452 | clk->flags = hw->init->flags; |
2453 | clk->num_parents = hw->init->num_parents; | |
035a61c3 | 2454 | hw->core = clk; |
b2476490 | 2455 | |
d1302a36 | 2456 | /* allocate local copy in case parent_names is __initdata */ |
96a7ed90 TF |
2457 | clk->parent_names = kcalloc(clk->num_parents, sizeof(char *), |
2458 | GFP_KERNEL); | |
d1302a36 MT |
2459 | |
2460 | if (!clk->parent_names) { | |
2461 | pr_err("%s: could not allocate clk->parent_names\n", __func__); | |
2462 | ret = -ENOMEM; | |
2463 | goto fail_parent_names; | |
2464 | } | |
2465 | ||
2466 | ||
2467 | /* copy each string name in case parent_names is __initdata */ | |
0197b3ea | 2468 | for (i = 0; i < clk->num_parents; i++) { |
612936f2 | 2469 | clk->parent_names[i] = kstrdup_const(hw->init->parent_names[i], |
0197b3ea | 2470 | GFP_KERNEL); |
d1302a36 MT |
2471 | if (!clk->parent_names[i]) { |
2472 | pr_err("%s: could not copy parent_names\n", __func__); | |
2473 | ret = -ENOMEM; | |
2474 | goto fail_parent_names_copy; | |
2475 | } | |
2476 | } | |
2477 | ||
1c8e6004 TV |
2478 | INIT_HLIST_HEAD(&clk->clks); |
2479 | ||
035a61c3 TV |
2480 | hw->clk = __clk_create_clk(hw, NULL, NULL); |
2481 | if (IS_ERR(hw->clk)) { | |
2482 | pr_err("%s: could not allocate per-user clk\n", __func__); | |
2483 | ret = PTR_ERR(hw->clk); | |
2484 | goto fail_parent_names_copy; | |
2485 | } | |
2486 | ||
2487 | ret = __clk_init(dev, hw->clk); | |
d1302a36 | 2488 | if (!ret) |
035a61c3 | 2489 | return hw->clk; |
b2476490 | 2490 | |
1c8e6004 | 2491 | __clk_free_clk(hw->clk); |
035a61c3 | 2492 | hw->clk = NULL; |
b2476490 | 2493 | |
d1302a36 MT |
2494 | fail_parent_names_copy: |
2495 | while (--i >= 0) | |
612936f2 | 2496 | kfree_const(clk->parent_names[i]); |
d1302a36 MT |
2497 | kfree(clk->parent_names); |
2498 | fail_parent_names: | |
612936f2 | 2499 | kfree_const(clk->name); |
0197b3ea | 2500 | fail_name: |
d1302a36 MT |
2501 | kfree(clk); |
2502 | fail_out: | |
2503 | return ERR_PTR(ret); | |
b2476490 MT |
2504 | } |
2505 | EXPORT_SYMBOL_GPL(clk_register); | |
2506 | ||
fcb0ee6a SN |
2507 | /* |
2508 | * Free memory allocated for a clock. | |
2509 | * Caller must hold prepare_lock. | |
2510 | */ | |
2511 | static void __clk_release(struct kref *ref) | |
2512 | { | |
035a61c3 | 2513 | struct clk_core *clk = container_of(ref, struct clk_core, ref); |
fcb0ee6a SN |
2514 | int i = clk->num_parents; |
2515 | ||
2516 | kfree(clk->parents); | |
2517 | while (--i >= 0) | |
612936f2 | 2518 | kfree_const(clk->parent_names[i]); |
fcb0ee6a SN |
2519 | |
2520 | kfree(clk->parent_names); | |
612936f2 | 2521 | kfree_const(clk->name); |
fcb0ee6a SN |
2522 | kfree(clk); |
2523 | } | |
2524 | ||
2525 | /* | |
2526 | * Empty clk_ops for unregistered clocks. These are used temporarily | |
2527 | * after clk_unregister() was called on a clock and until last clock | |
2528 | * consumer calls clk_put() and the struct clk object is freed. | |
2529 | */ | |
2530 | static int clk_nodrv_prepare_enable(struct clk_hw *hw) | |
2531 | { | |
2532 | return -ENXIO; | |
2533 | } | |
2534 | ||
2535 | static void clk_nodrv_disable_unprepare(struct clk_hw *hw) | |
2536 | { | |
2537 | WARN_ON_ONCE(1); | |
2538 | } | |
2539 | ||
2540 | static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate, | |
2541 | unsigned long parent_rate) | |
2542 | { | |
2543 | return -ENXIO; | |
2544 | } | |
2545 | ||
2546 | static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) | |
2547 | { | |
2548 | return -ENXIO; | |
2549 | } | |
2550 | ||
2551 | static const struct clk_ops clk_nodrv_ops = { | |
2552 | .enable = clk_nodrv_prepare_enable, | |
2553 | .disable = clk_nodrv_disable_unprepare, | |
2554 | .prepare = clk_nodrv_prepare_enable, | |
2555 | .unprepare = clk_nodrv_disable_unprepare, | |
2556 | .set_rate = clk_nodrv_set_rate, | |
2557 | .set_parent = clk_nodrv_set_parent, | |
2558 | }; | |
2559 | ||
1df5c939 MB |
2560 | /** |
2561 | * clk_unregister - unregister a currently registered clock | |
2562 | * @clk: clock to unregister | |
1df5c939 | 2563 | */ |
fcb0ee6a SN |
2564 | void clk_unregister(struct clk *clk) |
2565 | { | |
2566 | unsigned long flags; | |
2567 | ||
6314b679 SB |
2568 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
2569 | return; | |
2570 | ||
035a61c3 | 2571 | clk_debug_unregister(clk->core); |
fcb0ee6a SN |
2572 | |
2573 | clk_prepare_lock(); | |
2574 | ||
035a61c3 TV |
2575 | if (clk->core->ops == &clk_nodrv_ops) { |
2576 | pr_err("%s: unregistered clock: %s\n", __func__, | |
2577 | clk->core->name); | |
6314b679 | 2578 | return; |
fcb0ee6a SN |
2579 | } |
2580 | /* | |
2581 | * Assign empty clock ops for consumers that might still hold | |
2582 | * a reference to this clock. | |
2583 | */ | |
2584 | flags = clk_enable_lock(); | |
035a61c3 | 2585 | clk->core->ops = &clk_nodrv_ops; |
fcb0ee6a SN |
2586 | clk_enable_unlock(flags); |
2587 | ||
035a61c3 TV |
2588 | if (!hlist_empty(&clk->core->children)) { |
2589 | struct clk_core *child; | |
874f224c | 2590 | struct hlist_node *t; |
fcb0ee6a SN |
2591 | |
2592 | /* Reparent all children to the orphan list. */ | |
035a61c3 TV |
2593 | hlist_for_each_entry_safe(child, t, &clk->core->children, |
2594 | child_node) | |
2595 | clk_core_set_parent(child, NULL); | |
fcb0ee6a SN |
2596 | } |
2597 | ||
035a61c3 | 2598 | hlist_del_init(&clk->core->child_node); |
fcb0ee6a | 2599 | |
035a61c3 | 2600 | if (clk->core->prepare_count) |
fcb0ee6a | 2601 | pr_warn("%s: unregistering prepared clock: %s\n", |
035a61c3 TV |
2602 | __func__, clk->core->name); |
2603 | kref_put(&clk->core->ref, __clk_release); | |
6314b679 | 2604 | |
fcb0ee6a SN |
2605 | clk_prepare_unlock(); |
2606 | } | |
1df5c939 MB |
2607 | EXPORT_SYMBOL_GPL(clk_unregister); |
2608 | ||
46c8773a SB |
2609 | static void devm_clk_release(struct device *dev, void *res) |
2610 | { | |
293ba3b4 | 2611 | clk_unregister(*(struct clk **)res); |
46c8773a SB |
2612 | } |
2613 | ||
2614 | /** | |
2615 | * devm_clk_register - resource managed clk_register() | |
2616 | * @dev: device that is registering this clock | |
2617 | * @hw: link to hardware-specific clock data | |
2618 | * | |
2619 | * Managed clk_register(). Clocks returned from this function are | |
2620 | * automatically clk_unregister()ed on driver detach. See clk_register() for | |
2621 | * more information. | |
2622 | */ | |
2623 | struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) | |
2624 | { | |
2625 | struct clk *clk; | |
293ba3b4 | 2626 | struct clk **clkp; |
46c8773a | 2627 | |
293ba3b4 SB |
2628 | clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); |
2629 | if (!clkp) | |
46c8773a SB |
2630 | return ERR_PTR(-ENOMEM); |
2631 | ||
293ba3b4 SB |
2632 | clk = clk_register(dev, hw); |
2633 | if (!IS_ERR(clk)) { | |
2634 | *clkp = clk; | |
2635 | devres_add(dev, clkp); | |
46c8773a | 2636 | } else { |
293ba3b4 | 2637 | devres_free(clkp); |
46c8773a SB |
2638 | } |
2639 | ||
2640 | return clk; | |
2641 | } | |
2642 | EXPORT_SYMBOL_GPL(devm_clk_register); | |
2643 | ||
2644 | static int devm_clk_match(struct device *dev, void *res, void *data) | |
2645 | { | |
2646 | struct clk *c = res; | |
2647 | if (WARN_ON(!c)) | |
2648 | return 0; | |
2649 | return c == data; | |
2650 | } | |
2651 | ||
2652 | /** | |
2653 | * devm_clk_unregister - resource managed clk_unregister() | |
2654 | * @clk: clock to unregister | |
2655 | * | |
2656 | * Deallocate a clock allocated with devm_clk_register(). Normally | |
2657 | * this function will not need to be called and the resource management | |
2658 | * code will ensure that the resource is freed. | |
2659 | */ | |
2660 | void devm_clk_unregister(struct device *dev, struct clk *clk) | |
2661 | { | |
2662 | WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk)); | |
2663 | } | |
2664 | EXPORT_SYMBOL_GPL(devm_clk_unregister); | |
2665 | ||
ac2df527 SN |
2666 | /* |
2667 | * clkdev helpers | |
2668 | */ | |
2669 | int __clk_get(struct clk *clk) | |
2670 | { | |
035a61c3 TV |
2671 | struct clk_core *core = !clk ? NULL : clk->core; |
2672 | ||
2673 | if (core) { | |
2674 | if (!try_module_get(core->owner)) | |
00efcb1c | 2675 | return 0; |
ac2df527 | 2676 | |
035a61c3 | 2677 | kref_get(&core->ref); |
00efcb1c | 2678 | } |
ac2df527 SN |
2679 | return 1; |
2680 | } | |
2681 | ||
2682 | void __clk_put(struct clk *clk) | |
2683 | { | |
10cdfe54 TV |
2684 | struct module *owner; |
2685 | ||
00efcb1c | 2686 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
ac2df527 SN |
2687 | return; |
2688 | ||
fcb0ee6a | 2689 | clk_prepare_lock(); |
1c8e6004 TV |
2690 | |
2691 | hlist_del(&clk->child_node); | |
ec02ace8 TV |
2692 | if (clk->min_rate > clk->core->req_rate || |
2693 | clk->max_rate < clk->core->req_rate) | |
2694 | clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
2695 | ||
1c8e6004 TV |
2696 | owner = clk->core->owner; |
2697 | kref_put(&clk->core->ref, __clk_release); | |
2698 | ||
fcb0ee6a SN |
2699 | clk_prepare_unlock(); |
2700 | ||
10cdfe54 | 2701 | module_put(owner); |
035a61c3 | 2702 | |
035a61c3 | 2703 | kfree(clk); |
ac2df527 SN |
2704 | } |
2705 | ||
b2476490 MT |
2706 | /*** clk rate change notifiers ***/ |
2707 | ||
2708 | /** | |
2709 | * clk_notifier_register - add a clk rate change notifier | |
2710 | * @clk: struct clk * to watch | |
2711 | * @nb: struct notifier_block * with callback info | |
2712 | * | |
2713 | * Request notification when clk's rate changes. This uses an SRCU | |
2714 | * notifier because we want it to block and notifier unregistrations are | |
2715 | * uncommon. The callbacks associated with the notifier must not | |
2716 | * re-enter into the clk framework by calling any top-level clk APIs; | |
2717 | * this will cause a nested prepare_lock mutex. | |
2718 | * | |
5324fda7 SB |
2719 | * In all notification cases cases (pre, post and abort rate change) the |
2720 | * original clock rate is passed to the callback via struct | |
2721 | * clk_notifier_data.old_rate and the new frequency is passed via struct | |
b2476490 MT |
2722 | * clk_notifier_data.new_rate. |
2723 | * | |
b2476490 MT |
2724 | * clk_notifier_register() must be called from non-atomic context. |
2725 | * Returns -EINVAL if called with null arguments, -ENOMEM upon | |
2726 | * allocation failure; otherwise, passes along the return value of | |
2727 | * srcu_notifier_chain_register(). | |
2728 | */ | |
2729 | int clk_notifier_register(struct clk *clk, struct notifier_block *nb) | |
2730 | { | |
2731 | struct clk_notifier *cn; | |
2732 | int ret = -ENOMEM; | |
2733 | ||
2734 | if (!clk || !nb) | |
2735 | return -EINVAL; | |
2736 | ||
eab89f69 | 2737 | clk_prepare_lock(); |
b2476490 MT |
2738 | |
2739 | /* search the list of notifiers for this clk */ | |
2740 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2741 | if (cn->clk == clk) | |
2742 | break; | |
2743 | ||
2744 | /* if clk wasn't in the notifier list, allocate new clk_notifier */ | |
2745 | if (cn->clk != clk) { | |
2746 | cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL); | |
2747 | if (!cn) | |
2748 | goto out; | |
2749 | ||
2750 | cn->clk = clk; | |
2751 | srcu_init_notifier_head(&cn->notifier_head); | |
2752 | ||
2753 | list_add(&cn->node, &clk_notifier_list); | |
2754 | } | |
2755 | ||
2756 | ret = srcu_notifier_chain_register(&cn->notifier_head, nb); | |
2757 | ||
035a61c3 | 2758 | clk->core->notifier_count++; |
b2476490 MT |
2759 | |
2760 | out: | |
eab89f69 | 2761 | clk_prepare_unlock(); |
b2476490 MT |
2762 | |
2763 | return ret; | |
2764 | } | |
2765 | EXPORT_SYMBOL_GPL(clk_notifier_register); | |
2766 | ||
2767 | /** | |
2768 | * clk_notifier_unregister - remove a clk rate change notifier | |
2769 | * @clk: struct clk * | |
2770 | * @nb: struct notifier_block * with callback info | |
2771 | * | |
2772 | * Request no further notification for changes to 'clk' and frees memory | |
2773 | * allocated in clk_notifier_register. | |
2774 | * | |
2775 | * Returns -EINVAL if called with null arguments; otherwise, passes | |
2776 | * along the return value of srcu_notifier_chain_unregister(). | |
2777 | */ | |
2778 | int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) | |
2779 | { | |
2780 | struct clk_notifier *cn = NULL; | |
2781 | int ret = -EINVAL; | |
2782 | ||
2783 | if (!clk || !nb) | |
2784 | return -EINVAL; | |
2785 | ||
eab89f69 | 2786 | clk_prepare_lock(); |
b2476490 MT |
2787 | |
2788 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2789 | if (cn->clk == clk) | |
2790 | break; | |
2791 | ||
2792 | if (cn->clk == clk) { | |
2793 | ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); | |
2794 | ||
035a61c3 | 2795 | clk->core->notifier_count--; |
b2476490 MT |
2796 | |
2797 | /* XXX the notifier code should handle this better */ | |
2798 | if (!cn->notifier_head.head) { | |
2799 | srcu_cleanup_notifier_head(&cn->notifier_head); | |
72b5322f | 2800 | list_del(&cn->node); |
b2476490 MT |
2801 | kfree(cn); |
2802 | } | |
2803 | ||
2804 | } else { | |
2805 | ret = -ENOENT; | |
2806 | } | |
2807 | ||
eab89f69 | 2808 | clk_prepare_unlock(); |
b2476490 MT |
2809 | |
2810 | return ret; | |
2811 | } | |
2812 | EXPORT_SYMBOL_GPL(clk_notifier_unregister); | |
766e6a4e GL |
2813 | |
2814 | #ifdef CONFIG_OF | |
2815 | /** | |
2816 | * struct of_clk_provider - Clock provider registration structure | |
2817 | * @link: Entry in global list of clock providers | |
2818 | * @node: Pointer to device tree node of clock provider | |
2819 | * @get: Get clock callback. Returns NULL or a struct clk for the | |
2820 | * given clock specifier | |
2821 | * @data: context pointer to be passed into @get callback | |
2822 | */ | |
2823 | struct of_clk_provider { | |
2824 | struct list_head link; | |
2825 | ||
2826 | struct device_node *node; | |
2827 | struct clk *(*get)(struct of_phandle_args *clkspec, void *data); | |
2828 | void *data; | |
2829 | }; | |
2830 | ||
f2f6c255 PG |
2831 | static const struct of_device_id __clk_of_table_sentinel |
2832 | __used __section(__clk_of_table_end); | |
2833 | ||
766e6a4e | 2834 | static LIST_HEAD(of_clk_providers); |
d6782c26 SN |
2835 | static DEFINE_MUTEX(of_clk_mutex); |
2836 | ||
2837 | /* of_clk_provider list locking helpers */ | |
2838 | void of_clk_lock(void) | |
2839 | { | |
2840 | mutex_lock(&of_clk_mutex); | |
2841 | } | |
2842 | ||
2843 | void of_clk_unlock(void) | |
2844 | { | |
2845 | mutex_unlock(&of_clk_mutex); | |
2846 | } | |
766e6a4e GL |
2847 | |
2848 | struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, | |
2849 | void *data) | |
2850 | { | |
2851 | return data; | |
2852 | } | |
2853 | EXPORT_SYMBOL_GPL(of_clk_src_simple_get); | |
2854 | ||
494bfec9 SG |
2855 | struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data) |
2856 | { | |
2857 | struct clk_onecell_data *clk_data = data; | |
2858 | unsigned int idx = clkspec->args[0]; | |
2859 | ||
2860 | if (idx >= clk_data->clk_num) { | |
2861 | pr_err("%s: invalid clock index %d\n", __func__, idx); | |
2862 | return ERR_PTR(-EINVAL); | |
2863 | } | |
2864 | ||
2865 | return clk_data->clks[idx]; | |
2866 | } | |
2867 | EXPORT_SYMBOL_GPL(of_clk_src_onecell_get); | |
2868 | ||
766e6a4e GL |
2869 | /** |
2870 | * of_clk_add_provider() - Register a clock provider for a node | |
2871 | * @np: Device node pointer associated with clock provider | |
2872 | * @clk_src_get: callback for decoding clock | |
2873 | * @data: context pointer for @clk_src_get callback. | |
2874 | */ | |
2875 | int of_clk_add_provider(struct device_node *np, | |
2876 | struct clk *(*clk_src_get)(struct of_phandle_args *clkspec, | |
2877 | void *data), | |
2878 | void *data) | |
2879 | { | |
2880 | struct of_clk_provider *cp; | |
86be408b | 2881 | int ret; |
766e6a4e GL |
2882 | |
2883 | cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL); | |
2884 | if (!cp) | |
2885 | return -ENOMEM; | |
2886 | ||
2887 | cp->node = of_node_get(np); | |
2888 | cp->data = data; | |
2889 | cp->get = clk_src_get; | |
2890 | ||
d6782c26 | 2891 | mutex_lock(&of_clk_mutex); |
766e6a4e | 2892 | list_add(&cp->link, &of_clk_providers); |
d6782c26 | 2893 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2894 | pr_debug("Added clock from %s\n", np->full_name); |
2895 | ||
86be408b SN |
2896 | ret = of_clk_set_defaults(np, true); |
2897 | if (ret < 0) | |
2898 | of_clk_del_provider(np); | |
2899 | ||
2900 | return ret; | |
766e6a4e GL |
2901 | } |
2902 | EXPORT_SYMBOL_GPL(of_clk_add_provider); | |
2903 | ||
2904 | /** | |
2905 | * of_clk_del_provider() - Remove a previously registered clock provider | |
2906 | * @np: Device node pointer associated with clock provider | |
2907 | */ | |
2908 | void of_clk_del_provider(struct device_node *np) | |
2909 | { | |
2910 | struct of_clk_provider *cp; | |
2911 | ||
d6782c26 | 2912 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
2913 | list_for_each_entry(cp, &of_clk_providers, link) { |
2914 | if (cp->node == np) { | |
2915 | list_del(&cp->link); | |
2916 | of_node_put(cp->node); | |
2917 | kfree(cp); | |
2918 | break; | |
2919 | } | |
2920 | } | |
d6782c26 | 2921 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2922 | } |
2923 | EXPORT_SYMBOL_GPL(of_clk_del_provider); | |
2924 | ||
73e0e496 SB |
2925 | struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec, |
2926 | const char *dev_id, const char *con_id) | |
766e6a4e GL |
2927 | { |
2928 | struct of_clk_provider *provider; | |
a34cd466 | 2929 | struct clk *clk = ERR_PTR(-EPROBE_DEFER); |
766e6a4e GL |
2930 | |
2931 | /* Check if we have such a provider in our array */ | |
766e6a4e GL |
2932 | list_for_each_entry(provider, &of_clk_providers, link) { |
2933 | if (provider->node == clkspec->np) | |
2934 | clk = provider->get(clkspec, provider->data); | |
73e0e496 SB |
2935 | if (!IS_ERR(clk)) { |
2936 | clk = __clk_create_clk(__clk_get_hw(clk), dev_id, | |
2937 | con_id); | |
2938 | ||
2939 | if (!IS_ERR(clk) && !__clk_get(clk)) { | |
2940 | __clk_free_clk(clk); | |
2941 | clk = ERR_PTR(-ENOENT); | |
2942 | } | |
2943 | ||
766e6a4e | 2944 | break; |
73e0e496 | 2945 | } |
766e6a4e | 2946 | } |
d6782c26 SN |
2947 | |
2948 | return clk; | |
2949 | } | |
2950 | ||
2951 | struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) | |
2952 | { | |
2953 | struct clk *clk; | |
2954 | ||
2955 | mutex_lock(&of_clk_mutex); | |
73e0e496 | 2956 | clk = __of_clk_get_from_provider(clkspec, NULL, __func__); |
d6782c26 | 2957 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2958 | |
2959 | return clk; | |
2960 | } | |
2961 | ||
f6102742 MT |
2962 | int of_clk_get_parent_count(struct device_node *np) |
2963 | { | |
2964 | return of_count_phandle_with_args(np, "clocks", "#clock-cells"); | |
2965 | } | |
2966 | EXPORT_SYMBOL_GPL(of_clk_get_parent_count); | |
2967 | ||
766e6a4e GL |
2968 | const char *of_clk_get_parent_name(struct device_node *np, int index) |
2969 | { | |
2970 | struct of_phandle_args clkspec; | |
7a0fc1a3 | 2971 | struct property *prop; |
766e6a4e | 2972 | const char *clk_name; |
7a0fc1a3 BD |
2973 | const __be32 *vp; |
2974 | u32 pv; | |
766e6a4e | 2975 | int rc; |
7a0fc1a3 | 2976 | int count; |
766e6a4e GL |
2977 | |
2978 | if (index < 0) | |
2979 | return NULL; | |
2980 | ||
2981 | rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, | |
2982 | &clkspec); | |
2983 | if (rc) | |
2984 | return NULL; | |
2985 | ||
7a0fc1a3 BD |
2986 | index = clkspec.args_count ? clkspec.args[0] : 0; |
2987 | count = 0; | |
2988 | ||
2989 | /* if there is an indices property, use it to transfer the index | |
2990 | * specified into an array offset for the clock-output-names property. | |
2991 | */ | |
2992 | of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { | |
2993 | if (index == pv) { | |
2994 | index = count; | |
2995 | break; | |
2996 | } | |
2997 | count++; | |
2998 | } | |
2999 | ||
766e6a4e | 3000 | if (of_property_read_string_index(clkspec.np, "clock-output-names", |
7a0fc1a3 | 3001 | index, |
766e6a4e GL |
3002 | &clk_name) < 0) |
3003 | clk_name = clkspec.np->name; | |
3004 | ||
3005 | of_node_put(clkspec.np); | |
3006 | return clk_name; | |
3007 | } | |
3008 | EXPORT_SYMBOL_GPL(of_clk_get_parent_name); | |
3009 | ||
1771b10d GC |
3010 | struct clock_provider { |
3011 | of_clk_init_cb_t clk_init_cb; | |
3012 | struct device_node *np; | |
3013 | struct list_head node; | |
3014 | }; | |
3015 | ||
3016 | static LIST_HEAD(clk_provider_list); | |
3017 | ||
3018 | /* | |
3019 | * This function looks for a parent clock. If there is one, then it | |
3020 | * checks that the provider for this parent clock was initialized, in | |
3021 | * this case the parent clock will be ready. | |
3022 | */ | |
3023 | static int parent_ready(struct device_node *np) | |
3024 | { | |
3025 | int i = 0; | |
3026 | ||
3027 | while (true) { | |
3028 | struct clk *clk = of_clk_get(np, i); | |
3029 | ||
3030 | /* this parent is ready we can check the next one */ | |
3031 | if (!IS_ERR(clk)) { | |
3032 | clk_put(clk); | |
3033 | i++; | |
3034 | continue; | |
3035 | } | |
3036 | ||
3037 | /* at least one parent is not ready, we exit now */ | |
3038 | if (PTR_ERR(clk) == -EPROBE_DEFER) | |
3039 | return 0; | |
3040 | ||
3041 | /* | |
3042 | * Here we make assumption that the device tree is | |
3043 | * written correctly. So an error means that there is | |
3044 | * no more parent. As we didn't exit yet, then the | |
3045 | * previous parent are ready. If there is no clock | |
3046 | * parent, no need to wait for them, then we can | |
3047 | * consider their absence as being ready | |
3048 | */ | |
3049 | return 1; | |
3050 | } | |
3051 | } | |
3052 | ||
766e6a4e GL |
3053 | /** |
3054 | * of_clk_init() - Scan and init clock providers from the DT | |
3055 | * @matches: array of compatible values and init functions for providers. | |
3056 | * | |
1771b10d | 3057 | * This function scans the device tree for matching clock providers |
e5ca8fb4 | 3058 | * and calls their initialization functions. It also does it by trying |
1771b10d | 3059 | * to follow the dependencies. |
766e6a4e GL |
3060 | */ |
3061 | void __init of_clk_init(const struct of_device_id *matches) | |
3062 | { | |
7f7ed584 | 3063 | const struct of_device_id *match; |
766e6a4e | 3064 | struct device_node *np; |
1771b10d GC |
3065 | struct clock_provider *clk_provider, *next; |
3066 | bool is_init_done; | |
3067 | bool force = false; | |
766e6a4e | 3068 | |
f2f6c255 | 3069 | if (!matches) |
819b4861 | 3070 | matches = &__clk_of_table; |
f2f6c255 | 3071 | |
1771b10d | 3072 | /* First prepare the list of the clocks providers */ |
7f7ed584 | 3073 | for_each_matching_node_and_match(np, matches, &match) { |
1771b10d GC |
3074 | struct clock_provider *parent = |
3075 | kzalloc(sizeof(struct clock_provider), GFP_KERNEL); | |
3076 | ||
3077 | parent->clk_init_cb = match->data; | |
3078 | parent->np = np; | |
3f6d439f | 3079 | list_add_tail(&parent->node, &clk_provider_list); |
1771b10d GC |
3080 | } |
3081 | ||
3082 | while (!list_empty(&clk_provider_list)) { | |
3083 | is_init_done = false; | |
3084 | list_for_each_entry_safe(clk_provider, next, | |
3085 | &clk_provider_list, node) { | |
3086 | if (force || parent_ready(clk_provider->np)) { | |
86be408b | 3087 | |
1771b10d | 3088 | clk_provider->clk_init_cb(clk_provider->np); |
86be408b SN |
3089 | of_clk_set_defaults(clk_provider->np, true); |
3090 | ||
1771b10d GC |
3091 | list_del(&clk_provider->node); |
3092 | kfree(clk_provider); | |
3093 | is_init_done = true; | |
3094 | } | |
3095 | } | |
3096 | ||
3097 | /* | |
e5ca8fb4 | 3098 | * We didn't manage to initialize any of the |
1771b10d GC |
3099 | * remaining providers during the last loop, so now we |
3100 | * initialize all the remaining ones unconditionally | |
3101 | * in case the clock parent was not mandatory | |
3102 | */ | |
3103 | if (!is_init_done) | |
3104 | force = true; | |
766e6a4e GL |
3105 | } |
3106 | } | |
3107 | #endif |