[linux-2.6-block.git] / drivers / clk / clk-s2mps11.c

/*
 * clk-s2mps11.c - Clock driver for S2MPS11.
 *
 * Copyright (C) 2013,2014 Samsung Electornics
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 */

#include <linux/module.h>
#include <linux/err.h>
#include <linux/of.h>
#include <linux/clkdev.h>
#include <linux/regmap.h>
#include <linux/clk-provider.h>
#include <linux/platform_device.h>
#include <linux/mfd/samsung/s2mps11.h>
#include <linux/mfd/samsung/s2mps14.h>
#include <linux/mfd/samsung/s5m8767.h>
#include <linux/mfd/samsung/core.h>

#define s2mps11_name(a) (a->hw.init->name)

static struct clk **clk_table;
static struct clk_onecell_data clk_data;

enum {
	S2MPS11_CLK_AP = 0,
	S2MPS11_CLK_CP,
	S2MPS11_CLK_BT,
	S2MPS11_CLKS_NUM,
};

struct s2mps11_clk {
	struct sec_pmic_dev *iodev;
	struct device_node *clk_np;
	struct clk_hw hw;
	struct clk *clk;
	struct clk_lookup *lookup;
	u32 mask;
	unsigned int reg;
};

static struct s2mps11_clk *to_s2mps11_clk(struct clk_hw *hw)
{
	return container_of(hw, struct s2mps11_clk, hw);
}

static int s2mps11_clk_prepare(struct clk_hw *hw)
{
	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
	int ret;

	ret = regmap_update_bits(s2mps11->iodev->regmap_pmic,
				 s2mps11->reg,
				 s2mps11->mask, s2mps11->mask);

	return ret;
}

static void s2mps11_clk_unprepare(struct clk_hw *hw)
{
	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
	int ret;

	ret = regmap_update_bits(s2mps11->iodev->regmap_pmic, s2mps11->reg,
			   s2mps11->mask, ~s2mps11->mask);
}

static int s2mps11_clk_is_prepared(struct clk_hw *hw)
{
	int ret;
	u32 val;
	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);

	ret = regmap_read(s2mps11->iodev->regmap_pmic,
				s2mps11->reg, &val);
	if (ret < 0)
		return -EINVAL;

	return val & s2mps11->mask;
}

static unsigned long s2mps11_clk_recalc_rate(struct clk_hw *hw,
					     unsigned long parent_rate)
{
	return 32768;
}

static struct clk_ops s2mps11_clk_ops = {
	.prepare	= s2mps11_clk_prepare,
	.unprepare	= s2mps11_clk_unprepare,
	.is_prepared	= s2mps11_clk_is_prepared,
	.recalc_rate	= s2mps11_clk_recalc_rate,
};

static struct clk_init_data s2mps11_clks_init[S2MPS11_CLKS_NUM] = {
	[S2MPS11_CLK_AP] = {
		.name = "s2mps11_ap",
		.ops = &s2mps11_clk_ops,
		.flags = CLK_IS_ROOT,
	},
	[S2MPS11_CLK_CP] = {
		.name = "s2mps11_cp",
		.ops = &s2mps11_clk_ops,
		.flags = CLK_IS_ROOT,
	},
	[S2MPS11_CLK_BT] = {
		.name = "s2mps11_bt",
		.ops = &s2mps11_clk_ops,
		.flags = CLK_IS_ROOT,
	},
};

static struct clk_init_data s2mps14_clks_init[S2MPS11_CLKS_NUM] = {
	[S2MPS11_CLK_AP] = {
		.name = "s2mps14_ap",
		.ops = &s2mps11_clk_ops,
		.flags = CLK_IS_ROOT,
	},
	[S2MPS11_CLK_BT] = {
		.name = "s2mps14_bt",
		.ops = &s2mps11_clk_ops,
		.flags = CLK_IS_ROOT,
	},
};

static struct device_node *s2mps11_clk_parse_dt(struct platform_device *pdev,
		struct clk_init_data *clks_init)
{
	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
	struct device_node *clk_np;
	int i;

	if (!iodev->dev->of_node)
		return ERR_PTR(-EINVAL);

	clk_np = of_get_child_by_name(iodev->dev->of_node, "clocks");
	if (!clk_np) {
		dev_err(&pdev->dev, "could not find clock sub-node\n");
		return ERR_PTR(-EINVAL);
	}

	for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
		if (!clks_init[i].name)
			continue; /* Skip clocks not present in some devices */
		of_property_read_string_index(clk_np, "clock-output-names", i,
				&clks_init[i].name);
	}

	return clk_np;
}

static int s2mps11_clk_probe(struct platform_device *pdev)
{
	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
	struct s2mps11_clk *s2mps11_clks, *s2mps11_clk;
	unsigned int s2mps11_reg;
	struct clk_init_data *clks_init;
	int i, ret = 0;

	s2mps11_clks = devm_kzalloc(&pdev->dev, sizeof(*s2mps11_clk) *
					S2MPS11_CLKS_NUM, GFP_KERNEL);
	if (!s2mps11_clks)
		return -ENOMEM;

	s2mps11_clk = s2mps11_clks;

	clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk *) *
				 S2MPS11_CLKS_NUM, GFP_KERNEL);
	if (!clk_table)
		return -ENOMEM;

	switch(platform_get_device_id(pdev)->driver_data) {
	case S2MPS11X:
		s2mps11_reg = S2MPS11_REG_RTC_CTRL;
		clks_init = s2mps11_clks_init;
		break;
	case S2MPS14X:
		s2mps11_reg = S2MPS14_REG_RTCCTRL;
		clks_init = s2mps14_clks_init;
		break;
	case S5M8767X:
		s2mps11_reg = S5M8767_REG_CTRL1;
		clks_init = s2mps11_clks_init;
		break;
	default:
		dev_err(&pdev->dev, "Invalid device type\n");
		return -EINVAL;
	};

	/* Store clocks of_node in first element of s2mps11_clks array */
	s2mps11_clks->clk_np = s2mps11_clk_parse_dt(pdev, clks_init);
	if (IS_ERR(s2mps11_clks->clk_np))
		return PTR_ERR(s2mps11_clks->clk_np);

	for (i = 0; i < S2MPS11_CLKS_NUM; i++, s2mps11_clk++) {
		if (!clks_init[i].name)
			continue; /* Skip clocks not present in some devices */
		s2mps11_clk->iodev = iodev;
		s2mps11_clk->hw.init = &clks_init[i];
		s2mps11_clk->mask = 1 << i;
		s2mps11_clk->reg = s2mps11_reg;

		s2mps11_clk->clk = devm_clk_register(&pdev->dev,
							&s2mps11_clk->hw);
		if (IS_ERR(s2mps11_clk->clk)) {
			dev_err(&pdev->dev, "Fail to register : %s\n",
						s2mps11_name(s2mps11_clk));
			ret = PTR_ERR(s2mps11_clk->clk);
			goto err_reg;
		}

		s2mps11_clk->lookup = clkdev_alloc(s2mps11_clk->clk,
					s2mps11_name(s2mps11_clk), NULL);
		if (!s2mps11_clk->lookup) {
			ret = -ENOMEM;
			goto err_lup;
		}

		clkdev_add(s2mps11_clk->lookup);
	}

	for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
		/* Skip clocks not present on S2MPS14 */
		if (!clks_init[i].name)
			continue;
		clk_table[i] = s2mps11_clks[i].clk;
	}

	clk_data.clks = clk_table;
	clk_data.clk_num = S2MPS11_CLKS_NUM;
	of_clk_add_provider(s2mps11_clks->clk_np, of_clk_src_onecell_get,
			&clk_data);

	platform_set_drvdata(pdev, s2mps11_clks);

	return ret;
err_lup:
	devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
err_reg:
	while (s2mps11_clk > s2mps11_clks) {
		if (s2mps11_clk->lookup) {
			clkdev_drop(s2mps11_clk->lookup);
			devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
		}
		s2mps11_clk--;
	}

	return ret;
}

static int s2mps11_clk_remove(struct platform_device *pdev)
{
	struct s2mps11_clk *s2mps11_clks = platform_get_drvdata(pdev);
	int i;

	of_clk_del_provider(s2mps11_clks[0].clk_np);
	/* Drop the reference obtained in s2mps11_clk_parse_dt */
	of_node_put(s2mps11_clks[0].clk_np);

	for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
		/* Skip clocks not present on S2MPS14 */
		if (!s2mps11_clks[i].lookup)
			continue;
		clkdev_drop(s2mps11_clks[i].lookup);
	}

	return 0;
}

static const struct platform_device_id s2mps11_clk_id[] = {
	{ "s2mps11-clk", S2MPS11X},
	{ "s2mps14-clk", S2MPS14X},
	{ "s5m8767-clk", S5M8767X},
	{ },
};
MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);

static struct platform_driver s2mps11_clk_driver = {
	.driver = {
		.name  = "s2mps11-clk",
		.owner = THIS_MODULE,
	},
	.probe = s2mps11_clk_probe,
	.remove = s2mps11_clk_remove,
	.id_table = s2mps11_clk_id,
};

static int __init s2mps11_clk_init(void)
{
	return platform_driver_register(&s2mps11_clk_driver);
}
subsys_initcall(s2mps11_clk_init);

static void __init s2mps11_clk_cleanup(void)
{
	platform_driver_unregister(&s2mps11_clk_driver);
}
module_exit(s2mps11_clk_cleanup);

MODULE_DESCRIPTION("S2MPS11 Clock Driver");
MODULE_AUTHOR("Yadwinder Singh Brar <yadi.brar@samsung.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
7cc560de YSB	1	/*
	2	* clk-s2mps11.c - Clock driver for S2MPS11.
	3	*
e8b60a45	4	* Copyright (C) 2013,2014 Samsung Electornics
7cc560de YSB	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
7cc560de YSB	16	*/
	17
	18	#include <linux/module.h>
	19	#include <linux/err.h>
	20	#include <linux/of.h>
	21	#include <linux/clkdev.h>
	22	#include <linux/regmap.h>
	23	#include <linux/clk-provider.h>
	24	#include <linux/platform_device.h>
	25	#include <linux/mfd/samsung/s2mps11.h>
e8b60a45	26	#include <linux/mfd/samsung/s2mps14.h>
e8e6b840	27	#include <linux/mfd/samsung/s5m8767.h>
7cc560de YSB	28	#include <linux/mfd/samsung/core.h>
	29
	30	#define s2mps11_name(a) (a->hw.init->name)
	31
	32	static struct clk **clk_table;
	33	static struct clk_onecell_data clk_data;
	34
	35	enum {
	36	S2MPS11_CLK_AP = 0,
	37	S2MPS11_CLK_CP,
	38	S2MPS11_CLK_BT,
	39	S2MPS11_CLKS_NUM,
	40	};
	41
	42	struct s2mps11_clk {
	43	struct sec_pmic_dev *iodev;
bf416bd4	44	struct device_node *clk_np;
7cc560de YSB	45	struct clk_hw hw;
	46	struct clk *clk;
	47	struct clk_lookup *lookup;
	48	u32 mask;
64d64c35	49	unsigned int reg;
7cc560de YSB	50	};
	51
	52	static struct s2mps11_clk to_s2mps11_clk(struct clk_hw hw)
	53	{
	54	return container_of(hw, struct s2mps11_clk, hw);
	55	}
	56
	57	static int s2mps11_clk_prepare(struct clk_hw *hw)
	58	{
	59	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
	60	int ret;
	61
1b1ccee1	62	ret = regmap_update_bits(s2mps11->iodev->regmap_pmic,
64d64c35	63	s2mps11->reg,
7cc560de	64	s2mps11->mask, s2mps11->mask);
7cc560de YSB	65
	66	return ret;
	67	}
	68
	69	static void s2mps11_clk_unprepare(struct clk_hw *hw)
	70	{
	71	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
	72	int ret;
	73
64d64c35	74	ret = regmap_update_bits(s2mps11->iodev->regmap_pmic, s2mps11->reg,
7cc560de	75	s2mps11->mask, ~s2mps11->mask);
7cc560de YSB	76	}
7cc560de YSB	77
89ed7e6e	78	static int s2mps11_clk_is_prepared(struct clk_hw *hw)
7cc560de	79	{
89ed7e6e KW	80	int ret;
89ed7e6e KW	81	u32 val;
7cc560de YSB	82	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
7cc560de YSB	83
89ed7e6e KW	84	ret = regmap_read(s2mps11->iodev->regmap_pmic,
	85	s2mps11->reg, &val);
	86	if (ret < 0)
	87	return -EINVAL;
	88
	89	return val & s2mps11->mask;
7cc560de YSB	90	}
	91
	92	static unsigned long s2mps11_clk_recalc_rate(struct clk_hw *hw,
	93	unsigned long parent_rate)
	94	{
89ed7e6e	95	return 32768;
7cc560de YSB	96	}
	97
	98	static struct clk_ops s2mps11_clk_ops = {
	99	.prepare = s2mps11_clk_prepare,
	100	.unprepare = s2mps11_clk_unprepare,
89ed7e6e	101	.is_prepared = s2mps11_clk_is_prepared,
7cc560de YSB	102	.recalc_rate = s2mps11_clk_recalc_rate,
	103	};
	104
	105	static struct clk_init_data s2mps11_clks_init[S2MPS11_CLKS_NUM] = {
	106	[S2MPS11_CLK_AP] = {
	107	.name = "s2mps11_ap",
	108	.ops = &s2mps11_clk_ops,
	109	.flags = CLK_IS_ROOT,
	110	},
	111	[S2MPS11_CLK_CP] = {
	112	.name = "s2mps11_cp",
	113	.ops = &s2mps11_clk_ops,
	114	.flags = CLK_IS_ROOT,
	115	},
	116	[S2MPS11_CLK_BT] = {
	117	.name = "s2mps11_bt",
	118	.ops = &s2mps11_clk_ops,
	119	.flags = CLK_IS_ROOT,
	120	},
	121	};
	122
e8b60a45 KK	123	static struct clk_init_data s2mps14_clks_init[S2MPS11_CLKS_NUM] = {
	124	[S2MPS11_CLK_AP] = {
	125	.name = "s2mps14_ap",
	126	.ops = &s2mps11_clk_ops,
	127	.flags = CLK_IS_ROOT,
	128	},
	129	[S2MPS11_CLK_BT] = {
	130	.name = "s2mps14_bt",
	131	.ops = &s2mps11_clk_ops,
	132	.flags = CLK_IS_ROOT,
	133	},
	134	};
	135
	136	static struct device_node s2mps11_clk_parse_dt(struct platform_device pdev,
	137	struct clk_init_data *clks_init)
7cc560de YSB	138	{
	139	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
	140	struct device_node *clk_np;
	141	int i;
	142
	143	if (!iodev->dev->of_node)
238e1405	144	return ERR_PTR(-EINVAL);
7cc560de	145
afbd1a0c	146	clk_np = of_get_child_by_name(iodev->dev->of_node, "clocks");
7cc560de YSB	147	if (!clk_np) {
	148	dev_err(&pdev->dev, "could not find clock sub-node\n");
	149	return ERR_PTR(-EINVAL);
	150	}
	151
e8b60a45 KK	152	for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
	153	if (!clks_init[i].name)
	154	continue; /* Skip clocks not present in some devices */
7cc560de	155	of_property_read_string_index(clk_np, "clock-output-names", i,
e8b60a45 KK	156	&clks_init[i].name);
e8b60a45 KK	157	}
7cc560de YSB	158
	159	return clk_np;
	160	}
	161
	162	static int s2mps11_clk_probe(struct platform_device *pdev)
	163	{
	164	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
	165	struct s2mps11_clk s2mps11_clks, s2mps11_clk;
64d64c35	166	unsigned int s2mps11_reg;
e8b60a45	167	struct clk_init_data *clks_init;
7cc560de	168	int i, ret = 0;
7cc560de YSB	169
	170	s2mps11_clks = devm_kzalloc(&pdev->dev, sizeof(s2mps11_clk)
	171	S2MPS11_CLKS_NUM, GFP_KERNEL);
	172	if (!s2mps11_clks)
	173	return -ENOMEM;
	174
	175	s2mps11_clk = s2mps11_clks;
	176
7002483c KK	177	clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk )
	178	S2MPS11_CLKS_NUM, GFP_KERNEL);
	179	if (!clk_table)
	180	return -ENOMEM;
	181
64d64c35 TB	182	switch(platform_get_device_id(pdev)->driver_data) {
	183	case S2MPS11X:
	184	s2mps11_reg = S2MPS11_REG_RTC_CTRL;
e8b60a45 KK	185	clks_init = s2mps11_clks_init;
	186	break;
	187	case S2MPS14X:
	188	s2mps11_reg = S2MPS14_REG_RTCCTRL;
	189	clks_init = s2mps14_clks_init;
64d64c35	190	break;
e8e6b840 TB	191	case S5M8767X:
e8e6b840 TB	192	s2mps11_reg = S5M8767_REG_CTRL1;
e8b60a45	193	clks_init = s2mps11_clks_init;
e8e6b840	194	break;
64d64c35 TB	195	default:
	196	dev_err(&pdev->dev, "Invalid device type\n");
	197	return -EINVAL;
	198	};
	199
e8b60a45 KK	200	/* Store clocks of_node in first element of s2mps11_clks array */
	201	s2mps11_clks->clk_np = s2mps11_clk_parse_dt(pdev, clks_init);
	202	if (IS_ERR(s2mps11_clks->clk_np))
	203	return PTR_ERR(s2mps11_clks->clk_np);
	204
7cc560de	205	for (i = 0; i < S2MPS11_CLKS_NUM; i++, s2mps11_clk++) {
e8b60a45 KK	206	if (!clks_init[i].name)
e8b60a45 KK	207	continue; /* Skip clocks not present in some devices */
7cc560de	208	s2mps11_clk->iodev = iodev;
e8b60a45	209	s2mps11_clk->hw.init = &clks_init[i];
7cc560de	210	s2mps11_clk->mask = 1 << i;
64d64c35	211	s2mps11_clk->reg = s2mps11_reg;
7cc560de	212
7cc560de YSB	213	s2mps11_clk->clk = devm_clk_register(&pdev->dev,
	214	&s2mps11_clk->hw);
	215	if (IS_ERR(s2mps11_clk->clk)) {
	216	dev_err(&pdev->dev, "Fail to register : %s\n",
	217	s2mps11_name(s2mps11_clk));
	218	ret = PTR_ERR(s2mps11_clk->clk);
	219	goto err_reg;
	220	}
	221
2a96dfa4 KK	222	s2mps11_clk->lookup = clkdev_alloc(s2mps11_clk->clk,
2a96dfa4 KK	223	s2mps11_name(s2mps11_clk), NULL);
7cc560de YSB	224	if (!s2mps11_clk->lookup) {
	225	ret = -ENOMEM;
	226	goto err_lup;
	227	}
	228
7cc560de YSB	229	clkdev_add(s2mps11_clk->lookup);
	230	}
	231
e8b60a45 KK	232	for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
	233	/* Skip clocks not present on S2MPS14 */
	234	if (!clks_init[i].name)
	235	continue;
7002483c	236	clk_table[i] = s2mps11_clks[i].clk;
e8b60a45	237	}
7cc560de	238
7002483c KK	239	clk_data.clks = clk_table;
	240	clk_data.clk_num = S2MPS11_CLKS_NUM;
	241	of_clk_add_provider(s2mps11_clks->clk_np, of_clk_src_onecell_get,
	242	&clk_data);
7cc560de YSB	243
	244	platform_set_drvdata(pdev, s2mps11_clks);
	245
	246	return ret;
	247	err_lup:
	248	devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
	249	err_reg:
	250	while (s2mps11_clk > s2mps11_clks) {
	251	if (s2mps11_clk->lookup) {
	252	clkdev_drop(s2mps11_clk->lookup);
	253	devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
	254	}
	255	s2mps11_clk--;
	256	}
	257
	258	return ret;
	259	}
	260
	261	static int s2mps11_clk_remove(struct platform_device *pdev)
	262	{
	263	struct s2mps11_clk *s2mps11_clks = platform_get_drvdata(pdev);
	264	int i;
	265
bf416bd4 KK	266	of_clk_del_provider(s2mps11_clks[0].clk_np);
	267	/* Drop the reference obtained in s2mps11_clk_parse_dt */
	268	of_node_put(s2mps11_clks[0].clk_np);
	269
e8b60a45 KK	270	for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
	271	/* Skip clocks not present on S2MPS14 */
	272	if (!s2mps11_clks[i].lookup)
	273	continue;
7cc560de	274	clkdev_drop(s2mps11_clks[i].lookup);
e8b60a45	275	}
7cc560de YSB	276
	277	return 0;
	278	}
	279
	280	static const struct platform_device_id s2mps11_clk_id[] = {
64d64c35	281	{ "s2mps11-clk", S2MPS11X},
e8b60a45	282	{ "s2mps14-clk", S2MPS14X},
e8e6b840	283	{ "s5m8767-clk", S5M8767X},
7cc560de YSB	284	{ },
	285	};
	286	MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
	287
	288	static struct platform_driver s2mps11_clk_driver = {
	289	.driver = {
	290	.name = "s2mps11-clk",
	291	.owner = THIS_MODULE,
	292	},
	293	.probe = s2mps11_clk_probe,
	294	.remove = s2mps11_clk_remove,
	295	.id_table = s2mps11_clk_id,
	296	};
	297
	298	static int __init s2mps11_clk_init(void)
	299	{
	300	return platform_driver_register(&s2mps11_clk_driver);
	301	}
	302	subsys_initcall(s2mps11_clk_init);
	303
	304	static void __init s2mps11_clk_cleanup(void)
	305	{
	306	platform_driver_unregister(&s2mps11_clk_driver);
	307	}
	308	module_exit(s2mps11_clk_cleanup);
	309
	310	MODULE_DESCRIPTION("S2MPS11 Clock Driver");
	311	MODULE_AUTHOR("Yadwinder Singh Brar <yadi.brar@samsung.com>");
	312	MODULE_LICENSE("GPL");