[linux-2.6-block.git] / drivers / clk / clk-pwm.c

/*
 * Copyright (C) 2014 Philipp Zabel, Pengutronix
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * PWM (mis)used as clock output
 */
#include <linux/clk-provider.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pwm.h>

struct clk_pwm {
	struct clk_hw hw;
	struct pwm_device *pwm;
	u32 fixed_rate;
};

static inline struct clk_pwm *to_clk_pwm(struct clk_hw *hw)
{
	return container_of(hw, struct clk_pwm, hw);
}

static int clk_pwm_prepare(struct clk_hw *hw)
{
	struct clk_pwm *clk_pwm = to_clk_pwm(hw);

	return pwm_enable(clk_pwm->pwm);
}

static void clk_pwm_unprepare(struct clk_hw *hw)
{
	struct clk_pwm *clk_pwm = to_clk_pwm(hw);

	pwm_disable(clk_pwm->pwm);
}

static unsigned long clk_pwm_recalc_rate(struct clk_hw *hw,
					 unsigned long parent_rate)
{
	struct clk_pwm *clk_pwm = to_clk_pwm(hw);

	return clk_pwm->fixed_rate;
}

static const struct clk_ops clk_pwm_ops = {
	.prepare = clk_pwm_prepare,
	.unprepare = clk_pwm_unprepare,
	.recalc_rate = clk_pwm_recalc_rate,
};

static int clk_pwm_probe(struct platform_device *pdev)
{
	struct device_node *node = pdev->dev.of_node;
	struct clk_init_data init;
	struct clk_pwm *clk_pwm;
	struct pwm_device *pwm;
	struct pwm_args pargs;
	const char *clk_name;
	struct clk *clk;
	int ret;

	clk_pwm = devm_kzalloc(&pdev->dev, sizeof(*clk_pwm), GFP_KERNEL);
	if (!clk_pwm)
		return -ENOMEM;

	pwm = devm_pwm_get(&pdev->dev, NULL);
	if (IS_ERR(pwm))
		return PTR_ERR(pwm);

	pwm_get_args(pwm, &pargs);
	if (!pargs.period) {
		dev_err(&pdev->dev, "invalid PWM period\n");
		return -EINVAL;
	}

	if (of_property_read_u32(node, "clock-frequency", &clk_pwm->fixed_rate))
		clk_pwm->fixed_rate = NSEC_PER_SEC / pargs.period;

	if (pargs.period != NSEC_PER_SEC / clk_pwm->fixed_rate &&
	    pargs.period != DIV_ROUND_UP(NSEC_PER_SEC, clk_pwm->fixed_rate)) {
		dev_err(&pdev->dev,
			"clock-frequency does not match PWM period\n");
		return -EINVAL;
	}

	/*
	 * FIXME: pwm_apply_args() should be removed when switching to the
	 * atomic PWM API.
	 */
	pwm_apply_args(pwm);
	ret = pwm_config(pwm, (pargs.period + 1) >> 1, pargs.period);
	if (ret < 0)
		return ret;

	clk_name = node->name;
	of_property_read_string(node, "clock-output-names", &clk_name);

	init.name = clk_name;
	init.ops = &clk_pwm_ops;
	init.flags = CLK_IS_BASIC;
	init.num_parents = 0;

	clk_pwm->pwm = pwm;
	clk_pwm->hw.init = &init;
	clk = devm_clk_register(&pdev->dev, &clk_pwm->hw);
	if (IS_ERR(clk))
		return PTR_ERR(clk);

	return of_clk_add_provider(node, of_clk_src_simple_get, clk);
}

static int clk_pwm_remove(struct platform_device *pdev)
{
	of_clk_del_provider(pdev->dev.of_node);

	return 0;
}

static const struct of_device_id clk_pwm_dt_ids[] = {
	{ .compatible = "pwm-clock" },
	{ }
};
MODULE_DEVICE_TABLE(of, clk_pwm_dt_ids);

static struct platform_driver clk_pwm_driver = {
	.probe = clk_pwm_probe,
	.remove = clk_pwm_remove,
	.driver = {
		.name = "pwm-clock",
		.of_match_table = of_match_ptr(clk_pwm_dt_ids),
	},
};

module_platform_driver(clk_pwm_driver);

MODULE_AUTHOR("Philipp Zabel <p.zabel@pengutronix.de>");
MODULE_DESCRIPTION("PWM clock driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
9a74ccdb PZ	1	/*
	2	* Copyright (C) 2014 Philipp Zabel, Pengutronix
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*
	8	* PWM (mis)used as clock output
	9	*/
	10	#include <linux/clk-provider.h>
	11	#include <linux/kernel.h>
	12	#include <linux/module.h>
	13	#include <linux/of.h>
	14	#include <linux/platform_device.h>
	15	#include <linux/pwm.h>
	16
	17	struct clk_pwm {
	18	struct clk_hw hw;
	19	struct pwm_device *pwm;
	20	u32 fixed_rate;
	21	};
	22
	23	static inline struct clk_pwm to_clk_pwm(struct clk_hw hw)
	24	{
	25	return container_of(hw, struct clk_pwm, hw);
	26	}
	27
	28	static int clk_pwm_prepare(struct clk_hw *hw)
	29	{
	30	struct clk_pwm *clk_pwm = to_clk_pwm(hw);
	31
	32	return pwm_enable(clk_pwm->pwm);
	33	}
	34
	35	static void clk_pwm_unprepare(struct clk_hw *hw)
	36	{
	37	struct clk_pwm *clk_pwm = to_clk_pwm(hw);
	38
	39	pwm_disable(clk_pwm->pwm);
	40	}
	41
	42	static unsigned long clk_pwm_recalc_rate(struct clk_hw *hw,
	43	unsigned long parent_rate)
	44	{
	45	struct clk_pwm *clk_pwm = to_clk_pwm(hw);
	46
	47	return clk_pwm->fixed_rate;
	48	}
	49
	50	static const struct clk_ops clk_pwm_ops = {
	51	.prepare = clk_pwm_prepare,
	52	.unprepare = clk_pwm_unprepare,
	53	.recalc_rate = clk_pwm_recalc_rate,
	54	};
	55
	56	static int clk_pwm_probe(struct platform_device *pdev)
	57	{
	58	struct device_node *node = pdev->dev.of_node;
	59	struct clk_init_data init;
	60	struct clk_pwm *clk_pwm;
	61	struct pwm_device *pwm;
dd0b38b7	62	struct pwm_args pargs;
9a74ccdb PZ	63	const char *clk_name;
	64	struct clk *clk;
	65	int ret;
	66
	67	clk_pwm = devm_kzalloc(&pdev->dev, sizeof(*clk_pwm), GFP_KERNEL);
	68	if (!clk_pwm)
	69	return -ENOMEM;
	70
	71	pwm = devm_pwm_get(&pdev->dev, NULL);
	72	if (IS_ERR(pwm))
	73	return PTR_ERR(pwm);
	74
dd0b38b7 BB	75	pwm_get_args(pwm, &pargs);
dd0b38b7 BB	76	if (!pargs.period) {
9a74ccdb PZ	77	dev_err(&pdev->dev, "invalid PWM period\n");
	78	return -EINVAL;
	79	}
	80
	81	if (of_property_read_u32(node, "clock-frequency", &clk_pwm->fixed_rate))
dd0b38b7	82	clk_pwm->fixed_rate = NSEC_PER_SEC / pargs.period;
9a74ccdb	83
dd0b38b7 BB	84	if (pargs.period != NSEC_PER_SEC / clk_pwm->fixed_rate &&
dd0b38b7 BB	85	pargs.period != DIV_ROUND_UP(NSEC_PER_SEC, clk_pwm->fixed_rate)) {
9a74ccdb PZ	86	dev_err(&pdev->dev,
	87	"clock-frequency does not match PWM period\n");
	88	return -EINVAL;
	89	}
	90
dd0b38b7 BB	91	/*
	92	* FIXME: pwm_apply_args() should be removed when switching to the
	93	* atomic PWM API.
	94	*/
	95	pwm_apply_args(pwm);
	96	ret = pwm_config(pwm, (pargs.period + 1) >> 1, pargs.period);
9a74ccdb PZ	97	if (ret < 0)
	98	return ret;
	99
	100	clk_name = node->name;
	101	of_property_read_string(node, "clock-output-names", &clk_name);
	102
	103	init.name = clk_name;
	104	init.ops = &clk_pwm_ops;
1edfc1e7	105	init.flags = CLK_IS_BASIC;
9a74ccdb PZ	106	init.num_parents = 0;
	107
	108	clk_pwm->pwm = pwm;
	109	clk_pwm->hw.init = &init;
	110	clk = devm_clk_register(&pdev->dev, &clk_pwm->hw);
	111	if (IS_ERR(clk))
	112	return PTR_ERR(clk);
	113
	114	return of_clk_add_provider(node, of_clk_src_simple_get, clk);
	115	}
	116
	117	static int clk_pwm_remove(struct platform_device *pdev)
	118	{
	119	of_clk_del_provider(pdev->dev.of_node);
	120
	121	return 0;
	122	}
	123
	124	static const struct of_device_id clk_pwm_dt_ids[] = {
	125	{ .compatible = "pwm-clock" },
	126	{ }
	127	};
	128	MODULE_DEVICE_TABLE(of, clk_pwm_dt_ids);
	129
	130	static struct platform_driver clk_pwm_driver = {
	131	.probe = clk_pwm_probe,
	132	.remove = clk_pwm_remove,
	133	.driver = {
	134	.name = "pwm-clock",
	135	.of_match_table = of_match_ptr(clk_pwm_dt_ids),
	136	},
	137	};
	138
	139	module_platform_driver(clk_pwm_driver);
	140
	141	MODULE_AUTHOR("Philipp Zabel <p.zabel@pengutronix.de>");
	142	MODULE_DESCRIPTION("PWM clock driver");
	143	MODULE_LICENSE("GPL");