fbdev: imsttfb: Fix use after free bug in imsttfb_probe
[linux-block.git] / drivers / clk / clk-gpio.c
CommitLineData
e1bd55e5 1// SPDX-License-Identifier: GPL-2.0
c873d14d 2/*
5f1d8970 3 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - https://www.ti.com
80eeb1f0
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4 *
5 * Authors:
6 * Jyri Sarha <jsarha@ti.com>
7 * Sergej Sawazki <ce3a@gmx.de>
c873d14d 8 *
80eeb1f0 9 * Gpio controlled clock implementation
c873d14d
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10 */
11
12#include <linux/clk-provider.h>
e21b08e2 13#include <linux/export.h>
c873d14d 14#include <linux/slab.h>
44b4aa97 15#include <linux/gpio/consumer.h>
c873d14d
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16#include <linux/err.h>
17#include <linux/device.h>
14b04f28
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18#include <linux/platform_device.h>
19#include <linux/of_device.h>
c873d14d
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20
21/**
22 * DOC: basic gpio gated clock which can be enabled and disabled
23 * with gpio output
24 * Traits of this clock:
25 * prepare - clk_(un)prepare only ensures parent is (un)prepared
26 * enable - clk_enable and clk_disable are functional & control gpio
27 * rate - inherits rate from parent. No clk_set_rate support
28 * parent - fixed parent. No clk_set_parent support
29 */
30
9a9b5a4a
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31/**
32 * struct clk_gpio - gpio gated clock
33 *
34 * @hw: handle between common and hardware-specific interfaces
35 * @gpiod: gpio descriptor
36 *
37 * Clock with a gpio control for enabling and disabling the parent clock
38 * or switching between two parents by asserting or deasserting the gpio.
39 *
40 * Implements .enable, .disable and .is_enabled or
41 * .get_parent, .set_parent and .determine_rate depending on which clk_ops
42 * is used.
43 */
44struct clk_gpio {
45 struct clk_hw hw;
46 struct gpio_desc *gpiod;
47};
48
49#define to_clk_gpio(_hw) container_of(_hw, struct clk_gpio, hw)
50
c873d14d
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51static int clk_gpio_gate_enable(struct clk_hw *hw)
52{
53 struct clk_gpio *clk = to_clk_gpio(hw);
54
55 gpiod_set_value(clk->gpiod, 1);
56
57 return 0;
58}
59
60static void clk_gpio_gate_disable(struct clk_hw *hw)
61{
62 struct clk_gpio *clk = to_clk_gpio(hw);
63
64 gpiod_set_value(clk->gpiod, 0);
65}
66
67static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
68{
69 struct clk_gpio *clk = to_clk_gpio(hw);
70
71 return gpiod_get_value(clk->gpiod);
72}
73
9a9b5a4a 74static const struct clk_ops clk_gpio_gate_ops = {
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75 .enable = clk_gpio_gate_enable,
76 .disable = clk_gpio_gate_disable,
77 .is_enabled = clk_gpio_gate_is_enabled,
78};
c873d14d 79
c0189fee
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80static int clk_sleeping_gpio_gate_prepare(struct clk_hw *hw)
81{
82 struct clk_gpio *clk = to_clk_gpio(hw);
83
84 gpiod_set_value_cansleep(clk->gpiod, 1);
85
86 return 0;
87}
88
89static void clk_sleeping_gpio_gate_unprepare(struct clk_hw *hw)
90{
91 struct clk_gpio *clk = to_clk_gpio(hw);
92
93 gpiod_set_value_cansleep(clk->gpiod, 0);
94}
95
96static int clk_sleeping_gpio_gate_is_prepared(struct clk_hw *hw)
97{
98 struct clk_gpio *clk = to_clk_gpio(hw);
99
100 return gpiod_get_value_cansleep(clk->gpiod);
101}
102
103static const struct clk_ops clk_sleeping_gpio_gate_ops = {
104 .prepare = clk_sleeping_gpio_gate_prepare,
105 .unprepare = clk_sleeping_gpio_gate_unprepare,
106 .is_prepared = clk_sleeping_gpio_gate_is_prepared,
107};
108
c873d14d 109/**
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110 * DOC: basic clock multiplexer which can be controlled with a gpio output
111 * Traits of this clock:
112 * prepare - clk_prepare only ensures that parents are prepared
113 * rate - rate is only affected by parent switching. No clk_set_rate support
114 * parent - parent is adjustable through clk_set_parent
c873d14d 115 */
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116
117static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
c873d14d 118{
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119 struct clk_gpio *clk = to_clk_gpio(hw);
120
2e838e7f 121 return gpiod_get_value_cansleep(clk->gpiod);
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122}
123
124static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
125{
126 struct clk_gpio *clk = to_clk_gpio(hw);
127
2e838e7f 128 gpiod_set_value_cansleep(clk->gpiod, index);
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129
130 return 0;
131}
132
9a9b5a4a 133static const struct clk_ops clk_gpio_mux_ops = {
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134 .get_parent = clk_gpio_mux_get_parent,
135 .set_parent = clk_gpio_mux_set_parent,
136 .determine_rate = __clk_mux_determine_rate,
137};
80eeb1f0 138
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139static struct clk_hw *clk_register_gpio(struct device *dev, u8 num_parents,
140 struct gpio_desc *gpiod,
141 const struct clk_ops *clk_gpio_ops)
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142{
143 struct clk_gpio *clk_gpio;
b120743a 144 struct clk_hw *hw;
80eeb1f0 145 struct clk_init_data init = {};
c873d14d 146 int err;
9a9b5a4a
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147 const struct clk_parent_data gpio_parent_data[] = {
148 { .index = 0 },
149 { .index = 1 },
150 };
c873d14d 151
9a9b5a4a 152 clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
80eeb1f0
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153 if (!clk_gpio)
154 return ERR_PTR(-ENOMEM);
155
9a9b5a4a 156 init.name = dev->of_node->name;
80eeb1f0 157 init.ops = clk_gpio_ops;
9a9b5a4a 158 init.parent_data = gpio_parent_data;
80eeb1f0 159 init.num_parents = num_parents;
9a9b5a4a 160 init.flags = CLK_SET_RATE_PARENT;
c873d14d 161
908a543a 162 clk_gpio->gpiod = gpiod;
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163 clk_gpio->hw.init = &init;
164
b120743a 165 hw = &clk_gpio->hw;
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166 err = devm_clk_hw_register(dev, hw);
167 if (err)
168 return ERR_PTR(err);
c873d14d 169
9a9b5a4a 170 return hw;
c873d14d 171}
80eeb1f0 172
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173static struct clk_hw *clk_hw_register_gpio_gate(struct device *dev,
174 int num_parents,
175 struct gpio_desc *gpiod)
80eeb1f0 176{
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177 const struct clk_ops *ops;
178
179 if (gpiod_cansleep(gpiod))
180 ops = &clk_sleeping_gpio_gate_ops;
181 else
182 ops = &clk_gpio_gate_ops;
183
9a9b5a4a 184 return clk_register_gpio(dev, num_parents, gpiod, ops);
80eeb1f0 185}
b120743a 186
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187static struct clk_hw *clk_hw_register_gpio_mux(struct device *dev,
188 struct gpio_desc *gpiod)
b120743a 189{
9a9b5a4a 190 return clk_register_gpio(dev, 2, gpiod, &clk_gpio_mux_ops);
b120743a 191}
80eeb1f0 192
14b04f28 193static int gpio_clk_driver_probe(struct platform_device *pdev)
c873d14d 194{
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195 struct device *dev = &pdev->dev;
196 struct device_node *node = dev->of_node;
197 const char *gpio_name;
0985df89 198 unsigned int num_parents;
908a543a 199 struct gpio_desc *gpiod;
9a9b5a4a 200 struct clk_hw *hw;
908a543a
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201 bool is_mux;
202 int ret;
14b04f28 203
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204 is_mux = of_device_is_compatible(node, "gpio-mux-clock");
205
14b04f28 206 num_parents = of_clk_get_parent_count(node);
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207 if (is_mux && num_parents != 2) {
208 dev_err(dev, "mux-clock must have 2 parents\n");
209 return -EINVAL;
c873d14d
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210 }
211
908a543a 212 gpio_name = is_mux ? "select" : "enable";
9a9b5a4a 213 gpiod = devm_gpiod_get(dev, gpio_name, GPIOD_OUT_LOW);
908a543a
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214 if (IS_ERR(gpiod)) {
215 ret = PTR_ERR(gpiod);
216 if (ret == -EPROBE_DEFER)
e665f029
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217 pr_debug("%pOFn: %s: GPIOs not yet available, retry later\n",
218 node, __func__);
80eeb1f0 219 else
e665f029
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220 pr_err("%pOFn: %s: Can't get '%s' named GPIO property\n",
221 node, __func__,
14b04f28 222 gpio_name);
908a543a 223 return ret;
c873d14d 224 }
c873d14d 225
14b04f28 226 if (is_mux)
9a9b5a4a 227 hw = clk_hw_register_gpio_mux(dev, gpiod);
14b04f28 228 else
9a9b5a4a
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229 hw = clk_hw_register_gpio_gate(dev, num_parents, gpiod);
230 if (IS_ERR(hw))
231 return PTR_ERR(hw);
c873d14d 232
9a9b5a4a 233 return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
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234}
235
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236static const struct of_device_id gpio_clk_match_table[] = {
237 { .compatible = "gpio-mux-clock" },
238 { .compatible = "gpio-gate-clock" },
239 { }
240};
80eeb1f0 241
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242static struct platform_driver gpio_clk_driver = {
243 .probe = gpio_clk_driver_probe,
244 .driver = {
245 .name = "gpio-clk",
246 .of_match_table = gpio_clk_match_table,
247 },
248};
249builtin_platform_driver(gpio_clk_driver);