[linux-2.6-block.git] / drivers / clk / clk-fixed-factor.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
 */
#include <linux/module.h>
#include <linux/clk-provider.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/of.h>
#include <linux/platform_device.h>

/*
 * DOC: basic fixed multiplier and divider clock that cannot gate
 *
 * Traits of this clock:
 * prepare - clk_prepare only ensures that parents are prepared
 * enable - clk_enable only ensures that parents are enabled
 * rate - rate is fixed.  clk->rate = parent->rate / div * mult
 * parent - fixed parent.  No clk_set_parent support
 */

static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
		unsigned long parent_rate)
{
	struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
	unsigned long long int rate;

	rate = (unsigned long long int)parent_rate * fix->mult;
	do_div(rate, fix->div);
	return (unsigned long)rate;
}

static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,
				unsigned long *prate)
{
	struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);

	if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
		unsigned long best_parent;

		best_parent = (rate / fix->mult) * fix->div;
		*prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
	}

	return (*prate / fix->div) * fix->mult;
}

static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,
				unsigned long parent_rate)
{
	/*
	 * We must report success but we can do so unconditionally because
	 * clk_factor_round_rate returns values that ensure this call is a
	 * nop.
	 */

	return 0;
}

const struct clk_ops clk_fixed_factor_ops = {
	.round_rate = clk_factor_round_rate,
	.set_rate = clk_factor_set_rate,
	.recalc_rate = clk_factor_recalc_rate,
};
EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);

static struct clk_hw *
__clk_hw_register_fixed_factor(struct device *dev, struct device_node *np,
		const char *name, const char *parent_name, int index,
		unsigned long flags, unsigned int mult, unsigned int div)
{
	struct clk_fixed_factor *fix;
	struct clk_init_data init = { };
	struct clk_parent_data pdata = { .index = index };
	struct clk_hw *hw;
	int ret;

	fix = kmalloc(sizeof(*fix), GFP_KERNEL);
	if (!fix)
		return ERR_PTR(-ENOMEM);

	/* struct clk_fixed_factor assignments */
	fix->mult = mult;
	fix->div = div;
	fix->hw.init = &init;

	init.name = name;
	init.ops = &clk_fixed_factor_ops;
	init.flags = flags;
	if (parent_name)
		init.parent_names = &parent_name;
	else
		init.parent_data = &pdata;
	init.num_parents = 1;

	hw = &fix->hw;
	if (dev)
		ret = clk_hw_register(dev, hw);
	else
		ret = of_clk_hw_register(np, hw);
	if (ret) {
		kfree(fix);
		hw = ERR_PTR(ret);
	}

	return hw;
}

struct clk_hw *clk_hw_register_fixed_factor(struct device *dev,
		const char *name, const char *parent_name, unsigned long flags,
		unsigned int mult, unsigned int div)
{
	return __clk_hw_register_fixed_factor(dev, NULL, name, parent_name, -1,
					      flags, mult, div);
}
EXPORT_SYMBOL_GPL(clk_hw_register_fixed_factor);

struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
		const char *parent_name, unsigned long flags,
		unsigned int mult, unsigned int div)
{
	struct clk_hw *hw;

	hw = clk_hw_register_fixed_factor(dev, name, parent_name, flags, mult,
					  div);
	if (IS_ERR(hw))
		return ERR_CAST(hw);
	return hw->clk;
}
EXPORT_SYMBOL_GPL(clk_register_fixed_factor);

void clk_unregister_fixed_factor(struct clk *clk)
{
	struct clk_hw *hw;

	hw = __clk_get_hw(clk);
	if (!hw)
		return;

	clk_unregister(clk);
	kfree(to_clk_fixed_factor(hw));
}
EXPORT_SYMBOL_GPL(clk_unregister_fixed_factor);

void clk_hw_unregister_fixed_factor(struct clk_hw *hw)
{
	struct clk_fixed_factor *fix;

	fix = to_clk_fixed_factor(hw);

	clk_hw_unregister(hw);
	kfree(fix);
}
EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_factor);

#ifdef CONFIG_OF
static const struct of_device_id set_rate_parent_matches[] = {
	{ .compatible = "allwinner,sun4i-a10-pll3-2x-clk" },
	{ /* Sentinel */ },
};

static struct clk_hw *_of_fixed_factor_clk_setup(struct device_node *node)
{
	struct clk_hw *hw;
	const char *clk_name = node->name;
	unsigned long flags = 0;
	u32 div, mult;
	int ret;

	if (of_property_read_u32(node, "clock-div", &div)) {
		pr_err("%s Fixed factor clock <%pOFn> must have a clock-div property\n",
			__func__, node);
		return ERR_PTR(-EIO);
	}

	if (of_property_read_u32(node, "clock-mult", &mult)) {
		pr_err("%s Fixed factor clock <%pOFn> must have a clock-mult property\n",
			__func__, node);
		return ERR_PTR(-EIO);
	}

	of_property_read_string(node, "clock-output-names", &clk_name);

	if (of_match_node(set_rate_parent_matches, node))
		flags |= CLK_SET_RATE_PARENT;

	hw = __clk_hw_register_fixed_factor(NULL, node, clk_name, NULL, 0,
					    flags, mult, div);
	if (IS_ERR(hw)) {
		/*
		 * Clear OF_POPULATED flag so that clock registration can be
		 * attempted again from probe function.
		 */
		of_node_clear_flag(node, OF_POPULATED);
		return ERR_CAST(hw);
	}

	ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
	if (ret) {
		clk_hw_unregister_fixed_factor(hw);
		return ERR_PTR(ret);
	}

	return hw;
}

/**
 * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
 */
void __init of_fixed_factor_clk_setup(struct device_node *node)
{
	_of_fixed_factor_clk_setup(node);
}
CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
		of_fixed_factor_clk_setup);

static int of_fixed_factor_clk_remove(struct platform_device *pdev)
{
	struct clk_hw *clk = platform_get_drvdata(pdev);

	of_clk_del_provider(pdev->dev.of_node);
	clk_hw_unregister_fixed_factor(clk);

	return 0;
}

static int of_fixed_factor_clk_probe(struct platform_device *pdev)
{
	struct clk_hw *clk;

	/*
	 * This function is not executed when of_fixed_factor_clk_setup
	 * succeeded.
	 */
	clk = _of_fixed_factor_clk_setup(pdev->dev.of_node);
	if (IS_ERR(clk))
		return PTR_ERR(clk);

	platform_set_drvdata(pdev, clk);

	return 0;
}

static const struct of_device_id of_fixed_factor_clk_ids[] = {
	{ .compatible = "fixed-factor-clock" },
	{ }
};
MODULE_DEVICE_TABLE(of, of_fixed_factor_clk_ids);

static struct platform_driver of_fixed_factor_clk_driver = {
	.driver = {
		.name = "of_fixed_factor_clk",
		.of_match_table = of_fixed_factor_clk_ids,
	},
	.probe = of_fixed_factor_clk_probe,
	.remove = of_fixed_factor_clk_remove,
};
builtin_platform_driver(of_fixed_factor_clk_driver);
#endif
Commit	Line	Data
e1bd55e5	1	// SPDX-License-Identifier: GPL-2.0
f0948f59 SH	2	/*
f0948f59 SH	3	* Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
f0948f59 SH	4	*/
	5	#include <linux/module.h>
	6	#include <linux/clk-provider.h>
	7	#include <linux/slab.h>
	8	#include <linux/err.h>
79b16641	9	#include <linux/of.h>
971451b3	10	#include <linux/platform_device.h>
f0948f59 SH	11
	12	/*
	13	* DOC: basic fixed multiplier and divider clock that cannot gate
	14	*
	15	* Traits of this clock:
	16	* prepare - clk_prepare only ensures that parents are prepared
	17	* enable - clk_enable only ensures that parents are enabled
	18	* rate - rate is fixed. clk->rate = parent->rate / div * mult
	19	* parent - fixed parent. No clk_set_parent support
	20	*/
	21
f0948f59 SH	22	static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
	23	unsigned long parent_rate)
	24	{
	25	struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
bab53301	26	unsigned long long int rate;
f0948f59	27
bab53301 HZ	28	rate = (unsigned long long int)parent_rate * fix->mult;
	29	do_div(rate, fix->div);
	30	return (unsigned long)rate;
f0948f59 SH	31	}
	32
	33	static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,
	34	unsigned long *prate)
	35	{
	36	struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
	37
98d8a60e	38	if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
f0948f59 SH	39	unsigned long best_parent;
	40
	41	best_parent = (rate / fix->mult) * fix->div;
2f508a95	42	*prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
f0948f59 SH	43	}
	44
	45	return (prate / fix->div) fix->mult;
	46	}
	47
	48	static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,
	49	unsigned long parent_rate)
	50	{
3037e9ea DT	51	/*
	52	* We must report success but we can do so unconditionally because
	53	* clk_factor_round_rate returns values that ensure this call is a
	54	* nop.
	55	*/
	56
f0948f59 SH	57	return 0;
	58	}
	59
3037e9ea	60	const struct clk_ops clk_fixed_factor_ops = {
f0948f59 SH	61	.round_rate = clk_factor_round_rate,
	62	.set_rate = clk_factor_set_rate,
	63	.recalc_rate = clk_factor_recalc_rate,
	64	};
	65	EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);
	66
ecbf3f17 SB	67	static struct clk_hw *
	68	__clk_hw_register_fixed_factor(struct device dev, struct device_node np,
	69	const char name, const char parent_name, int index,
	70	unsigned long flags, unsigned int mult, unsigned int div)
f0948f59 SH	71	{
f0948f59 SH	72	struct clk_fixed_factor *fix;
e4818d61	73	struct clk_init_data init = { };
ecbf3f17	74	struct clk_parent_data pdata = { .index = index };
0759ac8a SB	75	struct clk_hw *hw;
0759ac8a SB	76	int ret;
f0948f59 SH	77
f0948f59 SH	78	fix = kmalloc(sizeof(*fix), GFP_KERNEL);
d122db7e	79	if (!fix)
f0948f59	80	return ERR_PTR(-ENOMEM);
f0948f59 SH	81
	82	/* struct clk_fixed_factor assignments */
	83	fix->mult = mult;
	84	fix->div = div;
	85	fix->hw.init = &init;
	86
	87	init.name = name;
	88	init.ops = &clk_fixed_factor_ops;
90b6c5c7	89	init.flags = flags;
ecbf3f17 SB	90	if (parent_name)
	91	init.parent_names = &parent_name;
	92	else
	93	init.parent_data = &pdata;
f0948f59 SH	94	init.num_parents = 1;
f0948f59 SH	95
0759ac8a	96	hw = &fix->hw;
ecbf3f17 SB	97	if (dev)
	98	ret = clk_hw_register(dev, hw);
	99	else
	100	ret = of_clk_hw_register(np, hw);
0759ac8a	101	if (ret) {
f0948f59	102	kfree(fix);
0759ac8a SB	103	hw = ERR_PTR(ret);
0759ac8a SB	104	}
f0948f59	105
0759ac8a SB	106	return hw;
0759ac8a SB	107	}
ecbf3f17 SB	108
	109	struct clk_hw clk_hw_register_fixed_factor(struct device dev,
	110	const char name, const char parent_name, unsigned long flags,
	111	unsigned int mult, unsigned int div)
	112	{
	113	return __clk_hw_register_fixed_factor(dev, NULL, name, parent_name, -1,
	114	flags, mult, div);
	115	}
0759ac8a SB	116	EXPORT_SYMBOL_GPL(clk_hw_register_fixed_factor);
	117
	118	struct clk clk_register_fixed_factor(struct device dev, const char *name,
	119	const char *parent_name, unsigned long flags,
	120	unsigned int mult, unsigned int div)
	121	{
	122	struct clk_hw *hw;
	123
	124	hw = clk_hw_register_fixed_factor(dev, name, parent_name, flags, mult,
	125	div);
	126	if (IS_ERR(hw))
	127	return ERR_CAST(hw);
	128	return hw->clk;
f0948f59	129	}
5cfe10bb	130	EXPORT_SYMBOL_GPL(clk_register_fixed_factor);
cbf9591f MY	131
	132	void clk_unregister_fixed_factor(struct clk *clk)
	133	{
	134	struct clk_hw *hw;
	135
	136	hw = __clk_get_hw(clk);
	137	if (!hw)
	138	return;
	139
	140	clk_unregister(clk);
	141	kfree(to_clk_fixed_factor(hw));
	142	}
	143	EXPORT_SYMBOL_GPL(clk_unregister_fixed_factor);
0759ac8a SB	144
	145	void clk_hw_unregister_fixed_factor(struct clk_hw *hw)
	146	{
	147	struct clk_fixed_factor *fix;
	148
	149	fix = to_clk_fixed_factor(hw);
	150
	151	clk_hw_unregister(hw);
	152	kfree(fix);
	153	}
	154	EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_factor);
5cfe10bb	155
79b16641	156	#ifdef CONFIG_OF
e6cbf998 MR	157	static const struct of_device_id set_rate_parent_matches[] = {
	158	{ .compatible = "allwinner,sun4i-a10-pll3-2x-clk" },
	159	{ /* Sentinel */ },
	160	};
	161
ecbf3f17	162	static struct clk_hw _of_fixed_factor_clk_setup(struct device_node node)
79b16641	163	{
ecbf3f17	164	struct clk_hw *hw;
79b16641	165	const char *clk_name = node->name;
e6cbf998	166	unsigned long flags = 0;
79b16641	167	u32 div, mult;
971451b3	168	int ret;
79b16641 GC	169
79b16641 GC	170	if (of_property_read_u32(node, "clock-div", &div)) {
e665f029 RH	171	pr_err("%s Fixed factor clock <%pOFn> must have a clock-div property\n",
e665f029 RH	172	__func__, node);
971451b3	173	return ERR_PTR(-EIO);
79b16641 GC	174	}
	175
	176	if (of_property_read_u32(node, "clock-mult", &mult)) {
e665f029 RH	177	pr_err("%s Fixed factor clock <%pOFn> must have a clock-mult property\n",
e665f029 RH	178	__func__, node);
971451b3	179	return ERR_PTR(-EIO);
79b16641 GC	180	}
	181
	182	of_property_read_string(node, "clock-output-names", &clk_name);
79b16641	183
e6cbf998 MR	184	if (of_match_node(set_rate_parent_matches, node))
	185	flags \|= CLK_SET_RATE_PARENT;
	186
ecbf3f17 SB	187	hw = __clk_hw_register_fixed_factor(NULL, node, clk_name, NULL, 0,
	188	flags, mult, div);
	189	if (IS_ERR(hw)) {
f6dab423	190	/*
f6dab423 RV	191	* Clear OF_POPULATED flag so that clock registration can be
	192	* attempted again from probe function.
	193	*/
	194	of_node_clear_flag(node, OF_POPULATED);
ecbf3f17	195	return ERR_CAST(hw);
f6dab423	196	}
971451b3	197
ecbf3f17	198	ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
971451b3	199	if (ret) {
ecbf3f17	200	clk_hw_unregister_fixed_factor(hw);
971451b3 RRD	201	return ERR_PTR(ret);
	202	}
	203
ecbf3f17	204	return hw;
971451b3 RRD	205	}
	206
	207	/**
	208	* of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
	209	*/
	210	void __init of_fixed_factor_clk_setup(struct device_node *node)
	211	{
	212	_of_fixed_factor_clk_setup(node);
79b16641	213	}
79b16641 GC	214	CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
79b16641 GC	215	of_fixed_factor_clk_setup);
971451b3 RRD	216
	217	static int of_fixed_factor_clk_remove(struct platform_device *pdev)
	218	{
ecbf3f17	219	struct clk_hw *clk = platform_get_drvdata(pdev);
971451b3	220
f98e8a57	221	of_clk_del_provider(pdev->dev.of_node);
ecbf3f17	222	clk_hw_unregister_fixed_factor(clk);
971451b3 RRD	223
	224	return 0;
	225	}
	226
	227	static int of_fixed_factor_clk_probe(struct platform_device *pdev)
	228	{
ecbf3f17	229	struct clk_hw *clk;
971451b3 RRD	230
	231	/*
	232	* This function is not executed when of_fixed_factor_clk_setup
	233	* succeeded.
	234	*/
	235	clk = _of_fixed_factor_clk_setup(pdev->dev.of_node);
	236	if (IS_ERR(clk))
	237	return PTR_ERR(clk);
	238
	239	platform_set_drvdata(pdev, clk);
	240
	241	return 0;
	242	}
	243
	244	static const struct of_device_id of_fixed_factor_clk_ids[] = {
	245	{ .compatible = "fixed-factor-clock" },
	246	{ }
	247	};
	248	MODULE_DEVICE_TABLE(of, of_fixed_factor_clk_ids);
	249
	250	static struct platform_driver of_fixed_factor_clk_driver = {
	251	.driver = {
	252	.name = "of_fixed_factor_clk",
	253	.of_match_table = of_fixed_factor_clk_ids,
	254	},
	255	.probe = of_fixed_factor_clk_probe,
	256	.remove = of_fixed_factor_clk_remove,
	257	};
	258	builtin_platform_driver(of_fixed_factor_clk_driver);
79b16641	259	#endif