dt-bindings: clk: Add Baikal-T1 CCU Dividers binding
[linux-block.git] / drivers / clk / Kconfig
CommitLineData
7b9487a9 1# SPDX-License-Identifier: GPL-2.0
6d803ba7
JCPV
2
3config CLKDEV_LOOKUP
4 bool
5 select HAVE_CLK
aa3831cf 6
5c77f560
SG
7config HAVE_CLK_PREPARE
8 bool
9
8fb61e33
AB
10config COMMON_CLK
11 bool
b2476490 12 select HAVE_CLK_PREPARE
01033be1 13 select CLKDEV_LOOKUP
83fe27ea 14 select SRCU
0777591e 15 select RATIONAL
b2476490
MT
16 ---help---
17 The common clock framework is a single definition of struct
18 clk, useful across many platforms, as well as an
19 implementation of the clock API in include/linux/clk.h.
20 Architectures utilizing the common struct clk should select
8fb61e33 21 this option.
b2476490 22
8fb61e33
AB
23menu "Common Clock Framework"
24 depends on COMMON_CLK
b2476490 25
f05259a6
MB
26config COMMON_CLK_WM831X
27 tristate "Clock driver for WM831x/2x PMICs"
28 depends on MFD_WM831X
29 ---help---
333d2d19 30 Supports the clocking subsystem of the WM831x/2x series of
fe4e4372 31 PMICs from Wolfson Microelectronics.
f05259a6 32
5ee2b877 33source "drivers/clk/versatile/Kconfig"
f9a6aa43 34
daeeb438
EP
35config CLK_HSDK
36 bool "PLL Driver for HSDK platform"
37 depends on OF || COMPILE_TEST
38 ---help---
39 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
40 control.
41
73118e61 42config COMMON_CLK_MAX77686
5a227cd1 43 tristate "Clock driver for Maxim 77620/77686/77802 MFD"
9c1b305c 44 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
83ccf16c 45 ---help---
5a227cd1
LD
46 This driver supports Maxim 77620/77686/77802 crystal oscillator
47 clock.
83ccf16c 48
33f51046
DM
49config COMMON_CLK_MAX9485
50 tristate "Maxim 9485 Programmable Clock Generator"
51 depends on I2C
52 help
53 This driver supports Maxim 9485 Programmable Audio Clock Generator
54
038b892a 55config COMMON_CLK_RK808
8ed14401 56 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
038b892a
CZ
57 depends on MFD_RK808
58 ---help---
8ed14401
TX
59 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
60 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
61 Clkout1 is always on, Clkout2 can off by control register.
038b892a 62
b68adc23 63config COMMON_CLK_HI655X
3a49afb8
RV
64 tristate "Clock driver for Hi655x" if EXPERT
65 depends on (MFD_HI655X_PMIC || COMPILE_TEST)
66 depends on REGMAP
67 default MFD_HI655X_PMIC
b68adc23
DL
68 ---help---
69 This driver supports the hi655x PMIC clock. This
70 multi-function device has one fixed-rate oscillator, clocked
71 at 32KHz.
72
6d6a1d82
SH
73config COMMON_CLK_SCMI
74 tristate "Clock driver controlled via SCMI interface"
75 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
76 ---help---
77 This driver provides support for clocks that are controlled
78 by firmware that implements the SCMI interface.
79
80 This driver uses SCMI Message Protocol to interact with the
81 firmware providing all the clock controls.
82
cd52c2a4
SH
83config COMMON_CLK_SCPI
84 tristate "Clock driver controlled via SCPI interface"
85 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
86 ---help---
87 This driver provides support for clocks that are controlled
88 by firmware that implements the SCPI interface.
89
90 This driver uses SCPI Message Protocol to interact with the
91 firmware providing all the clock controls.
92
3044a860
ML
93config COMMON_CLK_SI5341
94 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
95 depends on I2C
96 select REGMAP_I2C
97 help
98 This driver supports Silicon Labs Si5341 and Si5340 programmable clock
99 generators. Not all features of these chips are currently supported
100 by the driver, in particular it only supports XTAL input. The chip can
101 be pre-programmed to support other configurations and features not yet
102 implemented in the driver.
103
9abd5f05
SH
104config COMMON_CLK_SI5351
105 tristate "Clock driver for SiLabs 5351A/B/C"
106 depends on I2C
107 select REGMAP_I2C
108 select RATIONAL
109 ---help---
110 This driver supports Silicon Labs 5351A/B/C programmable clock
111 generators.
112
8ce20e66
ML
113config COMMON_CLK_SI514
114 tristate "Clock driver for SiLabs 514 devices"
115 depends on I2C
116 depends on OF
117 select REGMAP_I2C
118 help
8ce20e66
ML
119 This driver supports the Silicon Labs 514 programmable clock
120 generator.
121
953cc3e8
ML
122config COMMON_CLK_SI544
123 tristate "Clock driver for SiLabs 544 devices"
124 depends on I2C
125 select REGMAP_I2C
126 help
953cc3e8
ML
127 This driver supports the Silicon Labs 544 programmable clock
128 generator.
8ce20e66 129
1459c837
SB
130config COMMON_CLK_SI570
131 tristate "Clock driver for SiLabs 570 and compatible devices"
132 depends on I2C
133 depends on OF
134 select REGMAP_I2C
135 help
1459c837
SB
136 This driver supports Silicon Labs 570/571/598/599 programmable
137 clock generators.
138
1ab4601d
MS
139config COMMON_CLK_BM1880
140 bool "Clock driver for Bitmain BM1880 SoC"
141 depends on ARCH_BITMAIN || COMPILE_TEST
142 default ARCH_BITMAIN
143 help
144 This driver supports the clocks on Bitmain BM1880 SoC.
145
c7d5a46b
ML
146config COMMON_CLK_CDCE706
147 tristate "Clock driver for TI CDCE706 clock synthesizer"
148 depends on I2C
149 select REGMAP_I2C
150 select RATIONAL
151 ---help---
152 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
153
19fbbbbc 154config COMMON_CLK_CDCE925
5508124c 155 tristate "Clock driver for TI CDCE913/925/937/949 devices"
19fbbbbc
ML
156 depends on I2C
157 depends on OF
158 select REGMAP_I2C
159 help
5508124c
AM
160 This driver supports the TI CDCE913/925/937/949 programmable clock
161 synthesizer. Each chip has different number of PLLs and outputs.
162 For example, the CDCE925 contains two PLLs with spread-spectrum
163 clocking support and five output dividers. The driver only supports
164 the following setup, and uses a fixed setting for the output muxes.
19fbbbbc
ML
165 Y1 is derived from the input clock
166 Y2 and Y3 derive from PLL1
167 Y4 and Y5 derive from PLL2
168 Given a target output frequency, the driver will set the PLL and
169 divider to best approximate the desired output.
170
64dfbe24
KM
171config COMMON_CLK_CS2000_CP
172 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
173 depends on I2C
174 help
175 If you say yes here you get support for the CS2000 clock multiplier.
176
9cd10205
MW
177config COMMON_CLK_FSL_SAI
178 bool "Clock driver for BCLK of Freescale SAI cores"
179 depends on ARCH_LAYERSCAPE || COMPILE_TEST
180 help
181 This driver supports the Freescale SAI (Synchronous Audio Interface)
182 to be used as a generic clock output. Some SoCs have restrictions
183 regarding the possible pin multiplexer settings. Eg. on some SoCs
184 two SAI interfaces can only be enabled together. If just one is
185 needed, the BCLK pin of the second one can be used as general
186 purpose clock output. Ideally, it can be used to drive an audio
187 codec (sometimes known as MCLK).
188
846423f9
LW
189config COMMON_CLK_GEMINI
190 bool "Clock driver for Cortina Systems Gemini SoC"
191 depends on ARCH_GEMINI || COMPILE_TEST
192 select MFD_SYSCON
193 select RESET_CONTROLLER
194 ---help---
195 This driver supports the SoC clocks on the Cortina Systems Gemini
196 platform, also known as SL3516 or CS3516.
197
5eda5d79
JS
198config COMMON_CLK_ASPEED
199 bool "Clock driver for Aspeed BMC SoCs"
200 depends on ARCH_ASPEED || COMPILE_TEST
201 default ARCH_ASPEED
202 select MFD_SYSCON
203 select RESET_CONTROLLER
204 ---help---
205 This driver supports the SoC clocks on the Aspeed BMC platforms.
206
207 The G4 and G5 series, including the ast2400 and ast2500, are supported
208 by this driver.
209
7cc560de 210config COMMON_CLK_S2MPS11
e8b60a45 211 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
9c1b305c 212 depends on MFD_SEC_CORE || COMPILE_TEST
7cc560de 213 ---help---
e8b60a45
KK
214 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
215 clock. These multi-function devices have two (S2MPS14) or three
216 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
7cc560de 217
f9f8c043
PU
218config CLK_TWL6040
219 tristate "External McPDM functional clock from twl6040"
220 depends on TWL6040_CORE
221 ---help---
222 Enable the external functional clock support on OMAP4+ platforms for
223 McPDM. McPDM module is using the external bit clock on the McPDM bus
224 as functional clock.
225
0e646c52
LPC
226config COMMON_CLK_AXI_CLKGEN
227 tristate "AXI clkgen driver"
4a7748c3 228 depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
0e646c52 229 help
0e646c52
LPC
230 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
231 FPGAs. It is commonly used in Analog Devices' reference designs.
232
93a17c05
TY
233config CLK_QORIQ
234 bool "Clock driver for Freescale QorIQ platforms"
2f4bf528 235 depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF
555eae97 236 ---help---
93a17c05
TY
237 This adds the clock driver support for Freescale QorIQ platforms
238 using common clock framework.
555eae97 239
d37010a3
WH
240config CLK_LS1028A_PLLDIG
241 tristate "Clock driver for LS1028A Display output"
242 depends on ARCH_LAYERSCAPE || COMPILE_TEST
243 default ARCH_LAYERSCAPE
244 help
245 This driver support the Display output interfaces(LCD, DPHY) pixel clocks
246 of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
247 features of the PLL are currently supported by the driver. By default,
248 configured bypass mode with this PLL.
249
308964ca
LH
250config COMMON_CLK_XGENE
251 bool "Clock driver for APM XGene SoC"
ce9a1046 252 default ARCH_XGENE
4a7748c3 253 depends on ARM64 || COMPILE_TEST
308964ca
LH
254 ---help---
255 Sypport for the APM X-Gene SoC reference, PLL, and device clocks.
256
76c54783
CK
257config COMMON_CLK_LOCHNAGAR
258 tristate "Cirrus Logic Lochnagar clock driver"
259 depends on MFD_LOCHNAGAR
260 help
261 This driver supports the clocking features of the Cirrus Logic
262 Lochnagar audio development board.
263
f7c82a60
VZ
264config COMMON_CLK_NXP
265 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
266 select REGMAP_MMIO if ARCH_LPC32XX
72ad679a 267 select MFD_SYSCON if ARCH_LPC18XX
f7c82a60
VZ
268 ---help---
269 Support for clock providers on NXP platforms.
270
942d1d67
PU
271config COMMON_CLK_PALMAS
272 tristate "Clock driver for TI Palmas devices"
273 depends on MFD_PALMAS
274 ---help---
275 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
276 using common clock framework.
277
9a74ccdb
PZ
278config COMMON_CLK_PWM
279 tristate "Clock driver for PWMs used as clock outputs"
280 depends on PWM
281 ---help---
282 Adapter driver so that any PWM output can be (mis)used as clock signal
283 at 50% duty cycle.
284
98d147f5
RJ
285config COMMON_CLK_PXA
286 def_bool COMMON_CLK && ARCH_PXA
287 ---help---
048c58b4 288 Support for the Marvell PXA SoC.
98d147f5 289
ce6e1188
PCM
290config COMMON_CLK_PIC32
291 def_bool COMMON_CLK && MACH_PIC32
292
0bbd72b4
NA
293config COMMON_CLK_OXNAS
294 bool "Clock driver for the OXNAS SoC Family"
821f9946 295 depends on ARCH_OXNAS || COMPILE_TEST
0bbd72b4
NA
296 select MFD_SYSCON
297 ---help---
298 Support for the OXNAS SoC Family clocks.
299
3e1aec4e 300config COMMON_CLK_VC5
dbf6b16f 301 tristate "Clock driver for IDT VersaClock 5,6 devices"
3e1aec4e
MV
302 depends on I2C
303 depends on OF
304 select REGMAP_I2C
305 help
dbf6b16f
MV
306 This driver supports the IDT VersaClock 5 and VersaClock 6
307 programmable clock generators.
3e1aec4e 308
9bee94e7
GF
309config COMMON_CLK_STM32MP157
310 def_bool COMMON_CLK && MACH_STM32MP157
311 help
9bee94e7
GF
312 Support for stm32mp157 SoC family clocks
313
da32d353 314config COMMON_CLK_STM32F
9a160601 315 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
da32d353 316 help
da32d353
BG
317 Support for stm32f4 and stm32f7 SoC families clocks
318
319config COMMON_CLK_STM32H7
9a160601 320 def_bool COMMON_CLK && MACH_STM32H743
da32d353 321 help
da32d353
BG
322 Support for stm32h7 SoC family clocks
323
a9372a5f
LR
324config COMMON_CLK_MMP2
325 def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
326 help
327 Support for Marvell MMP2 and MMP3 SoC clocks
328
2e62246b 329config COMMON_CLK_BD718XX
ae866dec
MV
330 tristate "Clock driver for 32K clk gates on ROHM PMICs"
331 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 || MFD_ROHM_BD71828
2e62246b 332 help
ae866dec 333 This driver supports ROHM BD71837, ROHM BD71847, ROHM BD71828 and
0dae7f58 334 ROHM BD70528 PMICs clock gates.
2e62246b 335
50cc4caf
JK
336config COMMON_CLK_FIXED_MMIO
337 bool "Clock driver for Memory Mapped Fixed values"
338 depends on COMMON_CLK && OF
339 help
340 Support for Memory Mapped IO Fixed clocks
341
3495e295 342source "drivers/clk/actions/Kconfig"
7b9487a9 343source "drivers/clk/analogbits/Kconfig"
64a12c56 344source "drivers/clk/bcm/Kconfig"
72ea4861 345source "drivers/clk/hisilicon/Kconfig"
6b0fd6c1 346source "drivers/clk/imgtec/Kconfig"
3a48d918 347source "drivers/clk/imx/Kconfig"
0880fb86 348source "drivers/clk/ingenic/Kconfig"
b745c079 349source "drivers/clk/keystone/Kconfig"
2886c846 350source "drivers/clk/mediatek/Kconfig"
cb7c47d7 351source "drivers/clk/meson/Kconfig"
97fa4cf4 352source "drivers/clk/mvebu/Kconfig"
b9e65ebc 353source "drivers/clk/qcom/Kconfig"
a5bd7f7a 354source "drivers/clk/renesas/Kconfig"
4ce9b85e 355source "drivers/clk/samsung/Kconfig"
30b8e27e 356source "drivers/clk/sifive/Kconfig"
d41f59fd 357source "drivers/clk/sprd/Kconfig"
49c726d5 358source "drivers/clk/sunxi/Kconfig"
1d80c142 359source "drivers/clk/sunxi-ng/Kconfig"
31b52ba4 360source "drivers/clk/tegra/Kconfig"
21330497 361source "drivers/clk/ti/Kconfig"
734d82f4 362source "drivers/clk/uniphier/Kconfig"
3fde0e16 363source "drivers/clk/zynqmp/Kconfig"
b9e65ebc
JL
364
365endmenu