Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
01df0e3a | 2 | * i8xx_tco: TCO timer driver for i8xx chipsets |
1da177e4 LT |
3 | * |
4 | * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights Reserved. | |
5 | * http://www.kernelconcepts.de | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * Neither kernel concepts nor Nils Faerber admit liability nor provide | |
13 | * warranty for any of this software. This material is provided | |
14 | * "AS-IS" and at no charge. | |
15 | * | |
16 | * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de> | |
17 | * developed for | |
18 | * Jentro AG, Haar/Munich (Germany) | |
19 | * | |
20 | * TCO timer driver for i8xx chipsets | |
21 | * based on softdog.c by Alan Cox <alan@redhat.com> | |
22 | * | |
23 | * The TCO timer is implemented in the following I/O controller hubs: | |
24 | * (See the intel documentation on http://developer.intel.com.) | |
25 | * 82801AA (ICH) : document number 290655-003, 290677-014, | |
26 | * 82801AB (ICHO) : document number 290655-003, 290677-014, | |
27 | * 82801BA (ICH2) : document number 290687-002, 298242-027, | |
28 | * 82801BAM (ICH2-M) : document number 290687-002, 298242-027, | |
29 | * 82801CA (ICH3-S) : document number 290733-003, 290739-013, | |
30 | * 82801CAM (ICH3-M) : document number 290716-001, 290718-007, | |
31 | * 82801DB (ICH4) : document number 290744-001, 290745-020, | |
32 | * 82801DBM (ICH4-M) : document number 252337-001, 252663-005, | |
33 | * 82801E (C-ICH) : document number 273599-001, 273645-002, | |
34 | * 82801EB (ICH5) : document number 252516-001, 252517-003, | |
35 | * 82801ER (ICH5R) : document number 252516-001, 252517-003, | |
1da177e4 LT |
36 | * |
37 | * 20000710 Nils Faerber | |
38 | * Initial Version 0.01 | |
39 | * 20000728 Nils Faerber | |
40 | * 0.02 Fix for SMI_EN->TCO_EN bit, some cleanups | |
41 | * 20011214 Matt Domsch <Matt_Domsch@dell.com> | |
42 | * 0.03 Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT | |
43 | * Didn't add timeout option as i810_margin already exists. | |
44 | * 20020224 Joel Becker, Wim Van Sebroeck | |
45 | * 0.04 Support for 82801CA(M) chipset, timer margin needs to be > 3, | |
46 | * add support for WDIOC_SETTIMEOUT and WDIOC_GETTIMEOUT. | |
47 | * 20020412 Rob Radez <rob@osinvestor.com>, Wim Van Sebroeck | |
48 | * 0.05 Fix possible timer_alive race, add expect close support, | |
49 | * clean up ioctls (WDIOC_GETSTATUS, WDIOC_GETBOOTSTATUS and | |
50 | * WDIOC_SETOPTIONS), made i810tco_getdevice __init, | |
51 | * removed boot_status, removed tco_timer_read, | |
52 | * added support for 82801DB and 82801E chipset, | |
53 | * added support for 82801EB and 8280ER chipset, | |
54 | * general cleanup. | |
55 | * 20030921 Wim Van Sebroeck <wim@iguana.be> | |
56 | * 0.06 change i810_margin to heartbeat, use module_param, | |
57 | * added notify system support, renamed module to i8xx_tco. | |
58 | * 20050128 Wim Van Sebroeck <wim@iguana.be> | |
59 | * 0.07 Added support for the ICH4-M, ICH6, ICH6R, ICH6-M, ICH6W and ICH6RW | |
60 | * chipsets. Also added support for the "undocumented" ICH7 chipset. | |
01df0e3a WVS |
61 | * 20050807 Wim Van Sebroeck <wim@iguana.be> |
62 | * 0.08 Make sure that the watchdog is only "armed" when started. | |
63 | * (Kernel Bug 4251) | |
03a8e359 WVS |
64 | * 20060416 Wim Van Sebroeck <wim@iguana.be> |
65 | * 0.09 Remove support for the ICH6, ICH6R, ICH6-M, ICH6W and ICH6RW and | |
66 | * ICH7 chipsets. (See Kernel Bug 6031 - other code will support these | |
67 | * chipsets) | |
1da177e4 LT |
68 | */ |
69 | ||
70 | /* | |
71 | * Includes, defines, variables, module parameters, ... | |
72 | */ | |
73 | ||
74 | #include <linux/module.h> | |
75 | #include <linux/moduleparam.h> | |
76 | #include <linux/types.h> | |
77 | #include <linux/miscdevice.h> | |
78 | #include <linux/watchdog.h> | |
79 | #include <linux/notifier.h> | |
80 | #include <linux/reboot.h> | |
81 | #include <linux/init.h> | |
82 | #include <linux/fs.h> | |
83 | #include <linux/pci.h> | |
84 | #include <linux/ioport.h> | |
85 | ||
86 | #include <asm/uaccess.h> | |
87 | #include <asm/io.h> | |
88 | ||
89 | #include "i8xx_tco.h" | |
90 | ||
91 | /* Module and version information */ | |
03a8e359 | 92 | #define TCO_VERSION "0.09" |
1da177e4 LT |
93 | #define TCO_MODULE_NAME "i8xx TCO timer" |
94 | #define TCO_DRIVER_NAME TCO_MODULE_NAME ", v" TCO_VERSION | |
95 | #define PFX TCO_MODULE_NAME ": " | |
96 | ||
97 | /* internal variables */ | |
98 | static unsigned int ACPIBASE; | |
99 | static spinlock_t tco_lock; /* Guards the hardware */ | |
100 | static unsigned long timer_alive; | |
101 | static char tco_expect_close; | |
102 | static struct pci_dev *i8xx_tco_pci; | |
103 | ||
104 | /* module parameters */ | |
105 | #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat (2<heartbeat<39) */ | |
106 | static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */ | |
107 | module_param(heartbeat, int, 0); | |
108 | MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); | |
109 | ||
4bfdf378 | 110 | static int nowayout = WATCHDOG_NOWAYOUT; |
1da177e4 LT |
111 | module_param(nowayout, int, 0); |
112 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | |
113 | ||
114 | /* | |
115 | * Some TCO specific functions | |
116 | */ | |
117 | ||
118 | static inline unsigned char seconds_to_ticks(int seconds) | |
119 | { | |
120 | /* the internal timer is stored as ticks which decrement | |
121 | * every 0.6 seconds */ | |
122 | return (seconds * 10) / 6; | |
123 | } | |
124 | ||
125 | static int tco_timer_start (void) | |
126 | { | |
127 | unsigned char val; | |
128 | ||
129 | spin_lock(&tco_lock); | |
01df0e3a WVS |
130 | |
131 | /* disable chipset's NO_REBOOT bit */ | |
132 | pci_read_config_byte (i8xx_tco_pci, 0xd4, &val); | |
133 | val &= 0xfd; | |
134 | pci_write_config_byte (i8xx_tco_pci, 0xd4, val); | |
135 | ||
136 | /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */ | |
1da177e4 LT |
137 | val = inb (TCO1_CNT + 1); |
138 | val &= 0xf7; | |
139 | outb (val, TCO1_CNT + 1); | |
140 | val = inb (TCO1_CNT + 1); | |
01df0e3a | 141 | |
1da177e4 LT |
142 | spin_unlock(&tco_lock); |
143 | ||
144 | if (val & 0x08) | |
145 | return -1; | |
146 | return 0; | |
147 | } | |
148 | ||
149 | static int tco_timer_stop (void) | |
150 | { | |
01df0e3a | 151 | unsigned char val, val1; |
1da177e4 LT |
152 | |
153 | spin_lock(&tco_lock); | |
01df0e3a | 154 | /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */ |
1da177e4 LT |
155 | val = inb (TCO1_CNT + 1); |
156 | val |= 0x08; | |
157 | outb (val, TCO1_CNT + 1); | |
158 | val = inb (TCO1_CNT + 1); | |
01df0e3a WVS |
159 | |
160 | /* Set the NO_REBOOT bit to prevent later reboots, just for sure */ | |
161 | pci_read_config_byte (i8xx_tco_pci, 0xd4, &val1); | |
162 | val1 |= 0x02; | |
163 | pci_write_config_byte (i8xx_tco_pci, 0xd4, val1); | |
164 | ||
1da177e4 LT |
165 | spin_unlock(&tco_lock); |
166 | ||
167 | if ((val & 0x08) == 0) | |
168 | return -1; | |
169 | return 0; | |
170 | } | |
171 | ||
172 | static int tco_timer_keepalive (void) | |
173 | { | |
174 | spin_lock(&tco_lock); | |
01df0e3a | 175 | /* Reload the timer by writing to the TCO Timer Reload register */ |
1da177e4 LT |
176 | outb (0x01, TCO1_RLD); |
177 | spin_unlock(&tco_lock); | |
178 | return 0; | |
179 | } | |
180 | ||
181 | static int tco_timer_set_heartbeat (int t) | |
182 | { | |
183 | unsigned char val; | |
184 | unsigned char tmrval; | |
185 | ||
186 | tmrval = seconds_to_ticks(t); | |
187 | /* from the specs: */ | |
188 | /* "Values of 0h-3h are ignored and should not be attempted" */ | |
189 | if (tmrval > 0x3f || tmrval < 0x04) | |
190 | return -EINVAL; | |
191 | ||
192 | /* Write new heartbeat to watchdog */ | |
193 | spin_lock(&tco_lock); | |
194 | val = inb (TCO1_TMR); | |
195 | val &= 0xc0; | |
196 | val |= tmrval; | |
197 | outb (val, TCO1_TMR); | |
198 | val = inb (TCO1_TMR); | |
199 | spin_unlock(&tco_lock); | |
200 | ||
201 | if ((val & 0x3f) != tmrval) | |
202 | return -EINVAL; | |
203 | ||
204 | heartbeat = t; | |
205 | return 0; | |
206 | } | |
207 | ||
58b519f3 WVS |
208 | static int tco_timer_get_timeleft (int *time_left) |
209 | { | |
210 | unsigned char val; | |
211 | ||
212 | spin_lock(&tco_lock); | |
213 | ||
214 | /* read the TCO Timer */ | |
215 | val = inb (TCO1_RLD); | |
216 | val &= 0x3f; | |
217 | ||
218 | spin_unlock(&tco_lock); | |
219 | ||
220 | *time_left = (int)((val * 6) / 10); | |
221 | ||
222 | return 0; | |
223 | } | |
224 | ||
1da177e4 LT |
225 | /* |
226 | * /dev/watchdog handling | |
227 | */ | |
228 | ||
229 | static int i8xx_tco_open (struct inode *inode, struct file *file) | |
230 | { | |
231 | /* /dev/watchdog can only be opened once */ | |
232 | if (test_and_set_bit(0, &timer_alive)) | |
233 | return -EBUSY; | |
234 | ||
235 | /* | |
236 | * Reload and activate timer | |
237 | */ | |
238 | tco_timer_keepalive (); | |
239 | tco_timer_start (); | |
240 | return nonseekable_open(inode, file); | |
241 | } | |
242 | ||
243 | static int i8xx_tco_release (struct inode *inode, struct file *file) | |
244 | { | |
245 | /* | |
246 | * Shut off the timer. | |
247 | */ | |
248 | if (tco_expect_close == 42) { | |
249 | tco_timer_stop (); | |
250 | } else { | |
251 | printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n"); | |
252 | tco_timer_keepalive (); | |
253 | } | |
254 | clear_bit(0, &timer_alive); | |
255 | tco_expect_close = 0; | |
256 | return 0; | |
257 | } | |
258 | ||
259 | static ssize_t i8xx_tco_write (struct file *file, const char __user *data, | |
260 | size_t len, loff_t * ppos) | |
261 | { | |
262 | /* See if we got the magic character 'V' and reload the timer */ | |
263 | if (len) { | |
264 | if (!nowayout) { | |
265 | size_t i; | |
266 | ||
267 | /* note: just in case someone wrote the magic character | |
268 | * five months ago... */ | |
269 | tco_expect_close = 0; | |
270 | ||
271 | /* scan to see whether or not we got the magic character */ | |
272 | for (i = 0; i != len; i++) { | |
273 | char c; | |
274 | if(get_user(c, data+i)) | |
275 | return -EFAULT; | |
276 | if (c == 'V') | |
277 | tco_expect_close = 42; | |
278 | } | |
279 | } | |
280 | ||
281 | /* someone wrote to us, we should reload the timer */ | |
282 | tco_timer_keepalive (); | |
283 | } | |
284 | return len; | |
285 | } | |
286 | ||
287 | static int i8xx_tco_ioctl (struct inode *inode, struct file *file, | |
288 | unsigned int cmd, unsigned long arg) | |
289 | { | |
290 | int new_options, retval = -EINVAL; | |
291 | int new_heartbeat; | |
58b519f3 | 292 | int time_left; |
1da177e4 LT |
293 | void __user *argp = (void __user *)arg; |
294 | int __user *p = argp; | |
295 | static struct watchdog_info ident = { | |
296 | .options = WDIOF_SETTIMEOUT | | |
297 | WDIOF_KEEPALIVEPING | | |
298 | WDIOF_MAGICCLOSE, | |
299 | .firmware_version = 0, | |
300 | .identity = TCO_MODULE_NAME, | |
301 | }; | |
302 | ||
303 | switch (cmd) { | |
304 | case WDIOC_GETSUPPORT: | |
305 | return copy_to_user(argp, &ident, | |
306 | sizeof (ident)) ? -EFAULT : 0; | |
307 | ||
308 | case WDIOC_GETSTATUS: | |
309 | case WDIOC_GETBOOTSTATUS: | |
310 | return put_user (0, p); | |
311 | ||
312 | case WDIOC_KEEPALIVE: | |
313 | tco_timer_keepalive (); | |
314 | return 0; | |
315 | ||
316 | case WDIOC_SETOPTIONS: | |
317 | { | |
318 | if (get_user (new_options, p)) | |
319 | return -EFAULT; | |
320 | ||
321 | if (new_options & WDIOS_DISABLECARD) { | |
322 | tco_timer_stop (); | |
323 | retval = 0; | |
324 | } | |
325 | ||
326 | if (new_options & WDIOS_ENABLECARD) { | |
327 | tco_timer_keepalive (); | |
328 | tco_timer_start (); | |
329 | retval = 0; | |
330 | } | |
331 | ||
332 | return retval; | |
333 | } | |
334 | ||
335 | case WDIOC_SETTIMEOUT: | |
336 | { | |
337 | if (get_user(new_heartbeat, p)) | |
338 | return -EFAULT; | |
339 | ||
340 | if (tco_timer_set_heartbeat(new_heartbeat)) | |
58b519f3 | 341 | return -EINVAL; |
1da177e4 LT |
342 | |
343 | tco_timer_keepalive (); | |
344 | /* Fall */ | |
345 | } | |
346 | ||
347 | case WDIOC_GETTIMEOUT: | |
348 | return put_user(heartbeat, p); | |
349 | ||
58b519f3 WVS |
350 | case WDIOC_GETTIMELEFT: |
351 | { | |
352 | if (tco_timer_get_timeleft(&time_left)) | |
353 | return -EINVAL; | |
354 | ||
355 | return put_user(time_left, p); | |
356 | } | |
357 | ||
1da177e4 LT |
358 | default: |
359 | return -ENOIOCTLCMD; | |
360 | } | |
361 | } | |
362 | ||
363 | /* | |
364 | * Notify system | |
365 | */ | |
366 | ||
367 | static int i8xx_tco_notify_sys (struct notifier_block *this, unsigned long code, void *unused) | |
368 | { | |
369 | if (code==SYS_DOWN || code==SYS_HALT) { | |
370 | /* Turn the WDT off */ | |
371 | tco_timer_stop (); | |
372 | } | |
373 | ||
374 | return NOTIFY_DONE; | |
375 | } | |
376 | ||
377 | /* | |
378 | * Kernel Interfaces | |
379 | */ | |
380 | ||
62322d25 | 381 | static const struct file_operations i8xx_tco_fops = { |
1da177e4 LT |
382 | .owner = THIS_MODULE, |
383 | .llseek = no_llseek, | |
384 | .write = i8xx_tco_write, | |
385 | .ioctl = i8xx_tco_ioctl, | |
386 | .open = i8xx_tco_open, | |
387 | .release = i8xx_tco_release, | |
388 | }; | |
389 | ||
390 | static struct miscdevice i8xx_tco_miscdev = { | |
391 | .minor = WATCHDOG_MINOR, | |
392 | .name = "watchdog", | |
393 | .fops = &i8xx_tco_fops, | |
394 | }; | |
395 | ||
396 | static struct notifier_block i8xx_tco_notifier = { | |
397 | .notifier_call = i8xx_tco_notify_sys, | |
398 | }; | |
399 | ||
400 | /* | |
401 | * Data for PCI driver interface | |
402 | * | |
403 | * This data only exists for exporting the supported | |
404 | * PCI ids via MODULE_DEVICE_TABLE. We do not actually | |
405 | * register a pci_driver, because someone else might one day | |
406 | * want to register another driver on the same PCI id. | |
407 | */ | |
408 | static struct pci_device_id i8xx_tco_pci_tbl[] = { | |
409 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, PCI_ANY_ID, PCI_ANY_ID, }, | |
410 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, PCI_ANY_ID, PCI_ANY_ID, }, | |
411 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0, PCI_ANY_ID, PCI_ANY_ID, }, | |
412 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_10, PCI_ANY_ID, PCI_ANY_ID, }, | |
413 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, PCI_ANY_ID, PCI_ANY_ID, }, | |
414 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12, PCI_ANY_ID, PCI_ANY_ID, }, | |
415 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0, PCI_ANY_ID, PCI_ANY_ID, }, | |
416 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, PCI_ANY_ID, PCI_ANY_ID, }, | |
417 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_0, PCI_ANY_ID, PCI_ANY_ID, }, | |
418 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, PCI_ANY_ID, PCI_ANY_ID, }, | |
a123edab | 419 | { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, PCI_ANY_ID, PCI_ANY_ID, }, |
1da177e4 LT |
420 | { 0, }, /* End of list */ |
421 | }; | |
422 | MODULE_DEVICE_TABLE (pci, i8xx_tco_pci_tbl); | |
423 | ||
424 | /* | |
425 | * Init & exit routines | |
426 | */ | |
427 | ||
428 | static unsigned char __init i8xx_tco_getdevice (void) | |
429 | { | |
430 | struct pci_dev *dev = NULL; | |
431 | u8 val1, val2; | |
432 | u16 badr; | |
433 | /* | |
434 | * Find the PCI device | |
435 | */ | |
436 | ||
437 | while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { | |
75865858 | 438 | if (pci_match_id(i8xx_tco_pci_tbl, dev)) { |
1da177e4 LT |
439 | i8xx_tco_pci = dev; |
440 | break; | |
441 | } | |
442 | } | |
443 | ||
444 | if (i8xx_tco_pci) { | |
445 | /* | |
446 | * Find the ACPI base I/O address which is the base | |
447 | * for the TCO registers (TCOBASE=ACPIBASE + 0x60) | |
448 | * ACPIBASE is bits [15:7] from 0x40-0x43 | |
449 | */ | |
450 | pci_read_config_byte (i8xx_tco_pci, 0x40, &val1); | |
451 | pci_read_config_byte (i8xx_tco_pci, 0x41, &val2); | |
452 | badr = ((val2 << 1) | (val1 >> 7)) << 7; | |
453 | ACPIBASE = badr; | |
454 | /* Something's wrong here, ACPIBASE has to be set */ | |
455 | if (badr == 0x0001 || badr == 0x0000) { | |
456 | printk (KERN_ERR PFX "failed to get TCOBASE address\n"); | |
457 | return 0; | |
458 | } | |
01df0e3a WVS |
459 | |
460 | /* Check chipset's NO_REBOOT bit */ | |
1da177e4 LT |
461 | pci_read_config_byte (i8xx_tco_pci, 0xd4, &val1); |
462 | if (val1 & 0x02) { | |
463 | val1 &= 0xfd; | |
464 | pci_write_config_byte (i8xx_tco_pci, 0xd4, val1); | |
465 | pci_read_config_byte (i8xx_tco_pci, 0xd4, &val1); | |
466 | if (val1 & 0x02) { | |
467 | printk (KERN_ERR PFX "failed to reset NO_REBOOT flag, reboot disabled by hardware\n"); | |
468 | return 0; /* Cannot reset NO_REBOOT bit */ | |
469 | } | |
470 | } | |
01df0e3a WVS |
471 | /* Disable reboots untill the watchdog starts */ |
472 | val1 |= 0x02; | |
473 | pci_write_config_byte (i8xx_tco_pci, 0xd4, val1); | |
474 | ||
1da177e4 LT |
475 | /* Set the TCO_EN bit in SMI_EN register */ |
476 | if (!request_region (SMI_EN + 1, 1, "i8xx TCO")) { | |
477 | printk (KERN_ERR PFX "I/O address 0x%04x already in use\n", | |
478 | SMI_EN + 1); | |
479 | return 0; | |
480 | } | |
481 | val1 = inb (SMI_EN + 1); | |
482 | val1 &= 0xdf; | |
483 | outb (val1, SMI_EN + 1); | |
484 | release_region (SMI_EN + 1, 1); | |
485 | return 1; | |
486 | } | |
487 | return 0; | |
488 | } | |
489 | ||
490 | static int __init watchdog_init (void) | |
491 | { | |
492 | int ret; | |
493 | ||
494 | spin_lock_init(&tco_lock); | |
495 | ||
496 | /* Check whether or not the hardware watchdog is there */ | |
497 | if (!i8xx_tco_getdevice () || i8xx_tco_pci == NULL) | |
498 | return -ENODEV; | |
499 | ||
500 | if (!request_region (TCOBASE, 0x10, "i8xx TCO")) { | |
501 | printk (KERN_ERR PFX "I/O address 0x%04x already in use\n", | |
502 | TCOBASE); | |
503 | ret = -EIO; | |
504 | goto out; | |
505 | } | |
506 | ||
507 | /* Clear out the (probably old) status */ | |
508 | outb (0, TCO1_STS); | |
509 | outb (3, TCO2_STS); | |
510 | ||
511 | /* Check that the heartbeat value is within it's range ; if not reset to the default */ | |
512 | if (tco_timer_set_heartbeat (heartbeat)) { | |
513 | heartbeat = WATCHDOG_HEARTBEAT; | |
514 | tco_timer_set_heartbeat (heartbeat); | |
515 | printk(KERN_INFO PFX "heartbeat value must be 2<heartbeat<39, using %d\n", | |
516 | heartbeat); | |
517 | } | |
518 | ||
519 | ret = register_reboot_notifier(&i8xx_tco_notifier); | |
520 | if (ret != 0) { | |
521 | printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n", | |
522 | ret); | |
523 | goto unreg_region; | |
524 | } | |
525 | ||
526 | ret = misc_register(&i8xx_tco_miscdev); | |
527 | if (ret != 0) { | |
528 | printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n", | |
529 | WATCHDOG_MINOR, ret); | |
530 | goto unreg_notifier; | |
531 | } | |
532 | ||
533 | tco_timer_stop (); | |
534 | ||
535 | printk (KERN_INFO PFX "initialized (0x%04x). heartbeat=%d sec (nowayout=%d)\n", | |
536 | TCOBASE, heartbeat, nowayout); | |
537 | ||
538 | return 0; | |
539 | ||
540 | unreg_notifier: | |
541 | unregister_reboot_notifier(&i8xx_tco_notifier); | |
542 | unreg_region: | |
543 | release_region (TCOBASE, 0x10); | |
544 | out: | |
545 | return ret; | |
546 | } | |
547 | ||
548 | static void __exit watchdog_cleanup (void) | |
549 | { | |
1da177e4 LT |
550 | /* Stop the timer before we leave */ |
551 | if (!nowayout) | |
552 | tco_timer_stop (); | |
553 | ||
1da177e4 LT |
554 | /* Deregister */ |
555 | misc_deregister (&i8xx_tco_miscdev); | |
556 | unregister_reboot_notifier(&i8xx_tco_notifier); | |
557 | release_region (TCOBASE, 0x10); | |
558 | } | |
559 | ||
560 | module_init(watchdog_init); | |
561 | module_exit(watchdog_cleanup); | |
562 | ||
563 | MODULE_AUTHOR("Nils Faerber"); | |
564 | MODULE_DESCRIPTION("TCO timer driver for i8xx chipsets"); | |
565 | MODULE_LICENSE("GPL"); | |
566 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |