Commit | Line | Data |
---|---|---|
27084efe LD |
1 | /* |
2 | * Copyright (C) 2005, 2006 IBM Corporation | |
399235dc | 3 | * Copyright (C) 2014, 2015 Intel Corporation |
27084efe LD |
4 | * |
5 | * Authors: | |
6 | * Leendert van Doorn <leendert@watson.ibm.com> | |
7 | * Kylene Hall <kjhall@us.ibm.com> | |
8 | * | |
8e81cc13 KY |
9 | * Maintained by: <tpmdd-devel@lists.sourceforge.net> |
10 | * | |
27084efe LD |
11 | * Device driver for TCG/TCPA TPM (trusted platform module). |
12 | * Specifications at www.trustedcomputinggroup.org | |
13 | * | |
14 | * This device driver implements the TPM interface as defined in | |
15 | * the TCG TPM Interface Spec version 1.2, revision 1.0. | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or | |
18 | * modify it under the terms of the GNU General Public License as | |
19 | * published by the Free Software Foundation, version 2 of the | |
20 | * License. | |
21 | */ | |
57135568 KJH |
22 | #include <linux/init.h> |
23 | #include <linux/module.h> | |
24 | #include <linux/moduleparam.h> | |
27084efe | 25 | #include <linux/pnp.h> |
5a0e3ad6 | 26 | #include <linux/slab.h> |
27084efe LD |
27 | #include <linux/interrupt.h> |
28 | #include <linux/wait.h> | |
3f0d3d01 | 29 | #include <linux/acpi.h> |
20b87bbf | 30 | #include <linux/freezer.h> |
27084efe | 31 | #include "tpm.h" |
57dacc2b | 32 | #include "tpm_tis_core.h" |
27084efe | 33 | |
27084efe LD |
34 | enum tis_access { |
35 | TPM_ACCESS_VALID = 0x80, | |
36 | TPM_ACCESS_ACTIVE_LOCALITY = 0x20, | |
37 | TPM_ACCESS_REQUEST_PENDING = 0x04, | |
38 | TPM_ACCESS_REQUEST_USE = 0x02, | |
39 | }; | |
40 | ||
41 | enum tis_status { | |
42 | TPM_STS_VALID = 0x80, | |
43 | TPM_STS_COMMAND_READY = 0x40, | |
44 | TPM_STS_GO = 0x20, | |
45 | TPM_STS_DATA_AVAIL = 0x10, | |
46 | TPM_STS_DATA_EXPECT = 0x08, | |
47 | }; | |
48 | ||
49 | enum tis_int_flags { | |
50 | TPM_GLOBAL_INT_ENABLE = 0x80000000, | |
51 | TPM_INTF_BURST_COUNT_STATIC = 0x100, | |
52 | TPM_INTF_CMD_READY_INT = 0x080, | |
53 | TPM_INTF_INT_EDGE_FALLING = 0x040, | |
54 | TPM_INTF_INT_EDGE_RISING = 0x020, | |
55 | TPM_INTF_INT_LEVEL_LOW = 0x010, | |
56 | TPM_INTF_INT_LEVEL_HIGH = 0x008, | |
57 | TPM_INTF_LOCALITY_CHANGE_INT = 0x004, | |
58 | TPM_INTF_STS_VALID_INT = 0x002, | |
59 | TPM_INTF_DATA_AVAIL_INT = 0x001, | |
60 | }; | |
61 | ||
36b20020 | 62 | enum tis_defaults { |
b09d5300 | 63 | TIS_MEM_LEN = 0x5000, |
cb535425 KJH |
64 | TIS_SHORT_TIMEOUT = 750, /* ms */ |
65 | TIS_LONG_TIMEOUT = 2000, /* 2 sec */ | |
36b20020 KJH |
66 | }; |
67 | ||
399235dc | 68 | struct tpm_info { |
51dd43df | 69 | struct resource res; |
ef7b81dc JG |
70 | /* irq > 0 means: use irq $irq; |
71 | * irq = 0 means: autoprobe for an irq; | |
72 | * irq = -1 means: no irq support | |
73 | */ | |
74 | int irq; | |
399235dc JS |
75 | }; |
76 | ||
aec04cbd JS |
77 | /* Some timeout values are needed before it is known whether the chip is |
78 | * TPM 1.0 or TPM 2.0. | |
79 | */ | |
80 | #define TIS_TIMEOUT_A_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_A) | |
81 | #define TIS_TIMEOUT_B_MAX max(TIS_LONG_TIMEOUT, TPM2_TIMEOUT_B) | |
82 | #define TIS_TIMEOUT_C_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_C) | |
83 | #define TIS_TIMEOUT_D_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_D) | |
84 | ||
27084efe LD |
85 | #define TPM_ACCESS(l) (0x0000 | ((l) << 12)) |
86 | #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12)) | |
87 | #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12)) | |
88 | #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12)) | |
89 | #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12)) | |
90 | #define TPM_STS(l) (0x0018 | ((l) << 12)) | |
aec04cbd | 91 | #define TPM_STS3(l) (0x001b | ((l) << 12)) |
27084efe LD |
92 | #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12)) |
93 | ||
94 | #define TPM_DID_VID(l) (0x0F00 | ((l) << 12)) | |
95 | #define TPM_RID(l) (0x0F04 | ((l) << 12)) | |
96 | ||
57dacc2b CR |
97 | struct tpm_tis_tcg_phy { |
98 | struct tpm_tis_data priv; | |
4eea703c | 99 | void __iomem *iobase; |
448e9c55 SD |
100 | }; |
101 | ||
57dacc2b CR |
102 | static inline struct tpm_tis_tcg_phy *to_tpm_tis_tcg_phy(struct tpm_tis_data *data) |
103 | { | |
104 | return container_of(data, struct tpm_tis_tcg_phy, priv); | |
105 | } | |
106 | ||
1560ffe6 | 107 | #if defined(CONFIG_PNP) && defined(CONFIG_ACPI) |
399235dc | 108 | static int has_hid(struct acpi_device *dev, const char *hid) |
3f0d3d01 | 109 | { |
3f0d3d01 MG |
110 | struct acpi_hardware_id *id; |
111 | ||
399235dc JS |
112 | list_for_each_entry(id, &dev->pnp.ids, list) |
113 | if (!strcmp(hid, id->id)) | |
3f0d3d01 | 114 | return 1; |
3f0d3d01 MG |
115 | |
116 | return 0; | |
117 | } | |
399235dc JS |
118 | |
119 | static inline int is_itpm(struct acpi_device *dev) | |
120 | { | |
121 | return has_hid(dev, "INTC0102"); | |
122 | } | |
1560ffe6 | 123 | #else |
399235dc | 124 | static inline int is_itpm(struct acpi_device *dev) |
1560ffe6 RD |
125 | { |
126 | return 0; | |
127 | } | |
3f0d3d01 MG |
128 | #endif |
129 | ||
7240b983 JG |
130 | /* Before we attempt to access the TPM we must see that the valid bit is set. |
131 | * The specification says that this bit is 0 at reset and remains 0 until the | |
132 | * 'TPM has gone through its self test and initialization and has established | |
133 | * correct values in the other bits.' */ | |
134 | static int wait_startup(struct tpm_chip *chip, int l) | |
135 | { | |
57dacc2b CR |
136 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
137 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
af782f33 | 138 | unsigned long stop = jiffies + chip->timeout_a; |
7240b983 | 139 | do { |
57dacc2b | 140 | if (ioread8(phy->iobase + TPM_ACCESS(l)) & |
7240b983 JG |
141 | TPM_ACCESS_VALID) |
142 | return 0; | |
143 | msleep(TPM_TIMEOUT); | |
144 | } while (time_before(jiffies, stop)); | |
145 | return -1; | |
146 | } | |
147 | ||
27084efe LD |
148 | static int check_locality(struct tpm_chip *chip, int l) |
149 | { | |
57dacc2b CR |
150 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
151 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
4eea703c | 152 | |
57dacc2b | 153 | if ((ioread8(phy->iobase + TPM_ACCESS(l)) & |
27084efe LD |
154 | (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == |
155 | (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) | |
56671c89 | 156 | return priv->locality = l; |
27084efe LD |
157 | |
158 | return -1; | |
159 | } | |
160 | ||
161 | static void release_locality(struct tpm_chip *chip, int l, int force) | |
162 | { | |
57dacc2b CR |
163 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
164 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
4eea703c | 165 | |
57dacc2b | 166 | if (force || (ioread8(phy->iobase + TPM_ACCESS(l)) & |
27084efe LD |
167 | (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == |
168 | (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) | |
169 | iowrite8(TPM_ACCESS_ACTIVE_LOCALITY, | |
57dacc2b | 170 | phy->iobase + TPM_ACCESS(l)); |
27084efe LD |
171 | } |
172 | ||
173 | static int request_locality(struct tpm_chip *chip, int l) | |
174 | { | |
57dacc2b CR |
175 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
176 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
20b87bbf | 177 | unsigned long stop, timeout; |
27084efe LD |
178 | long rc; |
179 | ||
180 | if (check_locality(chip, l) >= 0) | |
181 | return l; | |
182 | ||
183 | iowrite8(TPM_ACCESS_REQUEST_USE, | |
57dacc2b | 184 | phy->iobase + TPM_ACCESS(l)); |
27084efe | 185 | |
af782f33 | 186 | stop = jiffies + chip->timeout_a; |
20b87bbf | 187 | |
570a3609 | 188 | if (chip->flags & TPM_CHIP_FLAG_IRQ) { |
20b87bbf SB |
189 | again: |
190 | timeout = stop - jiffies; | |
191 | if ((long)timeout <= 0) | |
192 | return -1; | |
ec5fd99d | 193 | rc = wait_event_interruptible_timeout(priv->int_queue, |
27084efe LD |
194 | (check_locality |
195 | (chip, l) >= 0), | |
20b87bbf | 196 | timeout); |
27084efe LD |
197 | if (rc > 0) |
198 | return l; | |
20b87bbf SB |
199 | if (rc == -ERESTARTSYS && freezing(current)) { |
200 | clear_thread_flag(TIF_SIGPENDING); | |
201 | goto again; | |
202 | } | |
27084efe LD |
203 | } else { |
204 | /* wait for burstcount */ | |
27084efe LD |
205 | do { |
206 | if (check_locality(chip, l) >= 0) | |
207 | return l; | |
208 | msleep(TPM_TIMEOUT); | |
209 | } | |
210 | while (time_before(jiffies, stop)); | |
211 | } | |
212 | return -1; | |
213 | } | |
214 | ||
215 | static u8 tpm_tis_status(struct tpm_chip *chip) | |
216 | { | |
57dacc2b CR |
217 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
218 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
4eea703c | 219 | |
57dacc2b | 220 | return ioread8(phy->iobase + |
56671c89 | 221 | TPM_STS(priv->locality)); |
27084efe LD |
222 | } |
223 | ||
224 | static void tpm_tis_ready(struct tpm_chip *chip) | |
225 | { | |
57dacc2b CR |
226 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
227 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
4eea703c | 228 | |
27084efe LD |
229 | /* this causes the current command to be aborted */ |
230 | iowrite8(TPM_STS_COMMAND_READY, | |
57dacc2b | 231 | phy->iobase + TPM_STS(priv->locality)); |
27084efe LD |
232 | } |
233 | ||
234 | static int get_burstcount(struct tpm_chip *chip) | |
235 | { | |
57dacc2b CR |
236 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
237 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
27084efe LD |
238 | unsigned long stop; |
239 | int burstcnt; | |
240 | ||
241 | /* wait for burstcount */ | |
242 | /* which timeout value, spec has 2 answers (c & d) */ | |
af782f33 | 243 | stop = jiffies + chip->timeout_d; |
27084efe | 244 | do { |
57dacc2b | 245 | burstcnt = ioread8(phy->iobase + |
56671c89 | 246 | TPM_STS(priv->locality) + 1); |
57dacc2b | 247 | burstcnt += ioread8(phy->iobase + |
56671c89 | 248 | TPM_STS(priv->locality) + |
27084efe LD |
249 | 2) << 8; |
250 | if (burstcnt) | |
251 | return burstcnt; | |
252 | msleep(TPM_TIMEOUT); | |
253 | } while (time_before(jiffies, stop)); | |
254 | return -EBUSY; | |
255 | } | |
256 | ||
cb535425 | 257 | static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) |
27084efe | 258 | { |
57dacc2b CR |
259 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
260 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
27084efe LD |
261 | int size = 0, burstcnt; |
262 | while (size < count && | |
fd048866 RA |
263 | wait_for_tpm_stat(chip, |
264 | TPM_STS_DATA_AVAIL | TPM_STS_VALID, | |
af782f33 | 265 | chip->timeout_c, |
6e599f6f | 266 | &priv->read_queue, true) |
27084efe LD |
267 | == 0) { |
268 | burstcnt = get_burstcount(chip); | |
269 | for (; burstcnt > 0 && size < count; burstcnt--) | |
57dacc2b | 270 | buf[size++] = ioread8(phy->iobase + |
56671c89 | 271 | TPM_DATA_FIFO(priv->locality)); |
27084efe LD |
272 | } |
273 | return size; | |
274 | } | |
275 | ||
cb535425 | 276 | static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) |
27084efe | 277 | { |
57dacc2b | 278 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
27084efe LD |
279 | int size = 0; |
280 | int expected, status; | |
281 | ||
282 | if (count < TPM_HEADER_SIZE) { | |
283 | size = -EIO; | |
284 | goto out; | |
285 | } | |
286 | ||
287 | /* read first 10 bytes, including tag, paramsize, and result */ | |
288 | if ((size = | |
289 | recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) { | |
8cfffc9d | 290 | dev_err(&chip->dev, "Unable to read header\n"); |
27084efe LD |
291 | goto out; |
292 | } | |
293 | ||
294 | expected = be32_to_cpu(*(__be32 *) (buf + 2)); | |
295 | if (expected > count) { | |
296 | size = -EIO; | |
297 | goto out; | |
298 | } | |
299 | ||
300 | if ((size += | |
301 | recv_data(chip, &buf[TPM_HEADER_SIZE], | |
302 | expected - TPM_HEADER_SIZE)) < expected) { | |
8cfffc9d | 303 | dev_err(&chip->dev, "Unable to read remainder of result\n"); |
27084efe LD |
304 | size = -ETIME; |
305 | goto out; | |
306 | } | |
307 | ||
af782f33 | 308 | wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, |
ec5fd99d | 309 | &priv->int_queue, false); |
27084efe LD |
310 | status = tpm_tis_status(chip); |
311 | if (status & TPM_STS_DATA_AVAIL) { /* retry? */ | |
8cfffc9d | 312 | dev_err(&chip->dev, "Error left over data\n"); |
27084efe LD |
313 | size = -EIO; |
314 | goto out; | |
315 | } | |
316 | ||
317 | out: | |
318 | tpm_tis_ready(chip); | |
56671c89 | 319 | release_locality(chip, priv->locality, 0); |
27084efe LD |
320 | return size; |
321 | } | |
322 | ||
90ab5ee9 | 323 | static bool itpm; |
3507d612 RA |
324 | module_param(itpm, bool, 0444); |
325 | MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)"); | |
326 | ||
27084efe LD |
327 | /* |
328 | * If interrupts are used (signaled by an irq set in the vendor structure) | |
329 | * tpm.c can skip polling for the data to be available as the interrupt is | |
330 | * waited for here | |
331 | */ | |
9519de3f | 332 | static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len) |
27084efe | 333 | { |
57dacc2b CR |
334 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
335 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
27084efe LD |
336 | int rc, status, burstcnt; |
337 | size_t count = 0; | |
27084efe LD |
338 | |
339 | if (request_locality(chip, 0) < 0) | |
340 | return -EBUSY; | |
341 | ||
342 | status = tpm_tis_status(chip); | |
343 | if ((status & TPM_STS_COMMAND_READY) == 0) { | |
344 | tpm_tis_ready(chip); | |
fd048866 | 345 | if (wait_for_tpm_stat |
af782f33 | 346 | (chip, TPM_STS_COMMAND_READY, chip->timeout_b, |
ec5fd99d | 347 | &priv->int_queue, false) < 0) { |
27084efe LD |
348 | rc = -ETIME; |
349 | goto out_err; | |
350 | } | |
351 | } | |
352 | ||
353 | while (count < len - 1) { | |
354 | burstcnt = get_burstcount(chip); | |
355 | for (; burstcnt > 0 && count < len - 1; burstcnt--) { | |
57dacc2b | 356 | iowrite8(buf[count], phy->iobase + |
56671c89 | 357 | TPM_DATA_FIFO(priv->locality)); |
27084efe LD |
358 | count++; |
359 | } | |
360 | ||
af782f33 | 361 | wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, |
ec5fd99d | 362 | &priv->int_queue, false); |
27084efe | 363 | status = tpm_tis_status(chip); |
3507d612 | 364 | if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { |
27084efe LD |
365 | rc = -EIO; |
366 | goto out_err; | |
367 | } | |
368 | } | |
369 | ||
370 | /* write last byte */ | |
371 | iowrite8(buf[count], | |
57dacc2b | 372 | phy->iobase + TPM_DATA_FIFO(priv->locality)); |
af782f33 | 373 | wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, |
ec5fd99d | 374 | &priv->int_queue, false); |
27084efe LD |
375 | status = tpm_tis_status(chip); |
376 | if ((status & TPM_STS_DATA_EXPECT) != 0) { | |
377 | rc = -EIO; | |
378 | goto out_err; | |
379 | } | |
380 | ||
9519de3f SB |
381 | return 0; |
382 | ||
383 | out_err: | |
384 | tpm_tis_ready(chip); | |
56671c89 | 385 | release_locality(chip, priv->locality, 0); |
9519de3f SB |
386 | return rc; |
387 | } | |
388 | ||
448e9c55 SD |
389 | static void disable_interrupts(struct tpm_chip *chip) |
390 | { | |
57dacc2b CR |
391 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
392 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
448e9c55 SD |
393 | u32 intmask; |
394 | ||
395 | intmask = | |
57dacc2b | 396 | ioread32(phy->iobase + |
56671c89 | 397 | TPM_INT_ENABLE(priv->locality)); |
448e9c55 SD |
398 | intmask &= ~TPM_GLOBAL_INT_ENABLE; |
399 | iowrite32(intmask, | |
57dacc2b | 400 | phy->iobase + TPM_INT_ENABLE(priv->locality)); |
ced01b9f | 401 | devm_free_irq(chip->dev.parent, priv->irq, chip); |
570a3609 CR |
402 | priv->irq = 0; |
403 | chip->flags &= ~TPM_CHIP_FLAG_IRQ; | |
448e9c55 SD |
404 | } |
405 | ||
9519de3f SB |
406 | /* |
407 | * If interrupts are used (signaled by an irq set in the vendor structure) | |
408 | * tpm.c can skip polling for the data to be available as the interrupt is | |
409 | * waited for here | |
410 | */ | |
448e9c55 | 411 | static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len) |
9519de3f | 412 | { |
57dacc2b CR |
413 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
414 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
9519de3f SB |
415 | int rc; |
416 | u32 ordinal; | |
aec04cbd | 417 | unsigned long dur; |
9519de3f SB |
418 | |
419 | rc = tpm_tis_send_data(chip, buf, len); | |
420 | if (rc < 0) | |
421 | return rc; | |
422 | ||
27084efe LD |
423 | /* go and do it */ |
424 | iowrite8(TPM_STS_GO, | |
57dacc2b | 425 | phy->iobase + TPM_STS(priv->locality)); |
27084efe | 426 | |
570a3609 | 427 | if (chip->flags & TPM_CHIP_FLAG_IRQ) { |
27084efe | 428 | ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); |
aec04cbd JS |
429 | |
430 | if (chip->flags & TPM_CHIP_FLAG_TPM2) | |
431 | dur = tpm2_calc_ordinal_duration(chip, ordinal); | |
432 | else | |
433 | dur = tpm_calc_ordinal_duration(chip, ordinal); | |
434 | ||
fd048866 | 435 | if (wait_for_tpm_stat |
aec04cbd | 436 | (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur, |
6e599f6f | 437 | &priv->read_queue, false) < 0) { |
27084efe LD |
438 | rc = -ETIME; |
439 | goto out_err; | |
440 | } | |
441 | } | |
442 | return len; | |
443 | out_err: | |
444 | tpm_tis_ready(chip); | |
56671c89 | 445 | release_locality(chip, priv->locality, 0); |
27084efe LD |
446 | return rc; |
447 | } | |
448 | ||
448e9c55 SD |
449 | static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) |
450 | { | |
57dacc2b | 451 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
448e9c55 | 452 | int rc, irq; |
448e9c55 | 453 | |
570a3609 | 454 | if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested) |
448e9c55 SD |
455 | return tpm_tis_send_main(chip, buf, len); |
456 | ||
457 | /* Verify receipt of the expected IRQ */ | |
570a3609 CR |
458 | irq = priv->irq; |
459 | priv->irq = 0; | |
460 | chip->flags &= ~TPM_CHIP_FLAG_IRQ; | |
448e9c55 | 461 | rc = tpm_tis_send_main(chip, buf, len); |
570a3609 CR |
462 | priv->irq = irq; |
463 | chip->flags |= TPM_CHIP_FLAG_IRQ; | |
448e9c55 SD |
464 | if (!priv->irq_tested) |
465 | msleep(1); | |
e3837e74 | 466 | if (!priv->irq_tested) |
448e9c55 | 467 | disable_interrupts(chip); |
448e9c55 SD |
468 | priv->irq_tested = true; |
469 | return rc; | |
470 | } | |
471 | ||
8e54caf4 JG |
472 | struct tis_vendor_timeout_override { |
473 | u32 did_vid; | |
474 | unsigned long timeout_us[4]; | |
475 | }; | |
476 | ||
477 | static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { | |
478 | /* Atmel 3204 */ | |
479 | { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), | |
480 | (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, | |
481 | }; | |
482 | ||
483 | static bool tpm_tis_update_timeouts(struct tpm_chip *chip, | |
484 | unsigned long *timeout_cap) | |
485 | { | |
57dacc2b CR |
486 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
487 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
8e54caf4 JG |
488 | int i; |
489 | u32 did_vid; | |
490 | ||
57dacc2b | 491 | did_vid = ioread32(phy->iobase + TPM_DID_VID(0)); |
8e54caf4 JG |
492 | |
493 | for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) { | |
494 | if (vendor_timeout_overrides[i].did_vid != did_vid) | |
495 | continue; | |
496 | memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us, | |
497 | sizeof(vendor_timeout_overrides[i].timeout_us)); | |
498 | return true; | |
499 | } | |
500 | ||
501 | return false; | |
502 | } | |
503 | ||
9519de3f SB |
504 | /* |
505 | * Early probing for iTPM with STS_DATA_EXPECT flaw. | |
506 | * Try sending command without itpm flag set and if that | |
507 | * fails, repeat with itpm flag set. | |
508 | */ | |
509 | static int probe_itpm(struct tpm_chip *chip) | |
510 | { | |
57dacc2b CR |
511 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
512 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
9519de3f SB |
513 | int rc = 0; |
514 | u8 cmd_getticks[] = { | |
515 | 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, | |
516 | 0x00, 0x00, 0x00, 0xf1 | |
517 | }; | |
518 | size_t len = sizeof(cmd_getticks); | |
968de8e2 | 519 | bool rem_itpm = itpm; |
57dacc2b | 520 | u16 vendor = ioread16(phy->iobase + TPM_DID_VID(0)); |
4e401fb0 SB |
521 | |
522 | /* probe only iTPMS */ | |
523 | if (vendor != TPM_VID_INTEL) | |
524 | return 0; | |
9519de3f | 525 | |
73249695 | 526 | itpm = false; |
9519de3f SB |
527 | |
528 | rc = tpm_tis_send_data(chip, cmd_getticks, len); | |
529 | if (rc == 0) | |
530 | goto out; | |
531 | ||
532 | tpm_tis_ready(chip); | |
56671c89 | 533 | release_locality(chip, priv->locality, 0); |
9519de3f | 534 | |
73249695 | 535 | itpm = true; |
9519de3f SB |
536 | |
537 | rc = tpm_tis_send_data(chip, cmd_getticks, len); | |
538 | if (rc == 0) { | |
8cfffc9d | 539 | dev_info(&chip->dev, "Detected an iTPM.\n"); |
9519de3f SB |
540 | rc = 1; |
541 | } else | |
542 | rc = -EFAULT; | |
543 | ||
544 | out: | |
545 | itpm = rem_itpm; | |
546 | tpm_tis_ready(chip); | |
56671c89 | 547 | release_locality(chip, priv->locality, 0); |
9519de3f SB |
548 | |
549 | return rc; | |
550 | } | |
551 | ||
1f866057 SB |
552 | static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status) |
553 | { | |
57dacc2b | 554 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
d4956524 JS |
555 | |
556 | switch (priv->manufacturer_id) { | |
1f866057 SB |
557 | case TPM_VID_WINBOND: |
558 | return ((status == TPM_STS_VALID) || | |
559 | (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY))); | |
560 | case TPM_VID_STM: | |
561 | return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)); | |
562 | default: | |
563 | return (status == TPM_STS_COMMAND_READY); | |
564 | } | |
565 | } | |
566 | ||
01ad1fa7 | 567 | static const struct tpm_class_ops tpm_tis = { |
27084efe LD |
568 | .status = tpm_tis_status, |
569 | .recv = tpm_tis_recv, | |
570 | .send = tpm_tis_send, | |
571 | .cancel = tpm_tis_ready, | |
8e54caf4 | 572 | .update_timeouts = tpm_tis_update_timeouts, |
27084efe LD |
573 | .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, |
574 | .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, | |
1f866057 | 575 | .req_canceled = tpm_tis_req_canceled, |
27084efe LD |
576 | }; |
577 | ||
a6f97b29 | 578 | static irqreturn_t tis_int_handler(int dummy, void *dev_id) |
27084efe | 579 | { |
06efcad0 | 580 | struct tpm_chip *chip = dev_id; |
57dacc2b CR |
581 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
582 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
27084efe LD |
583 | u32 interrupt; |
584 | int i; | |
585 | ||
57dacc2b | 586 | interrupt = ioread32(phy->iobase + |
56671c89 | 587 | TPM_INT_STATUS(priv->locality)); |
27084efe LD |
588 | |
589 | if (interrupt == 0) | |
590 | return IRQ_NONE; | |
591 | ||
9e0d39d8 | 592 | priv->irq_tested = true; |
27084efe | 593 | if (interrupt & TPM_INTF_DATA_AVAIL_INT) |
6e599f6f | 594 | wake_up_interruptible(&priv->read_queue); |
27084efe LD |
595 | if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT) |
596 | for (i = 0; i < 5; i++) | |
597 | if (check_locality(chip, i) >= 0) | |
598 | break; | |
599 | if (interrupt & | |
600 | (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | | |
601 | TPM_INTF_CMD_READY_INT)) | |
ec5fd99d | 602 | wake_up_interruptible(&priv->int_queue); |
27084efe LD |
603 | |
604 | /* Clear interrupts handled with TPM_EOI */ | |
605 | iowrite32(interrupt, | |
57dacc2b | 606 | phy->iobase + |
56671c89 | 607 | TPM_INT_STATUS(priv->locality)); |
57dacc2b | 608 | ioread32(phy->iobase + TPM_INT_STATUS(priv->locality)); |
27084efe LD |
609 | return IRQ_HANDLED; |
610 | } | |
611 | ||
e3837e74 JG |
612 | /* Register the IRQ and issue a command that will cause an interrupt. If an |
613 | * irq is seen then leave the chip setup for IRQ operation, otherwise reverse | |
614 | * everything and leave in polling mode. Returns 0 on success. | |
615 | */ | |
b8ba1e74 JG |
616 | static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask, |
617 | int flags, int irq) | |
e3837e74 | 618 | { |
57dacc2b CR |
619 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
620 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
e3837e74 JG |
621 | u8 original_int_vec; |
622 | ||
ced01b9f | 623 | if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags, |
3635e2ec | 624 | dev_name(&chip->dev), chip) != 0) { |
8cfffc9d | 625 | dev_info(&chip->dev, "Unable to request irq: %d for probe\n", |
e3837e74 JG |
626 | irq); |
627 | return -1; | |
628 | } | |
570a3609 | 629 | priv->irq = irq; |
e3837e74 | 630 | |
57dacc2b | 631 | original_int_vec = ioread8(phy->iobase + |
56671c89 | 632 | TPM_INT_VECTOR(priv->locality)); |
e3837e74 | 633 | iowrite8(irq, |
57dacc2b | 634 | phy->iobase + TPM_INT_VECTOR(priv->locality)); |
e3837e74 JG |
635 | |
636 | /* Clear all existing */ | |
57dacc2b | 637 | iowrite32(ioread32(phy->iobase + |
56671c89 | 638 | TPM_INT_STATUS(priv->locality)), |
57dacc2b | 639 | phy->iobase + TPM_INT_STATUS(priv->locality)); |
e3837e74 JG |
640 | |
641 | /* Turn on */ | |
642 | iowrite32(intmask | TPM_GLOBAL_INT_ENABLE, | |
57dacc2b | 643 | phy->iobase + TPM_INT_ENABLE(priv->locality)); |
e3837e74 JG |
644 | |
645 | priv->irq_tested = false; | |
646 | ||
647 | /* Generate an interrupt by having the core call through to | |
648 | * tpm_tis_send | |
649 | */ | |
650 | if (chip->flags & TPM_CHIP_FLAG_TPM2) | |
651 | tpm2_gen_interrupt(chip); | |
652 | else | |
653 | tpm_gen_interrupt(chip); | |
654 | ||
655 | /* tpm_tis_send will either confirm the interrupt is working or it | |
656 | * will call disable_irq which undoes all of the above. | |
657 | */ | |
570a3609 | 658 | if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) { |
e3837e74 | 659 | iowrite8(original_int_vec, |
57dacc2b | 660 | phy->iobase + TPM_INT_VECTOR(priv->locality)); |
e3837e74 JG |
661 | return 1; |
662 | } | |
663 | ||
664 | return 0; | |
665 | } | |
666 | ||
667 | /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that | |
668 | * do not have ACPI/etc. We typically expect the interrupt to be declared if | |
669 | * present. | |
670 | */ | |
671 | static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask) | |
672 | { | |
57dacc2b CR |
673 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
674 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
e3837e74 JG |
675 | u8 original_int_vec; |
676 | int i; | |
677 | ||
57dacc2b | 678 | original_int_vec = ioread8(phy->iobase + |
56671c89 | 679 | TPM_INT_VECTOR(priv->locality)); |
e3837e74 JG |
680 | |
681 | if (!original_int_vec) { | |
b8ba1e74 JG |
682 | if (IS_ENABLED(CONFIG_X86)) |
683 | for (i = 3; i <= 15; i++) | |
684 | if (!tpm_tis_probe_irq_single(chip, intmask, 0, | |
685 | i)) | |
686 | return; | |
687 | } else if (!tpm_tis_probe_irq_single(chip, intmask, 0, | |
688 | original_int_vec)) | |
e3837e74 JG |
689 | return; |
690 | } | |
691 | ||
73249695 | 692 | static bool interrupts = true; |
57135568 KJH |
693 | module_param(interrupts, bool, 0444); |
694 | MODULE_PARM_DESC(interrupts, "Enable interrupts"); | |
695 | ||
afb5abc2 JS |
696 | static void tpm_tis_remove(struct tpm_chip *chip) |
697 | { | |
57dacc2b CR |
698 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
699 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
700 | void __iomem *reg = phy->iobase + TPM_INT_ENABLE(priv->locality); | |
d30b8e4f | 701 | |
d30b8e4f | 702 | iowrite32(~TPM_GLOBAL_INT_ENABLE & ioread32(reg), reg); |
56671c89 | 703 | release_locality(chip, priv->locality, 1); |
afb5abc2 JS |
704 | } |
705 | ||
399235dc JS |
706 | static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info, |
707 | acpi_handle acpi_dev_handle) | |
27084efe LD |
708 | { |
709 | u32 vendor, intfcaps, intmask; | |
e3837e74 | 710 | int rc, probe; |
27084efe | 711 | struct tpm_chip *chip; |
57dacc2b | 712 | struct tpm_tis_tcg_phy *phy; |
27084efe | 713 | |
57dacc2b CR |
714 | phy = devm_kzalloc(dev, sizeof(struct tpm_tis_tcg_phy), GFP_KERNEL); |
715 | if (phy == NULL) | |
448e9c55 | 716 | return -ENOMEM; |
afb5abc2 JS |
717 | |
718 | chip = tpmm_chip_alloc(dev, &tpm_tis); | |
719 | if (IS_ERR(chip)) | |
720 | return PTR_ERR(chip); | |
721 | ||
aec04cbd | 722 | #ifdef CONFIG_ACPI |
0dc55365 | 723 | chip->acpi_dev_handle = acpi_dev_handle; |
aec04cbd | 724 | #endif |
27084efe | 725 | |
57dacc2b CR |
726 | phy->iobase = devm_ioremap_resource(dev, &tpm_info->res); |
727 | if (IS_ERR(phy->iobase)) | |
728 | return PTR_ERR(phy->iobase); | |
27084efe | 729 | |
aec04cbd | 730 | /* Maximum timeouts */ |
af782f33 CR |
731 | chip->timeout_a = TIS_TIMEOUT_A_MAX; |
732 | chip->timeout_b = TIS_TIMEOUT_B_MAX; | |
733 | chip->timeout_c = TIS_TIMEOUT_C_MAX; | |
734 | chip->timeout_d = TIS_TIMEOUT_D_MAX; | |
ec579358 | 735 | |
57dacc2b | 736 | dev_set_drvdata(&chip->dev, &phy->priv); |
9e0d39d8 | 737 | |
7240b983 JG |
738 | if (wait_startup(chip, 0) != 0) { |
739 | rc = -ENODEV; | |
740 | goto out_err; | |
741 | } | |
742 | ||
036bb38f | 743 | /* Take control of the TPM's interrupt hardware and shut it off */ |
57dacc2b CR |
744 | intmask = ioread32(phy->iobase + |
745 | TPM_INT_ENABLE(phy->priv.locality)); | |
036bb38f JG |
746 | intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT | |
747 | TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT; | |
748 | intmask &= ~TPM_GLOBAL_INT_ENABLE; | |
749 | iowrite32(intmask, | |
57dacc2b | 750 | phy->iobase + TPM_INT_ENABLE(phy->priv.locality)); |
036bb38f | 751 | |
05a462af MS |
752 | if (request_locality(chip, 0) != 0) { |
753 | rc = -ENODEV; | |
754 | goto out_err; | |
755 | } | |
756 | ||
4d5f2051 JS |
757 | rc = tpm2_probe(chip); |
758 | if (rc) | |
759 | goto out_err; | |
aec04cbd | 760 | |
57dacc2b CR |
761 | vendor = ioread32(phy->iobase + TPM_DID_VID(0)); |
762 | phy->priv.manufacturer_id = vendor; | |
27084efe | 763 | |
aec04cbd JS |
764 | dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n", |
765 | (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2", | |
57dacc2b | 766 | vendor >> 16, ioread8(phy->iobase + TPM_RID(0))); |
27084efe | 767 | |
9519de3f | 768 | if (!itpm) { |
968de8e2 SB |
769 | probe = probe_itpm(chip); |
770 | if (probe < 0) { | |
9519de3f SB |
771 | rc = -ENODEV; |
772 | goto out_err; | |
773 | } | |
73249695 | 774 | itpm = !!probe; |
9519de3f SB |
775 | } |
776 | ||
3507d612 RA |
777 | if (itpm) |
778 | dev_info(dev, "Intel iTPM workaround enabled\n"); | |
779 | ||
780 | ||
27084efe LD |
781 | /* Figure out the capabilities */ |
782 | intfcaps = | |
57dacc2b CR |
783 | ioread32(phy->iobase + |
784 | TPM_INTF_CAPS(phy->priv.locality)); | |
9e323d3e | 785 | dev_dbg(dev, "TPM interface capabilities (0x%x):\n", |
27084efe LD |
786 | intfcaps); |
787 | if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) | |
9e323d3e | 788 | dev_dbg(dev, "\tBurst Count Static\n"); |
27084efe | 789 | if (intfcaps & TPM_INTF_CMD_READY_INT) |
9e323d3e | 790 | dev_dbg(dev, "\tCommand Ready Int Support\n"); |
27084efe | 791 | if (intfcaps & TPM_INTF_INT_EDGE_FALLING) |
9e323d3e | 792 | dev_dbg(dev, "\tInterrupt Edge Falling\n"); |
27084efe | 793 | if (intfcaps & TPM_INTF_INT_EDGE_RISING) |
9e323d3e | 794 | dev_dbg(dev, "\tInterrupt Edge Rising\n"); |
27084efe | 795 | if (intfcaps & TPM_INTF_INT_LEVEL_LOW) |
9e323d3e | 796 | dev_dbg(dev, "\tInterrupt Level Low\n"); |
27084efe | 797 | if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) |
9e323d3e | 798 | dev_dbg(dev, "\tInterrupt Level High\n"); |
27084efe | 799 | if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) |
9e323d3e | 800 | dev_dbg(dev, "\tLocality Change Int Support\n"); |
27084efe | 801 | if (intfcaps & TPM_INTF_STS_VALID_INT) |
9e323d3e | 802 | dev_dbg(dev, "\tSts Valid Int Support\n"); |
27084efe | 803 | if (intfcaps & TPM_INTF_DATA_AVAIL_INT) |
9e323d3e | 804 | dev_dbg(dev, "\tData Avail Int Support\n"); |
27084efe | 805 | |
25112048 JG |
806 | /* Very early on issue a command to the TPM in polling mode to make |
807 | * sure it works. May as well use that command to set the proper | |
808 | * timeouts for the driver. | |
809 | */ | |
810 | if (tpm_get_timeouts(chip)) { | |
811 | dev_err(dev, "Could not get TPM timeouts and durations\n"); | |
812 | rc = -ENODEV; | |
813 | goto out_err; | |
814 | } | |
815 | ||
27084efe | 816 | /* INTERRUPT Setup */ |
57dacc2b CR |
817 | init_waitqueue_head(&phy->priv.read_queue); |
818 | init_waitqueue_head(&phy->priv.int_queue); | |
ef7b81dc | 819 | if (interrupts && tpm_info->irq != -1) { |
e3837e74 | 820 | if (tpm_info->irq) { |
b8ba1e74 JG |
821 | tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED, |
822 | tpm_info->irq); | |
570a3609 | 823 | if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) |
8cfffc9d | 824 | dev_err(&chip->dev, FW_BUG |
e3837e74 JG |
825 | "TPM interrupt not working, polling instead\n"); |
826 | } else | |
827 | tpm_tis_probe_irq(chip, intmask); | |
25112048 | 828 | } |
aec04cbd | 829 | |
25112048 | 830 | if (chip->flags & TPM_CHIP_FLAG_TPM2) { |
aec04cbd JS |
831 | rc = tpm2_do_selftest(chip); |
832 | if (rc == TPM2_RC_INITIALIZE) { | |
833 | dev_warn(dev, "Firmware has not started TPM\n"); | |
834 | rc = tpm2_startup(chip, TPM2_SU_CLEAR); | |
835 | if (!rc) | |
836 | rc = tpm2_do_selftest(chip); | |
837 | } | |
448e9c55 | 838 | |
aec04cbd JS |
839 | if (rc) { |
840 | dev_err(dev, "TPM self test failed\n"); | |
841 | if (rc > 0) | |
842 | rc = -ENODEV; | |
843 | goto out_err; | |
844 | } | |
845 | } else { | |
aec04cbd JS |
846 | if (tpm_do_selftest(chip)) { |
847 | dev_err(dev, "TPM self test failed\n"); | |
848 | rc = -ENODEV; | |
849 | goto out_err; | |
850 | } | |
448e9c55 SD |
851 | } |
852 | ||
afb5abc2 | 853 | return tpm_chip_register(chip); |
27084efe | 854 | out_err: |
afb5abc2 | 855 | tpm_tis_remove(chip); |
27084efe LD |
856 | return rc; |
857 | } | |
96854310 | 858 | |
2cb6d646 | 859 | #ifdef CONFIG_PM_SLEEP |
96854310 SB |
860 | static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) |
861 | { | |
57dacc2b CR |
862 | struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); |
863 | struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv); | |
96854310 SB |
864 | u32 intmask; |
865 | ||
866 | /* reenable interrupts that device may have lost or | |
867 | BIOS/firmware may have disabled */ | |
57dacc2b | 868 | iowrite8(priv->irq, phy->iobase + |
56671c89 | 869 | TPM_INT_VECTOR(priv->locality)); |
96854310 SB |
870 | |
871 | intmask = | |
57dacc2b | 872 | ioread32(phy->iobase + TPM_INT_ENABLE(priv->locality)); |
96854310 SB |
873 | |
874 | intmask |= TPM_INTF_CMD_READY_INT | |
875 | | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT | |
876 | | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE; | |
877 | ||
878 | iowrite32(intmask, | |
57dacc2b | 879 | phy->iobase + TPM_INT_ENABLE(priv->locality)); |
96854310 | 880 | } |
96854310 | 881 | |
a2fa3fb0 SK |
882 | static int tpm_tis_resume(struct device *dev) |
883 | { | |
884 | struct tpm_chip *chip = dev_get_drvdata(dev); | |
74d6b3ce | 885 | int ret; |
a2fa3fb0 | 886 | |
570a3609 | 887 | if (chip->flags & TPM_CHIP_FLAG_IRQ) |
a2fa3fb0 SK |
888 | tpm_tis_reenable_interrupts(chip); |
889 | ||
74d6b3ce JS |
890 | ret = tpm_pm_resume(dev); |
891 | if (ret) | |
892 | return ret; | |
aec04cbd | 893 | |
74d6b3ce JS |
894 | /* TPM 1.2 requires self-test on resume. This function actually returns |
895 | * an error code but for unknown reason it isn't handled. | |
896 | */ | |
897 | if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) | |
898 | tpm_do_selftest(chip); | |
a2fa3fb0 | 899 | |
74d6b3ce | 900 | return 0; |
a2fa3fb0 | 901 | } |
2cb6d646 | 902 | #endif |
a2fa3fb0 SK |
903 | |
904 | static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume); | |
905 | ||
afc6d369 | 906 | static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev, |
ef7b81dc | 907 | const struct pnp_device_id *pnp_id) |
9e323d3e | 908 | { |
ef7b81dc | 909 | struct tpm_info tpm_info = {}; |
0dc55365 | 910 | acpi_handle acpi_dev_handle = NULL; |
51dd43df | 911 | struct resource *res; |
7917ff9a | 912 | |
51dd43df JG |
913 | res = pnp_get_resource(pnp_dev, IORESOURCE_MEM, 0); |
914 | if (!res) | |
915 | return -ENODEV; | |
916 | tpm_info.res = *res; | |
9e323d3e | 917 | |
7917ff9a | 918 | if (pnp_irq_valid(pnp_dev, 0)) |
399235dc | 919 | tpm_info.irq = pnp_irq(pnp_dev, 0); |
7917ff9a | 920 | else |
ef7b81dc | 921 | tpm_info.irq = -1; |
7917ff9a | 922 | |
399235dc JS |
923 | if (pnp_acpi_device(pnp_dev)) { |
924 | if (is_itpm(pnp_acpi_device(pnp_dev))) | |
925 | itpm = true; | |
926 | ||
00194826 | 927 | acpi_dev_handle = ACPI_HANDLE(&pnp_dev->dev); |
399235dc | 928 | } |
0dc55365 | 929 | |
399235dc | 930 | return tpm_tis_init(&pnp_dev->dev, &tpm_info, acpi_dev_handle); |
9e323d3e KJH |
931 | } |
932 | ||
0bbed20e | 933 | static struct pnp_device_id tpm_pnp_tbl[] = { |
27084efe | 934 | {"PNP0C31", 0}, /* TPM */ |
93e1b7d4 KJH |
935 | {"ATM1200", 0}, /* Atmel */ |
936 | {"IFX0102", 0}, /* Infineon */ | |
937 | {"BCM0101", 0}, /* Broadcom */ | |
061991ec | 938 | {"BCM0102", 0}, /* Broadcom */ |
93e1b7d4 | 939 | {"NSC1200", 0}, /* National */ |
fb0e7e11 | 940 | {"ICO0102", 0}, /* Intel */ |
93e1b7d4 KJH |
941 | /* Add new here */ |
942 | {"", 0}, /* User Specified */ | |
943 | {"", 0} /* Terminator */ | |
27084efe | 944 | }; |
31bde71c | 945 | MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl); |
27084efe | 946 | |
39af33fc | 947 | static void tpm_tis_pnp_remove(struct pnp_dev *dev) |
253115b7 RA |
948 | { |
949 | struct tpm_chip *chip = pnp_get_drvdata(dev); | |
399235dc | 950 | |
afb5abc2 JS |
951 | tpm_chip_unregister(chip); |
952 | tpm_tis_remove(chip); | |
253115b7 RA |
953 | } |
954 | ||
27084efe LD |
955 | static struct pnp_driver tis_pnp_driver = { |
956 | .name = "tpm_tis", | |
957 | .id_table = tpm_pnp_tbl, | |
958 | .probe = tpm_tis_pnp_init, | |
253115b7 | 959 | .remove = tpm_tis_pnp_remove, |
a2fa3fb0 SK |
960 | .driver = { |
961 | .pm = &tpm_tis_pm, | |
962 | }, | |
27084efe LD |
963 | }; |
964 | ||
93e1b7d4 KJH |
965 | #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2 |
966 | module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id, | |
967 | sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444); | |
968 | MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe"); | |
7a192ec3 | 969 | |
399235dc JS |
970 | #ifdef CONFIG_ACPI |
971 | static int tpm_check_resource(struct acpi_resource *ares, void *data) | |
972 | { | |
973 | struct tpm_info *tpm_info = (struct tpm_info *) data; | |
974 | struct resource res; | |
975 | ||
51dd43df | 976 | if (acpi_dev_resource_interrupt(ares, 0, &res)) |
399235dc | 977 | tpm_info->irq = res.start; |
30f9c8c9 | 978 | else if (acpi_dev_resource_memory(ares, &res)) { |
51dd43df | 979 | tpm_info->res = res; |
30f9c8c9 JS |
980 | tpm_info->res.name = NULL; |
981 | } | |
399235dc JS |
982 | |
983 | return 1; | |
984 | } | |
985 | ||
986 | static int tpm_tis_acpi_init(struct acpi_device *acpi_dev) | |
987 | { | |
4d627e67 JG |
988 | struct acpi_table_tpm2 *tbl; |
989 | acpi_status st; | |
399235dc | 990 | struct list_head resources; |
4d627e67 | 991 | struct tpm_info tpm_info = {}; |
399235dc JS |
992 | int ret; |
993 | ||
4d627e67 JG |
994 | st = acpi_get_table(ACPI_SIG_TPM2, 1, |
995 | (struct acpi_table_header **) &tbl); | |
996 | if (ACPI_FAILURE(st) || tbl->header.length < sizeof(*tbl)) { | |
997 | dev_err(&acpi_dev->dev, | |
998 | FW_BUG "failed to get TPM2 ACPI table\n"); | |
999 | return -EINVAL; | |
1000 | } | |
1001 | ||
1002 | if (tbl->start_method != ACPI_TPM2_MEMORY_MAPPED) | |
399235dc JS |
1003 | return -ENODEV; |
1004 | ||
1005 | INIT_LIST_HEAD(&resources); | |
ef7b81dc | 1006 | tpm_info.irq = -1; |
399235dc JS |
1007 | ret = acpi_dev_get_resources(acpi_dev, &resources, tpm_check_resource, |
1008 | &tpm_info); | |
1009 | if (ret < 0) | |
1010 | return ret; | |
1011 | ||
1012 | acpi_dev_free_resource_list(&resources); | |
1013 | ||
51dd43df | 1014 | if (resource_type(&tpm_info.res) != IORESOURCE_MEM) { |
4d627e67 JG |
1015 | dev_err(&acpi_dev->dev, |
1016 | FW_BUG "TPM2 ACPI table does not define a memory resource\n"); | |
1017 | return -EINVAL; | |
1018 | } | |
1019 | ||
399235dc JS |
1020 | if (is_itpm(acpi_dev)) |
1021 | itpm = true; | |
1022 | ||
1023 | return tpm_tis_init(&acpi_dev->dev, &tpm_info, acpi_dev->handle); | |
1024 | } | |
1025 | ||
1026 | static int tpm_tis_acpi_remove(struct acpi_device *dev) | |
1027 | { | |
1028 | struct tpm_chip *chip = dev_get_drvdata(&dev->dev); | |
1029 | ||
1030 | tpm_chip_unregister(chip); | |
1031 | tpm_tis_remove(chip); | |
1032 | ||
1033 | return 0; | |
1034 | } | |
1035 | ||
1036 | static struct acpi_device_id tpm_acpi_tbl[] = { | |
1037 | {"MSFT0101", 0}, /* TPM 2.0 */ | |
1038 | /* Add new here */ | |
1039 | {"", 0}, /* User Specified */ | |
1040 | {"", 0} /* Terminator */ | |
1041 | }; | |
1042 | MODULE_DEVICE_TABLE(acpi, tpm_acpi_tbl); | |
1043 | ||
1044 | static struct acpi_driver tis_acpi_driver = { | |
1045 | .name = "tpm_tis", | |
1046 | .ids = tpm_acpi_tbl, | |
1047 | .ops = { | |
1048 | .add = tpm_tis_acpi_init, | |
1049 | .remove = tpm_tis_acpi_remove, | |
1050 | }, | |
1051 | .drv = { | |
1052 | .pm = &tpm_tis_pm, | |
1053 | }, | |
1054 | }; | |
1055 | #endif | |
1056 | ||
00194826 JG |
1057 | static struct platform_device *force_pdev; |
1058 | ||
1059 | static int tpm_tis_plat_probe(struct platform_device *pdev) | |
1060 | { | |
1061 | struct tpm_info tpm_info = {}; | |
1062 | struct resource *res; | |
1063 | ||
1064 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1065 | if (res == NULL) { | |
1066 | dev_err(&pdev->dev, "no memory resource defined\n"); | |
1067 | return -ENODEV; | |
1068 | } | |
1069 | tpm_info.res = *res; | |
1070 | ||
1071 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
1072 | if (res) { | |
1073 | tpm_info.irq = res->start; | |
1074 | } else { | |
1075 | if (pdev == force_pdev) | |
1076 | tpm_info.irq = -1; | |
1077 | else | |
1078 | /* When forcing auto probe the IRQ */ | |
1079 | tpm_info.irq = 0; | |
1080 | } | |
1081 | ||
1082 | return tpm_tis_init(&pdev->dev, &tpm_info, NULL); | |
1083 | } | |
1084 | ||
1085 | static int tpm_tis_plat_remove(struct platform_device *pdev) | |
1086 | { | |
1087 | struct tpm_chip *chip = dev_get_drvdata(&pdev->dev); | |
1088 | ||
1089 | tpm_chip_unregister(chip); | |
1090 | tpm_tis_remove(chip); | |
1091 | ||
1092 | return 0; | |
1093 | } | |
1094 | ||
7a192ec3 | 1095 | static struct platform_driver tis_drv = { |
00194826 JG |
1096 | .probe = tpm_tis_plat_probe, |
1097 | .remove = tpm_tis_plat_remove, | |
7a192ec3 | 1098 | .driver = { |
afb5abc2 | 1099 | .name = "tpm_tis", |
b633f050 | 1100 | .pm = &tpm_tis_pm, |
7a192ec3 | 1101 | }, |
9e323d3e KJH |
1102 | }; |
1103 | ||
90ab5ee9 | 1104 | static bool force; |
00194826 | 1105 | #ifdef CONFIG_X86 |
9e323d3e KJH |
1106 | module_param(force, bool, 0444); |
1107 | MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry"); | |
00194826 JG |
1108 | #endif |
1109 | ||
1110 | static int tpm_tis_force_device(void) | |
1111 | { | |
1112 | struct platform_device *pdev; | |
1113 | static const struct resource x86_resources[] = { | |
1114 | { | |
1115 | .start = 0xFED40000, | |
1116 | .end = 0xFED40000 + TIS_MEM_LEN - 1, | |
1117 | .flags = IORESOURCE_MEM, | |
1118 | }, | |
1119 | }; | |
1120 | ||
1121 | if (!force) | |
1122 | return 0; | |
1123 | ||
1124 | /* The driver core will match the name tpm_tis of the device to | |
1125 | * the tpm_tis platform driver and complete the setup via | |
1126 | * tpm_tis_plat_probe | |
1127 | */ | |
1128 | pdev = platform_device_register_simple("tpm_tis", -1, x86_resources, | |
1129 | ARRAY_SIZE(x86_resources)); | |
1130 | if (IS_ERR(pdev)) | |
1131 | return PTR_ERR(pdev); | |
1132 | force_pdev = pdev; | |
1133 | ||
1134 | return 0; | |
1135 | } | |
1136 | ||
27084efe LD |
1137 | static int __init init_tis(void) |
1138 | { | |
9e323d3e | 1139 | int rc; |
00194826 JG |
1140 | |
1141 | rc = tpm_tis_force_device(); | |
1142 | if (rc) | |
1143 | goto err_force; | |
1144 | ||
1145 | rc = platform_driver_register(&tis_drv); | |
1146 | if (rc) | |
1147 | goto err_platform; | |
1148 | ||
399235dc | 1149 | #ifdef CONFIG_ACPI |
00194826 JG |
1150 | rc = acpi_bus_register_driver(&tis_acpi_driver); |
1151 | if (rc) | |
1152 | goto err_acpi; | |
399235dc | 1153 | #endif |
9e323d3e | 1154 | |
00194826 JG |
1155 | if (IS_ENABLED(CONFIG_PNP)) { |
1156 | rc = pnp_register_driver(&tis_pnp_driver); | |
1157 | if (rc) | |
1158 | goto err_pnp; | |
9e323d3e | 1159 | } |
00194826 | 1160 | |
4fba3c3b | 1161 | return 0; |
00194826 JG |
1162 | |
1163 | err_pnp: | |
1164 | #ifdef CONFIG_ACPI | |
1165 | acpi_bus_unregister_driver(&tis_acpi_driver); | |
1166 | err_acpi: | |
1167 | #endif | |
1168 | platform_device_unregister(force_pdev); | |
1169 | err_platform: | |
1170 | if (force_pdev) | |
1171 | platform_device_unregister(force_pdev); | |
1172 | err_force: | |
7f2ab000 | 1173 | return rc; |
27084efe LD |
1174 | } |
1175 | ||
1176 | static void __exit cleanup_tis(void) | |
1177 | { | |
00194826 | 1178 | pnp_unregister_driver(&tis_pnp_driver); |
399235dc | 1179 | #ifdef CONFIG_ACPI |
00194826 | 1180 | acpi_bus_unregister_driver(&tis_acpi_driver); |
7f2ab000 | 1181 | #endif |
7f2ab000 | 1182 | platform_driver_unregister(&tis_drv); |
00194826 JG |
1183 | |
1184 | if (force_pdev) | |
1185 | platform_device_unregister(force_pdev); | |
27084efe LD |
1186 | } |
1187 | ||
1188 | module_init(init_tis); | |
1189 | module_exit(cleanup_tis); | |
1190 | MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); | |
1191 | MODULE_DESCRIPTION("TPM Driver"); | |
1192 | MODULE_VERSION("2.0"); | |
1193 | MODULE_LICENSE("GPL"); |