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[linux-block.git] / drivers / char / tpm / tpm_i2c_nuvoton.c
CommitLineData
82cc1a49
JG		 1 /******************************************************************************
2 * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501/NPCT6XX,
4c336e4b
JG		 3 * based on the TCG TPM Interface Spec version 1.2.
4 * Specifications at www.trustedcomputinggroup.org
5 *
6 * Copyright (C) 2011, Nuvoton Technology Corporation.
7 * Dan Morav <dan.morav@nuvoton.com>
8 * Copyright (C) 2013, Obsidian Research Corp.
9 * Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
10 *
11 * This program is free software: you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation, either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program. If not, see http://www.gnu.org/licenses/>.
23 *
24 * Nuvoton contact information: APC.Support@nuvoton.com
25 *****************************************************************************/
26
27#include <linux/init.h>
28#include <linux/module.h>
29#include <linux/moduleparam.h>
30#include <linux/slab.h>
31#include <linux/interrupt.h>
32#include <linux/wait.h>
33#include <linux/i2c.h>
82cc1a49 34#include <linux/of_device.h>
4c336e4b
JG		 35#include "tpm.h"
36
37/* I2C interface offsets */
38#define TPM_STS 0x00
39#define TPM_BURST_COUNT 0x01
40#define TPM_DATA_FIFO_W 0x20
41#define TPM_DATA_FIFO_R 0x40
42#define TPM_VID_DID_RID 0x60
43/* TPM command header size */
44#define TPM_HEADER_SIZE 10
45#define TPM_RETRY 5
46/*
47 * I2C bus device maximum buffer size w/o counting I2C address or command
48 * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data
49 */
50#define TPM_I2C_MAX_BUF_SIZE 32
51#define TPM_I2C_RETRY_COUNT 32
a233a028
NJ		 52#define TPM_I2C_BUS_DELAY 1000 /* usec */
53#define TPM_I2C_RETRY_DELAY_SHORT (2 * 1000) /* usec */
54#define TPM_I2C_RETRY_DELAY_LONG (10 * 1000) /* usec */
55#define TPM_I2C_DELAY_RANGE 300 /* usec */
4c336e4b 56
82cc1a49
JG		 57#define OF_IS_TPM2 ((void *)1)
58#define I2C_IS_TPM2 1
4c336e4b
JG		 59
60struct priv_data {
570a3609 61 int irq;
4c336e4b 62 unsigned int intrs;
6e599f6f 63 wait_queue_head_t read_queue;
4c336e4b
JG		 64};
65
66static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size,
67 u8 *data)
68{
69 s32 status;
70
71 status = i2c_smbus_read_i2c_block_data(client, offset, size, data);
72 dev_dbg(&client->dev,
73 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
74 offset, size, (int)size, data, status);
75 return status;
76}
77
78static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size,
79 u8 *data)
80{
81 s32 status;
82
83 status = i2c_smbus_write_i2c_block_data(client, offset, size, data);
84 dev_dbg(&client->dev,
85 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
86 offset, size, (int)size, data, status);
87 return status;
88}
89
90#define TPM_STS_VALID 0x80
91#define TPM_STS_COMMAND_READY 0x40
92#define TPM_STS_GO 0x20
93#define TPM_STS_DATA_AVAIL 0x10
94#define TPM_STS_EXPECT 0x08
95#define TPM_STS_RESPONSE_RETRY 0x02
96#define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */
97
98#define TPM_I2C_SHORT_TIMEOUT 750 /* ms */
99#define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */
100
101/* read TPM_STS register */
102static u8 i2c_nuvoton_read_status(struct tpm_chip *chip)
103{
8cfffc9d 104 struct i2c_client *client = to_i2c_client(chip->dev.parent);
4c336e4b
JG		 105 s32 status;
106 u8 data;
107
108 status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data);
109 if (status <= 0) {
8cfffc9d 110 dev_err(&chip->dev, "%s() error return %d\n", __func__,
4c336e4b
JG		 111 status);
112 data = TPM_STS_ERR_VAL;
113 }
114
115 return data;
116}
117
118/* write byte to TPM_STS register */
119static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data)
120{
121 s32 status;
122 int i;
123
124 /* this causes the current command to be aborted */
125 for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) {
126 status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data);
0afb7118
NJ		 127 if (status < 0)
128 usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY
129 + TPM_I2C_DELAY_RANGE);
4c336e4b
JG		 130 }
131 return status;
132}
133
134/* write commandReady to TPM_STS register */
135static void i2c_nuvoton_ready(struct tpm_chip *chip)
136{
8cfffc9d 137 struct i2c_client *client = to_i2c_client(chip->dev.parent);
4c336e4b
JG		 138 s32 status;
139
140 /* this causes the current command to be aborted */
141 status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY);
142 if (status < 0)
8cfffc9d 143 dev_err(&chip->dev,
4c336e4b
JG		 144 "%s() fail to write TPM_STS.commandReady\n", __func__);
145}
146
147/* read burstCount field from TPM_STS register
148 * return -1 on fail to read */
149static int i2c_nuvoton_get_burstcount(struct i2c_client *client,
150 struct tpm_chip *chip)
151{
af782f33 152 unsigned long stop = jiffies + chip->timeout_d;
4c336e4b
JG		 153 s32 status;
154 int burst_count = -1;
155 u8 data;
156
157 /* wait for burstcount to be non-zero */
158 do {
159 /* in I2C burstCount is 1 byte */
160 status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1,
161 &data);
162 if (status > 0 && data > 0) {
163 burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data);
164 break;
165 }
a233a028
NJ		 166 usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY
167 + TPM_I2C_DELAY_RANGE);
4c336e4b
JG		 168 } while (time_before(jiffies, stop));
169
170 return burst_count;
171}
172
173/*
82cc1a49 174 * WPCT301/NPCT501/NPCT6XX SINT# supports only dataAvail
4c336e4b
JG		 175 * any call to this function which is not waiting for dataAvail will
176 * set queue to NULL to avoid waiting for interrupt
177 */
178static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value)
179{
180 u8 status = i2c_nuvoton_read_status(chip);
181 return (status != TPM_STS_ERR_VAL) && ((status & mask) == value);
182}
183
184static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value,
185 u32 timeout, wait_queue_head_t *queue)
186{
570a3609 187 if ((chip->flags & TPM_CHIP_FLAG_IRQ) && queue) {
4c336e4b 188 s32 rc;
9e0d39d8 189 struct priv_data *priv = dev_get_drvdata(&chip->dev);
4c336e4b
JG		 190 unsigned int cur_intrs = priv->intrs;
191
570a3609 192 enable_irq(priv->irq);
4c336e4b
JG		 193 rc = wait_event_interruptible_timeout(*queue,
194 cur_intrs != priv->intrs,
195 timeout);
196 if (rc > 0)
197 return 0;
198 /* At this point we know that the SINT pin is asserted, so we
199 * do not need to do i2c_nuvoton_check_status */
200 } else {
201 unsigned long ten_msec, stop;
202 bool status_valid;
203
204 /* check current status */
205 status_valid = i2c_nuvoton_check_status(chip, mask, value);
206 if (status_valid)
207 return 0;
208
209 /* use polling to wait for the event */
a233a028 210 ten_msec = jiffies + usecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG);
4c336e4b
JG		 211 stop = jiffies + timeout;
212 do {
213 if (time_before(jiffies, ten_msec))
a233a028
NJ		 214 usleep_range(TPM_I2C_RETRY_DELAY_SHORT,
215 TPM_I2C_RETRY_DELAY_SHORT
216 + TPM_I2C_DELAY_RANGE);
4c336e4b 217 else
a233a028
NJ		 218 usleep_range(TPM_I2C_RETRY_DELAY_LONG,
219 TPM_I2C_RETRY_DELAY_LONG
220 + TPM_I2C_DELAY_RANGE);
4c336e4b
JG		 221 status_valid = i2c_nuvoton_check_status(chip, mask,
222 value);
223 if (status_valid)
224 return 0;
225 } while (time_before(jiffies, stop));
226 }
8cfffc9d 227 dev_err(&chip->dev, "%s(%02x, %02x) -> timeout\n", __func__, mask,
4c336e4b
JG		 228 value);
229 return -ETIMEDOUT;
230}
231
232/* wait for dataAvail field to be set in the TPM_STS register */
233static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout,
234 wait_queue_head_t *queue)
235{
236 return i2c_nuvoton_wait_for_stat(chip,
237 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
238 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
239 timeout, queue);
240}
241
242/* Read @count bytes into @buf from TPM_RD_FIFO register */
243static int i2c_nuvoton_recv_data(struct i2c_client *client,
244 struct tpm_chip *chip, u8 *buf, size_t count)
245{
9e0d39d8 246 struct priv_data *priv = dev_get_drvdata(&chip->dev);
4c336e4b
JG		 247 s32 rc;
248 int burst_count, bytes2read, size = 0;
249
250 while (size < count &&
251 i2c_nuvoton_wait_for_data_avail(chip,
af782f33 252 chip->timeout_c,
6e599f6f 253 &priv->read_queue) == 0) {
4c336e4b
JG		 254 burst_count = i2c_nuvoton_get_burstcount(client, chip);
255 if (burst_count < 0) {
8cfffc9d 256 dev_err(&chip->dev,
4c336e4b
JG		 257 "%s() fail to read burstCount=%d\n", __func__,
258 burst_count);
259 return -EIO;
260 }
261 bytes2read = min_t(size_t, burst_count, count - size);
262 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R,
263 bytes2read, &buf[size]);
264 if (rc < 0) {
8cfffc9d 265 dev_err(&chip->dev,
4c336e4b
JG		 266 "%s() fail on i2c_nuvoton_read_buf()=%d\n",
267 __func__, rc);
268 return -EIO;
269 }
8cfffc9d 270 dev_dbg(&chip->dev, "%s(%d):", __func__, bytes2read);
4c336e4b
JG		 271 size += bytes2read;
272 }
273
274 return size;
275}
276
277/* Read TPM command results */
278static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count)
279{
9e0d39d8 280 struct priv_data *priv = dev_get_drvdata(&chip->dev);
8cfffc9d 281 struct device *dev = chip->dev.parent;
4c336e4b
JG		 282 struct i2c_client *client = to_i2c_client(dev);
283 s32 rc;
f9d4d9b5
JB		 284 int status;
285 int burst_count;
286 int retries;
287 int size = 0;
288 u32 expected;
4c336e4b
JG		 289
290 if (count < TPM_HEADER_SIZE) {
291 i2c_nuvoton_ready(chip); /* return to idle */
292 dev_err(dev, "%s() count < header size\n", __func__);
293 return -EIO;
294 }
295 for (retries = 0; retries < TPM_RETRY; retries++) {
296 if (retries > 0) {
297 /* if this is not the first trial, set responseRetry */
298 i2c_nuvoton_write_status(client,
299 TPM_STS_RESPONSE_RETRY);
300 }
301 /*
302 * read first available (> 10 bytes), including:
303 * tag, paramsize, and result
304 */
305 status = i2c_nuvoton_wait_for_data_avail(
af782f33 306 chip, chip->timeout_c, &priv->read_queue);
4c336e4b
JG		 307 if (status != 0) {
308 dev_err(dev, "%s() timeout on dataAvail\n", __func__);
309 size = -ETIMEDOUT;
310 continue;
311 }
312 burst_count = i2c_nuvoton_get_burstcount(client, chip);
313 if (burst_count < 0) {
314 dev_err(dev, "%s() fail to get burstCount\n", __func__);
315 size = -EIO;
316 continue;
317 }
318 size = i2c_nuvoton_recv_data(client, chip, buf,
319 burst_count);
320 if (size < TPM_HEADER_SIZE) {
321 dev_err(dev, "%s() fail to read header\n", __func__);
322 size = -EIO;
323 continue;
324 }
325 /*
326 * convert number of expected bytes field from big endian 32 bit
327 * to machine native
328 */
329 expected = be32_to_cpu(*(__be32 *) (buf + 2));
f9d4d9b5 330 if (expected > count || expected < size) {
4c336e4b
JG		 331 dev_err(dev, "%s() expected > count\n", __func__);
332 size = -EIO;
333 continue;
334 }
335 rc = i2c_nuvoton_recv_data(client, chip, &buf[size],
336 expected - size);
337 size += rc;
338 if (rc < 0 || size < expected) {
339 dev_err(dev, "%s() fail to read remainder of result\n",
340 __func__);
341 size = -EIO;
342 continue;
343 }
344 if (i2c_nuvoton_wait_for_stat(
345 chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL,
af782f33 346 TPM_STS_VALID, chip->timeout_c,
4c336e4b
JG		 347 NULL)) {
348 dev_err(dev, "%s() error left over data\n", __func__);
349 size = -ETIMEDOUT;
350 continue;
351 }
352 break;
353 }
354 i2c_nuvoton_ready(chip);
8cfffc9d 355 dev_dbg(&chip->dev, "%s() -> %d\n", __func__, size);
4c336e4b
JG		 356 return size;
357}
358
359/*
360 * Send TPM command.
361 *
362 * If interrupts are used (signaled by an irq set in the vendor structure)
363 * tpm.c can skip polling for the data to be available as the interrupt is
364 * waited for here
365 */
366static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t len)
367{
9e0d39d8 368 struct priv_data *priv = dev_get_drvdata(&chip->dev);
8cfffc9d 369 struct device *dev = chip->dev.parent;
4c336e4b
JG		 370 struct i2c_client *client = to_i2c_client(dev);
371 u32 ordinal;
372 size_t count = 0;
373 int burst_count, bytes2write, retries, rc = -EIO;
374
375 for (retries = 0; retries < TPM_RETRY; retries++) {
376 i2c_nuvoton_ready(chip);
377 if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY,
378 TPM_STS_COMMAND_READY,
af782f33 379 chip->timeout_b, NULL)) {
4c336e4b
JG		 380 dev_err(dev, "%s() timeout on commandReady\n",
381 __func__);
382 rc = -EIO;
383 continue;
384 }
385 rc = 0;
386 while (count < len - 1) {
387 burst_count = i2c_nuvoton_get_burstcount(client,
388 chip);
389 if (burst_count < 0) {
390 dev_err(dev, "%s() fail get burstCount\n",
391 __func__);
392 rc = -EIO;
393 break;
394 }
395 bytes2write = min_t(size_t, burst_count,
396 len - 1 - count);
397 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W,
398 bytes2write, &buf[count]);
399 if (rc < 0) {
400 dev_err(dev, "%s() fail i2cWriteBuf\n",
401 __func__);
402 break;
403 }
404 dev_dbg(dev, "%s(%d):", __func__, bytes2write);
405 count += bytes2write;
406 rc = i2c_nuvoton_wait_for_stat(chip,
407 TPM_STS_VALID |
408 TPM_STS_EXPECT,
409 TPM_STS_VALID |
410 TPM_STS_EXPECT,
af782f33 411 chip->timeout_c,
4c336e4b
JG		 412 NULL);
413 if (rc < 0) {
414 dev_err(dev, "%s() timeout on Expect\n",
415 __func__);
416 rc = -ETIMEDOUT;
417 break;
418 }
419 }
420 if (rc < 0)
421 continue;
422
423 /* write last byte */
424 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1,
425 &buf[count]);
426 if (rc < 0) {
427 dev_err(dev, "%s() fail to write last byte\n",
428 __func__);
429 rc = -EIO;
430 continue;
431 }
432 dev_dbg(dev, "%s(last): %02x", __func__, buf[count]);
433 rc = i2c_nuvoton_wait_for_stat(chip,
434 TPM_STS_VALID | TPM_STS_EXPECT,
435 TPM_STS_VALID,
af782f33 436 chip->timeout_c, NULL);
4c336e4b
JG		 437 if (rc) {
438 dev_err(dev, "%s() timeout on Expect to clear\n",
439 __func__);
440 rc = -ETIMEDOUT;
441 continue;
442 }
443 break;
444 }
445 if (rc < 0) {
446 /* retries == TPM_RETRY */
447 i2c_nuvoton_ready(chip);
448 return rc;
449 }
450 /* execute the TPM command */
451 rc = i2c_nuvoton_write_status(client, TPM_STS_GO);
452 if (rc < 0) {
453 dev_err(dev, "%s() fail to write Go\n", __func__);
454 i2c_nuvoton_ready(chip);
455 return rc;
456 }
457 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
458 rc = i2c_nuvoton_wait_for_data_avail(chip,
459 tpm_calc_ordinal_duration(chip,
460 ordinal),
6e599f6f 461 &priv->read_queue);
4c336e4b
JG		 462 if (rc) {
463 dev_err(dev, "%s() timeout command duration\n", __func__);
464 i2c_nuvoton_ready(chip);
465 return rc;
466 }
467
468 dev_dbg(dev, "%s() -> %zd\n", __func__, len);
469 return len;
470}
471
472static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status)
473{
474 return (status == TPM_STS_COMMAND_READY);
475}
476
01ad1fa7 477static const struct tpm_class_ops tpm_i2c = {
cae8b441 478 .flags = TPM_OPS_AUTO_STARTUP,
4c336e4b
JG		 479 .status = i2c_nuvoton_read_status,
480 .recv = i2c_nuvoton_recv,
481 .send = i2c_nuvoton_send,
482 .cancel = i2c_nuvoton_ready,
483 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
484 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
485 .req_canceled = i2c_nuvoton_req_canceled,
4c336e4b
JG		 486};
487
488/* The only purpose for the handler is to signal to any waiting threads that
489 * the interrupt is currently being asserted. The driver does not do any
490 * processing triggered by interrupts, and the chip provides no way to mask at
491 * the source (plus that would be slow over I2C). Run the IRQ as a one-shot,
492 * this means it cannot be shared. */
493static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id)
494{
495 struct tpm_chip *chip = dev_id;
9e0d39d8 496 struct priv_data *priv = dev_get_drvdata(&chip->dev);
4c336e4b
JG		 497
498 priv->intrs++;
6e599f6f 499 wake_up(&priv->read_queue);
570a3609 500 disable_irq_nosync(priv->irq);
4c336e4b
JG		 501 return IRQ_HANDLED;
502}
503
504static int get_vid(struct i2c_client *client, u32 *res)
505{
506 static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe };
507 u32 temp;
508 s32 rc;
509
510 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
511 return -ENODEV;
512 rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp);
513 if (rc < 0)
514 return rc;
515
516 /* check WPCT301 values - ignore RID */
517 if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) {
518 /*
519 * f/w rev 2.81 has an issue where the VID_DID_RID is not
520 * reporting the right value. so give it another chance at
521 * offset 0x20 (FIFO_W).
522 */
523 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4,
524 (u8 *) (&temp));
525 if (rc < 0)
526 return rc;
527
528 /* check WPCT301 values - ignore RID */
529 if (memcmp(&temp, vid_did_rid_value,
530 sizeof(vid_did_rid_value)))
531 return -ENODEV;
532 }
533
534 *res = temp;
535 return 0;
536}
537
538static int i2c_nuvoton_probe(struct i2c_client *client,
539 const struct i2c_device_id *id)
540{
541 int rc;
542 struct tpm_chip *chip;
543 struct device *dev = &client->dev;
570a3609 544 struct priv_data *priv;
4c336e4b
JG		 545 u32 vid = 0;
546
547 rc = get_vid(client, &vid);
548 if (rc)
549 return rc;
550
551 dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid,
552 (u8) (vid >> 16), (u8) (vid >> 24));
553
afb5abc2
JS		 554 chip = tpmm_chip_alloc(dev, &tpm_i2c);
555 if (IS_ERR(chip))
556 return PTR_ERR(chip);
4c336e4b 557
570a3609
CR		 558 priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
559 if (!priv)
afb5abc2 560 return -ENOMEM;
bb95cd34 561
82cc1a49
JG		 562 if (dev->of_node) {
563 const struct of_device_id *of_id;
564
565 of_id = of_match_device(dev->driver->of_match_table, dev);
566 if (of_id && of_id->data == OF_IS_TPM2)
567 chip->flags |= TPM_CHIP_FLAG_TPM2;
568 } else
569 if (id->driver_data == I2C_IS_TPM2)
570 chip->flags |= TPM_CHIP_FLAG_TPM2;
571
6e599f6f 572 init_waitqueue_head(&priv->read_queue);
4c336e4b
JG		 573
574 /* Default timeouts */
af782f33
CR		 575 chip->timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
576 chip->timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT);
577 chip->timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
578 chip->timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
4c336e4b 579
9e0d39d8
CR		 580 dev_set_drvdata(&chip->dev, priv);
581
4c336e4b
JG		 582 /*
583 * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to:
584 * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT
585 * The IRQ should be set in the i2c_board_info (which is done
586 * automatically in of_i2c_register_devices, for device tree users */
570a3609 587 priv->irq = client->irq;
fa7539b2 588 if (client->irq) {
570a3609
CR		 589 dev_dbg(dev, "%s() priv->irq\n", __func__);
590 rc = devm_request_irq(dev, client->irq,
4c336e4b
JG		 591 i2c_nuvoton_int_handler,
592 IRQF_TRIGGER_LOW,
3635e2ec 593 dev_name(&chip->dev),
4c336e4b
JG		 594 chip);
595 if (rc) {
596 dev_err(dev, "%s() Unable to request irq: %d for use\n",
570a3609 597 __func__, priv->irq);
570a3609 598 priv->irq = 0;
4c336e4b 599 } else {
fa7539b2 600 chip->flags |= TPM_CHIP_FLAG_IRQ;
4c336e4b
JG		 601 /* Clear any pending interrupt */
602 i2c_nuvoton_ready(chip);
603 /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */
604 rc = i2c_nuvoton_wait_for_stat(chip,
605 TPM_STS_COMMAND_READY,
606 TPM_STS_COMMAND_READY,
af782f33 607 chip->timeout_b,
4c336e4b
JG		 608 NULL);
609 if (rc == 0) {
610 /*
611 * TIS is in ready state
612 * write dummy byte to enter reception state
613 * TPM_DATA_FIFO_W <- rc (0)
614 */
615 rc = i2c_nuvoton_write_buf(client,
616 TPM_DATA_FIFO_W,
617 1, (u8 *) (&rc));
618 if (rc < 0)
afb5abc2 619 return rc;
4c336e4b
JG		 620 /* TPM_STS <- 0x40 (commandReady) */
621 i2c_nuvoton_ready(chip);
622 } else {
623 /*
624 * timeout_b reached - command was
625 * aborted. TIS should now be in idle state -
626 * only TPM_STS_VALID should be set
627 */
628 if (i2c_nuvoton_read_status(chip) !=
afb5abc2
JS		 629 TPM_STS_VALID)
630 return -EIO;
4c336e4b
JG		 631 }
632 }
633 }
634
afb5abc2 635 return tpm_chip_register(chip);
4c336e4b
JG		 636}
637
638static int i2c_nuvoton_remove(struct i2c_client *client)
639{
9e0d39d8
CR		 640 struct tpm_chip *chip = i2c_get_clientdata(client);
641
afb5abc2 642 tpm_chip_unregister(chip);
4c336e4b
JG		 643 return 0;
644}
645
4c336e4b 646static const struct i2c_device_id i2c_nuvoton_id[] = {
82cc1a49
JG		 647 {"tpm_i2c_nuvoton"},
648 {"tpm2_i2c_nuvoton", .driver_data = I2C_IS_TPM2},
4c336e4b
JG		 649 {}
650};
651MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id);
652
653#ifdef CONFIG_OF
654static const struct of_device_id i2c_nuvoton_of_match[] = {
655 {.compatible = "nuvoton,npct501"},
656 {.compatible = "winbond,wpct301"},
82cc1a49 657 {.compatible = "nuvoton,npct601", .data = OF_IS_TPM2},
4c336e4b
JG		 658 {},
659};
660MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match);
661#endif
662
663static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume);
664
665static struct i2c_driver i2c_nuvoton_driver = {
666 .id_table = i2c_nuvoton_id,
667 .probe = i2c_nuvoton_probe,
668 .remove = i2c_nuvoton_remove,
669 .driver = {
82cc1a49 670 .name = "tpm_i2c_nuvoton",
4c336e4b
JG		 671 .pm = &i2c_nuvoton_pm_ops,
672 .of_match_table = of_match_ptr(i2c_nuvoton_of_match),
673 },
674};
675
676module_i2c_driver(i2c_nuvoton_driver);
677
678MODULE_AUTHOR("Dan Morav (dan.morav@nuvoton.com)");
679MODULE_DESCRIPTION("Nuvoton TPM I2C Driver");
680MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)