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tty: tty_port: Move the IO_ERROR clear
[linux-2.6-block.git] / drivers / char / stallion.c
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1da177e4
LT		 1/*****************************************************************************/
2
3/*
4 * stallion.c -- stallion multiport serial driver.
5 *
6 * Copyright (C) 1996-1999 Stallion Technologies
7 * Copyright (C) 1994-1996 Greg Ungerer.
8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27/*****************************************************************************/
28
1da177e4 29#include <linux/module.h>
d43c36dc 30#include <linux/sched.h>
1da177e4
LT		 31#include <linux/slab.h>
32#include <linux/interrupt.h>
33#include <linux/tty.h>
34#include <linux/tty_flip.h>
35#include <linux/serial.h>
8561c44c 36#include <linux/seq_file.h>
1da177e4
LT		 37#include <linux/cd1400.h>
38#include <linux/sc26198.h>
39#include <linux/comstats.h>
40#include <linux/stallion.h>
41#include <linux/ioport.h>
42#include <linux/init.h>
43#include <linux/smp_lock.h>
1da177e4
LT		 44#include <linux/device.h>
45#include <linux/delay.h>
843b568c 46#include <linux/ctype.h>
1da177e4
LT		 47
48#include <asm/io.h>
49#include <asm/uaccess.h>
50
1da177e4 51#include <linux/pci.h>
1da177e4
LT		 52
53/*****************************************************************************/
54
55/*
56 * Define different board types. Use the standard Stallion "assigned"
57 * board numbers. Boards supported in this driver are abbreviated as
58 * EIO = EasyIO and ECH = EasyConnection 8/32.
59 */
60#define BRD_EASYIO 20
61#define BRD_ECH 21
62#define BRD_ECHMC 22
63#define BRD_ECHPCI 26
64#define BRD_ECH64PCI 27
65#define BRD_EASYIOPCI 28
66
843b568c 67struct stlconf {
6b2c9457 68 unsigned int brdtype;
1da177e4
LT		 69 int ioaddr1;
70 int ioaddr2;
71 unsigned long memaddr;
72 int irq;
73 int irqtype;
1da177e4
LT		 74};
75
843b568c 76static unsigned int stl_nrbrds;
1da177e4
LT		 77
78/*****************************************************************************/
79
80/*
81 * Define some important driver characteristics. Device major numbers
82 * allocated as per Linux Device Registry.
83 */
84#ifndef STL_SIOMEMMAJOR
85#define STL_SIOMEMMAJOR 28
86#endif
87#ifndef STL_SERIALMAJOR
88#define STL_SERIALMAJOR 24
89#endif
90#ifndef STL_CALLOUTMAJOR
91#define STL_CALLOUTMAJOR 25
92#endif
93
94/*
95 * Set the TX buffer size. Bigger is better, but we don't want
96 * to chew too much memory with buffers!
97 */
98#define STL_TXBUFLOW 512
99#define STL_TXBUFSIZE 4096
100
101/*****************************************************************************/
102
103/*
104 * Define our local driver identity first. Set up stuff to deal with
105 * all the local structures required by a serial tty driver.
106 */
107static char *stl_drvtitle = "Stallion Multiport Serial Driver";
108static char *stl_drvname = "stallion";
109static char *stl_drvversion = "5.6.0";
110
111static struct tty_driver *stl_serial;
112
1da177e4
LT		 113/*
114 * Define a local default termios struct. All ports will be created
115 * with this termios initially. Basically all it defines is a raw port
116 * at 9600, 8 data bits, 1 stop bit.
117 */
606d099c 118static struct ktermios stl_deftermios = {
1da177e4
LT		 119 .c_cflag = (B9600 | CS8 | CREAD | HUPCL | CLOCAL),
120 .c_cc = INIT_C_CC,
606d099c
AC		 121 .c_ispeed = 9600,
122 .c_ospeed = 9600,
1da177e4
LT		 123};
124
1da177e4
LT		 125/*
126 * Define global place to put buffer overflow characters.
127 */
128static char stl_unwanted[SC26198_RXFIFOSIZE];
129
130/*****************************************************************************/
131
79cfe7ab 132static DEFINE_MUTEX(stl_brdslock);
ca7ed0f2 133static struct stlbrd *stl_brds[STL_MAXBRDS];
1da177e4 134
31f35939
AC		 135static const struct tty_port_operations stl_port_ops;
136
1da177e4
LT		 137/*
138 * Per board state flags. Used with the state field of the board struct.
139 * Not really much here!
140 */
141#define BRD_FOUND 0x1
fc06b5cf
JS		 142#define STL_PROBED 0x2
143
1da177e4
LT		 144
145/*
146 * Define the port structure istate flags. These set of flags are
147 * modified at interrupt time - so setting and reseting them needs
148 * to be atomic. Use the bit clear/setting routines for this.
149 */
150#define ASYI_TXBUSY 1
151#define ASYI_TXLOW 2
ccfea3c9 152#define ASYI_TXFLOWED 3
1da177e4
LT		 153
154/*
155 * Define an array of board names as printable strings. Handy for
156 * referencing boards when printing trace and stuff.
157 */
158static char *stl_brdnames[] = {
615e4a71
JS		 159 NULL,
160 NULL,
161 NULL,
162 NULL,
163 NULL,
164 NULL,
165 NULL,
166 NULL,
167 NULL,
168 NULL,
169 NULL,
170 NULL,
171 NULL,
172 NULL,
173 NULL,
174 NULL,
175 NULL,
176 NULL,
177 NULL,
178 NULL,
1da177e4
LT		 179 "EasyIO",
180 "EC8/32-AT",
181 "EC8/32-MC",
615e4a71
JS		 182 NULL,
183 NULL,
184 NULL,
1da177e4
LT		 185 "EC8/32-PCI",
186 "EC8/64-PCI",
187 "EasyIO-PCI",
188};
189
190/*****************************************************************************/
191
192/*
193 * Define some string labels for arguments passed from the module
194 * load line. These allow for easy board definitions, and easy
195 * modification of the io, memory and irq resoucres.
196 */
6b2c9457 197static unsigned int stl_nargs;
1da177e4
LT		 198static char *board0[4];
199static char *board1[4];
200static char *board2[4];
201static char *board3[4];
202
203static char **stl_brdsp[] = {
204 (char **) &board0,
205 (char **) &board1,
206 (char **) &board2,
207 (char **) &board3
208};
209
210/*
211 * Define a set of common board names, and types. This is used to
212 * parse any module arguments.
213 */
214
ca7ed0f2 215static struct {
1da177e4
LT		 216 char *name;
217 int type;
ca7ed0f2 218} stl_brdstr[] = {
1da177e4
LT		 219 { "easyio", BRD_EASYIO },
220 { "eio", BRD_EASYIO },
221 { "20", BRD_EASYIO },
222 { "ec8/32", BRD_ECH },
223 { "ec8/32-at", BRD_ECH },
224 { "ec8/32-isa", BRD_ECH },
225 { "ech", BRD_ECH },
226 { "echat", BRD_ECH },
227 { "21", BRD_ECH },
228 { "ec8/32-mc", BRD_ECHMC },
229 { "ec8/32-mca", BRD_ECHMC },
230 { "echmc", BRD_ECHMC },
231 { "echmca", BRD_ECHMC },
232 { "22", BRD_ECHMC },
233 { "ec8/32-pc", BRD_ECHPCI },
234 { "ec8/32-pci", BRD_ECHPCI },
235 { "26", BRD_ECHPCI },
236 { "ec8/64-pc", BRD_ECH64PCI },
237 { "ec8/64-pci", BRD_ECH64PCI },
238 { "ech-pci", BRD_ECH64PCI },
239 { "echpci", BRD_ECH64PCI },
240 { "echpc", BRD_ECH64PCI },
241 { "27", BRD_ECH64PCI },
242 { "easyio-pc", BRD_EASYIOPCI },
243 { "easyio-pci", BRD_EASYIOPCI },
244 { "eio-pci", BRD_EASYIOPCI },
245 { "eiopci", BRD_EASYIOPCI },
246 { "28", BRD_EASYIOPCI },
247};
248
249/*
250 * Define the module agruments.
251 */
1da177e4
LT		 252
253module_param_array(board0, charp, &stl_nargs, 0);
254MODULE_PARM_DESC(board0, "Board 0 config -> name[,ioaddr[,ioaddr2][,irq]]");
255module_param_array(board1, charp, &stl_nargs, 0);
256MODULE_PARM_DESC(board1, "Board 1 config -> name[,ioaddr[,ioaddr2][,irq]]");
257module_param_array(board2, charp, &stl_nargs, 0);
258MODULE_PARM_DESC(board2, "Board 2 config -> name[,ioaddr[,ioaddr2][,irq]]");
259module_param_array(board3, charp, &stl_nargs, 0);
260MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,ioaddr2][,irq]]");
261
262/*****************************************************************************/
263
264/*
265 * Hardware ID bits for the EasyIO and ECH boards. These defines apply
266 * to the directly accessible io ports of these boards (not the uarts -
267 * they are in cd1400.h and sc26198.h).
268 */
269#define EIO_8PORTRS 0x04
270#define EIO_4PORTRS 0x05
271#define EIO_8PORTDI 0x00
272#define EIO_8PORTM 0x06
273#define EIO_MK3 0x03
274#define EIO_IDBITMASK 0x07
275
276#define EIO_BRDMASK 0xf0
277#define ID_BRD4 0x10
278#define ID_BRD8 0x20
279#define ID_BRD16 0x30
280
281#define EIO_INTRPEND 0x08
282#define EIO_INTEDGE 0x00
283#define EIO_INTLEVEL 0x08
284#define EIO_0WS 0x10
285
286#define ECH_ID 0xa0
287#define ECH_IDBITMASK 0xe0
288#define ECH_BRDENABLE 0x08
289#define ECH_BRDDISABLE 0x00
290#define ECH_INTENABLE 0x01
291#define ECH_INTDISABLE 0x00
292#define ECH_INTLEVEL 0x02
293#define ECH_INTEDGE 0x00
294#define ECH_INTRPEND 0x01
295#define ECH_BRDRESET 0x01
296
297#define ECHMC_INTENABLE 0x01
298#define ECHMC_BRDRESET 0x02
299
300#define ECH_PNLSTATUS 2
301#define ECH_PNL16PORT 0x20
302#define ECH_PNLIDMASK 0x07
303#define ECH_PNLXPID 0x40
304#define ECH_PNLINTRPEND 0x80
305
306#define ECH_ADDR2MASK 0x1e0
307
308/*
309 * Define the vector mapping bits for the programmable interrupt board
310 * hardware. These bits encode the interrupt for the board to use - it
311 * is software selectable (except the EIO-8M).
312 */
313static unsigned char stl_vecmap[] = {
314 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07,
315 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03
316};
317
b65b5b59
AC		 318/*
319 * Lock ordering is that you may not take stallion_lock holding
320 * brd_lock.
321 */
322
323static spinlock_t brd_lock; /* Guard the board mapping */
324static spinlock_t stallion_lock; /* Guard the tty driver */
325
1da177e4
LT		 326/*
327 * Set up enable and disable macros for the ECH boards. They require
328 * the secondary io address space to be activated and deactivated.
329 * This way all ECH boards can share their secondary io region.
330 * If this is an ECH-PCI board then also need to set the page pointer
331 * to point to the correct page.
332 */
333#define BRDENABLE(brdnr,pagenr) \
334 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
335 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE), \
336 stl_brds[(brdnr)]->ioctrl); \
337 else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \
338 outb((pagenr), stl_brds[(brdnr)]->ioctrl);
339
340#define BRDDISABLE(brdnr) \
341 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
342 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE), \
343 stl_brds[(brdnr)]->ioctrl);
344
345#define STL_CD1400MAXBAUD 230400
346#define STL_SC26198MAXBAUD 460800
347
348#define STL_BAUDBASE 115200
349#define STL_CLOSEDELAY (5 * HZ / 10)
350
351/*****************************************************************************/
352
1da177e4
LT		 353/*
354 * Define the Stallion PCI vendor and device IDs.
355 */
356#ifndef PCI_VENDOR_ID_STALLION
357#define PCI_VENDOR_ID_STALLION 0x124d
358#endif
359#ifndef PCI_DEVICE_ID_ECHPCI832
360#define PCI_DEVICE_ID_ECHPCI832 0x0000
361#endif
362#ifndef PCI_DEVICE_ID_ECHPCI864
363#define PCI_DEVICE_ID_ECHPCI864 0x0002
364#endif
365#ifndef PCI_DEVICE_ID_EIOPCI
366#define PCI_DEVICE_ID_EIOPCI 0x0003
367#endif
368
369/*
370 * Define structure to hold all Stallion PCI boards.
371 */
1da177e4 372
b1b84fe0
JS		 373static struct pci_device_id stl_pcibrds[] = {
374 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI864),
375 .driver_data = BRD_ECH64PCI },
376 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_EIOPCI),
377 .driver_data = BRD_EASYIOPCI },
378 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI832),
379 .driver_data = BRD_ECHPCI },
380 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410),
381 .driver_data = BRD_ECHPCI },
382 { }
383};
384MODULE_DEVICE_TABLE(pci, stl_pcibrds);
1da177e4
LT		 385
386/*****************************************************************************/
387
388/*
389 * Define macros to extract a brd/port number from a minor number.
390 */
391#define MINOR2BRD(min) (((min) & 0xc0) >> 6)
392#define MINOR2PORT(min) ((min) & 0x3f)
393
394/*
395 * Define a baud rate table that converts termios baud rate selector
396 * into the actual baud rate value. All baud rate calculations are
397 * based on the actual baud rate required.
398 */
399static unsigned int stl_baudrates[] = {
400 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
401 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600
402};
403
1da177e4
LT		 404/*****************************************************************************/
405
406/*
407 * Declare all those functions in this driver!
408 */
409
894cb917 410static long stl_memioctl(struct file *fp, unsigned int cmd, unsigned long arg);
ca7ed0f2 411static int stl_brdinit(struct stlbrd *brdp);
d18a750f 412static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp);
ca7ed0f2 413static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp);
1da177e4 414
1da177e4
LT		 415/*
416 * CD1400 uart specific handling functions.
417 */
ca7ed0f2
JS		 418static void stl_cd1400setreg(struct stlport *portp, int regnr, int value);
419static int stl_cd1400getreg(struct stlport *portp, int regnr);
420static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value);
421static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
422static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 423static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 424static int stl_cd1400getsignals(struct stlport *portp);
425static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts);
426static void stl_cd1400ccrwait(struct stlport *portp);
427static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx);
428static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx);
429static void stl_cd1400disableintrs(struct stlport *portp);
430static void stl_cd1400sendbreak(struct stlport *portp, int len);
431static void stl_cd1400flowctrl(struct stlport *portp, int state);
432static void stl_cd1400sendflow(struct stlport *portp, int state);
433static void stl_cd1400flush(struct stlport *portp);
434static int stl_cd1400datastate(struct stlport *portp);
435static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase);
436static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase);
437static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr);
438static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr);
439static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr);
440
441static inline int stl_cd1400breakisr(struct stlport *portp, int ioaddr);
1da177e4
LT		 442
443/*
444 * SC26198 uart specific handling functions.
445 */
ca7ed0f2
JS		 446static void stl_sc26198setreg(struct stlport *portp, int regnr, int value);
447static int stl_sc26198getreg(struct stlport *portp, int regnr);
448static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value);
449static int stl_sc26198getglobreg(struct stlport *portp, int regnr);
450static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
451static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 452static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 453static int stl_sc26198getsignals(struct stlport *portp);
454static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts);
455static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx);
456static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx);
457static void stl_sc26198disableintrs(struct stlport *portp);
458static void stl_sc26198sendbreak(struct stlport *portp, int len);
459static void stl_sc26198flowctrl(struct stlport *portp, int state);
460static void stl_sc26198sendflow(struct stlport *portp, int state);
461static void stl_sc26198flush(struct stlport *portp);
462static int stl_sc26198datastate(struct stlport *portp);
463static void stl_sc26198wait(struct stlport *portp);
464static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty);
465static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase);
466static void stl_sc26198txisr(struct stlport *port);
467static void stl_sc26198rxisr(struct stlport *port, unsigned int iack);
468static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch);
469static void stl_sc26198rxbadchars(struct stlport *portp);
470static void stl_sc26198otherisr(struct stlport *port, unsigned int iack);
1da177e4
LT		 471
472/*****************************************************************************/
473
474/*
475 * Generic UART support structure.
476 */
477typedef struct uart {
ca7ed0f2
JS		 478 int (*panelinit)(struct stlbrd *brdp, struct stlpanel *panelp);
479 void (*portinit)(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 480 void (*setport)(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 481 int (*getsignals)(struct stlport *portp);
482 void (*setsignals)(struct stlport *portp, int dtr, int rts);
483 void (*enablerxtx)(struct stlport *portp, int rx, int tx);
484 void (*startrxtx)(struct stlport *portp, int rx, int tx);
485 void (*disableintrs)(struct stlport *portp);
486 void (*sendbreak)(struct stlport *portp, int len);
487 void (*flowctrl)(struct stlport *portp, int state);
488 void (*sendflow)(struct stlport *portp, int state);
489 void (*flush)(struct stlport *portp);
490 int (*datastate)(struct stlport *portp);
491 void (*intr)(struct stlpanel *panelp, unsigned int iobase);
1da177e4
LT		 492} uart_t;
493
494/*
495 * Define some macros to make calling these functions nice and clean.
496 */
497#define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit)
498#define stl_portinit (* ((uart_t *) portp->uartp)->portinit)
499#define stl_setport (* ((uart_t *) portp->uartp)->setport)
500#define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals)
501#define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals)
502#define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx)
503#define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx)
504#define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs)
505#define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak)
506#define stl_flowctrl (* ((uart_t *) portp->uartp)->flowctrl)
507#define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow)
508#define stl_flush (* ((uart_t *) portp->uartp)->flush)
509#define stl_datastate (* ((uart_t *) portp->uartp)->datastate)
510
511/*****************************************************************************/
512
513/*
514 * CD1400 UART specific data initialization.
515 */
516static uart_t stl_cd1400uart = {
517 stl_cd1400panelinit,
518 stl_cd1400portinit,
519 stl_cd1400setport,
520 stl_cd1400getsignals,
521 stl_cd1400setsignals,
522 stl_cd1400enablerxtx,
523 stl_cd1400startrxtx,
524 stl_cd1400disableintrs,
525 stl_cd1400sendbreak,
526 stl_cd1400flowctrl,
527 stl_cd1400sendflow,
528 stl_cd1400flush,
529 stl_cd1400datastate,
530 stl_cd1400eiointr
531};
532
533/*
534 * Define the offsets within the register bank of a cd1400 based panel.
535 * These io address offsets are common to the EasyIO board as well.
536 */
537#define EREG_ADDR 0
538#define EREG_DATA 4
539#define EREG_RXACK 5
540#define EREG_TXACK 6
541#define EREG_MDACK 7
542
543#define EREG_BANKSIZE 8
544
545#define CD1400_CLK 25000000
546#define CD1400_CLK8M 20000000
547
548/*
549 * Define the cd1400 baud rate clocks. These are used when calculating
550 * what clock and divisor to use for the required baud rate. Also
551 * define the maximum baud rate allowed, and the default base baud.
552 */
553static int stl_cd1400clkdivs[] = {
554 CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4
555};
556
557/*****************************************************************************/
558
559/*
560 * SC26198 UART specific data initization.
561 */
562static uart_t stl_sc26198uart = {
563 stl_sc26198panelinit,
564 stl_sc26198portinit,
565 stl_sc26198setport,
566 stl_sc26198getsignals,
567 stl_sc26198setsignals,
568 stl_sc26198enablerxtx,
569 stl_sc26198startrxtx,
570 stl_sc26198disableintrs,
571 stl_sc26198sendbreak,
572 stl_sc26198flowctrl,
573 stl_sc26198sendflow,
574 stl_sc26198flush,
575 stl_sc26198datastate,
576 stl_sc26198intr
577};
578
579/*
580 * Define the offsets within the register bank of a sc26198 based panel.
581 */
582#define XP_DATA 0
583#define XP_ADDR 1
584#define XP_MODID 2
585#define XP_STATUS 2
586#define XP_IACK 3
587
588#define XP_BANKSIZE 4
589
590/*
591 * Define the sc26198 baud rate table. Offsets within the table
592 * represent the actual baud rate selector of sc26198 registers.
593 */
594static unsigned int sc26198_baudtable[] = {
595 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600,
596 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200,
597 230400, 460800, 921600
598};
599
fe971071 600#define SC26198_NRBAUDS ARRAY_SIZE(sc26198_baudtable)
1da177e4
LT		 601
602/*****************************************************************************/
603
604/*
605 * Define the driver info for a user level control device. Used mainly
606 * to get at port stats - only not using the port device itself.
607 */
62322d25 608static const struct file_operations stl_fsiomem = {
1da177e4 609 .owner = THIS_MODULE,
894cb917 610 .unlocked_ioctl = stl_memioctl,
1da177e4
LT		 611};
612
ca8eca68 613static struct class *stallion_class;
1da177e4 614
ccfea3c9
JS		 615static void stl_cd_change(struct stlport *portp)
616{
617 unsigned int oldsigs = portp->sigs;
d18a750f 618 struct tty_struct *tty = tty_port_tty_get(&portp->port);
ccfea3c9 619
d18a750f 620 if (!tty)
ccfea3c9
JS		 621 return;
622
623 portp->sigs = stl_getsignals(portp);
624
625 if ((portp->sigs & TIOCM_CD) && ((oldsigs & TIOCM_CD) == 0))
f8ae4764 626 wake_up_interruptible(&portp->port.open_wait);
ccfea3c9
JS		 627
628 if ((oldsigs & TIOCM_CD) && ((portp->sigs & TIOCM_CD) == 0))
f8ae4764 629 if (portp->port.flags & ASYNC_CHECK_CD)
d18a750f
AC		 630 tty_hangup(tty);
631 tty_kref_put(tty);
ccfea3c9
JS		 632}
633
1da177e4
LT		 634/*
635 * Check for any arguments passed in on the module load command line.
636 */
637
1da177e4
LT		 638/*****************************************************************************/
639
1da177e4
LT		 640/*
641 * Parse the supplied argument string, into the board conf struct.
642 */
643
40e82652 644static int __init stl_parsebrd(struct stlconf *confp, char **argp)
1da177e4
LT		 645{
646 char *sp;
6b2c9457 647 unsigned int i;
1da177e4 648
a0564e14 649 pr_debug("stl_parsebrd(confp=%p,argp=%p)\n", confp, argp);
1da177e4 650
615e4a71 651 if ((argp[0] == NULL) || (*argp[0] == 0))
014c2544 652 return 0;
1da177e4 653
c62429d9 654 for (sp = argp[0], i = 0; (*sp != 0) && (i < 25); sp++, i++)
843b568c 655 *sp = tolower(*sp);
1da177e4 656
c62429d9 657 for (i = 0; i < ARRAY_SIZE(stl_brdstr); i++)
1da177e4
LT		 658 if (strcmp(stl_brdstr[i].name, argp[0]) == 0)
659 break;
c62429d9 660
fe971071 661 if (i == ARRAY_SIZE(stl_brdstr)) {
1da177e4 662 printk("STALLION: unknown board name, %s?\n", argp[0]);
fe971071 663 return 0;
1da177e4
LT		 664 }
665
666 confp->brdtype = stl_brdstr[i].type;
667
668 i = 1;
615e4a71 669 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 670 confp->ioaddr1 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 671 i++;
672 if (confp->brdtype == BRD_ECH) {
615e4a71 673 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 674 confp->ioaddr2 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 675 i++;
676 }
615e4a71 677 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 678 confp->irq = simple_strtoul(argp[i], NULL, 0);
014c2544 679 return 1;
1da177e4
LT		 680}
681
682/*****************************************************************************/
683
1da177e4
LT		 684/*
685 * Allocate a new board structure. Fill out the basic info in it.
686 */
687
ca7ed0f2 688static struct stlbrd *stl_allocbrd(void)
1da177e4 689{
ca7ed0f2 690 struct stlbrd *brdp;
1da177e4 691
ca7ed0f2 692 brdp = kzalloc(sizeof(struct stlbrd), GFP_KERNEL);
b0b4ed72 693 if (!brdp) {
b65b5b59 694 printk("STALLION: failed to allocate memory (size=%Zd)\n",
ca7ed0f2 695 sizeof(struct stlbrd));
b0b4ed72 696 return NULL;
1da177e4
LT		 697 }
698
1da177e4 699 brdp->magic = STL_BOARDMAGIC;
014c2544 700 return brdp;
1da177e4
LT		 701}
702
703/*****************************************************************************/
704
705static int stl_open(struct tty_struct *tty, struct file *filp)
706{
ca7ed0f2
JS		 707 struct stlport *portp;
708 struct stlbrd *brdp;
4350f3ff 709 struct tty_port *port;
6b2c9457 710 unsigned int minordev, brdnr, panelnr;
4350f3ff 711 int portnr;
1da177e4 712
a0564e14 713 pr_debug("stl_open(tty=%p,filp=%p): device=%s\n", tty, filp, tty->name);
1da177e4
LT		 714
715 minordev = tty->index;
716 brdnr = MINOR2BRD(minordev);
717 if (brdnr >= stl_nrbrds)
014c2544 718 return -ENODEV;
1da177e4 719 brdp = stl_brds[brdnr];
615e4a71 720 if (brdp == NULL)
014c2544 721 return -ENODEV;
4350f3ff 722
1da177e4 723 minordev = MINOR2PORT(minordev);
c62429d9 724 for (portnr = -1, panelnr = 0; panelnr < STL_MAXPANELS; panelnr++) {
615e4a71 725 if (brdp->panels[panelnr] == NULL)
1da177e4
LT		 726 break;
727 if (minordev < brdp->panels[panelnr]->nrports) {
728 portnr = minordev;
729 break;
730 }
731 minordev -= brdp->panels[panelnr]->nrports;
732 }
733 if (portnr < 0)
014c2544 734 return -ENODEV;
1da177e4
LT		 735
736 portp = brdp->panels[panelnr]->ports[portnr];
615e4a71 737 if (portp == NULL)
014c2544 738 return -ENODEV;
4350f3ff 739 port = &portp->port;
1da177e4
LT		 740
741/*
742 * On the first open of the device setup the port hardware, and
743 * initialize the per port data structure.
744 */
4350f3ff 745 tty_port_tty_set(port, tty);
1da177e4 746 tty->driver_data = portp;
4350f3ff 747 port->count++;
1da177e4 748
4350f3ff 749 if ((port->flags & ASYNC_INITIALIZED) == 0) {
b0b4ed72
TK		 750 if (!portp->tx.buf) {
751 portp->tx.buf = kmalloc(STL_TXBUFSIZE, GFP_KERNEL);
752 if (!portp->tx.buf)
014c2544 753 return -ENOMEM;
1da177e4
LT		 754 portp->tx.head = portp->tx.buf;
755 portp->tx.tail = portp->tx.buf;
756 }
757 stl_setport(portp, tty->termios);
758 portp->sigs = stl_getsignals(portp);
759 stl_setsignals(portp, 1, 1);
760 stl_enablerxtx(portp, 1, 1);
761 stl_startrxtx(portp, 1, 0);
762 clear_bit(TTY_IO_ERROR, &tty->flags);
4350f3ff 763 port->flags |= ASYNC_INITIALIZED;
1da177e4 764 }
4350f3ff 765 return tty_port_block_til_ready(port, tty, filp);
1da177e4
LT		 766}
767
768/*****************************************************************************/
769
31f35939
AC		 770static int stl_carrier_raised(struct tty_port *port)
771{
772 struct stlport *portp = container_of(port, struct stlport, port);
773 return (portp->sigs & TIOCM_CD) ? 1 : 0;
774}
775
fcc8ac18 776static void stl_dtr_rts(struct tty_port *port, int on)
1da177e4 777{
4350f3ff
AC		 778 struct stlport *portp = container_of(port, struct stlport, port);
779 /* Takes brd_lock internally */
fcc8ac18 780 stl_setsignals(portp, on, on);
1da177e4
LT		 781}
782
783/*****************************************************************************/
784
96b066b8
JS		 785static void stl_flushbuffer(struct tty_struct *tty)
786{
787 struct stlport *portp;
788
789 pr_debug("stl_flushbuffer(tty=%p)\n", tty);
790
96b066b8
JS		 791 portp = tty->driver_data;
792 if (portp == NULL)
793 return;
794
795 stl_flush(portp);
796 tty_wakeup(tty);
797}
798
799/*****************************************************************************/
800
801static void stl_waituntilsent(struct tty_struct *tty, int timeout)
802{
803 struct stlport *portp;
804 unsigned long tend;
805
806 pr_debug("stl_waituntilsent(tty=%p,timeout=%d)\n", tty, timeout);
807
96b066b8
JS		 808 portp = tty->driver_data;
809 if (portp == NULL)
810 return;
811
812 if (timeout == 0)
813 timeout = HZ;
814 tend = jiffies + timeout;
815
978e595f 816 lock_kernel();
96b066b8
JS		 817 while (stl_datastate(portp)) {
818 if (signal_pending(current))
819 break;
820 msleep_interruptible(20);
821 if (time_after_eq(jiffies, tend))
822 break;
823 }
978e595f 824 unlock_kernel();
96b066b8
JS		 825}
826
827/*****************************************************************************/
828
1da177e4
LT		 829static void stl_close(struct tty_struct *tty, struct file *filp)
830{
ca7ed0f2 831 struct stlport *portp;
4350f3ff 832 struct tty_port *port;
1da177e4
LT		 833 unsigned long flags;
834
a0564e14 835 pr_debug("stl_close(tty=%p,filp=%p)\n", tty, filp);
1da177e4
LT		 836
837 portp = tty->driver_data;
a6614999
AC		 838 BUG_ON(portp == NULL);
839
4350f3ff 840 port = &portp->port;
1da177e4 841
a6614999 842 if (tty_port_close_start(port, tty, filp) == 0)
1da177e4 843 return;
1da177e4
LT		 844/*
845 * May want to wait for any data to drain before closing. The BUSY
846 * flag keeps track of whether we are still sending or not - it is
847 * very accurate for the cd1400, not quite so for the sc26198.
848 * (The sc26198 has no "end-of-data" interrupt only empty FIFO)
849 */
1da177e4
LT		 850 stl_waituntilsent(tty, (HZ / 2));
851
4350f3ff 852 spin_lock_irqsave(&port->lock, flags);
f8ae4764 853 portp->port.flags &= ~ASYNC_INITIALIZED;
4350f3ff 854 spin_unlock_irqrestore(&port->lock, flags);
b65b5b59 855
1da177e4
LT		 856 stl_disableintrs(portp);
857 if (tty->termios->c_cflag & HUPCL)
858 stl_setsignals(portp, 0, 0);
859 stl_enablerxtx(portp, 0, 0);
860 stl_flushbuffer(tty);
861 portp->istate = 0;
615e4a71 862 if (portp->tx.buf != NULL) {
1da177e4 863 kfree(portp->tx.buf);
615e4a71
JS		 864 portp->tx.buf = NULL;
865 portp->tx.head = NULL;
866 portp->tx.tail = NULL;
1da177e4 867 }
1da177e4 868
a6614999 869 tty_port_close_end(port, tty);
4350f3ff 870 tty_port_tty_set(port, NULL);
1da177e4
LT		 871}
872
873/*****************************************************************************/
874
875/*
876 * Write routine. Take data and stuff it in to the TX ring queue.
877 * If transmit interrupts are not running then start them.
878 */
879
880static int stl_write(struct tty_struct *tty, const unsigned char *buf, int count)
881{
ca7ed0f2 882 struct stlport *portp;
1da177e4
LT		 883 unsigned int len, stlen;
884 unsigned char *chbuf;
885 char *head, *tail;
886
a0564e14 887 pr_debug("stl_write(tty=%p,buf=%p,count=%d)\n", tty, buf, count);
1da177e4 888
1da177e4 889 portp = tty->driver_data;
615e4a71 890 if (portp == NULL)
014c2544 891 return 0;
615e4a71 892 if (portp->tx.buf == NULL)
014c2544 893 return 0;
1da177e4
LT		 894
895/*
896 * If copying direct from user space we must cater for page faults,
897 * causing us to "sleep" here for a while. To handle this copy in all
898 * the data we need now, into a local buffer. Then when we got it all
899 * copy it into the TX buffer.
900 */
901 chbuf = (unsigned char *) buf;
902
903 head = portp->tx.head;
904 tail = portp->tx.tail;
905 if (head >= tail) {
906 len = STL_TXBUFSIZE - (head - tail) - 1;
907 stlen = STL_TXBUFSIZE - (head - portp->tx.buf);
908 } else {
909 len = tail - head - 1;
910 stlen = len;
911 }
912
843b568c 913 len = min(len, (unsigned int)count);
1da177e4
LT		 914 count = 0;
915 while (len > 0) {
843b568c 916 stlen = min(len, stlen);
1da177e4
LT		 917 memcpy(head, chbuf, stlen);
918 len -= stlen;
919 chbuf += stlen;
920 count += stlen;
921 head += stlen;
922 if (head >= (portp->tx.buf + STL_TXBUFSIZE)) {
923 head = portp->tx.buf;
924 stlen = tail - head;
925 }
926 }
927 portp->tx.head = head;
928
929 clear_bit(ASYI_TXLOW, &portp->istate);
930 stl_startrxtx(portp, -1, 1);
931
014c2544 932 return count;
1da177e4
LT		 933}
934
935/*****************************************************************************/
936
4a561222 937static int stl_putchar(struct tty_struct *tty, unsigned char ch)
1da177e4 938{
ca7ed0f2 939 struct stlport *portp;
1da177e4
LT		 940 unsigned int len;
941 char *head, *tail;
942
a0564e14 943 pr_debug("stl_putchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 944
1da177e4 945 portp = tty->driver_data;
615e4a71 946 if (portp == NULL)
4a561222 947 return -EINVAL;
615e4a71 948 if (portp->tx.buf == NULL)
4a561222 949 return -EINVAL;
1da177e4
LT		 950
951 head = portp->tx.head;
952 tail = portp->tx.tail;
953
954 len = (head >= tail) ? (STL_TXBUFSIZE - (head - tail)) : (tail - head);
955 len--;
956
957 if (len > 0) {
958 *head++ = ch;
959 if (head >= (portp->tx.buf + STL_TXBUFSIZE))
960 head = portp->tx.buf;
961 }
962 portp->tx.head = head;
4a561222 963 return 0;
1da177e4
LT		 964}
965
966/*****************************************************************************/
967
968/*
969 * If there are any characters in the buffer then make sure that TX
970 * interrupts are on and get'em out. Normally used after the putchar
971 * routine has been called.
972 */
973
974static void stl_flushchars(struct tty_struct *tty)
975{
ca7ed0f2 976 struct stlport *portp;
1da177e4 977
a0564e14 978 pr_debug("stl_flushchars(tty=%p)\n", tty);
1da177e4 979
1da177e4 980 portp = tty->driver_data;
615e4a71 981 if (portp == NULL)
1da177e4 982 return;
615e4a71 983 if (portp->tx.buf == NULL)
1da177e4
LT		 984 return;
985
1da177e4
LT		 986 stl_startrxtx(portp, -1, 1);
987}
988
989/*****************************************************************************/
990
991static int stl_writeroom(struct tty_struct *tty)
992{
ca7ed0f2 993 struct stlport *portp;
1da177e4
LT		 994 char *head, *tail;
995
a0564e14 996 pr_debug("stl_writeroom(tty=%p)\n", tty);
1da177e4 997
1da177e4 998 portp = tty->driver_data;
615e4a71 999 if (portp == NULL)
014c2544 1000 return 0;
615e4a71 1001 if (portp->tx.buf == NULL)
014c2544 1002 return 0;
1da177e4
LT		 1003
1004 head = portp->tx.head;
1005 tail = portp->tx.tail;
c62429d9 1006 return (head >= tail) ? (STL_TXBUFSIZE - (head - tail) - 1) : (tail - head - 1);
1da177e4
LT		 1007}
1008
1009/*****************************************************************************/
1010
1011/*
1012 * Return number of chars in the TX buffer. Normally we would just
1013 * calculate the number of chars in the buffer and return that, but if
1014 * the buffer is empty and TX interrupts are still on then we return
1015 * that the buffer still has 1 char in it. This way whoever called us
1016 * will not think that ALL chars have drained - since the UART still
1017 * must have some chars in it (we are busy after all).
1018 */
1019
1020static int stl_charsinbuffer(struct tty_struct *tty)
1021{
ca7ed0f2 1022 struct stlport *portp;
1da177e4
LT		 1023 unsigned int size;
1024 char *head, *tail;
1025
a0564e14 1026 pr_debug("stl_charsinbuffer(tty=%p)\n", tty);
1da177e4 1027
1da177e4 1028 portp = tty->driver_data;
615e4a71 1029 if (portp == NULL)
014c2544 1030 return 0;
615e4a71 1031 if (portp->tx.buf == NULL)
014c2544 1032 return 0;
1da177e4
LT		 1033
1034 head = portp->tx.head;
1035 tail = portp->tx.tail;
1036 size = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
1037 if ((size == 0) && test_bit(ASYI_TXBUSY, &portp->istate))
1038 size = 1;
014c2544 1039 return size;
1da177e4
LT		 1040}
1041
1042/*****************************************************************************/
1043
1044/*
1045 * Generate the serial struct info.
1046 */
1047
ca7ed0f2 1048static int stl_getserial(struct stlport *portp, struct serial_struct __user *sp)
1da177e4
LT		 1049{
1050 struct serial_struct sio;
ca7ed0f2 1051 struct stlbrd *brdp;
1da177e4 1052
a0564e14 1053 pr_debug("stl_getserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1054
1055 memset(&sio, 0, sizeof(struct serial_struct));
1056 sio.line = portp->portnr;
1057 sio.port = portp->ioaddr;
f8ae4764 1058 sio.flags = portp->port.flags;
1da177e4
LT		 1059 sio.baud_base = portp->baud_base;
1060 sio.close_delay = portp->close_delay;
1061 sio.closing_wait = portp->closing_wait;
1062 sio.custom_divisor = portp->custom_divisor;
1063 sio.hub6 = 0;
1064 if (portp->uartp == &stl_cd1400uart) {
1065 sio.type = PORT_CIRRUS;
1066 sio.xmit_fifo_size = CD1400_TXFIFOSIZE;
1067 } else {
1068 sio.type = PORT_UNKNOWN;
1069 sio.xmit_fifo_size = SC26198_TXFIFOSIZE;
1070 }
1071
1072 brdp = stl_brds[portp->brdnr];
615e4a71 1073 if (brdp != NULL)
1da177e4
LT		 1074 sio.irq = brdp->irq;
1075
1076 return copy_to_user(sp, &sio, sizeof(struct serial_struct)) ? -EFAULT : 0;
1077}
1078
1079/*****************************************************************************/
1080
1081/*
1082 * Set port according to the serial struct info.
1083 * At this point we do not do any auto-configure stuff, so we will
1084 * just quietly ignore any requests to change irq, etc.
1085 */
1086
d18a750f 1087static int stl_setserial(struct tty_struct *tty, struct serial_struct __user *sp)
1da177e4 1088{
d18a750f 1089 struct stlport * portp = tty->driver_data;
1da177e4
LT		 1090 struct serial_struct sio;
1091
a0564e14 1092 pr_debug("stl_setserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1093
1094 if (copy_from_user(&sio, sp, sizeof(struct serial_struct)))
1095 return -EFAULT;
1096 if (!capable(CAP_SYS_ADMIN)) {
1097 if ((sio.baud_base != portp->baud_base) ||
1098 (sio.close_delay != portp->close_delay) ||
1099 ((sio.flags & ~ASYNC_USR_MASK) !=
f8ae4764 1100 (portp->port.flags & ~ASYNC_USR_MASK)))
014c2544 1101 return -EPERM;
1da177e4
LT		 1102 }
1103
f8ae4764 1104 portp->port.flags = (portp->port.flags & ~ASYNC_USR_MASK) |
1da177e4
LT		 1105 (sio.flags & ASYNC_USR_MASK);
1106 portp->baud_base = sio.baud_base;
1107 portp->close_delay = sio.close_delay;
1108 portp->closing_wait = sio.closing_wait;
1109 portp->custom_divisor = sio.custom_divisor;
d18a750f 1110 stl_setport(portp, tty->termios);
014c2544 1111 return 0;
1da177e4
LT		 1112}
1113
1114/*****************************************************************************/
1115
1116static int stl_tiocmget(struct tty_struct *tty, struct file *file)
1117{
ca7ed0f2 1118 struct stlport *portp;
1da177e4 1119
1da177e4 1120 portp = tty->driver_data;
615e4a71 1121 if (portp == NULL)
014c2544 1122 return -ENODEV;
1da177e4 1123 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1124 return -EIO;
1da177e4
LT		 1125
1126 return stl_getsignals(portp);
1127}
1128
1129static int stl_tiocmset(struct tty_struct *tty, struct file *file,
1130 unsigned int set, unsigned int clear)
1131{
ca7ed0f2 1132 struct stlport *portp;
1da177e4
LT		 1133 int rts = -1, dtr = -1;
1134
1da177e4 1135 portp = tty->driver_data;
615e4a71 1136 if (portp == NULL)
014c2544 1137 return -ENODEV;
1da177e4 1138 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1139 return -EIO;
1da177e4
LT		 1140
1141 if (set & TIOCM_RTS)
1142 rts = 1;
1143 if (set & TIOCM_DTR)
1144 dtr = 1;
1145 if (clear & TIOCM_RTS)
1146 rts = 0;
1147 if (clear & TIOCM_DTR)
1148 dtr = 0;
1149
1150 stl_setsignals(portp, dtr, rts);
1151 return 0;
1152}
1153
1154static int stl_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1155{
ca7ed0f2 1156 struct stlport *portp;
1da177e4
LT		 1157 int rc;
1158 void __user *argp = (void __user *)arg;
1159
a0564e14
JS		 1160 pr_debug("stl_ioctl(tty=%p,file=%p,cmd=%x,arg=%lx)\n", tty, file, cmd,
1161 arg);
1da177e4 1162
1da177e4 1163 portp = tty->driver_data;
615e4a71 1164 if (portp == NULL)
014c2544 1165 return -ENODEV;
1da177e4
LT		 1166
1167 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
c62429d9 1168 (cmd != COM_GETPORTSTATS) && (cmd != COM_CLRPORTSTATS))
1da177e4 1169 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1170 return -EIO;
1da177e4
LT		 1171
1172 rc = 0;
1173
f433c65b
AC		 1174 lock_kernel();
1175
1da177e4 1176 switch (cmd) {
1da177e4
LT		 1177 case TIOCGSERIAL:
1178 rc = stl_getserial(portp, argp);
1179 break;
1180 case TIOCSSERIAL:
d18a750f 1181 rc = stl_setserial(tty, argp);
1da177e4
LT		 1182 break;
1183 case COM_GETPORTSTATS:
d18a750f 1184 rc = stl_getportstats(tty, portp, argp);
1da177e4
LT		 1185 break;
1186 case COM_CLRPORTSTATS:
1187 rc = stl_clrportstats(portp, argp);
1188 break;
1189 case TIOCSERCONFIG:
1190 case TIOCSERGWILD:
1191 case TIOCSERSWILD:
1192 case TIOCSERGETLSR:
1193 case TIOCSERGSTRUCT:
1194 case TIOCSERGETMULTI:
1195 case TIOCSERSETMULTI:
1196 default:
1197 rc = -ENOIOCTLCMD;
1198 break;
1199 }
f433c65b 1200 unlock_kernel();
014c2544 1201 return rc;
1da177e4
LT		 1202}
1203
1204/*****************************************************************************/
1205
96b066b8
JS		 1206/*
1207 * Start the transmitter again. Just turn TX interrupts back on.
1208 */
1209
1210static void stl_start(struct tty_struct *tty)
1211{
1212 struct stlport *portp;
1213
1214 pr_debug("stl_start(tty=%p)\n", tty);
1215
96b066b8
JS		 1216 portp = tty->driver_data;
1217 if (portp == NULL)
1218 return;
1219 stl_startrxtx(portp, -1, 1);
1220}
1221
1222/*****************************************************************************/
1223
606d099c 1224static void stl_settermios(struct tty_struct *tty, struct ktermios *old)
1da177e4 1225{
ca7ed0f2 1226 struct stlport *portp;
606d099c 1227 struct ktermios *tiosp;
1da177e4 1228
a0564e14 1229 pr_debug("stl_settermios(tty=%p,old=%p)\n", tty, old);
1da177e4 1230
1da177e4 1231 portp = tty->driver_data;
615e4a71 1232 if (portp == NULL)
1da177e4
LT		 1233 return;
1234
1235 tiosp = tty->termios;
1236 if ((tiosp->c_cflag == old->c_cflag) &&
1237 (tiosp->c_iflag == old->c_iflag))
1238 return;
1239
1240 stl_setport(portp, tiosp);
1241 stl_setsignals(portp, ((tiosp->c_cflag & (CBAUD & ~CBAUDEX)) ? 1 : 0),
1242 -1);
1243 if ((old->c_cflag & CRTSCTS) && ((tiosp->c_cflag & CRTSCTS) == 0)) {
1244 tty->hw_stopped = 0;
1245 stl_start(tty);
1246 }
1247 if (((old->c_cflag & CLOCAL) == 0) && (tiosp->c_cflag & CLOCAL))
f8ae4764 1248 wake_up_interruptible(&portp->port.open_wait);
1da177e4
LT		 1249}
1250
1251/*****************************************************************************/
1252
1253/*
1254 * Attempt to flow control who ever is sending us data. Based on termios
1255 * settings use software or/and hardware flow control.
1256 */
1257
1258static void stl_throttle(struct tty_struct *tty)
1259{
ca7ed0f2 1260 struct stlport *portp;
1da177e4 1261
a0564e14 1262 pr_debug("stl_throttle(tty=%p)\n", tty);
1da177e4 1263
1da177e4 1264 portp = tty->driver_data;
615e4a71 1265 if (portp == NULL)
1da177e4
LT		 1266 return;
1267 stl_flowctrl(portp, 0);
1268}
1269
1270/*****************************************************************************/
1271
1272/*
1273 * Unflow control the device sending us data...
1274 */
1275
1276static void stl_unthrottle(struct tty_struct *tty)
1277{
ca7ed0f2 1278 struct stlport *portp;
1da177e4 1279
a0564e14 1280 pr_debug("stl_unthrottle(tty=%p)\n", tty);
1da177e4 1281
1da177e4 1282 portp = tty->driver_data;
615e4a71 1283 if (portp == NULL)
1da177e4
LT		 1284 return;
1285 stl_flowctrl(portp, 1);
1286}
1287
1288/*****************************************************************************/
1289
1290/*
1291 * Stop the transmitter. Basically to do this we will just turn TX
1292 * interrupts off.
1293 */
1294
1295static void stl_stop(struct tty_struct *tty)
1296{
ca7ed0f2 1297 struct stlport *portp;
1da177e4 1298
a0564e14 1299 pr_debug("stl_stop(tty=%p)\n", tty);
1da177e4 1300
1da177e4 1301 portp = tty->driver_data;
615e4a71 1302 if (portp == NULL)
1da177e4
LT		 1303 return;
1304 stl_startrxtx(portp, -1, 0);
1305}
1306
1307/*****************************************************************************/
1308
1da177e4
LT		 1309/*
1310 * Hangup this port. This is pretty much like closing the port, only
1311 * a little more brutal. No waiting for data to drain. Shutdown the
1312 * port and maybe drop signals.
1313 */
1314
1315static void stl_hangup(struct tty_struct *tty)
1316{
ca7ed0f2 1317 struct stlport *portp;
4350f3ff
AC		 1318 struct tty_port *port;
1319 unsigned long flags;
1da177e4 1320
a0564e14 1321 pr_debug("stl_hangup(tty=%p)\n", tty);
1da177e4 1322
1da177e4 1323 portp = tty->driver_data;
615e4a71 1324 if (portp == NULL)
1da177e4 1325 return;
4350f3ff
AC		 1326 port = &portp->port;
1327
1328 spin_lock_irqsave(&port->lock, flags);
1329 port->flags &= ~ASYNC_INITIALIZED;
1330 spin_unlock_irqrestore(&port->lock, flags);
1da177e4 1331
1da177e4
LT		 1332 stl_disableintrs(portp);
1333 if (tty->termios->c_cflag & HUPCL)
1334 stl_setsignals(portp, 0, 0);
1335 stl_enablerxtx(portp, 0, 0);
1336 stl_flushbuffer(tty);
1337 portp->istate = 0;
1338 set_bit(TTY_IO_ERROR, &tty->flags);
615e4a71 1339 if (portp->tx.buf != NULL) {
1da177e4 1340 kfree(portp->tx.buf);
615e4a71
JS		 1341 portp->tx.buf = NULL;
1342 portp->tx.head = NULL;
1343 portp->tx.tail = NULL;
1da177e4 1344 }
4350f3ff 1345 tty_port_hangup(port);
1da177e4
LT		 1346}
1347
1348/*****************************************************************************/
1349
4a561222 1350static int stl_breakctl(struct tty_struct *tty, int state)
1da177e4 1351{
ca7ed0f2 1352 struct stlport *portp;
1da177e4 1353
a0564e14 1354 pr_debug("stl_breakctl(tty=%p,state=%d)\n", tty, state);
1da177e4 1355
1da177e4 1356 portp = tty->driver_data;
615e4a71 1357 if (portp == NULL)
4a561222 1358 return -EINVAL;
1da177e4
LT		 1359
1360 stl_sendbreak(portp, ((state == -1) ? 1 : 2));
4a561222 1361 return 0;
1da177e4
LT		 1362}
1363
1364/*****************************************************************************/
1365
1da177e4
LT		 1366static void stl_sendxchar(struct tty_struct *tty, char ch)
1367{
ca7ed0f2 1368 struct stlport *portp;
1da177e4 1369
a0564e14 1370 pr_debug("stl_sendxchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 1371
1da177e4 1372 portp = tty->driver_data;
615e4a71 1373 if (portp == NULL)
1da177e4
LT		 1374 return;
1375
1376 if (ch == STOP_CHAR(tty))
1377 stl_sendflow(portp, 0);
1378 else if (ch == START_CHAR(tty))
1379 stl_sendflow(portp, 1);
1380 else
1381 stl_putchar(tty, ch);
1382}
1383
8561c44c 1384static void stl_portinfo(struct seq_file *m, struct stlport *portp, int portnr)
1da177e4 1385{
8561c44c
AD		 1386 int sigs;
1387 char sep;
1da177e4 1388
8561c44c 1389 seq_printf(m, "%d: uart:%s tx:%d rx:%d",
1da177e4
LT		 1390 portnr, (portp->hwid == 1) ? "SC26198" : "CD1400",
1391 (int) portp->stats.txtotal, (int) portp->stats.rxtotal);
1392
1393 if (portp->stats.rxframing)
8561c44c 1394 seq_printf(m, " fe:%d", (int) portp->stats.rxframing);
1da177e4 1395 if (portp->stats.rxparity)
8561c44c 1396 seq_printf(m, " pe:%d", (int) portp->stats.rxparity);
1da177e4 1397 if (portp->stats.rxbreaks)
8561c44c 1398 seq_printf(m, " brk:%d", (int) portp->stats.rxbreaks);
1da177e4 1399 if (portp->stats.rxoverrun)
8561c44c 1400 seq_printf(m, " oe:%d", (int) portp->stats.rxoverrun);
1da177e4
LT		 1401
1402 sigs = stl_getsignals(portp);
8561c44c
AD		 1403 sep = ' ';
1404 if (sigs & TIOCM_RTS) {
1405 seq_printf(m, "%c%s", sep, "RTS");
1406 sep = '|';
1407 }
1408 if (sigs & TIOCM_CTS) {
1409 seq_printf(m, "%c%s", sep, "CTS");
1410 sep = '|';
1411 }
1412 if (sigs & TIOCM_DTR) {
1413 seq_printf(m, "%c%s", sep, "DTR");
1414 sep = '|';
1415 }
1416 if (sigs & TIOCM_CD) {
1417 seq_printf(m, "%c%s", sep, "DCD");
1418 sep = '|';
1419 }
1420 if (sigs & TIOCM_DSR) {
1421 seq_printf(m, "%c%s", sep, "DSR");
1422 sep = '|';
1423 }
1424 seq_putc(m, '\n');
1da177e4
LT		 1425}
1426
1427/*****************************************************************************/
1428
1429/*
1430 * Port info, read from the /proc file system.
1431 */
1432
8561c44c 1433static int stl_proc_show(struct seq_file *m, void *v)
1da177e4 1434{
ca7ed0f2
JS		 1435 struct stlbrd *brdp;
1436 struct stlpanel *panelp;
1437 struct stlport *portp;
6b2c9457 1438 unsigned int brdnr, panelnr, portnr;
8561c44c 1439 int totalport;
1da177e4 1440
1da177e4 1441 totalport = 0;
8561c44c
AD		 1442
1443 seq_printf(m, "%s: version %s\n", stl_drvtitle, stl_drvversion);
1da177e4
LT		 1444
1445/*
1446 * We scan through for each board, panel and port. The offset is
1447 * calculated on the fly, and irrelevant ports are skipped.
1448 */
c62429d9 1449 for (brdnr = 0; brdnr < stl_nrbrds; brdnr++) {
1da177e4 1450 brdp = stl_brds[brdnr];
615e4a71 1451 if (brdp == NULL)
1da177e4
LT		 1452 continue;
1453 if (brdp->state == 0)
1454 continue;
1455
1da177e4 1456 totalport = brdnr * STL_MAXPORTS;
c62429d9 1457 for (panelnr = 0; panelnr < brdp->nrpanels; panelnr++) {
1da177e4 1458 panelp = brdp->panels[panelnr];
615e4a71 1459 if (panelp == NULL)
1da177e4
LT		 1460 continue;
1461
c62429d9 1462 for (portnr = 0; portnr < panelp->nrports; portnr++,
1da177e4
LT		 1463 totalport++) {
1464 portp = panelp->ports[portnr];
615e4a71 1465 if (portp == NULL)
1da177e4 1466 continue;
8561c44c 1467 stl_portinfo(m, portp, totalport);
1da177e4
LT		 1468 }
1469 }
1470 }
8561c44c
AD		 1471 return 0;
1472}
1da177e4 1473
8561c44c
AD		 1474static int stl_proc_open(struct inode *inode, struct file *file)
1475{
1476 return single_open(file, stl_proc_show, NULL);
1da177e4
LT		 1477}
1478
8561c44c
AD		 1479static const struct file_operations stl_proc_fops = {
1480 .owner = THIS_MODULE,
1481 .open = stl_proc_open,
1482 .read = seq_read,
1483 .llseek = seq_lseek,
1484 .release = single_release,
1485};
1486
1da177e4
LT		 1487/*****************************************************************************/
1488
1489/*
1490 * All board interrupts are vectored through here first. This code then
1491 * calls off to the approrpriate board interrupt handlers.
1492 */
1493
7d12e780 1494static irqreturn_t stl_intr(int irq, void *dev_id)
1da177e4 1495{
ca7ed0f2 1496 struct stlbrd *brdp = dev_id;
1da177e4 1497
a6f97b29 1498 pr_debug("stl_intr(brdp=%p,irq=%d)\n", brdp, brdp->irq);
1da177e4
LT		 1499
1500 return IRQ_RETVAL((* brdp->isr)(brdp));
1501}
1502
1503/*****************************************************************************/
1504
1505/*
1506 * Interrupt service routine for EasyIO board types.
1507 */
1508
ca7ed0f2 1509static int stl_eiointr(struct stlbrd *brdp)
1da177e4 1510{
ca7ed0f2 1511 struct stlpanel *panelp;
1da177e4
LT		 1512 unsigned int iobase;
1513 int handled = 0;
1514
b65b5b59 1515 spin_lock(&brd_lock);
1da177e4
LT		 1516 panelp = brdp->panels[0];
1517 iobase = panelp->iobase;
1518 while (inb(brdp->iostatus) & EIO_INTRPEND) {
1519 handled = 1;
1520 (* panelp->isr)(panelp, iobase);
1521 }
b65b5b59 1522 spin_unlock(&brd_lock);
1da177e4
LT		 1523 return handled;
1524}
1525
1526/*****************************************************************************/
1527
1528/*
1529 * Interrupt service routine for ECH-AT board types.
1530 */
1531
ca7ed0f2 1532static int stl_echatintr(struct stlbrd *brdp)
1da177e4 1533{
ca7ed0f2 1534 struct stlpanel *panelp;
6b2c9457 1535 unsigned int ioaddr, bnknr;
1da177e4
LT		 1536 int handled = 0;
1537
1538 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
1539
1540 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1541 handled = 1;
c62429d9 1542 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1543 ioaddr = brdp->bnkstataddr[bnknr];
1544 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1545 panelp = brdp->bnk2panel[bnknr];
1546 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1547 }
1548 }
1549 }
1550
1551 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
1552
1553 return handled;
1554}
1555
1556/*****************************************************************************/
1557
1558/*
1559 * Interrupt service routine for ECH-MCA board types.
1560 */
1561
ca7ed0f2 1562static int stl_echmcaintr(struct stlbrd *brdp)
1da177e4 1563{
ca7ed0f2 1564 struct stlpanel *panelp;
6b2c9457 1565 unsigned int ioaddr, bnknr;
1da177e4
LT		 1566 int handled = 0;
1567
1568 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1569 handled = 1;
c62429d9 1570 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1571 ioaddr = brdp->bnkstataddr[bnknr];
1572 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1573 panelp = brdp->bnk2panel[bnknr];
1574 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1575 }
1576 }
1577 }
1578 return handled;
1579}
1580
1581/*****************************************************************************/
1582
1583/*
1584 * Interrupt service routine for ECH-PCI board types.
1585 */
1586
ca7ed0f2 1587static int stl_echpciintr(struct stlbrd *brdp)
1da177e4 1588{
ca7ed0f2 1589 struct stlpanel *panelp;
6b2c9457 1590 unsigned int ioaddr, bnknr, recheck;
1da177e4
LT		 1591 int handled = 0;
1592
1593 while (1) {
1594 recheck = 0;
c62429d9 1595 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1596 outb(brdp->bnkpageaddr[bnknr], brdp->ioctrl);
1597 ioaddr = brdp->bnkstataddr[bnknr];
1598 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1599 panelp = brdp->bnk2panel[bnknr];
1600 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1601 recheck++;
1602 handled = 1;
1603 }
1604 }
1605 if (! recheck)
1606 break;
1607 }
1608 return handled;
1609}
1610
1611/*****************************************************************************/
1612
1613/*
1614 * Interrupt service routine for ECH-8/64-PCI board types.
1615 */
1616
ca7ed0f2 1617static int stl_echpci64intr(struct stlbrd *brdp)
1da177e4 1618{
ca7ed0f2 1619 struct stlpanel *panelp;
6b2c9457 1620 unsigned int ioaddr, bnknr;
1da177e4
LT		 1621 int handled = 0;
1622
1623 while (inb(brdp->ioctrl) & 0x1) {
1624 handled = 1;
c62429d9 1625 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1626 ioaddr = brdp->bnkstataddr[bnknr];
1627 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1628 panelp = brdp->bnk2panel[bnknr];
1629 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1630 }
1631 }
1632 }
1633
1634 return handled;
1635}
1636
1637/*****************************************************************************/
1638
1da177e4
LT		 1639/*
1640 * Initialize all the ports on a panel.
1641 */
1642
705c1862 1643static int __devinit stl_initports(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4 1644{
6b2c9457
JS		 1645 struct stlport *portp;
1646 unsigned int i;
1647 int chipmask;
1da177e4 1648
a0564e14 1649 pr_debug("stl_initports(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 1650
1651 chipmask = stl_panelinit(brdp, panelp);
1652
1653/*
1654 * All UART's are initialized (if found!). Now go through and setup
1655 * each ports data structures.
1656 */
c62429d9 1657 for (i = 0; i < panelp->nrports; i++) {
ca7ed0f2 1658 portp = kzalloc(sizeof(struct stlport), GFP_KERNEL);
b0b4ed72 1659 if (!portp) {
1da177e4 1660 printk("STALLION: failed to allocate memory "
ca7ed0f2 1661 "(size=%Zd)\n", sizeof(struct stlport));
1da177e4
LT		 1662 break;
1663 }
d18a750f 1664 tty_port_init(&portp->port);
31f35939 1665 portp->port.ops = &stl_port_ops;
1da177e4
LT		 1666 portp->magic = STL_PORTMAGIC;
1667 portp->portnr = i;
1668 portp->brdnr = panelp->brdnr;
1669 portp->panelnr = panelp->panelnr;
1670 portp->uartp = panelp->uartp;
1671 portp->clk = brdp->clk;
1672 portp->baud_base = STL_BAUDBASE;
1673 portp->close_delay = STL_CLOSEDELAY;
1674 portp->closing_wait = 30 * HZ;
f8ae4764
AC		 1675 init_waitqueue_head(&portp->port.open_wait);
1676 init_waitqueue_head(&portp->port.close_wait);
1da177e4
LT		 1677 portp->stats.brd = portp->brdnr;
1678 portp->stats.panel = portp->panelnr;
1679 portp->stats.port = portp->portnr;
1680 panelp->ports[i] = portp;
1681 stl_portinit(brdp, panelp, portp);
1682 }
1683
c62429d9 1684 return 0;
1da177e4
LT		 1685}
1686
3b85b341
JS		 1687static void stl_cleanup_panels(struct stlbrd *brdp)
1688{
1689 struct stlpanel *panelp;
1690 struct stlport *portp;
1691 unsigned int j, k;
d18a750f 1692 struct tty_struct *tty;
3b85b341
JS		 1693
1694 for (j = 0; j < STL_MAXPANELS; j++) {
1695 panelp = brdp->panels[j];
1696 if (panelp == NULL)
1697 continue;
1698 for (k = 0; k < STL_PORTSPERPANEL; k++) {
1699 portp = panelp->ports[k];
1700 if (portp == NULL)
1701 continue;
d18a750f
AC		 1702 tty = tty_port_tty_get(&portp->port);
1703 if (tty != NULL) {
1704 stl_hangup(tty);
1705 tty_kref_put(tty);
1706 }
3b85b341
JS		 1707 kfree(portp->tx.buf);
1708 kfree(portp);
1709 }
1710 kfree(panelp);
1711 }
1712}
1713
1da177e4
LT		 1714/*****************************************************************************/
1715
1716/*
1717 * Try to find and initialize an EasyIO board.
1718 */
1719
705c1862 1720static int __devinit stl_initeio(struct stlbrd *brdp)
1da177e4 1721{
ca7ed0f2 1722 struct stlpanel *panelp;
1da177e4
LT		 1723 unsigned int status;
1724 char *name;
3b85b341 1725 int retval;
1da177e4 1726
a0564e14 1727 pr_debug("stl_initeio(brdp=%p)\n", brdp);
1da177e4
LT		 1728
1729 brdp->ioctrl = brdp->ioaddr1 + 1;
1730 brdp->iostatus = brdp->ioaddr1 + 2;
1731
1732 status = inb(brdp->iostatus);
1733 if ((status & EIO_IDBITMASK) == EIO_MK3)
1734 brdp->ioctrl++;
1735
1736/*
1737 * Handle board specific stuff now. The real difference is PCI
1738 * or not PCI.
1739 */
1740 if (brdp->brdtype == BRD_EASYIOPCI) {
1741 brdp->iosize1 = 0x80;
1742 brdp->iosize2 = 0x80;
1743 name = "serial(EIO-PCI)";
1744 outb(0x41, (brdp->ioaddr2 + 0x4c));
1745 } else {
1746 brdp->iosize1 = 8;
1747 name = "serial(EIO)";
1748 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1749 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1750 printk("STALLION: invalid irq=%d for brd=%d\n",
1751 brdp->irq, brdp->brdnr);
3b85b341
JS		 1752 retval = -EINVAL;
1753 goto err;
1da177e4
LT		 1754 }
1755 outb((stl_vecmap[brdp->irq] | EIO_0WS |
1756 ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)),
1757 brdp->ioctrl);
1758 }
1759
3b85b341 1760 retval = -EBUSY;
1da177e4
LT		 1761 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
1762 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
1763 "%x conflicts with another device\n", brdp->brdnr,
1764 brdp->ioaddr1);
3b85b341 1765 goto err;
1da177e4
LT		 1766 }
1767
1768 if (brdp->iosize2 > 0)
1769 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
1770 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
1771 "address %x conflicts with another device\n",
1772 brdp->brdnr, brdp->ioaddr2);
1773 printk(KERN_WARNING "STALLION: Warning, also "
1774 "releasing board %d I/O address %x \n",
1775 brdp->brdnr, brdp->ioaddr1);
3b85b341 1776 goto err_rel1;
1da177e4
LT		 1777 }
1778
1779/*
1780 * Everything looks OK, so let's go ahead and probe for the hardware.
1781 */
1782 brdp->clk = CD1400_CLK;
1783 brdp->isr = stl_eiointr;
1784
3b85b341 1785 retval = -ENODEV;
1da177e4
LT		 1786 switch (status & EIO_IDBITMASK) {
1787 case EIO_8PORTM:
1788 brdp->clk = CD1400_CLK8M;
1789 /* fall thru */
1790 case EIO_8PORTRS:
1791 case EIO_8PORTDI:
1792 brdp->nrports = 8;
1793 break;
1794 case EIO_4PORTRS:
1795 brdp->nrports = 4;
1796 break;
1797 case EIO_MK3:
1798 switch (status & EIO_BRDMASK) {
1799 case ID_BRD4:
1800 brdp->nrports = 4;
1801 break;
1802 case ID_BRD8:
1803 brdp->nrports = 8;
1804 break;
1805 case ID_BRD16:
1806 brdp->nrports = 16;
1807 break;
1808 default:
3b85b341 1809 goto err_rel2;
1da177e4
LT		 1810 }
1811 break;
1812 default:
3b85b341 1813 goto err_rel2;
1da177e4
LT		 1814 }
1815
1816/*
1817 * We have verified that the board is actually present, so now we
1818 * can complete the setup.
1819 */
1820
ca7ed0f2 1821 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 1822 if (!panelp) {
1da177e4 1823 printk(KERN_WARNING "STALLION: failed to allocate memory "
ca7ed0f2 1824 "(size=%Zd)\n", sizeof(struct stlpanel));
3b85b341
JS		 1825 retval = -ENOMEM;
1826 goto err_rel2;
1da177e4 1827 }
1da177e4
LT		 1828
1829 panelp->magic = STL_PANELMAGIC;
1830 panelp->brdnr = brdp->brdnr;
1831 panelp->panelnr = 0;
1832 panelp->nrports = brdp->nrports;
1833 panelp->iobase = brdp->ioaddr1;
1834 panelp->hwid = status;
1835 if ((status & EIO_IDBITMASK) == EIO_MK3) {
615e4a71 1836 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 1837 panelp->isr = stl_sc26198intr;
1838 } else {
615e4a71 1839 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 1840 panelp->isr = stl_cd1400eiointr;
1841 }
1842
1843 brdp->panels[0] = panelp;
1844 brdp->nrpanels = 1;
1845 brdp->state |= BRD_FOUND;
1846 brdp->hwid = status;
0f2ed4c6 1847 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 1848 printk("STALLION: failed to register interrupt "
1849 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 1850 retval = -ENODEV;
1851 goto err_fr;
1da177e4 1852 }
3b85b341
JS		 1853
1854 return 0;
1855err_fr:
1856 stl_cleanup_panels(brdp);
1857err_rel2:
1858 if (brdp->iosize2 > 0)
1859 release_region(brdp->ioaddr2, brdp->iosize2);
1860err_rel1:
1861 release_region(brdp->ioaddr1, brdp->iosize1);
1862err:
1863 return retval;
1da177e4
LT		 1864}
1865
1866/*****************************************************************************/
1867
1868/*
1869 * Try to find an ECH board and initialize it. This code is capable of
1870 * dealing with all types of ECH board.
1871 */
1872
705c1862 1873static int __devinit stl_initech(struct stlbrd *brdp)
1da177e4 1874{
ca7ed0f2 1875 struct stlpanel *panelp;
6b2c9457
JS		 1876 unsigned int status, nxtid, ioaddr, conflict, panelnr, banknr, i;
1877 int retval;
1da177e4
LT		 1878 char *name;
1879
a0564e14 1880 pr_debug("stl_initech(brdp=%p)\n", brdp);
1da177e4
LT		 1881
1882 status = 0;
1883 conflict = 0;
1884
1885/*
1886 * Set up the initial board register contents for boards. This varies a
1887 * bit between the different board types. So we need to handle each
1888 * separately. Also do a check that the supplied IRQ is good.
1889 */
1890 switch (brdp->brdtype) {
1891
1892 case BRD_ECH:
1893 brdp->isr = stl_echatintr;
1894 brdp->ioctrl = brdp->ioaddr1 + 1;
1895 brdp->iostatus = brdp->ioaddr1 + 1;
1896 status = inb(brdp->iostatus);
3b85b341
JS		 1897 if ((status & ECH_IDBITMASK) != ECH_ID) {
1898 retval = -ENODEV;
1899 goto err;
1900 }
1da177e4
LT		 1901 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1902 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1903 printk("STALLION: invalid irq=%d for brd=%d\n",
1904 brdp->irq, brdp->brdnr);
3b85b341
JS		 1905 retval = -EINVAL;
1906 goto err;
1da177e4
LT		 1907 }
1908 status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1);
1909 status |= (stl_vecmap[brdp->irq] << 1);
1910 outb((status | ECH_BRDRESET), brdp->ioaddr1);
1911 brdp->ioctrlval = ECH_INTENABLE |
1912 ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE);
c62429d9 1913 for (i = 0; i < 10; i++)
1da177e4
LT		 1914 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
1915 brdp->iosize1 = 2;
1916 brdp->iosize2 = 32;
1917 name = "serial(EC8/32)";
1918 outb(status, brdp->ioaddr1);
1919 break;
1920
1921 case BRD_ECHMC:
1922 brdp->isr = stl_echmcaintr;
1923 brdp->ioctrl = brdp->ioaddr1 + 0x20;
1924 brdp->iostatus = brdp->ioctrl;
1925 status = inb(brdp->iostatus);
3b85b341
JS		 1926 if ((status & ECH_IDBITMASK) != ECH_ID) {
1927 retval = -ENODEV;
1928 goto err;
1929 }
1da177e4
LT		 1930 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1931 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1932 printk("STALLION: invalid irq=%d for brd=%d\n",
1933 brdp->irq, brdp->brdnr);
3b85b341
JS		 1934 retval = -EINVAL;
1935 goto err;
1da177e4
LT		 1936 }
1937 outb(ECHMC_BRDRESET, brdp->ioctrl);
1938 outb(ECHMC_INTENABLE, brdp->ioctrl);
1939 brdp->iosize1 = 64;
1940 name = "serial(EC8/32-MC)";
1941 break;
1942
1943 case BRD_ECHPCI:
1944 brdp->isr = stl_echpciintr;
1945 brdp->ioctrl = brdp->ioaddr1 + 2;
1946 brdp->iosize1 = 4;
1947 brdp->iosize2 = 8;
1948 name = "serial(EC8/32-PCI)";
1949 break;
1950
1951 case BRD_ECH64PCI:
1952 brdp->isr = stl_echpci64intr;
1953 brdp->ioctrl = brdp->ioaddr2 + 0x40;
1954 outb(0x43, (brdp->ioaddr1 + 0x4c));
1955 brdp->iosize1 = 0x80;
1956 brdp->iosize2 = 0x80;
1957 name = "serial(EC8/64-PCI)";
1958 break;
1959
1960 default:
1961 printk("STALLION: unknown board type=%d\n", brdp->brdtype);
3b85b341
JS		 1962 retval = -EINVAL;
1963 goto err;
1da177e4
LT		 1964 }
1965
1966/*
1967 * Check boards for possible IO address conflicts and return fail status
1968 * if an IO conflict found.
1969 */
3b85b341 1970 retval = -EBUSY;
1da177e4
LT		 1971 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
1972 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
1973 "%x conflicts with another device\n", brdp->brdnr,
1974 brdp->ioaddr1);
3b85b341 1975 goto err;
1da177e4
LT		 1976 }
1977
1978 if (brdp->iosize2 > 0)
1979 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
1980 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
1981 "address %x conflicts with another device\n",
1982 brdp->brdnr, brdp->ioaddr2);
1983 printk(KERN_WARNING "STALLION: Warning, also "
1984 "releasing board %d I/O address %x \n",
1985 brdp->brdnr, brdp->ioaddr1);
3b85b341 1986 goto err_rel1;
1da177e4
LT		 1987 }
1988
1989/*
1990 * Scan through the secondary io address space looking for panels.
1991 * As we find'em allocate and initialize panel structures for each.
1992 */
1993 brdp->clk = CD1400_CLK;
1994 brdp->hwid = status;
1995
1996 ioaddr = brdp->ioaddr2;
1997 banknr = 0;
1998 panelnr = 0;
1999 nxtid = 0;
2000
c62429d9 2001 for (i = 0; i < STL_MAXPANELS; i++) {
1da177e4
LT		 2002 if (brdp->brdtype == BRD_ECHPCI) {
2003 outb(nxtid, brdp->ioctrl);
2004 ioaddr = brdp->ioaddr2;
2005 }
2006 status = inb(ioaddr + ECH_PNLSTATUS);
2007 if ((status & ECH_PNLIDMASK) != nxtid)
64834b22 2008 break;
ca7ed0f2 2009 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 2010 if (!panelp) {
1da177e4 2011 printk("STALLION: failed to allocate memory "
ca7ed0f2 2012 "(size=%Zd)\n", sizeof(struct stlpanel));
49277b1c 2013 retval = -ENOMEM;
3b85b341 2014 goto err_fr;
1da177e4 2015 }
1da177e4
LT		 2016 panelp->magic = STL_PANELMAGIC;
2017 panelp->brdnr = brdp->brdnr;
2018 panelp->panelnr = panelnr;
2019 panelp->iobase = ioaddr;
2020 panelp->pagenr = nxtid;
2021 panelp->hwid = status;
2022 brdp->bnk2panel[banknr] = panelp;
2023 brdp->bnkpageaddr[banknr] = nxtid;
2024 brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS;
2025
2026 if (status & ECH_PNLXPID) {
615e4a71 2027 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 2028 panelp->isr = stl_sc26198intr;
2029 if (status & ECH_PNL16PORT) {
2030 panelp->nrports = 16;
2031 brdp->bnk2panel[banknr] = panelp;
2032 brdp->bnkpageaddr[banknr] = nxtid;
2033 brdp->bnkstataddr[banknr++] = ioaddr + 4 +
2034 ECH_PNLSTATUS;
c62429d9 2035 } else
1da177e4 2036 panelp->nrports = 8;
1da177e4 2037 } else {
615e4a71 2038 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 2039 panelp->isr = stl_cd1400echintr;
2040 if (status & ECH_PNL16PORT) {
2041 panelp->nrports = 16;
2042 panelp->ackmask = 0x80;
2043 if (brdp->brdtype != BRD_ECHPCI)
2044 ioaddr += EREG_BANKSIZE;
2045 brdp->bnk2panel[banknr] = panelp;
2046 brdp->bnkpageaddr[banknr] = ++nxtid;
2047 brdp->bnkstataddr[banknr++] = ioaddr +
2048 ECH_PNLSTATUS;
2049 } else {
2050 panelp->nrports = 8;
2051 panelp->ackmask = 0xc0;
2052 }
2053 }
2054
2055 nxtid++;
2056 ioaddr += EREG_BANKSIZE;
2057 brdp->nrports += panelp->nrports;
2058 brdp->panels[panelnr++] = panelp;
2059 if ((brdp->brdtype != BRD_ECHPCI) &&
49277b1c
JS		 2060 (ioaddr >= (brdp->ioaddr2 + brdp->iosize2))) {
2061 retval = -EINVAL;
3b85b341 2062 goto err_fr;
49277b1c 2063 }
1da177e4
LT		 2064 }
2065
2066 brdp->nrpanels = panelnr;
2067 brdp->nrbnks = banknr;
2068 if (brdp->brdtype == BRD_ECH)
2069 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
2070
2071 brdp->state |= BRD_FOUND;
0f2ed4c6 2072 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 2073 printk("STALLION: failed to register interrupt "
2074 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 2075 retval = -ENODEV;
2076 goto err_fr;
1da177e4
LT		 2077 }
2078
3b85b341
JS		 2079 return 0;
2080err_fr:
2081 stl_cleanup_panels(brdp);
2082 if (brdp->iosize2 > 0)
2083 release_region(brdp->ioaddr2, brdp->iosize2);
2084err_rel1:
2085 release_region(brdp->ioaddr1, brdp->iosize1);
2086err:
2087 return retval;
1da177e4
LT		 2088}
2089
2090/*****************************************************************************/
2091
2092/*
2093 * Initialize and configure the specified board.
2094 * Scan through all the boards in the configuration and see what we
2095 * can find. Handle EIO and the ECH boards a little differently here
2096 * since the initial search and setup is very different.
2097 */
2098
705c1862 2099static int __devinit stl_brdinit(struct stlbrd *brdp)
1da177e4 2100{
3b85b341 2101 int i, retval;
1da177e4 2102
a0564e14 2103 pr_debug("stl_brdinit(brdp=%p)\n", brdp);
1da177e4
LT		 2104
2105 switch (brdp->brdtype) {
2106 case BRD_EASYIO:
2107 case BRD_EASYIOPCI:
3b85b341
JS		 2108 retval = stl_initeio(brdp);
2109 if (retval)
2110 goto err;
1da177e4
LT		 2111 break;
2112 case BRD_ECH:
2113 case BRD_ECHMC:
2114 case BRD_ECHPCI:
2115 case BRD_ECH64PCI:
3b85b341
JS		 2116 retval = stl_initech(brdp);
2117 if (retval)
2118 goto err;
1da177e4
LT		 2119 break;
2120 default:
2121 printk("STALLION: board=%d is unknown board type=%d\n",
2122 brdp->brdnr, brdp->brdtype);
3b85b341
JS		 2123 retval = -ENODEV;
2124 goto err;
1da177e4
LT		 2125 }
2126
1da177e4
LT		 2127 if ((brdp->state & BRD_FOUND) == 0) {
2128 printk("STALLION: %s board not found, board=%d io=%x irq=%d\n",
2129 stl_brdnames[brdp->brdtype], brdp->brdnr,
2130 brdp->ioaddr1, brdp->irq);
3b85b341 2131 goto err_free;
1da177e4
LT		 2132 }
2133
c62429d9 2134 for (i = 0; i < STL_MAXPANELS; i++)
615e4a71 2135 if (brdp->panels[i] != NULL)
1da177e4
LT		 2136 stl_initports(brdp, brdp->panels[i]);
2137
2138 printk("STALLION: %s found, board=%d io=%x irq=%d "
2139 "nrpanels=%d nrports=%d\n", stl_brdnames[brdp->brdtype],
2140 brdp->brdnr, brdp->ioaddr1, brdp->irq, brdp->nrpanels,
2141 brdp->nrports);
3b85b341
JS		 2142
2143 return 0;
2144err_free:
2145 free_irq(brdp->irq, brdp);
2146
2147 stl_cleanup_panels(brdp);
2148
2149 release_region(brdp->ioaddr1, brdp->iosize1);
2150 if (brdp->iosize2 > 0)
2151 release_region(brdp->ioaddr2, brdp->iosize2);
3b85b341
JS		 2152err:
2153 return retval;
1da177e4
LT		 2154}
2155
2156/*****************************************************************************/
2157
2158/*
2159 * Find the next available board number that is free.
2160 */
2161
705c1862 2162static int __devinit stl_getbrdnr(void)
1da177e4 2163{
6b2c9457 2164 unsigned int i;
1da177e4 2165
c62429d9 2166 for (i = 0; i < STL_MAXBRDS; i++)
615e4a71 2167 if (stl_brds[i] == NULL) {
1da177e4
LT		 2168 if (i >= stl_nrbrds)
2169 stl_nrbrds = i + 1;
c62429d9 2170 return i;
1da177e4 2171 }
c62429d9
JS		 2172
2173 return -1;
1da177e4
LT		 2174}
2175
b1b84fe0 2176/*****************************************************************************/
1da177e4
LT		 2177/*
2178 * We have a Stallion board. Allocate a board structure and
2179 * initialize it. Read its IO and IRQ resources from PCI
2180 * configuration space.
2181 */
2182
b1b84fe0
JS		 2183static int __devinit stl_pciprobe(struct pci_dev *pdev,
2184 const struct pci_device_id *ent)
1da177e4 2185{
b1b84fe0 2186 struct stlbrd *brdp;
aeaccfe4 2187 unsigned int i, brdtype = ent->driver_data;
6b2c9457 2188 int brdnr, retval = -ENODEV;
1da177e4 2189
b1b84fe0 2190 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE)
3b85b341 2191 goto err;
b1b84fe0 2192
3b85b341
JS		 2193 retval = pci_enable_device(pdev);
2194 if (retval)
2195 goto err;
2196 brdp = stl_allocbrd();
2197 if (brdp == NULL) {
2198 retval = -ENOMEM;
2199 goto err;
2200 }
79cfe7ab 2201 mutex_lock(&stl_brdslock);
6b2c9457
JS		 2202 brdnr = stl_getbrdnr();
2203 if (brdnr < 0) {
fefaf9a7 2204 dev_err(&pdev->dev, "too many boards found, "
1da177e4 2205 "maximum supported %d\n", STL_MAXBRDS);
79cfe7ab 2206 mutex_unlock(&stl_brdslock);
49277b1c 2207 retval = -ENODEV;
3b85b341 2208 goto err_fr;
1da177e4 2209 }
6b2c9457 2210 brdp->brdnr = (unsigned int)brdnr;
79cfe7ab
JS		 2211 stl_brds[brdp->brdnr] = brdp;
2212 mutex_unlock(&stl_brdslock);
2213
1da177e4 2214 brdp->brdtype = brdtype;
fc06b5cf 2215 brdp->state |= STL_PROBED;
1da177e4 2216
1da177e4
LT		 2217/*
2218 * We have all resources from the board, so let's setup the actual
2219 * board structure now.
2220 */
2221 switch (brdtype) {
2222 case BRD_ECHPCI:
b1b84fe0
JS		 2223 brdp->ioaddr2 = pci_resource_start(pdev, 0);
2224 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2225 break;
2226 case BRD_ECH64PCI:
b1b84fe0
JS		 2227 brdp->ioaddr2 = pci_resource_start(pdev, 2);
2228 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2229 break;
2230 case BRD_EASYIOPCI:
b1b84fe0
JS		 2231 brdp->ioaddr1 = pci_resource_start(pdev, 2);
2232 brdp->ioaddr2 = pci_resource_start(pdev, 1);
1da177e4
LT		 2233 break;
2234 default:
fefaf9a7 2235 dev_err(&pdev->dev, "unknown PCI board type=%u\n", brdtype);
1da177e4
LT		 2236 break;
2237 }
2238
b1b84fe0 2239 brdp->irq = pdev->irq;
3b85b341
JS		 2240 retval = stl_brdinit(brdp);
2241 if (retval)
79cfe7ab 2242 goto err_null;
1da177e4 2243
b1b84fe0
JS		 2244 pci_set_drvdata(pdev, brdp);
2245
aeaccfe4
JS		 2246 for (i = 0; i < brdp->nrports; i++)
2247 tty_register_device(stl_serial,
2248 brdp->brdnr * STL_MAXPORTS + i, &pdev->dev);
2249
3b85b341 2250 return 0;
79cfe7ab
JS		 2251err_null:
2252 stl_brds[brdp->brdnr] = NULL;
3b85b341
JS		 2253err_fr:
2254 kfree(brdp);
2255err:
2256 return retval;
1da177e4
LT		 2257}
2258
b1b84fe0 2259static void __devexit stl_pciremove(struct pci_dev *pdev)
1da177e4 2260{
b1b84fe0 2261 struct stlbrd *brdp = pci_get_drvdata(pdev);
aeaccfe4 2262 unsigned int i;
1da177e4 2263
b1b84fe0 2264 free_irq(brdp->irq, brdp);
1da177e4 2265
b1b84fe0 2266 stl_cleanup_panels(brdp);
1da177e4 2267
b1b84fe0
JS		 2268 release_region(brdp->ioaddr1, brdp->iosize1);
2269 if (brdp->iosize2 > 0)
2270 release_region(brdp->ioaddr2, brdp->iosize2);
1da177e4 2271
aeaccfe4
JS		 2272 for (i = 0; i < brdp->nrports; i++)
2273 tty_unregister_device(stl_serial,
2274 brdp->brdnr * STL_MAXPORTS + i);
2275
b1b84fe0
JS		 2276 stl_brds[brdp->brdnr] = NULL;
2277 kfree(brdp);
1da177e4
LT		 2278}
2279
b1b84fe0
JS		 2280static struct pci_driver stl_pcidriver = {
2281 .name = "stallion",
2282 .id_table = stl_pcibrds,
2283 .probe = stl_pciprobe,
2284 .remove = __devexit_p(stl_pciremove)
2285};
1da177e4
LT		 2286
2287/*****************************************************************************/
2288
1da177e4
LT		 2289/*
2290 * Return the board stats structure to user app.
2291 */
2292
2293static int stl_getbrdstats(combrd_t __user *bp)
2294{
6b2c9457 2295 combrd_t stl_brdstats;
ca7ed0f2
JS		 2296 struct stlbrd *brdp;
2297 struct stlpanel *panelp;
6b2c9457 2298 unsigned int i;
1da177e4
LT		 2299
2300 if (copy_from_user(&stl_brdstats, bp, sizeof(combrd_t)))
2301 return -EFAULT;
2302 if (stl_brdstats.brd >= STL_MAXBRDS)
c62429d9 2303 return -ENODEV;
1da177e4 2304 brdp = stl_brds[stl_brdstats.brd];
615e4a71 2305 if (brdp == NULL)
c62429d9 2306 return -ENODEV;
1da177e4
LT		 2307
2308 memset(&stl_brdstats, 0, sizeof(combrd_t));
2309 stl_brdstats.brd = brdp->brdnr;
2310 stl_brdstats.type = brdp->brdtype;
2311 stl_brdstats.hwid = brdp->hwid;
2312 stl_brdstats.state = brdp->state;
2313 stl_brdstats.ioaddr = brdp->ioaddr1;
2314 stl_brdstats.ioaddr2 = brdp->ioaddr2;
2315 stl_brdstats.irq = brdp->irq;
2316 stl_brdstats.nrpanels = brdp->nrpanels;
2317 stl_brdstats.nrports = brdp->nrports;
c62429d9 2318 for (i = 0; i < brdp->nrpanels; i++) {
1da177e4
LT		 2319 panelp = brdp->panels[i];
2320 stl_brdstats.panels[i].panel = i;
2321 stl_brdstats.panels[i].hwid = panelp->hwid;
2322 stl_brdstats.panels[i].nrports = panelp->nrports;
2323 }
2324
2325 return copy_to_user(bp, &stl_brdstats, sizeof(combrd_t)) ? -EFAULT : 0;
2326}
2327
2328/*****************************************************************************/
2329
2330/*
2331 * Resolve the referenced port number into a port struct pointer.
2332 */
2333
ca7ed0f2 2334static struct stlport *stl_getport(int brdnr, int panelnr, int portnr)
1da177e4 2335{
ca7ed0f2
JS		 2336 struct stlbrd *brdp;
2337 struct stlpanel *panelp;
1da177e4 2338
c62429d9
JS		 2339 if (brdnr < 0 || brdnr >= STL_MAXBRDS)
2340 return NULL;
1da177e4 2341 brdp = stl_brds[brdnr];
615e4a71 2342 if (brdp == NULL)
c62429d9 2343 return NULL;
6b2c9457 2344 if (panelnr < 0 || (unsigned int)panelnr >= brdp->nrpanels)
c62429d9 2345 return NULL;
1da177e4 2346 panelp = brdp->panels[panelnr];
615e4a71 2347 if (panelp == NULL)
c62429d9 2348 return NULL;
6b2c9457 2349 if (portnr < 0 || (unsigned int)portnr >= panelp->nrports)
c62429d9
JS		 2350 return NULL;
2351 return panelp->ports[portnr];
1da177e4
LT		 2352}
2353
2354/*****************************************************************************/
2355
2356/*
2357 * Return the port stats structure to user app. A NULL port struct
2358 * pointer passed in means that we need to find out from the app
2359 * what port to get stats for (used through board control device).
2360 */
2361
d18a750f 2362static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp)
1da177e4 2363{
6b2c9457 2364 comstats_t stl_comstats;
1da177e4
LT		 2365 unsigned char *head, *tail;
2366 unsigned long flags;
2367
2368 if (!portp) {
2369 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2370 return -EFAULT;
2371 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2372 stl_comstats.port);
615e4a71 2373 if (portp == NULL)
c62429d9 2374 return -ENODEV;
1da177e4
LT		 2375 }
2376
2377 portp->stats.state = portp->istate;
f8ae4764 2378 portp->stats.flags = portp->port.flags;
1da177e4
LT		 2379 portp->stats.hwid = portp->hwid;
2380
2381 portp->stats.ttystate = 0;
2382 portp->stats.cflags = 0;
2383 portp->stats.iflags = 0;
2384 portp->stats.oflags = 0;
2385 portp->stats.lflags = 0;
2386 portp->stats.rxbuffered = 0;
2387
b65b5b59 2388 spin_lock_irqsave(&stallion_lock, flags);
d18a750f
AC		 2389 if (tty != NULL && portp->port.tty == tty) {
2390 portp->stats.ttystate = tty->flags;
2391 /* No longer available as a statistic */
2392 portp->stats.rxbuffered = 1; /*tty->flip.count; */
2393 if (tty->termios != NULL) {
2394 portp->stats.cflags = tty->termios->c_cflag;
2395 portp->stats.iflags = tty->termios->c_iflag;
2396 portp->stats.oflags = tty->termios->c_oflag;
2397 portp->stats.lflags = tty->termios->c_lflag;
1da177e4 2398 }
d18a750f 2399 }
b65b5b59 2400 spin_unlock_irqrestore(&stallion_lock, flags);
1da177e4
LT		 2401
2402 head = portp->tx.head;
2403 tail = portp->tx.tail;
c62429d9
JS		 2404 portp->stats.txbuffered = (head >= tail) ? (head - tail) :
2405 (STL_TXBUFSIZE - (tail - head));
1da177e4
LT		 2406
2407 portp->stats.signals = (unsigned long) stl_getsignals(portp);
2408
2409 return copy_to_user(cp, &portp->stats,
2410 sizeof(comstats_t)) ? -EFAULT : 0;
2411}
2412
2413/*****************************************************************************/
2414
2415/*
2416 * Clear the port stats structure. We also return it zeroed out...
2417 */
2418
ca7ed0f2 2419static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp)
1da177e4 2420{
6b2c9457
JS		 2421 comstats_t stl_comstats;
2422
1da177e4
LT		 2423 if (!portp) {
2424 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2425 return -EFAULT;
2426 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2427 stl_comstats.port);
615e4a71 2428 if (portp == NULL)
c62429d9 2429 return -ENODEV;
1da177e4
LT		 2430 }
2431
2432 memset(&portp->stats, 0, sizeof(comstats_t));
2433 portp->stats.brd = portp->brdnr;
2434 portp->stats.panel = portp->panelnr;
2435 portp->stats.port = portp->portnr;
2436 return copy_to_user(cp, &portp->stats,
2437 sizeof(comstats_t)) ? -EFAULT : 0;
2438}
2439
2440/*****************************************************************************/
2441
2442/*
2443 * Return the entire driver ports structure to a user app.
2444 */
2445
ca7ed0f2 2446static int stl_getportstruct(struct stlport __user *arg)
1da177e4 2447{
6b2c9457 2448 struct stlport stl_dummyport;
ca7ed0f2 2449 struct stlport *portp;
1da177e4 2450
ca7ed0f2 2451 if (copy_from_user(&stl_dummyport, arg, sizeof(struct stlport)))
1da177e4
LT		 2452 return -EFAULT;
2453 portp = stl_getport(stl_dummyport.brdnr, stl_dummyport.panelnr,
2454 stl_dummyport.portnr);
2455 if (!portp)
2456 return -ENODEV;
ca7ed0f2 2457 return copy_to_user(arg, portp, sizeof(struct stlport)) ? -EFAULT : 0;
1da177e4
LT		 2458}
2459
2460/*****************************************************************************/
2461
2462/*
2463 * Return the entire driver board structure to a user app.
2464 */
2465
ca7ed0f2 2466static int stl_getbrdstruct(struct stlbrd __user *arg)
1da177e4 2467{
6b2c9457 2468 struct stlbrd stl_dummybrd;
ca7ed0f2 2469 struct stlbrd *brdp;
1da177e4 2470
ca7ed0f2 2471 if (copy_from_user(&stl_dummybrd, arg, sizeof(struct stlbrd)))
1da177e4 2472 return -EFAULT;
6b2c9457 2473 if (stl_dummybrd.brdnr >= STL_MAXBRDS)
1da177e4
LT		 2474 return -ENODEV;
2475 brdp = stl_brds[stl_dummybrd.brdnr];
2476 if (!brdp)
c62429d9 2477 return -ENODEV;
ca7ed0f2 2478 return copy_to_user(arg, brdp, sizeof(struct stlbrd)) ? -EFAULT : 0;
1da177e4
LT		 2479}
2480
2481/*****************************************************************************/
2482
2483/*
2484 * The "staliomem" device is also required to do some special operations
2485 * on the board and/or ports. In this driver it is mostly used for stats
2486 * collection.
2487 */
2488
894cb917 2489static long stl_memioctl(struct file *fp, unsigned int cmd, unsigned long arg)
1da177e4
LT		 2490{
2491 int brdnr, rc;
2492 void __user *argp = (void __user *)arg;
2493
894cb917 2494 pr_debug("stl_memioctl(fp=%p,cmd=%x,arg=%lx)\n", fp, cmd,arg);
1da177e4 2495
894cb917 2496 brdnr = iminor(fp->f_dentry->d_inode);
1da177e4 2497 if (brdnr >= STL_MAXBRDS)
c62429d9 2498 return -ENODEV;
1da177e4
LT		 2499 rc = 0;
2500
894cb917 2501 lock_kernel();
1da177e4
LT		 2502 switch (cmd) {
2503 case COM_GETPORTSTATS:
d18a750f 2504 rc = stl_getportstats(NULL, NULL, argp);
1da177e4
LT		 2505 break;
2506 case COM_CLRPORTSTATS:
2507 rc = stl_clrportstats(NULL, argp);
2508 break;
2509 case COM_GETBRDSTATS:
2510 rc = stl_getbrdstats(argp);
2511 break;
2512 case COM_READPORT:
2513 rc = stl_getportstruct(argp);
2514 break;
2515 case COM_READBOARD:
2516 rc = stl_getbrdstruct(argp);
2517 break;
2518 default:
2519 rc = -ENOIOCTLCMD;
2520 break;
2521 }
894cb917 2522 unlock_kernel();
c62429d9 2523 return rc;
1da177e4
LT		 2524}
2525
b68e31d0 2526static const struct tty_operations stl_ops = {
1da177e4
LT		 2527 .open = stl_open,
2528 .close = stl_close,
2529 .write = stl_write,
2530 .put_char = stl_putchar,
2531 .flush_chars = stl_flushchars,
2532 .write_room = stl_writeroom,
2533 .chars_in_buffer = stl_charsinbuffer,
2534 .ioctl = stl_ioctl,
2535 .set_termios = stl_settermios,
2536 .throttle = stl_throttle,
2537 .unthrottle = stl_unthrottle,
2538 .stop = stl_stop,
2539 .start = stl_start,
2540 .hangup = stl_hangup,
2541 .flush_buffer = stl_flushbuffer,
2542 .break_ctl = stl_breakctl,
2543 .wait_until_sent = stl_waituntilsent,
2544 .send_xchar = stl_sendxchar,
1da177e4
LT		 2545 .tiocmget = stl_tiocmget,
2546 .tiocmset = stl_tiocmset,
8561c44c 2547 .proc_fops = &stl_proc_fops,
1da177e4
LT		 2548};
2549
31f35939
AC		 2550static const struct tty_port_operations stl_port_ops = {
2551 .carrier_raised = stl_carrier_raised,
fcc8ac18 2552 .dtr_rts = stl_dtr_rts,
31f35939
AC		 2553};
2554
1da177e4
LT		 2555/*****************************************************************************/
2556/* CD1400 HARDWARE FUNCTIONS */
2557/*****************************************************************************/
2558
2559/*
2560 * These functions get/set/update the registers of the cd1400 UARTs.
2561 * Access to the cd1400 registers is via an address/data io port pair.
2562 * (Maybe should make this inline...)
2563 */
2564
ca7ed0f2 2565static int stl_cd1400getreg(struct stlport *portp, int regnr)
1da177e4
LT		 2566{
2567 outb((regnr + portp->uartaddr), portp->ioaddr);
014c2544 2568 return inb(portp->ioaddr + EREG_DATA);
1da177e4
LT		 2569}
2570
ca7ed0f2 2571static void stl_cd1400setreg(struct stlport *portp, int regnr, int value)
1da177e4 2572{
c62429d9 2573 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2574 outb(value, portp->ioaddr + EREG_DATA);
2575}
2576
ca7ed0f2 2577static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value)
1da177e4 2578{
c62429d9 2579 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2580 if (inb(portp->ioaddr + EREG_DATA) != value) {
2581 outb(value, portp->ioaddr + EREG_DATA);
014c2544 2582 return 1;
1da177e4 2583 }
014c2544 2584 return 0;
1da177e4
LT		 2585}
2586
2587/*****************************************************************************/
2588
2589/*
2590 * Inbitialize the UARTs in a panel. We don't care what sort of board
2591 * these ports are on - since the port io registers are almost
2592 * identical when dealing with ports.
2593 */
2594
ca7ed0f2 2595static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 2596{
2597 unsigned int gfrcr;
2598 int chipmask, i, j;
2599 int nrchips, uartaddr, ioaddr;
b65b5b59 2600 unsigned long flags;
1da177e4 2601
a0564e14 2602 pr_debug("stl_panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4 2603
b65b5b59 2604 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2605 BRDENABLE(panelp->brdnr, panelp->pagenr);
2606
2607/*
2608 * Check that each chip is present and started up OK.
2609 */
2610 chipmask = 0;
2611 nrchips = panelp->nrports / CD1400_PORTS;
c62429d9 2612 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 2613 if (brdp->brdtype == BRD_ECHPCI) {
2614 outb((panelp->pagenr + (i >> 1)), brdp->ioctrl);
2615 ioaddr = panelp->iobase;
c62429d9 2616 } else
1da177e4 2617 ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1));
1da177e4
LT		 2618 uartaddr = (i & 0x01) ? 0x080 : 0;
2619 outb((GFRCR + uartaddr), ioaddr);
2620 outb(0, (ioaddr + EREG_DATA));
2621 outb((CCR + uartaddr), ioaddr);
2622 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2623 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2624 outb((GFRCR + uartaddr), ioaddr);
c62429d9 2625 for (j = 0; j < CCR_MAXWAIT; j++)
1da177e4
LT		 2626 if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0)
2627 break;
c62429d9 2628
1da177e4
LT		 2629 if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) {
2630 printk("STALLION: cd1400 not responding, "
2631 "brd=%d panel=%d chip=%d\n",
2632 panelp->brdnr, panelp->panelnr, i);
2633 continue;
2634 }
2635 chipmask |= (0x1 << i);
2636 outb((PPR + uartaddr), ioaddr);
2637 outb(PPR_SCALAR, (ioaddr + EREG_DATA));
2638 }
2639
2640 BRDDISABLE(panelp->brdnr);
b65b5b59 2641 spin_unlock_irqrestore(&brd_lock, flags);
014c2544 2642 return chipmask;
1da177e4
LT		 2643}
2644
2645/*****************************************************************************/
2646
2647/*
2648 * Initialize hardware specific port registers.
2649 */
2650
ca7ed0f2 2651static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 2652{
b65b5b59 2653 unsigned long flags;
a0564e14
JS		 2654 pr_debug("stl_cd1400portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
2655 panelp, portp);
1da177e4 2656
615e4a71
JS		 2657 if ((brdp == NULL) || (panelp == NULL) ||
2658 (portp == NULL))
1da177e4
LT		 2659 return;
2660
b65b5b59 2661 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2662 portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) ||
2663 (portp->portnr < 8)) ? 0 : EREG_BANKSIZE);
2664 portp->uartaddr = (portp->portnr & 0x04) << 5;
2665 portp->pagenr = panelp->pagenr + (portp->portnr >> 3);
2666
2667 BRDENABLE(portp->brdnr, portp->pagenr);
2668 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2669 stl_cd1400setreg(portp, LIVR, (portp->portnr << 3));
2670 portp->hwid = stl_cd1400getreg(portp, GFRCR);
2671 BRDDISABLE(portp->brdnr);
b65b5b59 2672 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2673}
2674
2675/*****************************************************************************/
2676
2677/*
2678 * Wait for the command register to be ready. We will poll this,
2679 * since it won't usually take too long to be ready.
2680 */
2681
ca7ed0f2 2682static void stl_cd1400ccrwait(struct stlport *portp)
1da177e4
LT		 2683{
2684 int i;
2685
c62429d9
JS		 2686 for (i = 0; i < CCR_MAXWAIT; i++)
2687 if (stl_cd1400getreg(portp, CCR) == 0)
1da177e4 2688 return;
1da177e4
LT		 2689
2690 printk("STALLION: cd1400 not responding, port=%d panel=%d brd=%d\n",
2691 portp->portnr, portp->panelnr, portp->brdnr);
2692}
2693
2694/*****************************************************************************/
2695
2696/*
2697 * Set up the cd1400 registers for a port based on the termios port
2698 * settings.
2699 */
2700
606d099c 2701static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 2702{
ca7ed0f2 2703 struct stlbrd *brdp;
1da177e4
LT		 2704 unsigned long flags;
2705 unsigned int clkdiv, baudrate;
2706 unsigned char cor1, cor2, cor3;
2707 unsigned char cor4, cor5, ccr;
2708 unsigned char srer, sreron, sreroff;
2709 unsigned char mcor1, mcor2, rtpr;
2710 unsigned char clk, div;
2711
2712 cor1 = 0;
2713 cor2 = 0;
2714 cor3 = 0;
2715 cor4 = 0;
2716 cor5 = 0;
2717 ccr = 0;
2718 rtpr = 0;
2719 clk = 0;
2720 div = 0;
2721 mcor1 = 0;
2722 mcor2 = 0;
2723 sreron = 0;
2724 sreroff = 0;
2725
2726 brdp = stl_brds[portp->brdnr];
615e4a71 2727 if (brdp == NULL)
1da177e4
LT		 2728 return;
2729
2730/*
2731 * Set up the RX char ignore mask with those RX error types we
2732 * can ignore. We can get the cd1400 to help us out a little here,
2733 * it will ignore parity errors and breaks for us.
2734 */
2735 portp->rxignoremsk = 0;
2736 if (tiosp->c_iflag & IGNPAR) {
2737 portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN);
2738 cor1 |= COR1_PARIGNORE;
2739 }
2740 if (tiosp->c_iflag & IGNBRK) {
2741 portp->rxignoremsk |= ST_BREAK;
2742 cor4 |= COR4_IGNBRK;
2743 }
2744
2745 portp->rxmarkmsk = ST_OVERRUN;
2746 if (tiosp->c_iflag & (INPCK | PARMRK))
2747 portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING);
2748 if (tiosp->c_iflag & BRKINT)
2749 portp->rxmarkmsk |= ST_BREAK;
2750
2751/*
2752 * Go through the char size, parity and stop bits and set all the
2753 * option register appropriately.
2754 */
2755 switch (tiosp->c_cflag & CSIZE) {
2756 case CS5:
2757 cor1 |= COR1_CHL5;
2758 break;
2759 case CS6:
2760 cor1 |= COR1_CHL6;
2761 break;
2762 case CS7:
2763 cor1 |= COR1_CHL7;
2764 break;
2765 default:
2766 cor1 |= COR1_CHL8;
2767 break;
2768 }
2769
2770 if (tiosp->c_cflag & CSTOPB)
2771 cor1 |= COR1_STOP2;
2772 else
2773 cor1 |= COR1_STOP1;
2774
2775 if (tiosp->c_cflag & PARENB) {
2776 if (tiosp->c_cflag & PARODD)
2777 cor1 |= (COR1_PARENB | COR1_PARODD);
2778 else
2779 cor1 |= (COR1_PARENB | COR1_PAREVEN);
2780 } else {
2781 cor1 |= COR1_PARNONE;
2782 }
2783
2784/*
2785 * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing
2786 * space for hardware flow control and the like. This should be set to
2787 * VMIN. Also here we will set the RX data timeout to 10ms - this should
2788 * really be based on VTIME.
2789 */
2790 cor3 |= FIFO_RXTHRESHOLD;
2791 rtpr = 2;
2792
2793/*
2794 * Calculate the baud rate timers. For now we will just assume that
2795 * the input and output baud are the same. Could have used a baud
2796 * table here, but this way we can generate virtually any baud rate
2797 * we like!
2798 */
2799 baudrate = tiosp->c_cflag & CBAUD;
2800 if (baudrate & CBAUDEX) {
2801 baudrate &= ~CBAUDEX;
2802 if ((baudrate < 1) || (baudrate > 4))
2803 tiosp->c_cflag &= ~CBAUDEX;
2804 else
2805 baudrate += 15;
2806 }
2807 baudrate = stl_baudrates[baudrate];
2808 if ((tiosp->c_cflag & CBAUD) == B38400) {
f8ae4764 2809 if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1da177e4 2810 baudrate = 57600;
f8ae4764 2811 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1da177e4 2812 baudrate = 115200;
f8ae4764 2813 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1da177e4 2814 baudrate = 230400;
f8ae4764 2815 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1da177e4 2816 baudrate = 460800;
f8ae4764 2817 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
1da177e4
LT		 2818 baudrate = (portp->baud_base / portp->custom_divisor);
2819 }
2820 if (baudrate > STL_CD1400MAXBAUD)
2821 baudrate = STL_CD1400MAXBAUD;
2822
2823 if (baudrate > 0) {
c62429d9
JS		 2824 for (clk = 0; clk < CD1400_NUMCLKS; clk++) {
2825 clkdiv = (portp->clk / stl_cd1400clkdivs[clk]) / baudrate;
1da177e4
LT		 2826 if (clkdiv < 0x100)
2827 break;
2828 }
2829 div = (unsigned char) clkdiv;
2830 }
2831
2832/*
2833 * Check what form of modem signaling is required and set it up.
2834 */
2835 if ((tiosp->c_cflag & CLOCAL) == 0) {
2836 mcor1 |= MCOR1_DCD;
2837 mcor2 |= MCOR2_DCD;
2838 sreron |= SRER_MODEM;
f8ae4764 2839 portp->port.flags |= ASYNC_CHECK_CD;
c62429d9 2840 } else
f8ae4764 2841 portp->port.flags &= ~ASYNC_CHECK_CD;
1da177e4
LT		 2842
2843/*
2844 * Setup cd1400 enhanced modes if we can. In particular we want to
2845 * handle as much of the flow control as possible automatically. As
2846 * well as saving a few CPU cycles it will also greatly improve flow
2847 * control reliability.
2848 */
2849 if (tiosp->c_iflag & IXON) {
2850 cor2 |= COR2_TXIBE;
2851 cor3 |= COR3_SCD12;
2852 if (tiosp->c_iflag & IXANY)
2853 cor2 |= COR2_IXM;
2854 }
2855
2856 if (tiosp->c_cflag & CRTSCTS) {
2857 cor2 |= COR2_CTSAE;
2858 mcor1 |= FIFO_RTSTHRESHOLD;
2859 }
2860
2861/*
2862 * All cd1400 register values calculated so go through and set
2863 * them all up.
2864 */
2865
a0564e14 2866 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 2867 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14 2868 pr_debug(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n",
1da177e4 2869 cor1, cor2, cor3, cor4, cor5);
a0564e14 2870 pr_debug(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n",
1da177e4 2871 mcor1, mcor2, rtpr, sreron, sreroff);
a0564e14
JS		 2872 pr_debug(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div);
2873 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 2874 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
2875 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 2876
b65b5b59 2877 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2878 BRDENABLE(portp->brdnr, portp->pagenr);
2879 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
2880 srer = stl_cd1400getreg(portp, SRER);
2881 stl_cd1400setreg(portp, SRER, 0);
2882 if (stl_cd1400updatereg(portp, COR1, cor1))
2883 ccr = 1;
2884 if (stl_cd1400updatereg(portp, COR2, cor2))
2885 ccr = 1;
2886 if (stl_cd1400updatereg(portp, COR3, cor3))
2887 ccr = 1;
2888 if (ccr) {
2889 stl_cd1400ccrwait(portp);
2890 stl_cd1400setreg(portp, CCR, CCR_CORCHANGE);
2891 }
2892 stl_cd1400setreg(portp, COR4, cor4);
2893 stl_cd1400setreg(portp, COR5, cor5);
2894 stl_cd1400setreg(portp, MCOR1, mcor1);
2895 stl_cd1400setreg(portp, MCOR2, mcor2);
2896 if (baudrate > 0) {
2897 stl_cd1400setreg(portp, TCOR, clk);
2898 stl_cd1400setreg(portp, TBPR, div);
2899 stl_cd1400setreg(portp, RCOR, clk);
2900 stl_cd1400setreg(portp, RBPR, div);
2901 }
2902 stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]);
2903 stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]);
2904 stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]);
2905 stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]);
2906 stl_cd1400setreg(portp, RTPR, rtpr);
2907 mcor1 = stl_cd1400getreg(portp, MSVR1);
2908 if (mcor1 & MSVR1_DCD)
2909 portp->sigs |= TIOCM_CD;
2910 else
2911 portp->sigs &= ~TIOCM_CD;
2912 stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron));
2913 BRDDISABLE(portp->brdnr);
b65b5b59 2914 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2915}
2916
2917/*****************************************************************************/
2918
2919/*
2920 * Set the state of the DTR and RTS signals.
2921 */
2922
ca7ed0f2 2923static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 2924{
2925 unsigned char msvr1, msvr2;
2926 unsigned long flags;
2927
a0564e14
JS		 2928 pr_debug("stl_cd1400setsignals(portp=%p,dtr=%d,rts=%d)\n",
2929 portp, dtr, rts);
1da177e4
LT		 2930
2931 msvr1 = 0;
2932 msvr2 = 0;
2933 if (dtr > 0)
2934 msvr1 = MSVR1_DTR;
2935 if (rts > 0)
2936 msvr2 = MSVR2_RTS;
2937
b65b5b59 2938 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2939 BRDENABLE(portp->brdnr, portp->pagenr);
2940 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2941 if (rts >= 0)
2942 stl_cd1400setreg(portp, MSVR2, msvr2);
2943 if (dtr >= 0)
2944 stl_cd1400setreg(portp, MSVR1, msvr1);
2945 BRDDISABLE(portp->brdnr);
b65b5b59 2946 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2947}
2948
2949/*****************************************************************************/
2950
2951/*
2952 * Return the state of the signals.
2953 */
2954
ca7ed0f2 2955static int stl_cd1400getsignals(struct stlport *portp)
1da177e4
LT		 2956{
2957 unsigned char msvr1, msvr2;
2958 unsigned long flags;
2959 int sigs;
2960
a0564e14 2961 pr_debug("stl_cd1400getsignals(portp=%p)\n", portp);
1da177e4 2962
b65b5b59 2963 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2964 BRDENABLE(portp->brdnr, portp->pagenr);
2965 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2966 msvr1 = stl_cd1400getreg(portp, MSVR1);
2967 msvr2 = stl_cd1400getreg(portp, MSVR2);
2968 BRDDISABLE(portp->brdnr);
b65b5b59 2969 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2970
2971 sigs = 0;
2972 sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0;
2973 sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0;
2974 sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0;
2975 sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0;
2976#if 0
2977 sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0;
2978 sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0;
2979#else
2980 sigs |= TIOCM_DSR;
2981#endif
014c2544 2982 return sigs;
1da177e4
LT		 2983}
2984
2985/*****************************************************************************/
2986
2987/*
2988 * Enable/Disable the Transmitter and/or Receiver.
2989 */
2990
ca7ed0f2 2991static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 2992{
2993 unsigned char ccr;
2994 unsigned long flags;
2995
a0564e14
JS		 2996 pr_debug("stl_cd1400enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
2997
1da177e4
LT		 2998 ccr = 0;
2999
3000 if (tx == 0)
3001 ccr |= CCR_TXDISABLE;
3002 else if (tx > 0)
3003 ccr |= CCR_TXENABLE;
3004 if (rx == 0)
3005 ccr |= CCR_RXDISABLE;
3006 else if (rx > 0)
3007 ccr |= CCR_RXENABLE;
3008
b65b5b59 3009 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3010 BRDENABLE(portp->brdnr, portp->pagenr);
3011 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3012 stl_cd1400ccrwait(portp);
3013 stl_cd1400setreg(portp, CCR, ccr);
3014 stl_cd1400ccrwait(portp);
3015 BRDDISABLE(portp->brdnr);
b65b5b59 3016 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3017}
3018
3019/*****************************************************************************/
3020
3021/*
3022 * Start/stop the Transmitter and/or Receiver.
3023 */
3024
ca7ed0f2 3025static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3026{
3027 unsigned char sreron, sreroff;
3028 unsigned long flags;
3029
a0564e14 3030 pr_debug("stl_cd1400startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 3031
3032 sreron = 0;
3033 sreroff = 0;
3034 if (tx == 0)
3035 sreroff |= (SRER_TXDATA | SRER_TXEMPTY);
3036 else if (tx == 1)
3037 sreron |= SRER_TXDATA;
3038 else if (tx >= 2)
3039 sreron |= SRER_TXEMPTY;
3040 if (rx == 0)
3041 sreroff |= SRER_RXDATA;
3042 else if (rx > 0)
3043 sreron |= SRER_RXDATA;
3044
b65b5b59 3045 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3046 BRDENABLE(portp->brdnr, portp->pagenr);
3047 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3048 stl_cd1400setreg(portp, SRER,
3049 ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron));
3050 BRDDISABLE(portp->brdnr);
3051 if (tx > 0)
3052 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 3053 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3054}
3055
3056/*****************************************************************************/
3057
3058/*
3059 * Disable all interrupts from this port.
3060 */
3061
ca7ed0f2 3062static void stl_cd1400disableintrs(struct stlport *portp)
1da177e4
LT		 3063{
3064 unsigned long flags;
3065
a0564e14
JS		 3066 pr_debug("stl_cd1400disableintrs(portp=%p)\n", portp);
3067
b65b5b59 3068 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3069 BRDENABLE(portp->brdnr, portp->pagenr);
3070 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3071 stl_cd1400setreg(portp, SRER, 0);
3072 BRDDISABLE(portp->brdnr);
b65b5b59 3073 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3074}
3075
3076/*****************************************************************************/
3077
ca7ed0f2 3078static void stl_cd1400sendbreak(struct stlport *portp, int len)
1da177e4
LT		 3079{
3080 unsigned long flags;
3081
a0564e14 3082 pr_debug("stl_cd1400sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 3083
b65b5b59 3084 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3085 BRDENABLE(portp->brdnr, portp->pagenr);
3086 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3087 stl_cd1400setreg(portp, SRER,
3088 ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) |
3089 SRER_TXEMPTY));
3090 BRDDISABLE(portp->brdnr);
3091 portp->brklen = len;
3092 if (len == 1)
3093 portp->stats.txbreaks++;
b65b5b59 3094 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3095}
3096
3097/*****************************************************************************/
3098
3099/*
3100 * Take flow control actions...
3101 */
3102
ca7ed0f2 3103static void stl_cd1400flowctrl(struct stlport *portp, int state)
1da177e4
LT		 3104{
3105 struct tty_struct *tty;
3106 unsigned long flags;
3107
a0564e14 3108 pr_debug("stl_cd1400flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 3109
615e4a71 3110 if (portp == NULL)
1da177e4 3111 return;
d18a750f 3112 tty = tty_port_tty_get(&portp->port);
615e4a71 3113 if (tty == NULL)
1da177e4
LT		 3114 return;
3115
b65b5b59 3116 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3117 BRDENABLE(portp->brdnr, portp->pagenr);
3118 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3119
3120 if (state) {
3121 if (tty->termios->c_iflag & IXOFF) {
3122 stl_cd1400ccrwait(portp);
3123 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3124 portp->stats.rxxon++;
3125 stl_cd1400ccrwait(portp);
3126 }
3127/*
3128 * Question: should we return RTS to what it was before? It may
3129 * have been set by an ioctl... Suppose not, since if you have
3130 * hardware flow control set then it is pretty silly to go and
3131 * set the RTS line by hand.
3132 */
3133 if (tty->termios->c_cflag & CRTSCTS) {
3134 stl_cd1400setreg(portp, MCOR1,
3135 (stl_cd1400getreg(portp, MCOR1) |
3136 FIFO_RTSTHRESHOLD));
3137 stl_cd1400setreg(portp, MSVR2, MSVR2_RTS);
3138 portp->stats.rxrtson++;
3139 }
3140 } else {
3141 if (tty->termios->c_iflag & IXOFF) {
3142 stl_cd1400ccrwait(portp);
3143 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3144 portp->stats.rxxoff++;
3145 stl_cd1400ccrwait(portp);
3146 }
3147 if (tty->termios->c_cflag & CRTSCTS) {
3148 stl_cd1400setreg(portp, MCOR1,
3149 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3150 stl_cd1400setreg(portp, MSVR2, 0);
3151 portp->stats.rxrtsoff++;
3152 }
3153 }
3154
3155 BRDDISABLE(portp->brdnr);
b65b5b59 3156 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 3157 tty_kref_put(tty);
1da177e4
LT		 3158}
3159
3160/*****************************************************************************/
3161
3162/*
3163 * Send a flow control character...
3164 */
3165
ca7ed0f2 3166static void stl_cd1400sendflow(struct stlport *portp, int state)
1da177e4
LT		 3167{
3168 struct tty_struct *tty;
3169 unsigned long flags;
3170
a0564e14 3171 pr_debug("stl_cd1400sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 3172
615e4a71 3173 if (portp == NULL)
1da177e4 3174 return;
d18a750f 3175 tty = tty_port_tty_get(&portp->port);
615e4a71 3176 if (tty == NULL)
1da177e4
LT		 3177 return;
3178
b65b5b59 3179 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3180 BRDENABLE(portp->brdnr, portp->pagenr);
3181 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3182 if (state) {
3183 stl_cd1400ccrwait(portp);
3184 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3185 portp->stats.rxxon++;
3186 stl_cd1400ccrwait(portp);
3187 } else {
3188 stl_cd1400ccrwait(portp);
3189 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3190 portp->stats.rxxoff++;
3191 stl_cd1400ccrwait(portp);
3192 }
3193 BRDDISABLE(portp->brdnr);
b65b5b59 3194 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 3195 tty_kref_put(tty);
1da177e4
LT		 3196}
3197
3198/*****************************************************************************/
3199
ca7ed0f2 3200static void stl_cd1400flush(struct stlport *portp)
1da177e4
LT		 3201{
3202 unsigned long flags;
3203
a0564e14 3204 pr_debug("stl_cd1400flush(portp=%p)\n", portp);
1da177e4 3205
615e4a71 3206 if (portp == NULL)
1da177e4
LT		 3207 return;
3208
b65b5b59 3209 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3210 BRDENABLE(portp->brdnr, portp->pagenr);
3211 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3212 stl_cd1400ccrwait(portp);
3213 stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO);
3214 stl_cd1400ccrwait(portp);
3215 portp->tx.tail = portp->tx.head;
3216 BRDDISABLE(portp->brdnr);
b65b5b59 3217 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3218}
3219
3220/*****************************************************************************/
3221
3222/*
3223 * Return the current state of data flow on this port. This is only
3224 * really interresting when determining if data has fully completed
3225 * transmission or not... This is easy for the cd1400, it accurately
3226 * maintains the busy port flag.
3227 */
3228
ca7ed0f2 3229static int stl_cd1400datastate(struct stlport *portp)
1da177e4 3230{
a0564e14 3231 pr_debug("stl_cd1400datastate(portp=%p)\n", portp);
1da177e4 3232
615e4a71 3233 if (portp == NULL)
014c2544 3234 return 0;
1da177e4 3235
014c2544 3236 return test_bit(ASYI_TXBUSY, &portp->istate) ? 1 : 0;
1da177e4
LT		 3237}
3238
3239/*****************************************************************************/
3240
3241/*
3242 * Interrupt service routine for cd1400 EasyIO boards.
3243 */
3244
ca7ed0f2 3245static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3246{
3247 unsigned char svrtype;
3248
a0564e14 3249 pr_debug("stl_cd1400eiointr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4 3250
b65b5b59 3251 spin_lock(&brd_lock);
1da177e4
LT		 3252 outb(SVRR, iobase);
3253 svrtype = inb(iobase + EREG_DATA);
3254 if (panelp->nrports > 4) {
3255 outb((SVRR + 0x80), iobase);
3256 svrtype |= inb(iobase + EREG_DATA);
3257 }
3258
3259 if (svrtype & SVRR_RX)
3260 stl_cd1400rxisr(panelp, iobase);
3261 else if (svrtype & SVRR_TX)
3262 stl_cd1400txisr(panelp, iobase);
3263 else if (svrtype & SVRR_MDM)
3264 stl_cd1400mdmisr(panelp, iobase);
b65b5b59
AC		 3265
3266 spin_unlock(&brd_lock);
1da177e4
LT		 3267}
3268
3269/*****************************************************************************/
3270
3271/*
3272 * Interrupt service routine for cd1400 panels.
3273 */
3274
ca7ed0f2 3275static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3276{
3277 unsigned char svrtype;
3278
a0564e14 3279 pr_debug("stl_cd1400echintr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4
LT		 3280
3281 outb(SVRR, iobase);
3282 svrtype = inb(iobase + EREG_DATA);
3283 outb((SVRR + 0x80), iobase);
3284 svrtype |= inb(iobase + EREG_DATA);
3285 if (svrtype & SVRR_RX)
3286 stl_cd1400rxisr(panelp, iobase);
3287 else if (svrtype & SVRR_TX)
3288 stl_cd1400txisr(panelp, iobase);
3289 else if (svrtype & SVRR_MDM)
3290 stl_cd1400mdmisr(panelp, iobase);
3291}
3292
3293
3294/*****************************************************************************/
3295
3296/*
3297 * Unfortunately we need to handle breaks in the TX data stream, since
3298 * this is the only way to generate them on the cd1400.
3299 */
3300
60be4810 3301static int stl_cd1400breakisr(struct stlport *portp, int ioaddr)
1da177e4
LT		 3302{
3303 if (portp->brklen == 1) {
3304 outb((COR2 + portp->uartaddr), ioaddr);
3305 outb((inb(ioaddr + EREG_DATA) | COR2_ETC),
3306 (ioaddr + EREG_DATA));
3307 outb((TDR + portp->uartaddr), ioaddr);
3308 outb(ETC_CMD, (ioaddr + EREG_DATA));
3309 outb(ETC_STARTBREAK, (ioaddr + EREG_DATA));
3310 outb((SRER + portp->uartaddr), ioaddr);
3311 outb((inb(ioaddr + EREG_DATA) & ~(SRER_TXDATA | SRER_TXEMPTY)),
3312 (ioaddr + EREG_DATA));
014c2544 3313 return 1;
1da177e4
LT		 3314 } else if (portp->brklen > 1) {
3315 outb((TDR + portp->uartaddr), ioaddr);
3316 outb(ETC_CMD, (ioaddr + EREG_DATA));
3317 outb(ETC_STOPBREAK, (ioaddr + EREG_DATA));
3318 portp->brklen = -1;
014c2544 3319 return 1;
1da177e4
LT		 3320 } else {
3321 outb((COR2 + portp->uartaddr), ioaddr);
3322 outb((inb(ioaddr + EREG_DATA) & ~COR2_ETC),
3323 (ioaddr + EREG_DATA));
3324 portp->brklen = 0;
3325 }
014c2544 3326 return 0;
1da177e4
LT		 3327}
3328
3329/*****************************************************************************/
3330
3331/*
3332 * Transmit interrupt handler. This has gotta be fast! Handling TX
3333 * chars is pretty simple, stuff as many as possible from the TX buffer
3334 * into the cd1400 FIFO. Must also handle TX breaks here, since they
3335 * are embedded as commands in the data stream. Oh no, had to use a goto!
3336 * This could be optimized more, will do when I get time...
3337 * In practice it is possible that interrupts are enabled but that the
3338 * port has been hung up. Need to handle not having any TX buffer here,
3339 * this is done by using the side effect that head and tail will also
3340 * be NULL if the buffer has been freed.
3341 */
3342
ca7ed0f2 3343static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3344{
ca7ed0f2 3345 struct stlport *portp;
1da177e4
LT		 3346 int len, stlen;
3347 char *head, *tail;
3348 unsigned char ioack, srer;
d18a750f 3349 struct tty_struct *tty;
1da177e4 3350
a0564e14 3351 pr_debug("stl_cd1400txisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3352
3353 ioack = inb(ioaddr + EREG_TXACK);
3354 if (((ioack & panelp->ackmask) != 0) ||
3355 ((ioack & ACK_TYPMASK) != ACK_TYPTX)) {
3356 printk("STALLION: bad TX interrupt ack value=%x\n", ioack);
3357 return;
3358 }
3359 portp = panelp->ports[(ioack >> 3)];
3360
3361/*
3362 * Unfortunately we need to handle breaks in the data stream, since
3363 * this is the only way to generate them on the cd1400. Do it now if
3364 * a break is to be sent.
3365 */
3366 if (portp->brklen != 0)
3367 if (stl_cd1400breakisr(portp, ioaddr))
3368 goto stl_txalldone;
3369
3370 head = portp->tx.head;
3371 tail = portp->tx.tail;
3372 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
3373 if ((len == 0) || ((len < STL_TXBUFLOW) &&
3374 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
3375 set_bit(ASYI_TXLOW, &portp->istate);
d18a750f
AC		 3376 tty = tty_port_tty_get(&portp->port);
3377 if (tty) {
3378 tty_wakeup(tty);
3379 tty_kref_put(tty);
3380 }
1da177e4
LT		 3381 }
3382
3383 if (len == 0) {
3384 outb((SRER + portp->uartaddr), ioaddr);
3385 srer = inb(ioaddr + EREG_DATA);
3386 if (srer & SRER_TXDATA) {
3387 srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY;
3388 } else {
3389 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
3390 clear_bit(ASYI_TXBUSY, &portp->istate);
3391 }
3392 outb(srer, (ioaddr + EREG_DATA));
3393 } else {
843b568c 3394 len = min(len, CD1400_TXFIFOSIZE);
1da177e4 3395 portp->stats.txtotal += len;
319fe7c3
JS		 3396 stlen = min_t(unsigned int, len,
3397 (portp->tx.buf + STL_TXBUFSIZE) - tail);
1da177e4
LT		 3398 outb((TDR + portp->uartaddr), ioaddr);
3399 outsb((ioaddr + EREG_DATA), tail, stlen);
3400 len -= stlen;
3401 tail += stlen;
3402 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
3403 tail = portp->tx.buf;
3404 if (len > 0) {
3405 outsb((ioaddr + EREG_DATA), tail, len);
3406 tail += len;
3407 }
3408 portp->tx.tail = tail;
3409 }
3410
3411stl_txalldone:
3412 outb((EOSRR + portp->uartaddr), ioaddr);
3413 outb(0, (ioaddr + EREG_DATA));
3414}
3415
3416/*****************************************************************************/
3417
3418/*
3419 * Receive character interrupt handler. Determine if we have good chars
3420 * or bad chars and then process appropriately. Good chars are easy
3421 * just shove the lot into the RX buffer and set all status byte to 0.
3422 * If a bad RX char then process as required. This routine needs to be
3423 * fast! In practice it is possible that we get an interrupt on a port
3424 * that is closed. This can happen on hangups - since they completely
3425 * shutdown a port not in user context. Need to handle this case.
3426 */
3427
ca7ed0f2 3428static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3429{
ca7ed0f2 3430 struct stlport *portp;
1da177e4
LT		 3431 struct tty_struct *tty;
3432 unsigned int ioack, len, buflen;
3433 unsigned char status;
3434 char ch;
3435
a0564e14 3436 pr_debug("stl_cd1400rxisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3437
3438 ioack = inb(ioaddr + EREG_RXACK);
3439 if ((ioack & panelp->ackmask) != 0) {
3440 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
3441 return;
3442 }
3443 portp = panelp->ports[(ioack >> 3)];
d18a750f 3444 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 3445
3446 if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) {
3447 outb((RDCR + portp->uartaddr), ioaddr);
3448 len = inb(ioaddr + EREG_DATA);
33f0f88f 3449 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
319fe7c3 3450 len = min_t(unsigned int, len, sizeof(stl_unwanted));
1da177e4
LT		 3451 outb((RDSR + portp->uartaddr), ioaddr);
3452 insb((ioaddr + EREG_DATA), &stl_unwanted[0], len);
3453 portp->stats.rxlost += len;
3454 portp->stats.rxtotal += len;
3455 } else {
843b568c 3456 len = min(len, buflen);
1da177e4 3457 if (len > 0) {
33f0f88f 3458 unsigned char *ptr;
1da177e4 3459 outb((RDSR + portp->uartaddr), ioaddr);
33f0f88f
AC		 3460 tty_prepare_flip_string(tty, &ptr, len);
3461 insb((ioaddr + EREG_DATA), ptr, len);
1da177e4
LT		 3462 tty_schedule_flip(tty);
3463 portp->stats.rxtotal += len;
3464 }
3465 }
3466 } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) {
3467 outb((RDSR + portp->uartaddr), ioaddr);
3468 status = inb(ioaddr + EREG_DATA);
3469 ch = inb(ioaddr + EREG_DATA);
3470 if (status & ST_PARITY)
3471 portp->stats.rxparity++;
3472 if (status & ST_FRAMING)
3473 portp->stats.rxframing++;
3474 if (status & ST_OVERRUN)
3475 portp->stats.rxoverrun++;
3476 if (status & ST_BREAK)
3477 portp->stats.rxbreaks++;
3478 if (status & ST_SCHARMASK) {
3479 if ((status & ST_SCHARMASK) == ST_SCHAR1)
3480 portp->stats.txxon++;
3481 if ((status & ST_SCHARMASK) == ST_SCHAR2)
3482 portp->stats.txxoff++;
3483 goto stl_rxalldone;
3484 }
33f0f88f 3485 if (tty != NULL && (portp->rxignoremsk & status) == 0) {
1da177e4
LT		 3486 if (portp->rxmarkmsk & status) {
3487 if (status & ST_BREAK) {
3488 status = TTY_BREAK;
f8ae4764 3489 if (portp->port.flags & ASYNC_SAK) {
1da177e4
LT		 3490 do_SAK(tty);
3491 BRDENABLE(portp->brdnr, portp->pagenr);
3492 }
c62429d9 3493 } else if (status & ST_PARITY)
1da177e4 3494 status = TTY_PARITY;
c62429d9 3495 else if (status & ST_FRAMING)
1da177e4 3496 status = TTY_FRAME;
c62429d9 3497 else if(status & ST_OVERRUN)
1da177e4 3498 status = TTY_OVERRUN;
c62429d9 3499 else
1da177e4 3500 status = 0;
c62429d9 3501 } else
1da177e4 3502 status = 0;
33f0f88f
AC		 3503 tty_insert_flip_char(tty, ch, status);
3504 tty_schedule_flip(tty);
1da177e4
LT		 3505 }
3506 } else {
3507 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
d18a750f 3508 tty_kref_put(tty);
1da177e4
LT		 3509 return;
3510 }
3511
3512stl_rxalldone:
d18a750f 3513 tty_kref_put(tty);
1da177e4
LT		 3514 outb((EOSRR + portp->uartaddr), ioaddr);
3515 outb(0, (ioaddr + EREG_DATA));
3516}
3517
3518/*****************************************************************************/
3519
3520/*
3521 * Modem interrupt handler. The is called when the modem signal line
3522 * (DCD) has changed state. Leave most of the work to the off-level
3523 * processing routine.
3524 */
3525
ca7ed0f2 3526static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3527{
ca7ed0f2 3528 struct stlport *portp;
1da177e4
LT		 3529 unsigned int ioack;
3530 unsigned char misr;
3531
a0564e14 3532 pr_debug("stl_cd1400mdmisr(panelp=%p)\n", panelp);
1da177e4
LT		 3533
3534 ioack = inb(ioaddr + EREG_MDACK);
3535 if (((ioack & panelp->ackmask) != 0) ||
3536 ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) {
3537 printk("STALLION: bad MODEM interrupt ack value=%x\n", ioack);
3538 return;
3539 }
3540 portp = panelp->ports[(ioack >> 3)];
3541
3542 outb((MISR + portp->uartaddr), ioaddr);
3543 misr = inb(ioaddr + EREG_DATA);
3544 if (misr & MISR_DCD) {
ccfea3c9 3545 stl_cd_change(portp);
1da177e4
LT		 3546 portp->stats.modem++;
3547 }
3548
3549 outb((EOSRR + portp->uartaddr), ioaddr);
3550 outb(0, (ioaddr + EREG_DATA));
3551}
3552
3553/*****************************************************************************/
3554/* SC26198 HARDWARE FUNCTIONS */
3555/*****************************************************************************/
3556
3557/*
3558 * These functions get/set/update the registers of the sc26198 UARTs.
3559 * Access to the sc26198 registers is via an address/data io port pair.
3560 * (Maybe should make this inline...)
3561 */
3562
ca7ed0f2 3563static int stl_sc26198getreg(struct stlport *portp, int regnr)
1da177e4
LT		 3564{
3565 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
014c2544 3566 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3567}
3568
ca7ed0f2 3569static void stl_sc26198setreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3570{
3571 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3572 outb(value, (portp->ioaddr + XP_DATA));
3573}
3574
ca7ed0f2 3575static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3576{
3577 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3578 if (inb(portp->ioaddr + XP_DATA) != value) {
3579 outb(value, (portp->ioaddr + XP_DATA));
014c2544 3580 return 1;
1da177e4 3581 }
014c2544 3582 return 0;
1da177e4
LT		 3583}
3584
3585/*****************************************************************************/
3586
3587/*
3588 * Functions to get and set the sc26198 global registers.
3589 */
3590
ca7ed0f2 3591static int stl_sc26198getglobreg(struct stlport *portp, int regnr)
1da177e4
LT		 3592{
3593 outb(regnr, (portp->ioaddr + XP_ADDR));
014c2544 3594 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3595}
3596
3597#if 0
ca7ed0f2 3598static void stl_sc26198setglobreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3599{
3600 outb(regnr, (portp->ioaddr + XP_ADDR));
3601 outb(value, (portp->ioaddr + XP_DATA));
3602}
3603#endif
3604
3605/*****************************************************************************/
3606
3607/*
3608 * Inbitialize the UARTs in a panel. We don't care what sort of board
3609 * these ports are on - since the port io registers are almost
3610 * identical when dealing with ports.
3611 */
3612
ca7ed0f2 3613static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 3614{
3615 int chipmask, i;
3616 int nrchips, ioaddr;
3617
a0564e14 3618 pr_debug("stl_sc26198panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 3619
3620 BRDENABLE(panelp->brdnr, panelp->pagenr);
3621
3622/*
3623 * Check that each chip is present and started up OK.
3624 */
3625 chipmask = 0;
3626 nrchips = (panelp->nrports + 4) / SC26198_PORTS;
3627 if (brdp->brdtype == BRD_ECHPCI)
3628 outb(panelp->pagenr, brdp->ioctrl);
3629
c62429d9 3630 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 3631 ioaddr = panelp->iobase + (i * 4);
3632 outb(SCCR, (ioaddr + XP_ADDR));
3633 outb(CR_RESETALL, (ioaddr + XP_DATA));
3634 outb(TSTR, (ioaddr + XP_ADDR));
3635 if (inb(ioaddr + XP_DATA) != 0) {
3636 printk("STALLION: sc26198 not responding, "
3637 "brd=%d panel=%d chip=%d\n",
3638 panelp->brdnr, panelp->panelnr, i);
3639 continue;
3640 }
3641 chipmask |= (0x1 << i);
3642 outb(GCCR, (ioaddr + XP_ADDR));
3643 outb(GCCR_IVRTYPCHANACK, (ioaddr + XP_DATA));
3644 outb(WDTRCR, (ioaddr + XP_ADDR));
3645 outb(0xff, (ioaddr + XP_DATA));
3646 }
3647
3648 BRDDISABLE(panelp->brdnr);
014c2544 3649 return chipmask;
1da177e4
LT		 3650}
3651
3652/*****************************************************************************/
3653
3654/*
3655 * Initialize hardware specific port registers.
3656 */
3657
ca7ed0f2 3658static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 3659{
a0564e14
JS		 3660 pr_debug("stl_sc26198portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
3661 panelp, portp);
1da177e4 3662
615e4a71
JS		 3663 if ((brdp == NULL) || (panelp == NULL) ||
3664 (portp == NULL))
1da177e4
LT		 3665 return;
3666
3667 portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4);
3668 portp->uartaddr = (portp->portnr & 0x07) << 4;
3669 portp->pagenr = panelp->pagenr;
3670 portp->hwid = 0x1;
3671
3672 BRDENABLE(portp->brdnr, portp->pagenr);
3673 stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS);
3674 BRDDISABLE(portp->brdnr);
3675}
3676
3677/*****************************************************************************/
3678
3679/*
3680 * Set up the sc26198 registers for a port based on the termios port
3681 * settings.
3682 */
3683
606d099c 3684static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 3685{
ca7ed0f2 3686 struct stlbrd *brdp;
1da177e4
LT		 3687 unsigned long flags;
3688 unsigned int baudrate;
3689 unsigned char mr0, mr1, mr2, clk;
3690 unsigned char imron, imroff, iopr, ipr;
3691
3692 mr0 = 0;
3693 mr1 = 0;
3694 mr2 = 0;
3695 clk = 0;
3696 iopr = 0;
3697 imron = 0;
3698 imroff = 0;
3699
3700 brdp = stl_brds[portp->brdnr];
615e4a71 3701 if (brdp == NULL)
1da177e4
LT		 3702 return;
3703
3704/*
3705 * Set up the RX char ignore mask with those RX error types we
3706 * can ignore.
3707 */
3708 portp->rxignoremsk = 0;
3709 if (tiosp->c_iflag & IGNPAR)
3710 portp->rxignoremsk |= (SR_RXPARITY | SR_RXFRAMING |
3711 SR_RXOVERRUN);
3712 if (tiosp->c_iflag & IGNBRK)
3713 portp->rxignoremsk |= SR_RXBREAK;
3714
3715 portp->rxmarkmsk = SR_RXOVERRUN;
3716 if (tiosp->c_iflag & (INPCK | PARMRK))
3717 portp->rxmarkmsk |= (SR_RXPARITY | SR_RXFRAMING);
3718 if (tiosp->c_iflag & BRKINT)
3719 portp->rxmarkmsk |= SR_RXBREAK;
3720
3721/*
3722 * Go through the char size, parity and stop bits and set all the
3723 * option register appropriately.
3724 */
3725 switch (tiosp->c_cflag & CSIZE) {
3726 case CS5:
3727 mr1 |= MR1_CS5;
3728 break;
3729 case CS6:
3730 mr1 |= MR1_CS6;
3731 break;
3732 case CS7:
3733 mr1 |= MR1_CS7;
3734 break;
3735 default:
3736 mr1 |= MR1_CS8;
3737 break;
3738 }
3739
3740 if (tiosp->c_cflag & CSTOPB)
3741 mr2 |= MR2_STOP2;
3742 else
3743 mr2 |= MR2_STOP1;
3744
3745 if (tiosp->c_cflag & PARENB) {
3746 if (tiosp->c_cflag & PARODD)
3747 mr1 |= (MR1_PARENB | MR1_PARODD);
3748 else
3749 mr1 |= (MR1_PARENB | MR1_PAREVEN);
c62429d9 3750 } else
1da177e4 3751 mr1 |= MR1_PARNONE;
1da177e4
LT		 3752
3753 mr1 |= MR1_ERRBLOCK;
3754
3755/*
3756 * Set the RX FIFO threshold at 8 chars. This gives a bit of breathing
3757 * space for hardware flow control and the like. This should be set to
3758 * VMIN.
3759 */
3760 mr2 |= MR2_RXFIFOHALF;
3761
3762/*
3763 * Calculate the baud rate timers. For now we will just assume that
3764 * the input and output baud are the same. The sc26198 has a fixed
3765 * baud rate table, so only discrete baud rates possible.
3766 */
3767 baudrate = tiosp->c_cflag & CBAUD;
3768 if (baudrate & CBAUDEX) {
3769 baudrate &= ~CBAUDEX;
3770 if ((baudrate < 1) || (baudrate > 4))
3771 tiosp->c_cflag &= ~CBAUDEX;
3772 else
3773 baudrate += 15;
3774 }
3775 baudrate = stl_baudrates[baudrate];
3776 if ((tiosp->c_cflag & CBAUD) == B38400) {
f8ae4764 3777 if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1da177e4 3778 baudrate = 57600;
f8ae4764 3779 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1da177e4 3780 baudrate = 115200;
f8ae4764 3781 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1da177e4 3782 baudrate = 230400;
f8ae4764 3783 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1da177e4 3784 baudrate = 460800;
f8ae4764 3785 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
1da177e4
LT		 3786 baudrate = (portp->baud_base / portp->custom_divisor);
3787 }
3788 if (baudrate > STL_SC26198MAXBAUD)
3789 baudrate = STL_SC26198MAXBAUD;
3790
c62429d9
JS		 3791 if (baudrate > 0)
3792 for (clk = 0; clk < SC26198_NRBAUDS; clk++)
1da177e4
LT		 3793 if (baudrate <= sc26198_baudtable[clk])
3794 break;
1da177e4
LT		 3795
3796/*
3797 * Check what form of modem signaling is required and set it up.
3798 */
3799 if (tiosp->c_cflag & CLOCAL) {
f8ae4764 3800 portp->port.flags &= ~ASYNC_CHECK_CD;
1da177e4
LT		 3801 } else {
3802 iopr |= IOPR_DCDCOS;
3803 imron |= IR_IOPORT;
f8ae4764 3804 portp->port.flags |= ASYNC_CHECK_CD;
1da177e4
LT		 3805 }
3806
3807/*
3808 * Setup sc26198 enhanced modes if we can. In particular we want to
3809 * handle as much of the flow control as possible automatically. As
3810 * well as saving a few CPU cycles it will also greatly improve flow
3811 * control reliability.
3812 */
3813 if (tiosp->c_iflag & IXON) {
3814 mr0 |= MR0_SWFTX | MR0_SWFT;
3815 imron |= IR_XONXOFF;
c62429d9 3816 } else
1da177e4 3817 imroff |= IR_XONXOFF;
c62429d9 3818
1da177e4
LT		 3819 if (tiosp->c_iflag & IXOFF)
3820 mr0 |= MR0_SWFRX;
3821
3822 if (tiosp->c_cflag & CRTSCTS) {
3823 mr2 |= MR2_AUTOCTS;
3824 mr1 |= MR1_AUTORTS;
3825 }
3826
3827/*
3828 * All sc26198 register values calculated so go through and set
3829 * them all up.
3830 */
3831
a0564e14 3832 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 3833 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14
JS		 3834 pr_debug(" mr0=%x mr1=%x mr2=%x clk=%x\n", mr0, mr1, mr2, clk);
3835 pr_debug(" iopr=%x imron=%x imroff=%x\n", iopr, imron, imroff);
3836 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 3837 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
3838 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 3839
b65b5b59 3840 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3841 BRDENABLE(portp->brdnr, portp->pagenr);
3842 stl_sc26198setreg(portp, IMR, 0);
3843 stl_sc26198updatereg(portp, MR0, mr0);
3844 stl_sc26198updatereg(portp, MR1, mr1);
3845 stl_sc26198setreg(portp, SCCR, CR_RXERRBLOCK);
3846 stl_sc26198updatereg(portp, MR2, mr2);
3847 stl_sc26198updatereg(portp, IOPIOR,
3848 ((stl_sc26198getreg(portp, IOPIOR) & ~IPR_CHANGEMASK) | iopr));
3849
3850 if (baudrate > 0) {
3851 stl_sc26198setreg(portp, TXCSR, clk);
3852 stl_sc26198setreg(portp, RXCSR, clk);
3853 }
3854
3855 stl_sc26198setreg(portp, XONCR, tiosp->c_cc[VSTART]);
3856 stl_sc26198setreg(portp, XOFFCR, tiosp->c_cc[VSTOP]);
3857
3858 ipr = stl_sc26198getreg(portp, IPR);
3859 if (ipr & IPR_DCD)
3860 portp->sigs &= ~TIOCM_CD;
3861 else
3862 portp->sigs |= TIOCM_CD;
3863
3864 portp->imr = (portp->imr & ~imroff) | imron;
3865 stl_sc26198setreg(portp, IMR, portp->imr);
3866 BRDDISABLE(portp->brdnr);
b65b5b59 3867 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3868}
3869
3870/*****************************************************************************/
3871
3872/*
3873 * Set the state of the DTR and RTS signals.
3874 */
3875
ca7ed0f2 3876static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 3877{
3878 unsigned char iopioron, iopioroff;
3879 unsigned long flags;
3880
a0564e14
JS		 3881 pr_debug("stl_sc26198setsignals(portp=%p,dtr=%d,rts=%d)\n", portp,
3882 dtr, rts);
1da177e4
LT		 3883
3884 iopioron = 0;
3885 iopioroff = 0;
3886 if (dtr == 0)
3887 iopioroff |= IPR_DTR;
3888 else if (dtr > 0)
3889 iopioron |= IPR_DTR;
3890 if (rts == 0)
3891 iopioroff |= IPR_RTS;
3892 else if (rts > 0)
3893 iopioron |= IPR_RTS;
3894
b65b5b59 3895 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3896 BRDENABLE(portp->brdnr, portp->pagenr);
3897 stl_sc26198setreg(portp, IOPIOR,
3898 ((stl_sc26198getreg(portp, IOPIOR) & ~iopioroff) | iopioron));
3899 BRDDISABLE(portp->brdnr);
b65b5b59 3900 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3901}
3902
3903/*****************************************************************************/
3904
3905/*
3906 * Return the state of the signals.
3907 */
3908
ca7ed0f2 3909static int stl_sc26198getsignals(struct stlport *portp)
1da177e4
LT		 3910{
3911 unsigned char ipr;
3912 unsigned long flags;
3913 int sigs;
3914
a0564e14 3915 pr_debug("stl_sc26198getsignals(portp=%p)\n", portp);
1da177e4 3916
b65b5b59 3917 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3918 BRDENABLE(portp->brdnr, portp->pagenr);
3919 ipr = stl_sc26198getreg(portp, IPR);
3920 BRDDISABLE(portp->brdnr);
b65b5b59 3921 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3922
3923 sigs = 0;
3924 sigs |= (ipr & IPR_DCD) ? 0 : TIOCM_CD;
3925 sigs |= (ipr & IPR_CTS) ? 0 : TIOCM_CTS;
3926 sigs |= (ipr & IPR_DTR) ? 0: TIOCM_DTR;
3927 sigs |= (ipr & IPR_RTS) ? 0: TIOCM_RTS;
3928 sigs |= TIOCM_DSR;
014c2544 3929 return sigs;
1da177e4
LT		 3930}
3931
3932/*****************************************************************************/
3933
3934/*
3935 * Enable/Disable the Transmitter and/or Receiver.
3936 */
3937
ca7ed0f2 3938static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3939{
3940 unsigned char ccr;
3941 unsigned long flags;
3942
a0564e14 3943 pr_debug("stl_sc26198enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx,tx);
1da177e4
LT		 3944
3945 ccr = portp->crenable;
3946 if (tx == 0)
3947 ccr &= ~CR_TXENABLE;
3948 else if (tx > 0)
3949 ccr |= CR_TXENABLE;
3950 if (rx == 0)
3951 ccr &= ~CR_RXENABLE;
3952 else if (rx > 0)
3953 ccr |= CR_RXENABLE;
3954
b65b5b59 3955 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3956 BRDENABLE(portp->brdnr, portp->pagenr);
3957 stl_sc26198setreg(portp, SCCR, ccr);
3958 BRDDISABLE(portp->brdnr);
3959 portp->crenable = ccr;
b65b5b59 3960 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3961}
3962
3963/*****************************************************************************/
3964
3965/*
3966 * Start/stop the Transmitter and/or Receiver.
3967 */
3968
ca7ed0f2 3969static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3970{
3971 unsigned char imr;
3972 unsigned long flags;
3973
a0564e14 3974 pr_debug("stl_sc26198startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 3975
3976 imr = portp->imr;
3977 if (tx == 0)
3978 imr &= ~IR_TXRDY;
3979 else if (tx == 1)
3980 imr |= IR_TXRDY;
3981 if (rx == 0)
3982 imr &= ~(IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG);
3983 else if (rx > 0)
3984 imr |= IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG;
3985
b65b5b59 3986 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3987 BRDENABLE(portp->brdnr, portp->pagenr);
3988 stl_sc26198setreg(portp, IMR, imr);
3989 BRDDISABLE(portp->brdnr);
3990 portp->imr = imr;
3991 if (tx > 0)
3992 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 3993 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3994}
3995
3996/*****************************************************************************/
3997
3998/*
3999 * Disable all interrupts from this port.
4000 */
4001
ca7ed0f2 4002static void stl_sc26198disableintrs(struct stlport *portp)
1da177e4
LT		 4003{
4004 unsigned long flags;
4005
a0564e14 4006 pr_debug("stl_sc26198disableintrs(portp=%p)\n", portp);
1da177e4 4007
b65b5b59 4008 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4009 BRDENABLE(portp->brdnr, portp->pagenr);
4010 portp->imr = 0;
4011 stl_sc26198setreg(portp, IMR, 0);
4012 BRDDISABLE(portp->brdnr);
b65b5b59 4013 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4014}
4015
4016/*****************************************************************************/
4017
ca7ed0f2 4018static void stl_sc26198sendbreak(struct stlport *portp, int len)
1da177e4
LT		 4019{
4020 unsigned long flags;
4021
a0564e14 4022 pr_debug("stl_sc26198sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 4023
b65b5b59 4024 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4025 BRDENABLE(portp->brdnr, portp->pagenr);
4026 if (len == 1) {
4027 stl_sc26198setreg(portp, SCCR, CR_TXSTARTBREAK);
4028 portp->stats.txbreaks++;
c62429d9 4029 } else
1da177e4 4030 stl_sc26198setreg(portp, SCCR, CR_TXSTOPBREAK);
c62429d9 4031
1da177e4 4032 BRDDISABLE(portp->brdnr);
b65b5b59 4033 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4034}
4035
4036/*****************************************************************************/
4037
4038/*
4039 * Take flow control actions...
4040 */
4041
ca7ed0f2 4042static void stl_sc26198flowctrl(struct stlport *portp, int state)
1da177e4
LT		 4043{
4044 struct tty_struct *tty;
4045 unsigned long flags;
4046 unsigned char mr0;
4047
a0564e14 4048 pr_debug("stl_sc26198flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 4049
615e4a71 4050 if (portp == NULL)
1da177e4 4051 return;
d18a750f 4052 tty = tty_port_tty_get(&portp->port);
615e4a71 4053 if (tty == NULL)
1da177e4
LT		 4054 return;
4055
b65b5b59 4056 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4057 BRDENABLE(portp->brdnr, portp->pagenr);
4058
4059 if (state) {
4060 if (tty->termios->c_iflag & IXOFF) {
4061 mr0 = stl_sc26198getreg(portp, MR0);
4062 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4063 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4064 mr0 |= MR0_SWFRX;
4065 portp->stats.rxxon++;
4066 stl_sc26198wait(portp);
4067 stl_sc26198setreg(portp, MR0, mr0);
4068 }
4069/*
4070 * Question: should we return RTS to what it was before? It may
4071 * have been set by an ioctl... Suppose not, since if you have
4072 * hardware flow control set then it is pretty silly to go and
4073 * set the RTS line by hand.
4074 */
4075 if (tty->termios->c_cflag & CRTSCTS) {
4076 stl_sc26198setreg(portp, MR1,
4077 (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS));
4078 stl_sc26198setreg(portp, IOPIOR,
4079 (stl_sc26198getreg(portp, IOPIOR) | IOPR_RTS));
4080 portp->stats.rxrtson++;
4081 }
4082 } else {
4083 if (tty->termios->c_iflag & IXOFF) {
4084 mr0 = stl_sc26198getreg(portp, MR0);
4085 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4086 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4087 mr0 &= ~MR0_SWFRX;
4088 portp->stats.rxxoff++;
4089 stl_sc26198wait(portp);
4090 stl_sc26198setreg(portp, MR0, mr0);
4091 }
4092 if (tty->termios->c_cflag & CRTSCTS) {
4093 stl_sc26198setreg(portp, MR1,
4094 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4095 stl_sc26198setreg(portp, IOPIOR,
4096 (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS));
4097 portp->stats.rxrtsoff++;
4098 }
4099 }
4100
4101 BRDDISABLE(portp->brdnr);
b65b5b59 4102 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 4103 tty_kref_put(tty);
1da177e4
LT		 4104}
4105
4106/*****************************************************************************/
4107
4108/*
4109 * Send a flow control character.
4110 */
4111
ca7ed0f2 4112static void stl_sc26198sendflow(struct stlport *portp, int state)
1da177e4
LT		 4113{
4114 struct tty_struct *tty;
4115 unsigned long flags;
4116 unsigned char mr0;
4117
a0564e14 4118 pr_debug("stl_sc26198sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 4119
615e4a71 4120 if (portp == NULL)
1da177e4 4121 return;
d18a750f 4122 tty = tty_port_tty_get(&portp->port);
615e4a71 4123 if (tty == NULL)
1da177e4
LT		 4124 return;
4125
b65b5b59 4126 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4127 BRDENABLE(portp->brdnr, portp->pagenr);
4128 if (state) {
4129 mr0 = stl_sc26198getreg(portp, MR0);
4130 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4131 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4132 mr0 |= MR0_SWFRX;
4133 portp->stats.rxxon++;
4134 stl_sc26198wait(portp);
4135 stl_sc26198setreg(portp, MR0, mr0);
4136 } else {
4137 mr0 = stl_sc26198getreg(portp, MR0);
4138 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4139 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4140 mr0 &= ~MR0_SWFRX;
4141 portp->stats.rxxoff++;
4142 stl_sc26198wait(portp);
4143 stl_sc26198setreg(portp, MR0, mr0);
4144 }
4145 BRDDISABLE(portp->brdnr);
b65b5b59 4146 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 4147 tty_kref_put(tty);
1da177e4
LT		 4148}
4149
4150/*****************************************************************************/
4151
ca7ed0f2 4152static void stl_sc26198flush(struct stlport *portp)
1da177e4
LT		 4153{
4154 unsigned long flags;
4155
a0564e14 4156 pr_debug("stl_sc26198flush(portp=%p)\n", portp);
1da177e4 4157
615e4a71 4158 if (portp == NULL)
1da177e4
LT		 4159 return;
4160
b65b5b59 4161 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4162 BRDENABLE(portp->brdnr, portp->pagenr);
4163 stl_sc26198setreg(portp, SCCR, CR_TXRESET);
4164 stl_sc26198setreg(portp, SCCR, portp->crenable);
4165 BRDDISABLE(portp->brdnr);
4166 portp->tx.tail = portp->tx.head;
b65b5b59 4167 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4168}
4169
4170/*****************************************************************************/
4171
4172/*
4173 * Return the current state of data flow on this port. This is only
4174 * really interresting when determining if data has fully completed
4175 * transmission or not... The sc26198 interrupt scheme cannot
4176 * determine when all data has actually drained, so we need to
4177 * check the port statusy register to be sure.
4178 */
4179
ca7ed0f2 4180static int stl_sc26198datastate(struct stlport *portp)
1da177e4
LT		 4181{
4182 unsigned long flags;
4183 unsigned char sr;
4184
a0564e14 4185 pr_debug("stl_sc26198datastate(portp=%p)\n", portp);
1da177e4 4186
615e4a71 4187 if (portp == NULL)
014c2544 4188 return 0;
1da177e4 4189 if (test_bit(ASYI_TXBUSY, &portp->istate))
014c2544 4190 return 1;
1da177e4 4191
b65b5b59 4192 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4193 BRDENABLE(portp->brdnr, portp->pagenr);
4194 sr = stl_sc26198getreg(portp, SR);
4195 BRDDISABLE(portp->brdnr);
b65b5b59 4196 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4 4197
014c2544 4198 return (sr & SR_TXEMPTY) ? 0 : 1;
1da177e4
LT		 4199}
4200
4201/*****************************************************************************/
4202
4203/*
4204 * Delay for a small amount of time, to give the sc26198 a chance
4205 * to process a command...
4206 */
4207
ca7ed0f2 4208static void stl_sc26198wait(struct stlport *portp)
1da177e4
LT		 4209{
4210 int i;
4211
a0564e14 4212 pr_debug("stl_sc26198wait(portp=%p)\n", portp);
1da177e4 4213
615e4a71 4214 if (portp == NULL)
1da177e4
LT		 4215 return;
4216
c62429d9 4217 for (i = 0; i < 20; i++)
1da177e4
LT		 4218 stl_sc26198getglobreg(portp, TSTR);
4219}
4220
4221/*****************************************************************************/
4222
4223/*
4224 * If we are TX flow controlled and in IXANY mode then we may
4225 * need to unflow control here. We gotta do this because of the
4226 * automatic flow control modes of the sc26198.
4227 */
4228
60be4810 4229static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty)
1da177e4
LT		 4230{
4231 unsigned char mr0;
4232
4233 mr0 = stl_sc26198getreg(portp, MR0);
4234 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4235 stl_sc26198setreg(portp, SCCR, CR_HOSTXON);
4236 stl_sc26198wait(portp);
4237 stl_sc26198setreg(portp, MR0, mr0);
4238 clear_bit(ASYI_TXFLOWED, &portp->istate);
4239}
4240
4241/*****************************************************************************/
4242
4243/*
4244 * Interrupt service routine for sc26198 panels.
4245 */
4246
ca7ed0f2 4247static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase)
1da177e4 4248{
ca7ed0f2 4249 struct stlport *portp;
1da177e4
LT		 4250 unsigned int iack;
4251
b65b5b59
AC		 4252 spin_lock(&brd_lock);
4253
1da177e4
LT		 4254/*
4255 * Work around bug in sc26198 chip... Cannot have A6 address
4256 * line of UART high, else iack will be returned as 0.
4257 */
4258 outb(0, (iobase + 1));
4259
4260 iack = inb(iobase + XP_IACK);
4261 portp = panelp->ports[(iack & IVR_CHANMASK) + ((iobase & 0x4) << 1)];
4262
4263 if (iack & IVR_RXDATA)
4264 stl_sc26198rxisr(portp, iack);
4265 else if (iack & IVR_TXDATA)
4266 stl_sc26198txisr(portp);
4267 else
4268 stl_sc26198otherisr(portp, iack);
b65b5b59
AC		 4269
4270 spin_unlock(&brd_lock);
1da177e4
LT		 4271}
4272
4273/*****************************************************************************/
4274
4275/*
4276 * Transmit interrupt handler. This has gotta be fast! Handling TX
4277 * chars is pretty simple, stuff as many as possible from the TX buffer
4278 * into the sc26198 FIFO.
4279 * In practice it is possible that interrupts are enabled but that the
4280 * port has been hung up. Need to handle not having any TX buffer here,
4281 * this is done by using the side effect that head and tail will also
4282 * be NULL if the buffer has been freed.
4283 */
4284
ca7ed0f2 4285static void stl_sc26198txisr(struct stlport *portp)
1da177e4 4286{
d18a750f 4287 struct tty_struct *tty;
1da177e4
LT		 4288 unsigned int ioaddr;
4289 unsigned char mr0;
4290 int len, stlen;
4291 char *head, *tail;
4292
a0564e14 4293 pr_debug("stl_sc26198txisr(portp=%p)\n", portp);
1da177e4
LT		 4294
4295 ioaddr = portp->ioaddr;
4296 head = portp->tx.head;
4297 tail = portp->tx.tail;
4298 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
4299 if ((len == 0) || ((len < STL_TXBUFLOW) &&
4300 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
4301 set_bit(ASYI_TXLOW, &portp->istate);
d18a750f
AC		 4302 tty = tty_port_tty_get(&portp->port);
4303 if (tty) {
4304 tty_wakeup(tty);
4305 tty_kref_put(tty);
4306 }
1da177e4
LT		 4307 }
4308
4309 if (len == 0) {
4310 outb((MR0 | portp->uartaddr), (ioaddr + XP_ADDR));
4311 mr0 = inb(ioaddr + XP_DATA);
4312 if ((mr0 & MR0_TXMASK) == MR0_TXEMPTY) {
4313 portp->imr &= ~IR_TXRDY;
4314 outb((IMR | portp->uartaddr), (ioaddr + XP_ADDR));
4315 outb(portp->imr, (ioaddr + XP_DATA));
4316 clear_bit(ASYI_TXBUSY, &portp->istate);
4317 } else {
4318 mr0 |= ((mr0 & ~MR0_TXMASK) | MR0_TXEMPTY);
4319 outb(mr0, (ioaddr + XP_DATA));
4320 }
4321 } else {
843b568c 4322 len = min(len, SC26198_TXFIFOSIZE);
1da177e4 4323 portp->stats.txtotal += len;
319fe7c3
JS		 4324 stlen = min_t(unsigned int, len,
4325 (portp->tx.buf + STL_TXBUFSIZE) - tail);
1da177e4
LT		 4326 outb(GTXFIFO, (ioaddr + XP_ADDR));
4327 outsb((ioaddr + XP_DATA), tail, stlen);
4328 len -= stlen;
4329 tail += stlen;
4330 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
4331 tail = portp->tx.buf;
4332 if (len > 0) {
4333 outsb((ioaddr + XP_DATA), tail, len);
4334 tail += len;
4335 }
4336 portp->tx.tail = tail;
4337 }
4338}
4339
4340/*****************************************************************************/
4341
4342/*
4343 * Receive character interrupt handler. Determine if we have good chars
4344 * or bad chars and then process appropriately. Good chars are easy
4345 * just shove the lot into the RX buffer and set all status byte to 0.
4346 * If a bad RX char then process as required. This routine needs to be
4347 * fast! In practice it is possible that we get an interrupt on a port
4348 * that is closed. This can happen on hangups - since they completely
4349 * shutdown a port not in user context. Need to handle this case.
4350 */
4351
ca7ed0f2 4352static void stl_sc26198rxisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4353{
4354 struct tty_struct *tty;
4355 unsigned int len, buflen, ioaddr;
4356
a0564e14 4357 pr_debug("stl_sc26198rxisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4 4358
d18a750f 4359 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 4360 ioaddr = portp->ioaddr;
4361 outb(GIBCR, (ioaddr + XP_ADDR));
4362 len = inb(ioaddr + XP_DATA) + 1;
4363
4364 if ((iack & IVR_TYPEMASK) == IVR_RXDATA) {
33f0f88f 4365 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
319fe7c3 4366 len = min_t(unsigned int, len, sizeof(stl_unwanted));
1da177e4
LT		 4367 outb(GRXFIFO, (ioaddr + XP_ADDR));
4368 insb((ioaddr + XP_DATA), &stl_unwanted[0], len);
4369 portp->stats.rxlost += len;
4370 portp->stats.rxtotal += len;
4371 } else {
843b568c 4372 len = min(len, buflen);
1da177e4 4373 if (len > 0) {
33f0f88f 4374 unsigned char *ptr;
1da177e4 4375 outb(GRXFIFO, (ioaddr + XP_ADDR));
33f0f88f
AC		 4376 tty_prepare_flip_string(tty, &ptr, len);
4377 insb((ioaddr + XP_DATA), ptr, len);
1da177e4
LT		 4378 tty_schedule_flip(tty);
4379 portp->stats.rxtotal += len;
4380 }
4381 }
4382 } else {
4383 stl_sc26198rxbadchars(portp);
4384 }
4385
4386/*
4387 * If we are TX flow controlled and in IXANY mode then we may need
4388 * to unflow control here. We gotta do this because of the automatic
4389 * flow control modes of the sc26198.
4390 */
4391 if (test_bit(ASYI_TXFLOWED, &portp->istate)) {
615e4a71
JS		 4392 if ((tty != NULL) &&
4393 (tty->termios != NULL) &&
1da177e4
LT		 4394 (tty->termios->c_iflag & IXANY)) {
4395 stl_sc26198txunflow(portp, tty);
4396 }
4397 }
d18a750f 4398 tty_kref_put(tty);
1da177e4
LT		 4399}
4400
4401/*****************************************************************************/
4402
4403/*
4404 * Process an RX bad character.
4405 */
4406
60be4810 4407static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch)
1da177e4
LT		 4408{
4409 struct tty_struct *tty;
4410 unsigned int ioaddr;
4411
d18a750f 4412 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 4413 ioaddr = portp->ioaddr;
4414
4415 if (status & SR_RXPARITY)
4416 portp->stats.rxparity++;
4417 if (status & SR_RXFRAMING)
4418 portp->stats.rxframing++;
4419 if (status & SR_RXOVERRUN)
4420 portp->stats.rxoverrun++;
4421 if (status & SR_RXBREAK)
4422 portp->stats.rxbreaks++;
4423
615e4a71 4424 if ((tty != NULL) &&
1da177e4
LT		 4425 ((portp->rxignoremsk & status) == 0)) {
4426 if (portp->rxmarkmsk & status) {
4427 if (status & SR_RXBREAK) {
4428 status = TTY_BREAK;
f8ae4764 4429 if (portp->port.flags & ASYNC_SAK) {
1da177e4
LT		 4430 do_SAK(tty);
4431 BRDENABLE(portp->brdnr, portp->pagenr);
4432 }
c62429d9 4433 } else if (status & SR_RXPARITY)
1da177e4 4434 status = TTY_PARITY;
c62429d9 4435 else if (status & SR_RXFRAMING)
1da177e4 4436 status = TTY_FRAME;
c62429d9 4437 else if(status & SR_RXOVERRUN)
1da177e4 4438 status = TTY_OVERRUN;
c62429d9 4439 else
1da177e4 4440 status = 0;
c62429d9 4441 } else
1da177e4 4442 status = 0;
1da177e4 4443
33f0f88f
AC		 4444 tty_insert_flip_char(tty, ch, status);
4445 tty_schedule_flip(tty);
1da177e4
LT		 4446
4447 if (status == 0)
4448 portp->stats.rxtotal++;
4449 }
d18a750f 4450 tty_kref_put(tty);
1da177e4
LT		 4451}
4452
4453/*****************************************************************************/
4454
4455/*
4456 * Process all characters in the RX FIFO of the UART. Check all char
4457 * status bytes as well, and process as required. We need to check
4458 * all bytes in the FIFO, in case some more enter the FIFO while we
4459 * are here. To get the exact character error type we need to switch
4460 * into CHAR error mode (that is why we need to make sure we empty
4461 * the FIFO).
4462 */
4463
ca7ed0f2 4464static void stl_sc26198rxbadchars(struct stlport *portp)
1da177e4
LT		 4465{
4466 unsigned char status, mr1;
4467 char ch;
4468
4469/*
4470 * To get the precise error type for each character we must switch
4471 * back into CHAR error mode.
4472 */
4473 mr1 = stl_sc26198getreg(portp, MR1);
4474 stl_sc26198setreg(portp, MR1, (mr1 & ~MR1_ERRBLOCK));
4475
4476 while ((status = stl_sc26198getreg(portp, SR)) & SR_RXRDY) {
4477 stl_sc26198setreg(portp, SCCR, CR_CLEARRXERR);
4478 ch = stl_sc26198getreg(portp, RXFIFO);
4479 stl_sc26198rxbadch(portp, status, ch);
4480 }
4481
4482/*
4483 * To get correct interrupt class we must switch back into BLOCK
4484 * error mode.
4485 */
4486 stl_sc26198setreg(portp, MR1, mr1);
4487}
4488
4489/*****************************************************************************/
4490
4491/*
4492 * Other interrupt handler. This includes modem signals, flow
4493 * control actions, etc. Most stuff is left to off-level interrupt
4494 * processing time.
4495 */
4496
ca7ed0f2 4497static void stl_sc26198otherisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4498{
4499 unsigned char cir, ipr, xisr;
4500
a0564e14 4501 pr_debug("stl_sc26198otherisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4
LT		 4502
4503 cir = stl_sc26198getglobreg(portp, CIR);
4504
4505 switch (cir & CIR_SUBTYPEMASK) {
4506 case CIR_SUBCOS:
4507 ipr = stl_sc26198getreg(portp, IPR);
4508 if (ipr & IPR_DCDCHANGE) {
ccfea3c9 4509 stl_cd_change(portp);
1da177e4
LT		 4510 portp->stats.modem++;
4511 }
4512 break;
4513 case CIR_SUBXONXOFF:
4514 xisr = stl_sc26198getreg(portp, XISR);
4515 if (xisr & XISR_RXXONGOT) {
4516 set_bit(ASYI_TXFLOWED, &portp->istate);
4517 portp->stats.txxoff++;
4518 }
4519 if (xisr & XISR_RXXOFFGOT) {
4520 clear_bit(ASYI_TXFLOWED, &portp->istate);
4521 portp->stats.txxon++;
4522 }
4523 break;
4524 case CIR_SUBBREAK:
4525 stl_sc26198setreg(portp, SCCR, CR_BREAKRESET);
4526 stl_sc26198rxbadchars(portp);
4527 break;
4528 default:
4529 break;
4530 }
4531}
4532
fc06b5cf
JS		 4533static void stl_free_isabrds(void)
4534{
4535 struct stlbrd *brdp;
4536 unsigned int i;
4537
4538 for (i = 0; i < stl_nrbrds; i++) {
4539 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4540 continue;
4541
4542 free_irq(brdp->irq, brdp);
4543
4544 stl_cleanup_panels(brdp);
4545
4546 release_region(brdp->ioaddr1, brdp->iosize1);
4547 if (brdp->iosize2 > 0)
4548 release_region(brdp->ioaddr2, brdp->iosize2);
4549
4550 kfree(brdp);
4551 stl_brds[i] = NULL;
4552 }
4553}
4554
23b85a15
JS		 4555/*
4556 * Loadable module initialization stuff.
4557 */
4558static int __init stallion_module_init(void)
4559{
843b568c
JS		 4560 struct stlbrd *brdp;
4561 struct stlconf conf;
aeaccfe4 4562 unsigned int i, j;
fc06b5cf 4563 int retval;
23b85a15
JS		 4564
4565 printk(KERN_INFO "%s: version %s\n", stl_drvtitle, stl_drvversion);
4566
4567 spin_lock_init(&stallion_lock);
4568 spin_lock_init(&brd_lock);
4569
e415109f
JS		 4570 stl_serial = alloc_tty_driver(STL_MAXBRDS * STL_MAXPORTS);
4571 if (!stl_serial) {
4572 retval = -ENOMEM;
4573 goto err;
4574 }
4575
4576 stl_serial->owner = THIS_MODULE;
4577 stl_serial->driver_name = stl_drvname;
4578 stl_serial->name = "ttyE";
4579 stl_serial->major = STL_SERIALMAJOR;
4580 stl_serial->minor_start = 0;
4581 stl_serial->type = TTY_DRIVER_TYPE_SERIAL;
4582 stl_serial->subtype = SERIAL_TYPE_NORMAL;
4583 stl_serial->init_termios = stl_deftermios;
4584 stl_serial->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
4585 tty_set_operations(stl_serial, &stl_ops);
4586
4587 retval = tty_register_driver(stl_serial);
4588 if (retval) {
4589 printk("STALLION: failed to register serial driver\n");
4590 goto err_frtty;
4591 }
4592
843b568c
JS		 4593/*
4594 * Find any dynamically supported boards. That is via module load
4595 * line options.
4596 */
4597 for (i = stl_nrbrds; i < stl_nargs; i++) {
4598 memset(&conf, 0, sizeof(conf));
4599 if (stl_parsebrd(&conf, stl_brdsp[i]) == 0)
4600 continue;
4601 if ((brdp = stl_allocbrd()) == NULL)
4602 continue;
4603 brdp->brdnr = i;
4604 brdp->brdtype = conf.brdtype;
4605 brdp->ioaddr1 = conf.ioaddr1;
4606 brdp->ioaddr2 = conf.ioaddr2;
4607 brdp->irq = conf.irq;
4608 brdp->irqtype = conf.irqtype;
b08b5ad9
IK		 4609 stl_brds[brdp->brdnr] = brdp;
4610 if (stl_brdinit(brdp)) {
4611 stl_brds[brdp->brdnr] = NULL;
843b568c 4612 kfree(brdp);
b08b5ad9 4613 } else {
aeaccfe4
JS		 4614 for (j = 0; j < brdp->nrports; j++)
4615 tty_register_device(stl_serial,
4616 brdp->brdnr * STL_MAXPORTS + j, NULL);
843b568c 4617 stl_nrbrds = i + 1;
79cfe7ab 4618 }
843b568c 4619 }
23b85a15 4620
79cfe7ab 4621 /* this has to be _after_ isa finding because of locking */
b1b84fe0 4622 retval = pci_register_driver(&stl_pcidriver);
e415109f
JS		 4623 if (retval && stl_nrbrds == 0) {
4624 printk(KERN_ERR "STALLION: can't register pci driver\n");
4625 goto err_unrtty;
fc06b5cf 4626 }
23b85a15
JS		 4627
4628/*
4629 * Set up a character driver for per board stuff. This is mainly used
4630 * to do stats ioctls on the ports.
4631 */
4632 if (register_chrdev(STL_SIOMEMMAJOR, "staliomem", &stl_fsiomem))
4633 printk("STALLION: failed to register serial board device\n");
4634
4635 stallion_class = class_create(THIS_MODULE, "staliomem");
e415109f
JS		 4636 if (IS_ERR(stallion_class))
4637 printk("STALLION: failed to create class\n");
23b85a15 4638 for (i = 0; i < 4; i++)
03457cd4
GKH		 4639 device_create(stallion_class, NULL, MKDEV(STL_SIOMEMMAJOR, i),
4640 NULL, "staliomem%d", i);
23b85a15 4641
23b85a15 4642 return 0;
e415109f
JS		 4643err_unrtty:
4644 tty_unregister_driver(stl_serial);
4645err_frtty:
fc06b5cf 4646 put_tty_driver(stl_serial);
b1b84fe0
JS		 4647err:
4648 return retval;
23b85a15
JS		 4649}
4650
4651static void __exit stallion_module_exit(void)
4652{
aeaccfe4
JS		 4653 struct stlbrd *brdp;
4654 unsigned int i, j;
23b85a15
JS		 4655
4656 pr_debug("cleanup_module()\n");
4657
4658 printk(KERN_INFO "Unloading %s: version %s\n", stl_drvtitle,
4659 stl_drvversion);
4660
4661/*
4662 * Free up all allocated resources used by the ports. This includes
4663 * memory and interrupts. As part of this process we will also do
4664 * a hangup on every open port - to try to flush out any processes
4665 * hanging onto ports.
4666 */
aeaccfe4
JS		 4667 for (i = 0; i < stl_nrbrds; i++) {
4668 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4669 continue;
4670 for (j = 0; j < brdp->nrports; j++)
4671 tty_unregister_device(stl_serial,
4672 brdp->brdnr * STL_MAXPORTS + j);
4673 }
fc06b5cf 4674
23b85a15 4675 for (i = 0; i < 4; i++)
07c015e7 4676 device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i));
68fc4fab 4677 unregister_chrdev(STL_SIOMEMMAJOR, "staliomem");
23b85a15
JS		 4678 class_destroy(stallion_class);
4679
b1b84fe0
JS		 4680 pci_unregister_driver(&stl_pcidriver);
4681
fc06b5cf 4682 stl_free_isabrds();
e415109f
JS		 4683
4684 tty_unregister_driver(stl_serial);
4685 put_tty_driver(stl_serial);
23b85a15
JS		 4686}
4687
4688module_init(stallion_module_init);
4689module_exit(stallion_module_exit);
4690
4691MODULE_AUTHOR("Greg Ungerer");
4692MODULE_DESCRIPTION("Stallion Multiport Serial Driver");
4693MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)