Commit | Line | Data |
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1da177e4 | 1 | /* |
5fd1fe9c | 2 | * Real Time Clock interface for Linux |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 1996 Paul Gortmaker | |
5 | * | |
6 | * This driver allows use of the real time clock (built into | |
7 | * nearly all computers) from user space. It exports the /dev/rtc | |
8 | * interface supporting various ioctl() and also the | |
9 | * /proc/driver/rtc pseudo-file for status information. | |
10 | * | |
11 | * The ioctls can be used to set the interrupt behaviour and | |
12 | * generation rate from the RTC via IRQ 8. Then the /dev/rtc | |
13 | * interface can be used to make use of these timer interrupts, | |
14 | * be they interval or alarm based. | |
15 | * | |
16 | * The /dev/rtc interface will block on reads until an interrupt | |
17 | * has been received. If a RTC interrupt has already happened, | |
18 | * it will output an unsigned long and then block. The output value | |
19 | * contains the interrupt status in the low byte and the number of | |
5fd1fe9c | 20 | * interrupts since the last read in the remaining high bytes. The |
1da177e4 LT |
21 | * /dev/rtc interface can also be used with the select(2) call. |
22 | * | |
23 | * This program is free software; you can redistribute it and/or | |
24 | * modify it under the terms of the GNU General Public License | |
25 | * as published by the Free Software Foundation; either version | |
26 | * 2 of the License, or (at your option) any later version. | |
27 | * | |
28 | * Based on other minimal char device drivers, like Alan's | |
29 | * watchdog, Ted's random, etc. etc. | |
30 | * | |
31 | * 1.07 Paul Gortmaker. | |
32 | * 1.08 Miquel van Smoorenburg: disallow certain things on the | |
33 | * DEC Alpha as the CMOS clock is also used for other things. | |
34 | * 1.09 Nikita Schmidt: epoch support and some Alpha cleanup. | |
35 | * 1.09a Pete Zaitcev: Sun SPARC | |
36 | * 1.09b Jeff Garzik: Modularize, init cleanup | |
37 | * 1.09c Jeff Garzik: SMP cleanup | |
12a0a703 | 38 | * 1.10 Paul Barton-Davis: add support for async I/O |
1da177e4 LT |
39 | * 1.10a Andrea Arcangeli: Alpha updates |
40 | * 1.10b Andrew Morton: SMP lock fix | |
41 | * 1.10c Cesar Barros: SMP locking fixes and cleanup | |
42 | * 1.10d Paul Gortmaker: delete paranoia check in rtc_exit | |
43 | * 1.10e Maciej W. Rozycki: Handle DECstation's year weirdness. | |
12a0a703 | 44 | * 1.11 Takashi Iwai: Kernel access functions |
1da177e4 LT |
45 | * rtc_register/rtc_unregister/rtc_control |
46 | * 1.11a Daniele Bellucci: Audit create_proc_read_entry in rtc_init | |
47 | * 1.12 Venkatesh Pallipadi: Hooks for emulating rtc on HPET base-timer | |
48 | * CONFIG_HPET_EMULATE_RTC | |
38e0e8c0 | 49 | * 1.12a Maciej W. Rozycki: Handle memory-mapped chips properly. |
b7599587 | 50 | * 1.12ac Alan Cox: Allow read access to the day of week register |
048cd588 | 51 | * 1.12b David John: Remove calls to the BKL. |
1da177e4 LT |
52 | */ |
53 | ||
048cd588 | 54 | #define RTC_VERSION "1.12b" |
1da177e4 | 55 | |
1da177e4 LT |
56 | /* |
57 | * Note that *all* calls to CMOS_READ and CMOS_WRITE are done with | |
58 | * interrupts disabled. Due to the index-port/data-port (0x70/0x71) | |
59 | * design of the RTC, we don't want two different things trying to | |
5196d203 MW |
60 | * get to it at once. (e.g. the periodic 11 min sync from |
61 | * kernel/time/ntp.c vs. this driver.) | |
1da177e4 LT |
62 | */ |
63 | ||
1da177e4 LT |
64 | #include <linux/interrupt.h> |
65 | #include <linux/module.h> | |
66 | #include <linux/kernel.h> | |
67 | #include <linux/types.h> | |
68 | #include <linux/miscdevice.h> | |
69 | #include <linux/ioport.h> | |
70 | #include <linux/fcntl.h> | |
71 | #include <linux/mc146818rtc.h> | |
72 | #include <linux/init.h> | |
73 | #include <linux/poll.h> | |
74 | #include <linux/proc_fs.h> | |
75 | #include <linux/seq_file.h> | |
76 | #include <linux/spinlock.h> | |
174cd4b1 | 77 | #include <linux/sched/signal.h> |
1da177e4 LT |
78 | #include <linux/sysctl.h> |
79 | #include <linux/wait.h> | |
80 | #include <linux/bcd.h> | |
47f176fd | 81 | #include <linux/delay.h> |
53f1b143 | 82 | #include <linux/uaccess.h> |
a28ee477 | 83 | #include <linux/ratelimit.h> |
1da177e4 LT |
84 | |
85 | #include <asm/current.h> | |
1da177e4 | 86 | |
55f93afd | 87 | #ifdef CONFIG_X86 |
1da177e4 LT |
88 | #include <asm/hpet.h> |
89 | #endif | |
90 | ||
cdee99d7 | 91 | #ifdef CONFIG_SPARC32 |
75081322 DM |
92 | #include <linux/of.h> |
93 | #include <linux/of_device.h> | |
94 | #include <asm/io.h> | |
1da177e4 LT |
95 | |
96 | static unsigned long rtc_port; | |
75081322 | 97 | static int rtc_irq; |
1da177e4 LT |
98 | #endif |
99 | ||
0f4d3fd8 | 100 | #ifdef CONFIG_HPET_EMULATE_RTC |
1da177e4 LT |
101 | #undef RTC_IRQ |
102 | #endif | |
103 | ||
104 | #ifdef RTC_IRQ | |
105 | static int rtc_has_irq = 1; | |
106 | #endif | |
107 | ||
108 | #ifndef CONFIG_HPET_EMULATE_RTC | |
109 | #define is_hpet_enabled() 0 | |
5fd1fe9c IM |
110 | #define hpet_set_alarm_time(hrs, min, sec) 0 |
111 | #define hpet_set_periodic_freq(arg) 0 | |
112 | #define hpet_mask_rtc_irq_bit(arg) 0 | |
113 | #define hpet_set_rtc_irq_bit(arg) 0 | |
114 | #define hpet_rtc_timer_init() do { } while (0) | |
115 | #define hpet_rtc_dropped_irq() 0 | |
32fa4586 DH |
116 | #define hpet_register_irq_handler(h) ({ 0; }) |
117 | #define hpet_unregister_irq_handler(h) ({ 0; }) | |
533ffc28 AM |
118 | #ifdef RTC_IRQ |
119 | static irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id) | |
120 | { | |
121 | return 0; | |
122 | } | |
123 | #endif | |
1da177e4 LT |
124 | #endif |
125 | ||
126 | /* | |
127 | * We sponge a minor off of the misc major. No need slurping | |
128 | * up another valuable major dev number for this. If you add | |
129 | * an ioctl, make sure you don't conflict with SPARC's RTC | |
130 | * ioctls. | |
131 | */ | |
132 | ||
133 | static struct fasync_struct *rtc_async_queue; | |
134 | ||
135 | static DECLARE_WAIT_QUEUE_HEAD(rtc_wait); | |
136 | ||
137 | #ifdef RTC_IRQ | |
24ed960a | 138 | static void rtc_dropped_irq(struct timer_list *unused); |
40565f19 | 139 | |
1d27e3e2 | 140 | static DEFINE_TIMER(rtc_irq_timer, rtc_dropped_irq); |
1da177e4 LT |
141 | #endif |
142 | ||
143 | static ssize_t rtc_read(struct file *file, char __user *buf, | |
144 | size_t count, loff_t *ppos); | |
145 | ||
53f1b143 | 146 | static long rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg); |
9580d85f | 147 | static void rtc_get_rtc_time(struct rtc_time *rtc_tm); |
1da177e4 LT |
148 | |
149 | #ifdef RTC_IRQ | |
afc9a42b | 150 | static __poll_t rtc_poll(struct file *file, poll_table *wait); |
1da177e4 LT |
151 | #endif |
152 | ||
5fd1fe9c | 153 | static void get_rtc_alm_time(struct rtc_time *alm_tm); |
1da177e4 | 154 | #ifdef RTC_IRQ |
c3348760 TI |
155 | static void set_rtc_irq_bit_locked(unsigned char bit); |
156 | static void mask_rtc_irq_bit_locked(unsigned char bit); | |
157 | ||
158 | static inline void set_rtc_irq_bit(unsigned char bit) | |
159 | { | |
160 | spin_lock_irq(&rtc_lock); | |
161 | set_rtc_irq_bit_locked(bit); | |
162 | spin_unlock_irq(&rtc_lock); | |
163 | } | |
164 | ||
165 | static void mask_rtc_irq_bit(unsigned char bit) | |
166 | { | |
167 | spin_lock_irq(&rtc_lock); | |
168 | mask_rtc_irq_bit_locked(bit); | |
169 | spin_unlock_irq(&rtc_lock); | |
170 | } | |
1da177e4 LT |
171 | #endif |
172 | ||
9cef779e | 173 | #ifdef CONFIG_PROC_FS |
3f3942ac | 174 | static int rtc_proc_show(struct seq_file *seq, void *v); |
9cef779e | 175 | #endif |
1da177e4 LT |
176 | |
177 | /* | |
178 | * Bits in rtc_status. (6 bits of room for future expansion) | |
179 | */ | |
180 | ||
181 | #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */ | |
182 | #define RTC_TIMER_ON 0x02 /* missed irq timer active */ | |
183 | ||
184 | /* | |
185 | * rtc_status is never changed by rtc_interrupt, and ioctl/open/close is | |
048cd588 DJ |
186 | * protected by the spin lock rtc_lock. However, ioctl can still disable the |
187 | * timer in rtc_status and then with del_timer after the interrupt has read | |
1da177e4 LT |
188 | * rtc_status but before mod_timer is called, which would then reenable the |
189 | * timer (but you would need to have an awful timing before you'd trip on it) | |
190 | */ | |
5fd1fe9c IM |
191 | static unsigned long rtc_status; /* bitmapped status byte. */ |
192 | static unsigned long rtc_freq; /* Current periodic IRQ rate */ | |
193 | static unsigned long rtc_irq_data; /* our output to the world */ | |
1da177e4 LT |
194 | static unsigned long rtc_max_user_freq = 64; /* > this, need CAP_SYS_RESOURCE */ |
195 | ||
1da177e4 LT |
196 | /* |
197 | * If this driver ever becomes modularised, it will be really nice | |
198 | * to make the epoch retain its value across module reload... | |
199 | */ | |
200 | ||
201 | static unsigned long epoch = 1900; /* year corresponding to 0x00 */ | |
202 | ||
5fd1fe9c | 203 | static const unsigned char days_in_mo[] = |
1da177e4 LT |
204 | {0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}; |
205 | ||
206 | /* | |
207 | * Returns true if a clock update is in progress | |
208 | */ | |
209 | static inline unsigned char rtc_is_updating(void) | |
210 | { | |
0b16f21f | 211 | unsigned long flags; |
1da177e4 LT |
212 | unsigned char uip; |
213 | ||
0b16f21f | 214 | spin_lock_irqsave(&rtc_lock, flags); |
1da177e4 | 215 | uip = (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP); |
0b16f21f | 216 | spin_unlock_irqrestore(&rtc_lock, flags); |
1da177e4 LT |
217 | return uip; |
218 | } | |
219 | ||
220 | #ifdef RTC_IRQ | |
221 | /* | |
d88ed628 | 222 | * A very tiny interrupt handler. It runs with interrupts disabled, |
1da177e4 LT |
223 | * but there is possibility of conflicting with the set_rtc_mmss() |
224 | * call (the rtc irq and the timer irq can easily run at the same | |
225 | * time in two different CPUs). So we need to serialize | |
226 | * accesses to the chip with the rtc_lock spinlock that each | |
227 | * architecture should implement in the timer code. | |
228 | * (See ./arch/XXXX/kernel/time.c for the set_rtc_mmss() function.) | |
229 | */ | |
230 | ||
9580d85f | 231 | static irqreturn_t rtc_interrupt(int irq, void *dev_id) |
1da177e4 LT |
232 | { |
233 | /* | |
234 | * Can be an alarm interrupt, update complete interrupt, | |
235 | * or a periodic interrupt. We store the status in the | |
236 | * low byte and the number of interrupts received since | |
237 | * the last read in the remainder of rtc_irq_data. | |
238 | */ | |
239 | ||
5fd1fe9c | 240 | spin_lock(&rtc_lock); |
1da177e4 LT |
241 | rtc_irq_data += 0x100; |
242 | rtc_irq_data &= ~0xff; | |
243 | if (is_hpet_enabled()) { | |
244 | /* | |
245 | * In this case it is HPET RTC interrupt handler | |
246 | * calling us, with the interrupt information | |
247 | * passed as arg1, instead of irq. | |
248 | */ | |
249 | rtc_irq_data |= (unsigned long)irq & 0xF0; | |
250 | } else { | |
251 | rtc_irq_data |= (CMOS_READ(RTC_INTR_FLAGS) & 0xF0); | |
252 | } | |
253 | ||
254 | if (rtc_status & RTC_TIMER_ON) | |
255 | mod_timer(&rtc_irq_timer, jiffies + HZ/rtc_freq + 2*HZ/100); | |
256 | ||
5fd1fe9c | 257 | spin_unlock(&rtc_lock); |
1da177e4 | 258 | |
5fd1fe9c | 259 | wake_up_interruptible(&rtc_wait); |
1da177e4 | 260 | |
5fd1fe9c | 261 | kill_fasync(&rtc_async_queue, SIGIO, POLL_IN); |
1da177e4 LT |
262 | |
263 | return IRQ_HANDLED; | |
264 | } | |
265 | #endif | |
266 | ||
267 | /* | |
268 | * sysctl-tuning infrastructure. | |
269 | */ | |
a151427e | 270 | static struct ctl_table rtc_table[] = { |
1da177e4 | 271 | { |
1da177e4 LT |
272 | .procname = "max-user-freq", |
273 | .data = &rtc_max_user_freq, | |
274 | .maxlen = sizeof(int), | |
275 | .mode = 0644, | |
6d456111 | 276 | .proc_handler = proc_dointvec, |
1da177e4 | 277 | }, |
894d2491 | 278 | { } |
1da177e4 LT |
279 | }; |
280 | ||
a151427e | 281 | static struct ctl_table rtc_root[] = { |
1da177e4 | 282 | { |
1da177e4 | 283 | .procname = "rtc", |
1da177e4 LT |
284 | .mode = 0555, |
285 | .child = rtc_table, | |
286 | }, | |
894d2491 | 287 | { } |
1da177e4 LT |
288 | }; |
289 | ||
a151427e | 290 | static struct ctl_table dev_root[] = { |
1da177e4 | 291 | { |
1da177e4 | 292 | .procname = "dev", |
1da177e4 LT |
293 | .mode = 0555, |
294 | .child = rtc_root, | |
295 | }, | |
894d2491 | 296 | { } |
1da177e4 LT |
297 | }; |
298 | ||
299 | static struct ctl_table_header *sysctl_header; | |
300 | ||
301 | static int __init init_sysctl(void) | |
302 | { | |
0b4d4147 | 303 | sysctl_header = register_sysctl_table(dev_root); |
1da177e4 LT |
304 | return 0; |
305 | } | |
306 | ||
307 | static void __exit cleanup_sysctl(void) | |
308 | { | |
309 | unregister_sysctl_table(sysctl_header); | |
310 | } | |
311 | ||
312 | /* | |
313 | * Now all the various file operations that we export. | |
314 | */ | |
315 | ||
316 | static ssize_t rtc_read(struct file *file, char __user *buf, | |
317 | size_t count, loff_t *ppos) | |
318 | { | |
319 | #ifndef RTC_IRQ | |
320 | return -EIO; | |
321 | #else | |
322 | DECLARE_WAITQUEUE(wait, current); | |
323 | unsigned long data; | |
324 | ssize_t retval; | |
5fd1fe9c | 325 | |
1da177e4 LT |
326 | if (rtc_has_irq == 0) |
327 | return -EIO; | |
328 | ||
38e0e8c0 MR |
329 | /* |
330 | * Historically this function used to assume that sizeof(unsigned long) | |
331 | * is the same in userspace and kernelspace. This lead to problems | |
332 | * for configurations with multiple ABIs such a the MIPS o32 and 64 | |
333 | * ABIs supported on the same kernel. So now we support read of both | |
334 | * 4 and 8 bytes and assume that's the sizeof(unsigned long) in the | |
335 | * userspace ABI. | |
336 | */ | |
337 | if (count != sizeof(unsigned int) && count != sizeof(unsigned long)) | |
1da177e4 LT |
338 | return -EINVAL; |
339 | ||
340 | add_wait_queue(&rtc_wait, &wait); | |
341 | ||
342 | do { | |
343 | /* First make it right. Then make it fast. Putting this whole | |
344 | * block within the parentheses of a while would be too | |
345 | * confusing. And no, xchg() is not the answer. */ | |
346 | ||
347 | __set_current_state(TASK_INTERRUPTIBLE); | |
5fd1fe9c IM |
348 | |
349 | spin_lock_irq(&rtc_lock); | |
1da177e4 LT |
350 | data = rtc_irq_data; |
351 | rtc_irq_data = 0; | |
5fd1fe9c | 352 | spin_unlock_irq(&rtc_lock); |
1da177e4 LT |
353 | |
354 | if (data != 0) | |
355 | break; | |
356 | ||
357 | if (file->f_flags & O_NONBLOCK) { | |
358 | retval = -EAGAIN; | |
359 | goto out; | |
360 | } | |
361 | if (signal_pending(current)) { | |
362 | retval = -ERESTARTSYS; | |
363 | goto out; | |
364 | } | |
365 | schedule(); | |
366 | } while (1); | |
367 | ||
5fd1fe9c IM |
368 | if (count == sizeof(unsigned int)) { |
369 | retval = put_user(data, | |
370 | (unsigned int __user *)buf) ?: sizeof(int); | |
371 | } else { | |
372 | retval = put_user(data, | |
373 | (unsigned long __user *)buf) ?: sizeof(long); | |
374 | } | |
38e0e8c0 MR |
375 | if (!retval) |
376 | retval = count; | |
1da177e4 | 377 | out: |
cc0a8fbb | 378 | __set_current_state(TASK_RUNNING); |
1da177e4 LT |
379 | remove_wait_queue(&rtc_wait, &wait); |
380 | ||
381 | return retval; | |
382 | #endif | |
383 | } | |
384 | ||
385 | static int rtc_do_ioctl(unsigned int cmd, unsigned long arg, int kernel) | |
386 | { | |
5fd1fe9c | 387 | struct rtc_time wtime; |
1da177e4 LT |
388 | |
389 | #ifdef RTC_IRQ | |
390 | if (rtc_has_irq == 0) { | |
391 | switch (cmd) { | |
392 | case RTC_AIE_OFF: | |
393 | case RTC_AIE_ON: | |
394 | case RTC_PIE_OFF: | |
395 | case RTC_PIE_ON: | |
396 | case RTC_UIE_OFF: | |
397 | case RTC_UIE_ON: | |
398 | case RTC_IRQP_READ: | |
399 | case RTC_IRQP_SET: | |
400 | return -EINVAL; | |
f8885c26 | 401 | } |
1da177e4 LT |
402 | } |
403 | #endif | |
404 | ||
405 | switch (cmd) { | |
406 | #ifdef RTC_IRQ | |
407 | case RTC_AIE_OFF: /* Mask alarm int. enab. bit */ | |
408 | { | |
409 | mask_rtc_irq_bit(RTC_AIE); | |
410 | return 0; | |
411 | } | |
412 | case RTC_AIE_ON: /* Allow alarm interrupts. */ | |
413 | { | |
414 | set_rtc_irq_bit(RTC_AIE); | |
415 | return 0; | |
416 | } | |
417 | case RTC_PIE_OFF: /* Mask periodic int. enab. bit */ | |
418 | { | |
5fd1fe9c IM |
419 | /* can be called from isr via rtc_control() */ |
420 | unsigned long flags; | |
421 | ||
422 | spin_lock_irqsave(&rtc_lock, flags); | |
c3348760 | 423 | mask_rtc_irq_bit_locked(RTC_PIE); |
1da177e4 | 424 | if (rtc_status & RTC_TIMER_ON) { |
1da177e4 LT |
425 | rtc_status &= ~RTC_TIMER_ON; |
426 | del_timer(&rtc_irq_timer); | |
1da177e4 | 427 | } |
5fd1fe9c IM |
428 | spin_unlock_irqrestore(&rtc_lock, flags); |
429 | ||
1da177e4 LT |
430 | return 0; |
431 | } | |
432 | case RTC_PIE_ON: /* Allow periodic ints */ | |
433 | { | |
5fd1fe9c IM |
434 | /* can be called from isr via rtc_control() */ |
435 | unsigned long flags; | |
436 | ||
1da177e4 LT |
437 | /* |
438 | * We don't really want Joe User enabling more | |
439 | * than 64Hz of interrupts on a multi-user machine. | |
440 | */ | |
441 | if (!kernel && (rtc_freq > rtc_max_user_freq) && | |
5fd1fe9c | 442 | (!capable(CAP_SYS_RESOURCE))) |
1da177e4 LT |
443 | return -EACCES; |
444 | ||
5fd1fe9c | 445 | spin_lock_irqsave(&rtc_lock, flags); |
1da177e4 | 446 | if (!(rtc_status & RTC_TIMER_ON)) { |
40565f19 JS |
447 | mod_timer(&rtc_irq_timer, jiffies + HZ/rtc_freq + |
448 | 2*HZ/100); | |
1da177e4 | 449 | rtc_status |= RTC_TIMER_ON; |
1da177e4 | 450 | } |
c3348760 | 451 | set_rtc_irq_bit_locked(RTC_PIE); |
5fd1fe9c IM |
452 | spin_unlock_irqrestore(&rtc_lock, flags); |
453 | ||
1da177e4 LT |
454 | return 0; |
455 | } | |
456 | case RTC_UIE_OFF: /* Mask ints from RTC updates. */ | |
457 | { | |
458 | mask_rtc_irq_bit(RTC_UIE); | |
459 | return 0; | |
460 | } | |
461 | case RTC_UIE_ON: /* Allow ints for RTC updates. */ | |
462 | { | |
463 | set_rtc_irq_bit(RTC_UIE); | |
464 | return 0; | |
465 | } | |
466 | #endif | |
467 | case RTC_ALM_READ: /* Read the present alarm time */ | |
468 | { | |
469 | /* | |
470 | * This returns a struct rtc_time. Reading >= 0xc0 | |
471 | * means "don't care" or "match all". Only the tm_hour, | |
472 | * tm_min, and tm_sec values are filled in. | |
473 | */ | |
474 | memset(&wtime, 0, sizeof(struct rtc_time)); | |
475 | get_rtc_alm_time(&wtime); | |
5fd1fe9c | 476 | break; |
1da177e4 LT |
477 | } |
478 | case RTC_ALM_SET: /* Store a time into the alarm */ | |
479 | { | |
480 | /* | |
481 | * This expects a struct rtc_time. Writing 0xff means | |
482 | * "don't care" or "match all". Only the tm_hour, | |
483 | * tm_min and tm_sec are used. | |
484 | */ | |
485 | unsigned char hrs, min, sec; | |
486 | struct rtc_time alm_tm; | |
487 | ||
488 | if (copy_from_user(&alm_tm, (struct rtc_time __user *)arg, | |
489 | sizeof(struct rtc_time))) | |
490 | return -EFAULT; | |
491 | ||
492 | hrs = alm_tm.tm_hour; | |
493 | min = alm_tm.tm_min; | |
494 | sec = alm_tm.tm_sec; | |
495 | ||
496 | spin_lock_irq(&rtc_lock); | |
497 | if (hpet_set_alarm_time(hrs, min, sec)) { | |
498 | /* | |
499 | * Fallthru and set alarm time in CMOS too, | |
500 | * so that we will get proper value in RTC_ALM_READ | |
501 | */ | |
502 | } | |
503 | if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || | |
5fd1fe9c IM |
504 | RTC_ALWAYS_BCD) { |
505 | if (sec < 60) | |
357c6e63 | 506 | sec = bin2bcd(sec); |
5fd1fe9c IM |
507 | else |
508 | sec = 0xff; | |
509 | ||
510 | if (min < 60) | |
357c6e63 | 511 | min = bin2bcd(min); |
5fd1fe9c IM |
512 | else |
513 | min = 0xff; | |
514 | ||
515 | if (hrs < 24) | |
357c6e63 | 516 | hrs = bin2bcd(hrs); |
5fd1fe9c IM |
517 | else |
518 | hrs = 0xff; | |
1da177e4 LT |
519 | } |
520 | CMOS_WRITE(hrs, RTC_HOURS_ALARM); | |
521 | CMOS_WRITE(min, RTC_MINUTES_ALARM); | |
522 | CMOS_WRITE(sec, RTC_SECONDS_ALARM); | |
523 | spin_unlock_irq(&rtc_lock); | |
524 | ||
525 | return 0; | |
526 | } | |
527 | case RTC_RD_TIME: /* Read the time/date from RTC */ | |
528 | { | |
529 | memset(&wtime, 0, sizeof(struct rtc_time)); | |
530 | rtc_get_rtc_time(&wtime); | |
531 | break; | |
532 | } | |
533 | case RTC_SET_TIME: /* Set the RTC */ | |
534 | { | |
535 | struct rtc_time rtc_tm; | |
536 | unsigned char mon, day, hrs, min, sec, leap_yr; | |
537 | unsigned char save_control, save_freq_select; | |
538 | unsigned int yrs; | |
539 | #ifdef CONFIG_MACH_DECSTATION | |
540 | unsigned int real_yrs; | |
541 | #endif | |
542 | ||
543 | if (!capable(CAP_SYS_TIME)) | |
544 | return -EACCES; | |
545 | ||
546 | if (copy_from_user(&rtc_tm, (struct rtc_time __user *)arg, | |
547 | sizeof(struct rtc_time))) | |
548 | return -EFAULT; | |
549 | ||
550 | yrs = rtc_tm.tm_year + 1900; | |
551 | mon = rtc_tm.tm_mon + 1; /* tm_mon starts at zero */ | |
552 | day = rtc_tm.tm_mday; | |
553 | hrs = rtc_tm.tm_hour; | |
554 | min = rtc_tm.tm_min; | |
555 | sec = rtc_tm.tm_sec; | |
556 | ||
557 | if (yrs < 1970) | |
558 | return -EINVAL; | |
559 | ||
560 | leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400)); | |
561 | ||
562 | if ((mon > 12) || (day == 0)) | |
563 | return -EINVAL; | |
564 | ||
565 | if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr))) | |
566 | return -EINVAL; | |
5fd1fe9c | 567 | |
1da177e4 LT |
568 | if ((hrs >= 24) || (min >= 60) || (sec >= 60)) |
569 | return -EINVAL; | |
570 | ||
5fd1fe9c IM |
571 | yrs -= epoch; |
572 | if (yrs > 255) /* They are unsigned */ | |
1da177e4 LT |
573 | return -EINVAL; |
574 | ||
575 | spin_lock_irq(&rtc_lock); | |
576 | #ifdef CONFIG_MACH_DECSTATION | |
577 | real_yrs = yrs; | |
578 | yrs = 72; | |
579 | ||
580 | /* | |
581 | * We want to keep the year set to 73 until March | |
582 | * for non-leap years, so that Feb, 29th is handled | |
583 | * correctly. | |
584 | */ | |
585 | if (!leap_yr && mon < 3) { | |
586 | real_yrs--; | |
587 | yrs = 73; | |
588 | } | |
589 | #endif | |
590 | /* These limits and adjustments are independent of | |
591 | * whether the chip is in binary mode or not. | |
592 | */ | |
593 | if (yrs > 169) { | |
594 | spin_unlock_irq(&rtc_lock); | |
595 | return -EINVAL; | |
596 | } | |
597 | if (yrs >= 100) | |
598 | yrs -= 100; | |
599 | ||
600 | if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) | |
601 | || RTC_ALWAYS_BCD) { | |
357c6e63 AB |
602 | sec = bin2bcd(sec); |
603 | min = bin2bcd(min); | |
604 | hrs = bin2bcd(hrs); | |
605 | day = bin2bcd(day); | |
606 | mon = bin2bcd(mon); | |
607 | yrs = bin2bcd(yrs); | |
1da177e4 LT |
608 | } |
609 | ||
610 | save_control = CMOS_READ(RTC_CONTROL); | |
611 | CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); | |
612 | save_freq_select = CMOS_READ(RTC_FREQ_SELECT); | |
613 | CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); | |
614 | ||
615 | #ifdef CONFIG_MACH_DECSTATION | |
616 | CMOS_WRITE(real_yrs, RTC_DEC_YEAR); | |
617 | #endif | |
618 | CMOS_WRITE(yrs, RTC_YEAR); | |
619 | CMOS_WRITE(mon, RTC_MONTH); | |
620 | CMOS_WRITE(day, RTC_DAY_OF_MONTH); | |
621 | CMOS_WRITE(hrs, RTC_HOURS); | |
622 | CMOS_WRITE(min, RTC_MINUTES); | |
623 | CMOS_WRITE(sec, RTC_SECONDS); | |
624 | ||
625 | CMOS_WRITE(save_control, RTC_CONTROL); | |
626 | CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); | |
627 | ||
628 | spin_unlock_irq(&rtc_lock); | |
629 | return 0; | |
630 | } | |
631 | #ifdef RTC_IRQ | |
632 | case RTC_IRQP_READ: /* Read the periodic IRQ rate. */ | |
633 | { | |
634 | return put_user(rtc_freq, (unsigned long __user *)arg); | |
635 | } | |
636 | case RTC_IRQP_SET: /* Set periodic IRQ rate. */ | |
637 | { | |
638 | int tmp = 0; | |
639 | unsigned char val; | |
5fd1fe9c IM |
640 | /* can be called from isr via rtc_control() */ |
641 | unsigned long flags; | |
1da177e4 | 642 | |
5fd1fe9c | 643 | /* |
1da177e4 LT |
644 | * The max we can do is 8192Hz. |
645 | */ | |
646 | if ((arg < 2) || (arg > 8192)) | |
647 | return -EINVAL; | |
648 | /* | |
649 | * We don't really want Joe User generating more | |
650 | * than 64Hz of interrupts on a multi-user machine. | |
651 | */ | |
5fd1fe9c IM |
652 | if (!kernel && (arg > rtc_max_user_freq) && |
653 | !capable(CAP_SYS_RESOURCE)) | |
1da177e4 LT |
654 | return -EACCES; |
655 | ||
656 | while (arg > (1<<tmp)) | |
657 | tmp++; | |
658 | ||
659 | /* | |
660 | * Check that the input was really a power of 2. | |
661 | */ | |
662 | if (arg != (1<<tmp)) | |
663 | return -EINVAL; | |
664 | ||
61ca9daa PG |
665 | rtc_freq = arg; |
666 | ||
c3348760 | 667 | spin_lock_irqsave(&rtc_lock, flags); |
1da177e4 | 668 | if (hpet_set_periodic_freq(arg)) { |
c3348760 | 669 | spin_unlock_irqrestore(&rtc_lock, flags); |
1da177e4 LT |
670 | return 0; |
671 | } | |
1da177e4 LT |
672 | |
673 | val = CMOS_READ(RTC_FREQ_SELECT) & 0xf0; | |
674 | val |= (16 - tmp); | |
675 | CMOS_WRITE(val, RTC_FREQ_SELECT); | |
c3348760 | 676 | spin_unlock_irqrestore(&rtc_lock, flags); |
1da177e4 LT |
677 | return 0; |
678 | } | |
679 | #endif | |
680 | case RTC_EPOCH_READ: /* Read the epoch. */ | |
681 | { | |
5fd1fe9c | 682 | return put_user(epoch, (unsigned long __user *)arg); |
1da177e4 LT |
683 | } |
684 | case RTC_EPOCH_SET: /* Set the epoch. */ | |
685 | { | |
5fd1fe9c | 686 | /* |
1da177e4 LT |
687 | * There were no RTC clocks before 1900. |
688 | */ | |
689 | if (arg < 1900) | |
690 | return -EINVAL; | |
691 | ||
692 | if (!capable(CAP_SYS_TIME)) | |
693 | return -EACCES; | |
694 | ||
695 | epoch = arg; | |
696 | return 0; | |
697 | } | |
698 | default: | |
699 | return -ENOTTY; | |
700 | } | |
5fd1fe9c IM |
701 | return copy_to_user((void __user *)arg, |
702 | &wtime, sizeof wtime) ? -EFAULT : 0; | |
1da177e4 LT |
703 | } |
704 | ||
53f1b143 | 705 | static long rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
1da177e4 | 706 | { |
53f1b143 | 707 | long ret; |
53f1b143 | 708 | ret = rtc_do_ioctl(cmd, arg, 0); |
53f1b143 | 709 | return ret; |
1da177e4 LT |
710 | } |
711 | ||
712 | /* | |
713 | * We enforce only one user at a time here with the open/close. | |
714 | * Also clear the previous interrupt data on an open, and clean | |
715 | * up things on a close. | |
716 | */ | |
1da177e4 LT |
717 | static int rtc_open(struct inode *inode, struct file *file) |
718 | { | |
5fd1fe9c | 719 | spin_lock_irq(&rtc_lock); |
1da177e4 | 720 | |
5fd1fe9c | 721 | if (rtc_status & RTC_IS_OPEN) |
1da177e4 LT |
722 | goto out_busy; |
723 | ||
724 | rtc_status |= RTC_IS_OPEN; | |
725 | ||
726 | rtc_irq_data = 0; | |
5fd1fe9c | 727 | spin_unlock_irq(&rtc_lock); |
1da177e4 LT |
728 | return 0; |
729 | ||
730 | out_busy: | |
5fd1fe9c | 731 | spin_unlock_irq(&rtc_lock); |
1da177e4 LT |
732 | return -EBUSY; |
733 | } | |
734 | ||
5fd1fe9c | 735 | static int rtc_fasync(int fd, struct file *filp, int on) |
1da177e4 | 736 | { |
5fd1fe9c | 737 | return fasync_helper(fd, filp, on, &rtc_async_queue); |
1da177e4 LT |
738 | } |
739 | ||
740 | static int rtc_release(struct inode *inode, struct file *file) | |
741 | { | |
742 | #ifdef RTC_IRQ | |
743 | unsigned char tmp; | |
744 | ||
745 | if (rtc_has_irq == 0) | |
746 | goto no_irq; | |
747 | ||
748 | /* | |
749 | * Turn off all interrupts once the device is no longer | |
750 | * in use, and clear the data. | |
751 | */ | |
752 | ||
753 | spin_lock_irq(&rtc_lock); | |
754 | if (!hpet_mask_rtc_irq_bit(RTC_PIE | RTC_AIE | RTC_UIE)) { | |
755 | tmp = CMOS_READ(RTC_CONTROL); | |
756 | tmp &= ~RTC_PIE; | |
757 | tmp &= ~RTC_AIE; | |
758 | tmp &= ~RTC_UIE; | |
759 | CMOS_WRITE(tmp, RTC_CONTROL); | |
760 | CMOS_READ(RTC_INTR_FLAGS); | |
761 | } | |
762 | if (rtc_status & RTC_TIMER_ON) { | |
763 | rtc_status &= ~RTC_TIMER_ON; | |
764 | del_timer(&rtc_irq_timer); | |
765 | } | |
766 | spin_unlock_irq(&rtc_lock); | |
767 | ||
1da177e4 LT |
768 | no_irq: |
769 | #endif | |
770 | ||
5fd1fe9c | 771 | spin_lock_irq(&rtc_lock); |
1da177e4 LT |
772 | rtc_irq_data = 0; |
773 | rtc_status &= ~RTC_IS_OPEN; | |
5fd1fe9c IM |
774 | spin_unlock_irq(&rtc_lock); |
775 | ||
1da177e4 LT |
776 | return 0; |
777 | } | |
778 | ||
779 | #ifdef RTC_IRQ | |
afc9a42b | 780 | static __poll_t rtc_poll(struct file *file, poll_table *wait) |
1da177e4 LT |
781 | { |
782 | unsigned long l; | |
783 | ||
784 | if (rtc_has_irq == 0) | |
785 | return 0; | |
786 | ||
787 | poll_wait(file, &rtc_wait, wait); | |
788 | ||
5fd1fe9c | 789 | spin_lock_irq(&rtc_lock); |
1da177e4 | 790 | l = rtc_irq_data; |
5fd1fe9c | 791 | spin_unlock_irq(&rtc_lock); |
1da177e4 LT |
792 | |
793 | if (l != 0) | |
a9a08845 | 794 | return EPOLLIN | EPOLLRDNORM; |
1da177e4 LT |
795 | return 0; |
796 | } | |
797 | #endif | |
798 | ||
1da177e4 LT |
799 | /* |
800 | * The various file operations we support. | |
801 | */ | |
802 | ||
62322d25 | 803 | static const struct file_operations rtc_fops = { |
1da177e4 LT |
804 | .owner = THIS_MODULE, |
805 | .llseek = no_llseek, | |
806 | .read = rtc_read, | |
807 | #ifdef RTC_IRQ | |
808 | .poll = rtc_poll, | |
809 | #endif | |
53f1b143 | 810 | .unlocked_ioctl = rtc_ioctl, |
1da177e4 LT |
811 | .open = rtc_open, |
812 | .release = rtc_release, | |
813 | .fasync = rtc_fasync, | |
814 | }; | |
815 | ||
816 | static struct miscdevice rtc_dev = { | |
817 | .minor = RTC_MINOR, | |
818 | .name = "rtc", | |
819 | .fops = &rtc_fops, | |
820 | }; | |
821 | ||
9626f1f1 BH |
822 | static resource_size_t rtc_size; |
823 | ||
824 | static struct resource * __init rtc_request_region(resource_size_t size) | |
825 | { | |
826 | struct resource *r; | |
827 | ||
828 | if (RTC_IOMAPPED) | |
829 | r = request_region(RTC_PORT(0), size, "rtc"); | |
830 | else | |
831 | r = request_mem_region(RTC_PORT(0), size, "rtc"); | |
832 | ||
833 | if (r) | |
834 | rtc_size = size; | |
835 | ||
836 | return r; | |
837 | } | |
838 | ||
4c06be10 BH |
839 | static void rtc_release_region(void) |
840 | { | |
841 | if (RTC_IOMAPPED) | |
9626f1f1 | 842 | release_region(RTC_PORT(0), rtc_size); |
4c06be10 | 843 | else |
9626f1f1 | 844 | release_mem_region(RTC_PORT(0), rtc_size); |
4c06be10 BH |
845 | } |
846 | ||
1da177e4 LT |
847 | static int __init rtc_init(void) |
848 | { | |
9cef779e | 849 | #ifdef CONFIG_PROC_FS |
1da177e4 | 850 | struct proc_dir_entry *ent; |
9cef779e | 851 | #endif |
1da177e4 LT |
852 | #if defined(__alpha__) || defined(__mips__) |
853 | unsigned int year, ctrl; | |
1da177e4 LT |
854 | char *guess = NULL; |
855 | #endif | |
cdee99d7 | 856 | #ifdef CONFIG_SPARC32 |
75081322 | 857 | struct device_node *ebus_dp; |
2dc11581 | 858 | struct platform_device *op; |
9cef779e | 859 | #else |
38e0e8c0 | 860 | void *r; |
9cef779e JB |
861 | #ifdef RTC_IRQ |
862 | irq_handler_t rtc_int_handler_ptr; | |
863 | #endif | |
38e0e8c0 | 864 | #endif |
1da177e4 | 865 | |
cdee99d7 | 866 | #ifdef CONFIG_SPARC32 |
75081322 DM |
867 | for_each_node_by_name(ebus_dp, "ebus") { |
868 | struct device_node *dp; | |
f88fd666 RH |
869 | for_each_child_of_node(ebus_dp, dp) { |
870 | if (of_node_name_eq(dp, "rtc")) { | |
75081322 DM |
871 | op = of_find_device_by_node(dp); |
872 | if (op) { | |
873 | rtc_port = op->resource[0].start; | |
874 | rtc_irq = op->irqs[0]; | |
875 | goto found; | |
876 | } | |
1da177e4 LT |
877 | } |
878 | } | |
879 | } | |
f3e92d35 | 880 | rtc_has_irq = 0; |
1da177e4 LT |
881 | printk(KERN_ERR "rtc_init: no PC rtc found\n"); |
882 | return -EIO; | |
883 | ||
884 | found: | |
75081322 | 885 | if (!rtc_irq) { |
1da177e4 LT |
886 | rtc_has_irq = 0; |
887 | goto no_irq; | |
888 | } | |
889 | ||
890 | /* | |
891 | * XXX Interrupt pin #7 in Espresso is shared between RTC and | |
53d0fc27 | 892 | * PCI Slot 2 INTA# (and some INTx# in Slot 1). |
1da177e4 | 893 | */ |
5fd1fe9c IM |
894 | if (request_irq(rtc_irq, rtc_interrupt, IRQF_SHARED, "rtc", |
895 | (void *)&rtc_port)) { | |
f3e92d35 | 896 | rtc_has_irq = 0; |
1da177e4 LT |
897 | printk(KERN_ERR "rtc: cannot register IRQ %d\n", rtc_irq); |
898 | return -EIO; | |
899 | } | |
900 | no_irq: | |
901 | #else | |
9626f1f1 BH |
902 | r = rtc_request_region(RTC_IO_EXTENT); |
903 | ||
904 | /* | |
905 | * If we've already requested a smaller range (for example, because | |
906 | * PNPBIOS or ACPI told us how the device is configured), the request | |
907 | * above might fail because it's too big. | |
908 | * | |
909 | * If so, request just the range we actually use. | |
910 | */ | |
911 | if (!r) | |
912 | r = rtc_request_region(RTC_IO_EXTENT_USED); | |
38e0e8c0 | 913 | if (!r) { |
f3e92d35 JB |
914 | #ifdef RTC_IRQ |
915 | rtc_has_irq = 0; | |
916 | #endif | |
38e0e8c0 MR |
917 | printk(KERN_ERR "rtc: I/O resource %lx is not free.\n", |
918 | (long)(RTC_PORT(0))); | |
1da177e4 LT |
919 | return -EIO; |
920 | } | |
921 | ||
922 | #ifdef RTC_IRQ | |
923 | if (is_hpet_enabled()) { | |
f8f76481 BW |
924 | int err; |
925 | ||
1da177e4 | 926 | rtc_int_handler_ptr = hpet_rtc_interrupt; |
f8f76481 BW |
927 | err = hpet_register_irq_handler(rtc_interrupt); |
928 | if (err != 0) { | |
929 | printk(KERN_WARNING "hpet_register_irq_handler failed " | |
930 | "in rtc_init()."); | |
931 | return err; | |
932 | } | |
1da177e4 LT |
933 | } else { |
934 | rtc_int_handler_ptr = rtc_interrupt; | |
935 | } | |
936 | ||
d88ed628 | 937 | if (request_irq(RTC_IRQ, rtc_int_handler_ptr, 0, "rtc", NULL)) { |
1da177e4 | 938 | /* Yeah right, seeing as irq 8 doesn't even hit the bus. */ |
f3e92d35 | 939 | rtc_has_irq = 0; |
1da177e4 | 940 | printk(KERN_ERR "rtc: IRQ %d is not free.\n", RTC_IRQ); |
4c06be10 | 941 | rtc_release_region(); |
5fd1fe9c | 942 | |
1da177e4 LT |
943 | return -EIO; |
944 | } | |
945 | hpet_rtc_timer_init(); | |
946 | ||
947 | #endif | |
948 | ||
cdee99d7 | 949 | #endif /* CONFIG_SPARC32 vs. others */ |
1da177e4 LT |
950 | |
951 | if (misc_register(&rtc_dev)) { | |
952 | #ifdef RTC_IRQ | |
953 | free_irq(RTC_IRQ, NULL); | |
f8f76481 | 954 | hpet_unregister_irq_handler(rtc_interrupt); |
f3e92d35 | 955 | rtc_has_irq = 0; |
1da177e4 | 956 | #endif |
4c06be10 | 957 | rtc_release_region(); |
1da177e4 LT |
958 | return -ENODEV; |
959 | } | |
960 | ||
9cef779e | 961 | #ifdef CONFIG_PROC_FS |
3f3942ac | 962 | ent = proc_create_single("driver/rtc", 0, NULL, rtc_proc_show); |
1b502217 | 963 | if (!ent) |
9cef779e | 964 | printk(KERN_WARNING "rtc: Failed to register with procfs.\n"); |
1da177e4 | 965 | #endif |
1da177e4 LT |
966 | |
967 | #if defined(__alpha__) || defined(__mips__) | |
968 | rtc_freq = HZ; | |
5fd1fe9c | 969 | |
1da177e4 LT |
970 | /* Each operating system on an Alpha uses its own epoch. |
971 | Let's try to guess which one we are using now. */ | |
5fd1fe9c | 972 | |
1da177e4 | 973 | if (rtc_is_updating() != 0) |
47f176fd | 974 | msleep(20); |
5fd1fe9c | 975 | |
1da177e4 LT |
976 | spin_lock_irq(&rtc_lock); |
977 | year = CMOS_READ(RTC_YEAR); | |
978 | ctrl = CMOS_READ(RTC_CONTROL); | |
979 | spin_unlock_irq(&rtc_lock); | |
5fd1fe9c | 980 | |
1da177e4 | 981 | if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD) |
357c6e63 | 982 | year = bcd2bin(year); /* This should never happen... */ |
5fd1fe9c | 983 | |
1da177e4 LT |
984 | if (year < 20) { |
985 | epoch = 2000; | |
986 | guess = "SRM (post-2000)"; | |
987 | } else if (year >= 20 && year < 48) { | |
988 | epoch = 1980; | |
989 | guess = "ARC console"; | |
990 | } else if (year >= 48 && year < 72) { | |
991 | epoch = 1952; | |
992 | guess = "Digital UNIX"; | |
993 | #if defined(__mips__) | |
994 | } else if (year >= 72 && year < 74) { | |
995 | epoch = 2000; | |
996 | guess = "Digital DECstation"; | |
997 | #else | |
998 | } else if (year >= 70) { | |
999 | epoch = 1900; | |
1000 | guess = "Standard PC (1900)"; | |
1001 | #endif | |
1002 | } | |
1003 | if (guess) | |
5fd1fe9c IM |
1004 | printk(KERN_INFO "rtc: %s epoch (%lu) detected\n", |
1005 | guess, epoch); | |
1da177e4 LT |
1006 | #endif |
1007 | #ifdef RTC_IRQ | |
1008 | if (rtc_has_irq == 0) | |
1009 | goto no_irq2; | |
1010 | ||
1da177e4 LT |
1011 | spin_lock_irq(&rtc_lock); |
1012 | rtc_freq = 1024; | |
1013 | if (!hpet_set_periodic_freq(rtc_freq)) { | |
5fd1fe9c IM |
1014 | /* |
1015 | * Initialize periodic frequency to CMOS reset default, | |
1016 | * which is 1024Hz | |
1017 | */ | |
1018 | CMOS_WRITE(((CMOS_READ(RTC_FREQ_SELECT) & 0xF0) | 0x06), | |
1019 | RTC_FREQ_SELECT); | |
1da177e4 LT |
1020 | } |
1021 | spin_unlock_irq(&rtc_lock); | |
1022 | no_irq2: | |
1023 | #endif | |
1024 | ||
1025 | (void) init_sysctl(); | |
1026 | ||
1027 | printk(KERN_INFO "Real Time Clock Driver v" RTC_VERSION "\n"); | |
1028 | ||
1029 | return 0; | |
1030 | } | |
1031 | ||
5fd1fe9c | 1032 | static void __exit rtc_exit(void) |
1da177e4 LT |
1033 | { |
1034 | cleanup_sysctl(); | |
5fd1fe9c | 1035 | remove_proc_entry("driver/rtc", NULL); |
1da177e4 LT |
1036 | misc_deregister(&rtc_dev); |
1037 | ||
cdee99d7 | 1038 | #ifdef CONFIG_SPARC32 |
1da177e4 | 1039 | if (rtc_has_irq) |
5fd1fe9c | 1040 | free_irq(rtc_irq, &rtc_port); |
1da177e4 | 1041 | #else |
4c06be10 | 1042 | rtc_release_region(); |
1da177e4 | 1043 | #ifdef RTC_IRQ |
f8f76481 | 1044 | if (rtc_has_irq) { |
5fd1fe9c | 1045 | free_irq(RTC_IRQ, NULL); |
f8f76481 BW |
1046 | hpet_unregister_irq_handler(hpet_rtc_interrupt); |
1047 | } | |
1da177e4 | 1048 | #endif |
cdee99d7 | 1049 | #endif /* CONFIG_SPARC32 */ |
1da177e4 LT |
1050 | } |
1051 | ||
1052 | module_init(rtc_init); | |
1053 | module_exit(rtc_exit); | |
1054 | ||
1055 | #ifdef RTC_IRQ | |
1056 | /* | |
5fd1fe9c | 1057 | * At IRQ rates >= 4096Hz, an interrupt may get lost altogether. |
1da177e4 LT |
1058 | * (usually during an IDE disk interrupt, with IRQ unmasking off) |
1059 | * Since the interrupt handler doesn't get called, the IRQ status | |
1060 | * byte doesn't get read, and the RTC stops generating interrupts. | |
1061 | * A timer is set, and will call this function if/when that happens. | |
1062 | * To get it out of this stalled state, we just read the status. | |
1063 | * At least a jiffy of interrupts (rtc_freq/HZ) will have been lost. | |
5fd1fe9c | 1064 | * (You *really* shouldn't be trying to use a non-realtime system |
1da177e4 LT |
1065 | * for something that requires a steady > 1KHz signal anyways.) |
1066 | */ | |
1067 | ||
24ed960a | 1068 | static void rtc_dropped_irq(struct timer_list *unused) |
1da177e4 LT |
1069 | { |
1070 | unsigned long freq; | |
1071 | ||
5fd1fe9c | 1072 | spin_lock_irq(&rtc_lock); |
1da177e4 LT |
1073 | |
1074 | if (hpet_rtc_dropped_irq()) { | |
1075 | spin_unlock_irq(&rtc_lock); | |
1076 | return; | |
1077 | } | |
1078 | ||
1079 | /* Just in case someone disabled the timer from behind our back... */ | |
1080 | if (rtc_status & RTC_TIMER_ON) | |
1081 | mod_timer(&rtc_irq_timer, jiffies + HZ/rtc_freq + 2*HZ/100); | |
1082 | ||
1083 | rtc_irq_data += ((rtc_freq/HZ)<<8); | |
1084 | rtc_irq_data &= ~0xff; | |
1085 | rtc_irq_data |= (CMOS_READ(RTC_INTR_FLAGS) & 0xF0); /* restart */ | |
1086 | ||
1087 | freq = rtc_freq; | |
1088 | ||
1089 | spin_unlock_irq(&rtc_lock); | |
1090 | ||
a28ee477 CD |
1091 | printk_ratelimited(KERN_WARNING "rtc: lost some interrupts at %ldHz.\n", |
1092 | freq); | |
1da177e4 LT |
1093 | |
1094 | /* Now we have new data */ | |
1095 | wake_up_interruptible(&rtc_wait); | |
1096 | ||
5fd1fe9c | 1097 | kill_fasync(&rtc_async_queue, SIGIO, POLL_IN); |
1da177e4 LT |
1098 | } |
1099 | #endif | |
1100 | ||
9cef779e | 1101 | #ifdef CONFIG_PROC_FS |
1da177e4 LT |
1102 | /* |
1103 | * Info exported via "/proc/driver/rtc". | |
1104 | */ | |
1105 | ||
1106 | static int rtc_proc_show(struct seq_file *seq, void *v) | |
1107 | { | |
1108 | #define YN(bit) ((ctrl & bit) ? "yes" : "no") | |
1109 | #define NY(bit) ((ctrl & bit) ? "no" : "yes") | |
1110 | struct rtc_time tm; | |
1111 | unsigned char batt, ctrl; | |
1112 | unsigned long freq; | |
1113 | ||
1114 | spin_lock_irq(&rtc_lock); | |
1115 | batt = CMOS_READ(RTC_VALID) & RTC_VRT; | |
1116 | ctrl = CMOS_READ(RTC_CONTROL); | |
1117 | freq = rtc_freq; | |
1118 | spin_unlock_irq(&rtc_lock); | |
1119 | ||
1120 | ||
1121 | rtc_get_rtc_time(&tm); | |
1122 | ||
1123 | /* | |
1124 | * There is no way to tell if the luser has the RTC set for local | |
1125 | * time or for Universal Standard Time (GMT). Probably local though. | |
1126 | */ | |
1127 | seq_printf(seq, | |
5548cbf7 AS |
1128 | "rtc_time\t: %ptRt\n" |
1129 | "rtc_date\t: %ptRd\n" | |
1da177e4 | 1130 | "rtc_epoch\t: %04lu\n", |
5548cbf7 | 1131 | &tm, &tm, epoch); |
1da177e4 LT |
1132 | |
1133 | get_rtc_alm_time(&tm); | |
1134 | ||
1135 | /* | |
1136 | * We implicitly assume 24hr mode here. Alarm values >= 0xc0 will | |
1137 | * match any value for that particular field. Values that are | |
1138 | * greater than a valid time, but less than 0xc0 shouldn't appear. | |
1139 | */ | |
1140 | seq_puts(seq, "alarm\t\t: "); | |
1141 | if (tm.tm_hour <= 24) | |
1142 | seq_printf(seq, "%02d:", tm.tm_hour); | |
1143 | else | |
1144 | seq_puts(seq, "**:"); | |
1145 | ||
1146 | if (tm.tm_min <= 59) | |
1147 | seq_printf(seq, "%02d:", tm.tm_min); | |
1148 | else | |
1149 | seq_puts(seq, "**:"); | |
1150 | ||
1151 | if (tm.tm_sec <= 59) | |
1152 | seq_printf(seq, "%02d\n", tm.tm_sec); | |
1153 | else | |
1154 | seq_puts(seq, "**\n"); | |
1155 | ||
1156 | seq_printf(seq, | |
1157 | "DST_enable\t: %s\n" | |
1158 | "BCD\t\t: %s\n" | |
1159 | "24hr\t\t: %s\n" | |
1160 | "square_wave\t: %s\n" | |
1161 | "alarm_IRQ\t: %s\n" | |
1162 | "update_IRQ\t: %s\n" | |
1163 | "periodic_IRQ\t: %s\n" | |
1164 | "periodic_freq\t: %ld\n" | |
1165 | "batt_status\t: %s\n", | |
1166 | YN(RTC_DST_EN), | |
1167 | NY(RTC_DM_BINARY), | |
1168 | YN(RTC_24H), | |
1169 | YN(RTC_SQWE), | |
1170 | YN(RTC_AIE), | |
1171 | YN(RTC_UIE), | |
1172 | YN(RTC_PIE), | |
1173 | freq, | |
1174 | batt ? "okay" : "dead"); | |
1175 | ||
1176 | return 0; | |
1177 | #undef YN | |
1178 | #undef NY | |
1179 | } | |
9cef779e | 1180 | #endif |
1da177e4 | 1181 | |
9580d85f | 1182 | static void rtc_get_rtc_time(struct rtc_time *rtc_tm) |
1da177e4 | 1183 | { |
0f749646 | 1184 | unsigned long uip_watchdog = jiffies, flags; |
1da177e4 LT |
1185 | unsigned char ctrl; |
1186 | #ifdef CONFIG_MACH_DECSTATION | |
1187 | unsigned int real_year; | |
1188 | #endif | |
1189 | ||
1190 | /* | |
1191 | * read RTC once any update in progress is done. The update | |
47f176fd | 1192 | * can take just over 2ms. We wait 20ms. There is no need to |
1da177e4 LT |
1193 | * to poll-wait (up to 1s - eeccch) for the falling edge of RTC_UIP. |
1194 | * If you need to know *exactly* when a second has started, enable | |
5fd1fe9c | 1195 | * periodic update complete interrupts, (via ioctl) and then |
1da177e4 LT |
1196 | * immediately read /dev/rtc which will block until you get the IRQ. |
1197 | * Once the read clears, read the RTC time (again via ioctl). Easy. | |
1198 | */ | |
1199 | ||
dca03a51 JL |
1200 | while (rtc_is_updating() != 0 && |
1201 | time_before(jiffies, uip_watchdog + 2*HZ/100)) | |
403fe5ae | 1202 | cpu_relax(); |
1da177e4 LT |
1203 | |
1204 | /* | |
1205 | * Only the values that we read from the RTC are set. We leave | |
b7599587 AC |
1206 | * tm_wday, tm_yday and tm_isdst untouched. Note that while the |
1207 | * RTC has RTC_DAY_OF_WEEK, we should usually ignore it, as it is | |
1208 | * only updated by the RTC when initially set to a non-zero value. | |
1da177e4 | 1209 | */ |
0f749646 | 1210 | spin_lock_irqsave(&rtc_lock, flags); |
1da177e4 LT |
1211 | rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS); |
1212 | rtc_tm->tm_min = CMOS_READ(RTC_MINUTES); | |
1213 | rtc_tm->tm_hour = CMOS_READ(RTC_HOURS); | |
1214 | rtc_tm->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH); | |
1215 | rtc_tm->tm_mon = CMOS_READ(RTC_MONTH); | |
1216 | rtc_tm->tm_year = CMOS_READ(RTC_YEAR); | |
b7599587 AC |
1217 | /* Only set from 2.6.16 onwards */ |
1218 | rtc_tm->tm_wday = CMOS_READ(RTC_DAY_OF_WEEK); | |
1219 | ||
1da177e4 LT |
1220 | #ifdef CONFIG_MACH_DECSTATION |
1221 | real_year = CMOS_READ(RTC_DEC_YEAR); | |
1222 | #endif | |
1223 | ctrl = CMOS_READ(RTC_CONTROL); | |
0f749646 | 1224 | spin_unlock_irqrestore(&rtc_lock, flags); |
1da177e4 | 1225 | |
5fd1fe9c | 1226 | if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { |
357c6e63 AB |
1227 | rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec); |
1228 | rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min); | |
1229 | rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour); | |
1230 | rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday); | |
1231 | rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); | |
1232 | rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); | |
1233 | rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday); | |
1da177e4 LT |
1234 | } |
1235 | ||
1236 | #ifdef CONFIG_MACH_DECSTATION | |
1237 | rtc_tm->tm_year += real_year - 72; | |
1238 | #endif | |
1239 | ||
1240 | /* | |
1241 | * Account for differences between how the RTC uses the values | |
1242 | * and how they are defined in a struct rtc_time; | |
1243 | */ | |
5fd1fe9c IM |
1244 | rtc_tm->tm_year += epoch - 1900; |
1245 | if (rtc_tm->tm_year <= 69) | |
1da177e4 LT |
1246 | rtc_tm->tm_year += 100; |
1247 | ||
1248 | rtc_tm->tm_mon--; | |
1249 | } | |
1250 | ||
1251 | static void get_rtc_alm_time(struct rtc_time *alm_tm) | |
1252 | { | |
1253 | unsigned char ctrl; | |
1254 | ||
1255 | /* | |
1256 | * Only the values that we read from the RTC are set. That | |
1257 | * means only tm_hour, tm_min, and tm_sec. | |
1258 | */ | |
1259 | spin_lock_irq(&rtc_lock); | |
1260 | alm_tm->tm_sec = CMOS_READ(RTC_SECONDS_ALARM); | |
1261 | alm_tm->tm_min = CMOS_READ(RTC_MINUTES_ALARM); | |
1262 | alm_tm->tm_hour = CMOS_READ(RTC_HOURS_ALARM); | |
1263 | ctrl = CMOS_READ(RTC_CONTROL); | |
1264 | spin_unlock_irq(&rtc_lock); | |
1265 | ||
5fd1fe9c | 1266 | if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { |
357c6e63 AB |
1267 | alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec); |
1268 | alm_tm->tm_min = bcd2bin(alm_tm->tm_min); | |
1269 | alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour); | |
1da177e4 LT |
1270 | } |
1271 | } | |
1272 | ||
1273 | #ifdef RTC_IRQ | |
1274 | /* | |
1275 | * Used to disable/enable interrupts for any one of UIE, AIE, PIE. | |
1276 | * Rumour has it that if you frob the interrupt enable/disable | |
1277 | * bits in RTC_CONTROL, you should read RTC_INTR_FLAGS, to | |
1278 | * ensure you actually start getting interrupts. Probably for | |
1279 | * compatibility with older/broken chipset RTC implementations. | |
1280 | * We also clear out any old irq data after an ioctl() that | |
1281 | * meddles with the interrupt enable/disable bits. | |
1282 | */ | |
1283 | ||
c3348760 | 1284 | static void mask_rtc_irq_bit_locked(unsigned char bit) |
1da177e4 LT |
1285 | { |
1286 | unsigned char val; | |
1287 | ||
c3348760 | 1288 | if (hpet_mask_rtc_irq_bit(bit)) |
1da177e4 | 1289 | return; |
1da177e4 LT |
1290 | val = CMOS_READ(RTC_CONTROL); |
1291 | val &= ~bit; | |
1292 | CMOS_WRITE(val, RTC_CONTROL); | |
1293 | CMOS_READ(RTC_INTR_FLAGS); | |
1294 | ||
1295 | rtc_irq_data = 0; | |
1da177e4 LT |
1296 | } |
1297 | ||
c3348760 | 1298 | static void set_rtc_irq_bit_locked(unsigned char bit) |
1da177e4 LT |
1299 | { |
1300 | unsigned char val; | |
1301 | ||
c3348760 | 1302 | if (hpet_set_rtc_irq_bit(bit)) |
1da177e4 | 1303 | return; |
1da177e4 LT |
1304 | val = CMOS_READ(RTC_CONTROL); |
1305 | val |= bit; | |
1306 | CMOS_WRITE(val, RTC_CONTROL); | |
1307 | CMOS_READ(RTC_INTR_FLAGS); | |
1308 | ||
1309 | rtc_irq_data = 0; | |
1da177e4 LT |
1310 | } |
1311 | #endif | |
1312 | ||
1313 | MODULE_AUTHOR("Paul Gortmaker"); | |
1314 | MODULE_LICENSE("GPL"); | |
1315 | MODULE_ALIAS_MISCDEV(RTC_MINOR); |