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tty: isicom, enable/disable pci device
[linux-block.git] / drivers / char / pcmcia / synclink_cs.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
a7482a2e 4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
1da177e4
LT		 5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30#if defined(__i386__)
31# define BREAKPOINT() asm(" int $3");
32#else
33# define BREAKPOINT() { }
34#endif
35
36#define MAX_DEVICE_COUNT 4
37
1da177e4
LT		 38#include <linux/module.h>
39#include <linux/errno.h>
40#include <linux/signal.h>
41#include <linux/sched.h>
42#include <linux/timer.h>
43#include <linux/time.h>
44#include <linux/interrupt.h>
1da177e4
LT		 45#include <linux/tty.h>
46#include <linux/tty_flip.h>
47#include <linux/serial.h>
48#include <linux/major.h>
49#include <linux/string.h>
50#include <linux/fcntl.h>
51#include <linux/ptrace.h>
52#include <linux/ioport.h>
53#include <linux/mm.h>
54#include <linux/slab.h>
55#include <linux/netdevice.h>
56#include <linux/vmalloc.h>
57#include <linux/init.h>
1da177e4
LT		 58#include <linux/delay.h>
59#include <linux/ioctl.h>
3dd1247f 60#include <linux/synclink.h>
1da177e4
LT		 61
62#include <asm/system.h>
63#include <asm/io.h>
64#include <asm/irq.h>
65#include <asm/dma.h>
66#include <linux/bitops.h>
67#include <asm/types.h>
68#include <linux/termios.h>
69#include <linux/workqueue.h>
70#include <linux/hdlc.h>
71
1da177e4
LT		 72#include <pcmcia/cs_types.h>
73#include <pcmcia/cs.h>
74#include <pcmcia/cistpl.h>
75#include <pcmcia/cisreg.h>
76#include <pcmcia/ds.h>
77
af69c7f9
PF		 78#if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
79#define SYNCLINK_GENERIC_HDLC 1
80#else
81#define SYNCLINK_GENERIC_HDLC 0
1da177e4
LT		 82#endif
83
84#define GET_USER(error,value,addr) error = get_user(value,addr)
85#define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
86#define PUT_USER(error,value,addr) error = put_user(value,addr)
87#define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
88
89#include <asm/uaccess.h>
90
1da177e4
LT		 91static MGSL_PARAMS default_params = {
92 MGSL_MODE_HDLC, /* unsigned long mode */
93 0, /* unsigned char loopback; */
94 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
95 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
96 0, /* unsigned long clock_speed; */
97 0xff, /* unsigned char addr_filter; */
98 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
99 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
100 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
101 9600, /* unsigned long data_rate; */
102 8, /* unsigned char data_bits; */
103 1, /* unsigned char stop_bits; */
104 ASYNC_PARITY_NONE /* unsigned char parity; */
105};
106
107typedef struct
108{
109 int count;
110 unsigned char status;
111 char data[1];
112} RXBUF;
113
114/* The queue of BH actions to be performed */
115
116#define BH_RECEIVE 1
117#define BH_TRANSMIT 2
118#define BH_STATUS 4
119
120#define IO_PIN_SHUTDOWN_LIMIT 100
121
122#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
123
124struct _input_signal_events {
d12341f9 125 int ri_up;
1da177e4
LT		 126 int ri_down;
127 int dsr_up;
128 int dsr_down;
129 int dcd_up;
130 int dcd_down;
131 int cts_up;
132 int cts_down;
133};
134
135
136/*
137 * Device instance data structure
138 */
d12341f9 139
1da177e4
LT		 140typedef struct _mgslpc_info {
141 void *if_ptr; /* General purpose pointer (used by SPPP) */
142 int magic;
143 int flags;
144 int count; /* count of opens */
145 int line;
146 unsigned short close_delay;
147 unsigned short closing_wait; /* time to wait before closing */
d12341f9 148
1da177e4 149 struct mgsl_icount icount;
d12341f9 150
1da177e4
LT		 151 struct tty_struct *tty;
152 int timeout;
153 int x_char; /* xon/xoff character */
154 int blocked_open; /* # of blocked opens */
155 unsigned char read_status_mask;
d12341f9 156 unsigned char ignore_status_mask;
1da177e4
LT		 157
158 unsigned char *tx_buf;
159 int tx_put;
160 int tx_get;
161 int tx_count;
162
163 /* circular list of fixed length rx buffers */
164
165 unsigned char *rx_buf; /* memory allocated for all rx buffers */
166 int rx_buf_total_size; /* size of memory allocated for rx buffers */
167 int rx_put; /* index of next empty rx buffer */
168 int rx_get; /* index of next full rx buffer */
169 int rx_buf_size; /* size in bytes of single rx buffer */
170 int rx_buf_count; /* total number of rx buffers */
171 int rx_frame_count; /* number of full rx buffers */
d12341f9 172
1da177e4
LT		 173 wait_queue_head_t open_wait;
174 wait_queue_head_t close_wait;
d12341f9 175
1da177e4
LT		 176 wait_queue_head_t status_event_wait_q;
177 wait_queue_head_t event_wait_q;
178 struct timer_list tx_timer; /* HDLC transmit timeout timer */
179 struct _mgslpc_info *next_device; /* device list link */
180
181 unsigned short imra_value;
182 unsigned short imrb_value;
183 unsigned char pim_value;
184
185 spinlock_t lock;
186 struct work_struct task; /* task structure for scheduling bh */
187
188 u32 max_frame_size;
189
190 u32 pending_bh;
191
0fab6de0
JP		 192 bool bh_running;
193 bool bh_requested;
d12341f9 194
1da177e4
LT		 195 int dcd_chkcount; /* check counts to prevent */
196 int cts_chkcount; /* too many IRQs if a signal */
197 int dsr_chkcount; /* is floating */
198 int ri_chkcount;
199
0fab6de0
JP		 200 bool rx_enabled;
201 bool rx_overflow;
1da177e4 202
0fab6de0
JP		 203 bool tx_enabled;
204 bool tx_active;
205 bool tx_aborting;
1da177e4
LT		 206 u32 idle_mode;
207
208 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
209
210 char device_name[25]; /* device instance name */
211
212 unsigned int io_base; /* base I/O address of adapter */
213 unsigned int irq_level;
d12341f9 214
1da177e4
LT		 215 MGSL_PARAMS params; /* communications parameters */
216
217 unsigned char serial_signals; /* current serial signal states */
218
0fab6de0 219 bool irq_occurred; /* for diagnostics use */
1da177e4
LT		 220 char testing_irq;
221 unsigned int init_error; /* startup error (DIAGS) */
222
223 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
0fab6de0 224 bool drop_rts_on_tx_done;
1da177e4
LT		 225
226 struct _input_signal_events input_signal_events;
227
228 /* PCMCIA support */
fd238232 229 struct pcmcia_device *p_dev;
1da177e4
LT		 230 dev_node_t node;
231 int stop;
232
233 /* SPPP/Cisco HDLC device parts */
234 int netcount;
235 int dosyncppp;
236 spinlock_t netlock;
237
af69c7f9 238#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 239 struct net_device *netdev;
240#endif
241
242} MGSLPC_INFO;
243
244#define MGSLPC_MAGIC 0x5402
245
246/*
247 * The size of the serial xmit buffer is 1 page, or 4096 bytes
248 */
249#define TXBUFSIZE 4096
250
d12341f9 251
1da177e4
LT		 252#define CHA 0x00 /* channel A offset */
253#define CHB 0x40 /* channel B offset */
254
255/*
256 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
257 */
258#undef PVR
259
260#define RXFIFO 0
261#define TXFIFO 0
262#define STAR 0x20
263#define CMDR 0x20
264#define RSTA 0x21
265#define PRE 0x21
266#define MODE 0x22
267#define TIMR 0x23
268#define XAD1 0x24
269#define XAD2 0x25
270#define RAH1 0x26
271#define RAH2 0x27
272#define DAFO 0x27
273#define RAL1 0x28
274#define RFC 0x28
275#define RHCR 0x29
276#define RAL2 0x29
277#define RBCL 0x2a
278#define XBCL 0x2a
279#define RBCH 0x2b
280#define XBCH 0x2b
281#define CCR0 0x2c
282#define CCR1 0x2d
283#define CCR2 0x2e
284#define CCR3 0x2f
285#define VSTR 0x34
286#define BGR 0x34
287#define RLCR 0x35
288#define AML 0x36
289#define AMH 0x37
290#define GIS 0x38
291#define IVA 0x38
292#define IPC 0x39
293#define ISR 0x3a
294#define IMR 0x3a
295#define PVR 0x3c
296#define PIS 0x3d
297#define PIM 0x3d
298#define PCR 0x3e
299#define CCR4 0x3f
d12341f9 300
1da177e4 301// IMR/ISR
d12341f9 302
1da177e4
LT		 303#define IRQ_BREAK_ON BIT15 // rx break detected
304#define IRQ_DATAOVERRUN BIT14 // receive data overflow
305#define IRQ_ALLSENT BIT13 // all sent
306#define IRQ_UNDERRUN BIT12 // transmit data underrun
307#define IRQ_TIMER BIT11 // timer interrupt
308#define IRQ_CTS BIT10 // CTS status change
309#define IRQ_TXREPEAT BIT9 // tx message repeat
310#define IRQ_TXFIFO BIT8 // transmit pool ready
311#define IRQ_RXEOM BIT7 // receive message end
312#define IRQ_EXITHUNT BIT6 // receive frame start
313#define IRQ_RXTIME BIT6 // rx char timeout
314#define IRQ_DCD BIT2 // carrier detect status change
315#define IRQ_OVERRUN BIT1 // receive frame overflow
316#define IRQ_RXFIFO BIT0 // receive pool full
d12341f9 317
1da177e4 318// STAR
d12341f9 319
1da177e4
LT		 320#define XFW BIT6 // transmit FIFO write enable
321#define CEC BIT2 // command executing
322#define CTS BIT1 // CTS state
d12341f9 323
1da177e4
LT		 324#define PVR_DTR BIT0
325#define PVR_DSR BIT1
326#define PVR_RI BIT2
327#define PVR_AUTOCTS BIT3
328#define PVR_RS232 0x20 /* 0010b */
329#define PVR_V35 0xe0 /* 1110b */
330#define PVR_RS422 0x40 /* 0100b */
d12341f9
JG		 331
332/* Register access functions */
333
1da177e4
LT		 334#define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
335#define read_reg(info, reg) inb((info)->io_base + (reg))
336
d12341f9 337#define read_reg16(info, reg) inw((info)->io_base + (reg))
1da177e4 338#define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
d12341f9 339
1da177e4
LT		 340#define set_reg_bits(info, reg, mask) \
341 write_reg(info, (reg), \
d12341f9 342 (unsigned char) (read_reg(info, (reg)) | (mask)))
1da177e4
LT		 343#define clear_reg_bits(info, reg, mask) \
344 write_reg(info, (reg), \
d12341f9 345 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
1da177e4
LT		 346/*
347 * interrupt enable/disable routines
d12341f9
JG		 348 */
349static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
1da177e4
LT		 350{
351 if (channel == CHA) {
352 info->imra_value |= mask;
353 write_reg16(info, CHA + IMR, info->imra_value);
354 } else {
355 info->imrb_value |= mask;
356 write_reg16(info, CHB + IMR, info->imrb_value);
357 }
358}
d12341f9 359static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
1da177e4
LT		 360{
361 if (channel == CHA) {
362 info->imra_value &= ~mask;
363 write_reg16(info, CHA + IMR, info->imra_value);
364 } else {
365 info->imrb_value &= ~mask;
366 write_reg16(info, CHB + IMR, info->imrb_value);
367 }
368}
369
370#define port_irq_disable(info, mask) \
371 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
372
373#define port_irq_enable(info, mask) \
374 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
375
376static void rx_start(MGSLPC_INFO *info);
377static void rx_stop(MGSLPC_INFO *info);
378
379static void tx_start(MGSLPC_INFO *info);
380static void tx_stop(MGSLPC_INFO *info);
381static void tx_set_idle(MGSLPC_INFO *info);
382
383static void get_signals(MGSLPC_INFO *info);
384static void set_signals(MGSLPC_INFO *info);
385
386static void reset_device(MGSLPC_INFO *info);
387
388static void hdlc_mode(MGSLPC_INFO *info);
389static void async_mode(MGSLPC_INFO *info);
390
391static void tx_timeout(unsigned long context);
392
393static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
394
af69c7f9 395#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 396#define dev_to_port(D) (dev_to_hdlc(D)->priv)
397static void hdlcdev_tx_done(MGSLPC_INFO *info);
398static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
399static int hdlcdev_init(MGSLPC_INFO *info);
400static void hdlcdev_exit(MGSLPC_INFO *info);
401#endif
402
403static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
404
0fab6de0
JP		 405static bool register_test(MGSLPC_INFO *info);
406static bool irq_test(MGSLPC_INFO *info);
1da177e4
LT		 407static int adapter_test(MGSLPC_INFO *info);
408
409static int claim_resources(MGSLPC_INFO *info);
410static void release_resources(MGSLPC_INFO *info);
411static void mgslpc_add_device(MGSLPC_INFO *info);
412static void mgslpc_remove_device(MGSLPC_INFO *info);
413
0fab6de0 414static bool rx_get_frame(MGSLPC_INFO *info);
1da177e4
LT		 415static void rx_reset_buffers(MGSLPC_INFO *info);
416static int rx_alloc_buffers(MGSLPC_INFO *info);
417static void rx_free_buffers(MGSLPC_INFO *info);
418
7d12e780 419static irqreturn_t mgslpc_isr(int irq, void *dev_id);
1da177e4
LT		 420
421/*
422 * Bottom half interrupt handlers
423 */
c4028958 424static void bh_handler(struct work_struct *work);
1da177e4
LT		 425static void bh_transmit(MGSLPC_INFO *info);
426static void bh_status(MGSLPC_INFO *info);
427
428/*
429 * ioctl handlers
430 */
431static int tiocmget(struct tty_struct *tty, struct file *file);
432static int tiocmset(struct tty_struct *tty, struct file *file,
433 unsigned int set, unsigned int clear);
434static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
435static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
436static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
437static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
438static int set_txidle(MGSLPC_INFO *info, int idle_mode);
439static int set_txenable(MGSLPC_INFO *info, int enable);
440static int tx_abort(MGSLPC_INFO *info);
441static int set_rxenable(MGSLPC_INFO *info, int enable);
442static int wait_events(MGSLPC_INFO *info, int __user *mask);
443
444static MGSLPC_INFO *mgslpc_device_list = NULL;
445static int mgslpc_device_count = 0;
446
447/*
448 * Set this param to non-zero to load eax with the
449 * .text section address and breakpoint on module load.
450 * This is useful for use with gdb and add-symbol-file command.
451 */
452static int break_on_load=0;
453
454/*
455 * Driver major number, defaults to zero to get auto
456 * assigned major number. May be forced as module parameter.
457 */
458static int ttymajor=0;
459
460static int debug_level = 0;
461static int maxframe[MAX_DEVICE_COUNT] = {0,};
462static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
463
464module_param(break_on_load, bool, 0);
465module_param(ttymajor, int, 0);
466module_param(debug_level, int, 0);
467module_param_array(maxframe, int, NULL, 0);
468module_param_array(dosyncppp, int, NULL, 0);
469
470MODULE_LICENSE("GPL");
471
472static char *driver_name = "SyncLink PC Card driver";
a7482a2e 473static char *driver_version = "$Revision: 4.34 $";
1da177e4
LT		 474
475static struct tty_driver *serial_driver;
476
477/* number of characters left in xmit buffer before we ask for more */
478#define WAKEUP_CHARS 256
479
480static void mgslpc_change_params(MGSLPC_INFO *info);
481static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
482
483/* PCMCIA prototypes */
484
15b99ac1 485static int mgslpc_config(struct pcmcia_device *link);
1da177e4 486static void mgslpc_release(u_long arg);
cc3b4866 487static void mgslpc_detach(struct pcmcia_device *p_dev);
1da177e4 488
1da177e4
LT		 489/*
490 * 1st function defined in .text section. Calling this function in
491 * init_module() followed by a breakpoint allows a remote debugger
492 * (gdb) to get the .text address for the add-symbol-file command.
493 * This allows remote debugging of dynamically loadable modules.
494 */
495static void* mgslpc_get_text_ptr(void)
496{
497 return mgslpc_get_text_ptr;
498}
499
500/**
501 * line discipline callback wrappers
502 *
503 * The wrappers maintain line discipline references
504 * while calling into the line discipline.
505 *
1da177e4
LT		 506 * ldisc_receive_buf - pass receive data to line discipline
507 */
508
1da177e4
LT		 509static void ldisc_receive_buf(struct tty_struct *tty,
510 const __u8 *data, char *flags, int count)
511{
512 struct tty_ldisc *ld;
513 if (!tty)
514 return;
515 ld = tty_ldisc_ref(tty);
516 if (ld) {
517 if (ld->receive_buf)
518 ld->receive_buf(tty, data, flags, count);
519 tty_ldisc_deref(ld);
520 }
521}
522
15b99ac1 523static int mgslpc_probe(struct pcmcia_device *link)
1da177e4
LT		 524{
525 MGSLPC_INFO *info;
15b99ac1 526 int ret;
fd238232 527
1da177e4
LT		 528 if (debug_level >= DEBUG_LEVEL_INFO)
529 printk("mgslpc_attach\n");
fd238232 530
dd00cc48 531 info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
1da177e4
LT		 532 if (!info) {
533 printk("Error can't allocate device instance data\n");
f8cfa618 534 return -ENOMEM;
1da177e4
LT		 535 }
536
1da177e4 537 info->magic = MGSLPC_MAGIC;
c4028958 538 INIT_WORK(&info->task, bh_handler);
1da177e4
LT		 539 info->max_frame_size = 4096;
540 info->close_delay = 5*HZ/10;
541 info->closing_wait = 30*HZ;
542 init_waitqueue_head(&info->open_wait);
543 init_waitqueue_head(&info->close_wait);
544 init_waitqueue_head(&info->status_event_wait_q);
545 init_waitqueue_head(&info->event_wait_q);
546 spin_lock_init(&info->lock);
547 spin_lock_init(&info->netlock);
548 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
d12341f9 549 info->idle_mode = HDLC_TXIDLE_FLAGS;
1da177e4
LT		 550 info->imra_value = 0xffff;
551 info->imrb_value = 0xffff;
552 info->pim_value = 0xff;
553
fba395ee 554 info->p_dev = link;
1da177e4 555 link->priv = info;
fd238232 556
fba395ee 557 /* Initialize the struct pcmcia_device structure */
1da177e4
LT		 558
559 /* Interrupt setup */
560 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
0c7ab676 561 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
1da177e4 562 link->irq.Handler = NULL;
fd238232 563
1da177e4 564 link->conf.Attributes = 0;
1da177e4
LT		 565 link->conf.IntType = INT_MEMORY_AND_IO;
566
15b99ac1
DB		 567 ret = mgslpc_config(link);
568 if (ret)
569 return ret;
1da177e4
LT		 570
571 mgslpc_add_device(info);
572
f8cfa618 573 return 0;
1da177e4
LT		 574}
575
576/* Card has been inserted.
577 */
578
579#define CS_CHECK(fn, ret) \
580do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
581
15b99ac1 582static int mgslpc_config(struct pcmcia_device *link)
1da177e4 583{
1da177e4
LT		 584 MGSLPC_INFO *info = link->priv;
585 tuple_t tuple;
586 cisparse_t parse;
587 int last_fn, last_ret;
588 u_char buf[64];
1da177e4
LT		 589 cistpl_cftable_entry_t dflt = { 0 };
590 cistpl_cftable_entry_t *cfg;
d12341f9 591
1da177e4
LT		 592 if (debug_level >= DEBUG_LEVEL_INFO)
593 printk("mgslpc_config(0x%p)\n", link);
594
1da177e4
LT		 595 tuple.Attributes = 0;
596 tuple.TupleData = buf;
597 tuple.TupleDataMax = sizeof(buf);
598 tuple.TupleOffset = 0;
1da177e4 599
1da177e4
LT		 600 /* get CIS configuration entry */
601
602 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
fba395ee 603 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
1da177e4
LT		 604
605 cfg = &(parse.cftable_entry);
fba395ee
DB		 606 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
607 CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
1da177e4
LT		 608
609 if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
610 if (cfg->index == 0)
611 goto cs_failed;
612
613 link->conf.ConfigIndex = cfg->index;
614 link->conf.Attributes |= CONF_ENABLE_IRQ;
d12341f9 615
1da177e4
LT		 616 /* IO window settings */
617 link->io.NumPorts1 = 0;
618 if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
619 cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
620 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
621 if (!(io->flags & CISTPL_IO_8BIT))
622 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
623 if (!(io->flags & CISTPL_IO_16BIT))
624 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
625 link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
626 link->io.BasePort1 = io->win[0].base;
627 link->io.NumPorts1 = io->win[0].len;
fba395ee 628 CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
1da177e4
LT		 629 }
630
631 link->conf.Attributes = CONF_ENABLE_IRQ;
1da177e4
LT		 632 link->conf.IntType = INT_MEMORY_AND_IO;
633 link->conf.ConfigIndex = 8;
634 link->conf.Present = PRESENT_OPTION;
d12341f9 635
1da177e4
LT		 636 link->irq.Attributes |= IRQ_HANDLE_PRESENT;
637 link->irq.Handler = mgslpc_isr;
638 link->irq.Instance = info;
fba395ee 639 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
1da177e4 640
fba395ee 641 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
1da177e4
LT		 642
643 info->io_base = link->io.BasePort1;
644 info->irq_level = link->irq.AssignedIRQ;
645
646 /* add to linked list of devices */
647 sprintf(info->node.dev_name, "mgslpc0");
648 info->node.major = info->node.minor = 0;
fd238232 649 link->dev_node = &info->node;
1da177e4
LT		 650
651 printk(KERN_INFO "%s: index 0x%02x:",
652 info->node.dev_name, link->conf.ConfigIndex);
653 if (link->conf.Attributes & CONF_ENABLE_IRQ)
654 printk(", irq %d", link->irq.AssignedIRQ);
655 if (link->io.NumPorts1)
656 printk(", io 0x%04x-0x%04x", link->io.BasePort1,
657 link->io.BasePort1+link->io.NumPorts1-1);
658 printk("\n");
15b99ac1 659 return 0;
1da177e4
LT		 660
661cs_failed:
fba395ee 662 cs_error(link, last_fn, last_ret);
1da177e4 663 mgslpc_release((u_long)link);
15b99ac1 664 return -ENODEV;
1da177e4
LT		 665}
666
667/* Card has been removed.
668 * Unregister device and release PCMCIA configuration.
669 * If device is open, postpone until it is closed.
670 */
671static void mgslpc_release(u_long arg)
672{
e2d40963 673 struct pcmcia_device *link = (struct pcmcia_device *)arg;
1da177e4 674
e2d40963
DB		 675 if (debug_level >= DEBUG_LEVEL_INFO)
676 printk("mgslpc_release(0x%p)\n", link);
1da177e4 677
e2d40963 678 pcmcia_disable_device(link);
1da177e4
LT		 679}
680
fba395ee 681static void mgslpc_detach(struct pcmcia_device *link)
1da177e4 682{
e2d40963
DB		 683 if (debug_level >= DEBUG_LEVEL_INFO)
684 printk("mgslpc_detach(0x%p)\n", link);
cc3b4866 685
e2d40963
DB		 686 ((MGSLPC_INFO *)link->priv)->stop = 1;
687 mgslpc_release((u_long)link);
1da177e4 688
e2d40963 689 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
1da177e4
LT		 690}
691
fba395ee 692static int mgslpc_suspend(struct pcmcia_device *link)
98e4c28b 693{
98e4c28b
DB		 694 MGSLPC_INFO *info = link->priv;
695
98e4c28b 696 info->stop = 1;
98e4c28b
DB		 697
698 return 0;
699}
700
fba395ee 701static int mgslpc_resume(struct pcmcia_device *link)
98e4c28b 702{
98e4c28b
DB		 703 MGSLPC_INFO *info = link->priv;
704
98e4c28b
DB		 705 info->stop = 0;
706
707 return 0;
708}
709
710
0fab6de0 711static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
1da177e4
LT		 712 char *name, const char *routine)
713{
714#ifdef MGSLPC_PARANOIA_CHECK
715 static const char *badmagic =
716 "Warning: bad magic number for mgsl struct (%s) in %s\n";
717 static const char *badinfo =
718 "Warning: null mgslpc_info for (%s) in %s\n";
719
720 if (!info) {
721 printk(badinfo, name, routine);
0fab6de0 722 return true;
1da177e4
LT		 723 }
724 if (info->magic != MGSLPC_MAGIC) {
725 printk(badmagic, name, routine);
0fab6de0 726 return true;
1da177e4
LT		 727 }
728#else
729 if (!info)
0fab6de0 730 return true;
1da177e4 731#endif
0fab6de0 732 return false;
1da177e4
LT		 733}
734
735
736#define CMD_RXFIFO BIT7 // release current rx FIFO
737#define CMD_RXRESET BIT6 // receiver reset
738#define CMD_RXFIFO_READ BIT5
739#define CMD_START_TIMER BIT4
740#define CMD_TXFIFO BIT3 // release current tx FIFO
741#define CMD_TXEOM BIT1 // transmit end message
742#define CMD_TXRESET BIT0 // transmit reset
743
0fab6de0 744static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
1da177e4
LT		 745{
746 int i = 0;
d12341f9 747 /* wait for command completion */
1da177e4
LT		 748 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
749 udelay(1);
750 if (i++ == 1000)
0fab6de0 751 return false;
1da177e4 752 }
0fab6de0 753 return true;
1da177e4
LT		 754}
755
d12341f9 756static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
1da177e4
LT		 757{
758 wait_command_complete(info, channel);
759 write_reg(info, (unsigned char) (channel + CMDR), cmd);
760}
761
762static void tx_pause(struct tty_struct *tty)
763{
764 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
765 unsigned long flags;
d12341f9 766
1da177e4
LT		 767 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
768 return;
769 if (debug_level >= DEBUG_LEVEL_INFO)
d12341f9
JG		 770 printk("tx_pause(%s)\n",info->device_name);
771
1da177e4
LT		 772 spin_lock_irqsave(&info->lock,flags);
773 if (info->tx_enabled)
774 tx_stop(info);
775 spin_unlock_irqrestore(&info->lock,flags);
776}
777
778static void tx_release(struct tty_struct *tty)
779{
780 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
781 unsigned long flags;
d12341f9 782
1da177e4
LT		 783 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
784 return;
785 if (debug_level >= DEBUG_LEVEL_INFO)
d12341f9
JG		 786 printk("tx_release(%s)\n",info->device_name);
787
1da177e4
LT		 788 spin_lock_irqsave(&info->lock,flags);
789 if (!info->tx_enabled)
790 tx_start(info);
791 spin_unlock_irqrestore(&info->lock,flags);
792}
793
794/* Return next bottom half action to perform.
795 * or 0 if nothing to do.
796 */
797static int bh_action(MGSLPC_INFO *info)
798{
799 unsigned long flags;
800 int rc = 0;
d12341f9 801
1da177e4
LT		 802 spin_lock_irqsave(&info->lock,flags);
803
804 if (info->pending_bh & BH_RECEIVE) {
805 info->pending_bh &= ~BH_RECEIVE;
806 rc = BH_RECEIVE;
807 } else if (info->pending_bh & BH_TRANSMIT) {
808 info->pending_bh &= ~BH_TRANSMIT;
809 rc = BH_TRANSMIT;
810 } else if (info->pending_bh & BH_STATUS) {
811 info->pending_bh &= ~BH_STATUS;
812 rc = BH_STATUS;
813 }
814
815 if (!rc) {
816 /* Mark BH routine as complete */
0fab6de0
JP		 817 info->bh_running = false;
818 info->bh_requested = false;
1da177e4 819 }
d12341f9 820
1da177e4 821 spin_unlock_irqrestore(&info->lock,flags);
d12341f9 822
1da177e4
LT		 823 return rc;
824}
825
c4028958 826static void bh_handler(struct work_struct *work)
1da177e4 827{
c4028958 828 MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
1da177e4
LT		 829 int action;
830
831 if (!info)
832 return;
d12341f9 833
1da177e4
LT		 834 if (debug_level >= DEBUG_LEVEL_BH)
835 printk( "%s(%d):bh_handler(%s) entry\n",
836 __FILE__,__LINE__,info->device_name);
d12341f9 837
0fab6de0 838 info->bh_running = true;
1da177e4
LT		 839
840 while((action = bh_action(info)) != 0) {
d12341f9 841
1da177e4
LT		 842 /* Process work item */
843 if ( debug_level >= DEBUG_LEVEL_BH )
844 printk( "%s(%d):bh_handler() work item action=%d\n",
845 __FILE__,__LINE__,action);
846
847 switch (action) {
d12341f9 848
1da177e4
LT		 849 case BH_RECEIVE:
850 while(rx_get_frame(info));
851 break;
852 case BH_TRANSMIT:
853 bh_transmit(info);
854 break;
855 case BH_STATUS:
856 bh_status(info);
857 break;
858 default:
859 /* unknown work item ID */
860 printk("Unknown work item ID=%08X!\n", action);
861 break;
862 }
863 }
864
865 if (debug_level >= DEBUG_LEVEL_BH)
866 printk( "%s(%d):bh_handler(%s) exit\n",
867 __FILE__,__LINE__,info->device_name);
868}
869
cdaad343 870static void bh_transmit(MGSLPC_INFO *info)
1da177e4
LT		 871{
872 struct tty_struct *tty = info->tty;
873 if (debug_level >= DEBUG_LEVEL_BH)
874 printk("bh_transmit() entry on %s\n", info->device_name);
875
b963a844 876 if (tty)
1da177e4 877 tty_wakeup(tty);
1da177e4
LT		 878}
879
cdaad343 880static void bh_status(MGSLPC_INFO *info)
1da177e4
LT		 881{
882 info->ri_chkcount = 0;
883 info->dsr_chkcount = 0;
884 info->dcd_chkcount = 0;
885 info->cts_chkcount = 0;
886}
887
d12341f9 888/* eom: non-zero = end of frame */
1da177e4
LT		 889static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
890{
891 unsigned char data[2];
892 unsigned char fifo_count, read_count, i;
893 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
894
895 if (debug_level >= DEBUG_LEVEL_ISR)
896 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
d12341f9 897
1da177e4
LT		 898 if (!info->rx_enabled)
899 return;
900
901 if (info->rx_frame_count >= info->rx_buf_count) {
902 /* no more free buffers */
903 issue_command(info, CHA, CMD_RXRESET);
904 info->pending_bh |= BH_RECEIVE;
0fab6de0 905 info->rx_overflow = true;
1da177e4
LT		 906 info->icount.buf_overrun++;
907 return;
908 }
909
910 if (eom) {
d12341f9 911 /* end of frame, get FIFO count from RBCL register */
1da177e4
LT		 912 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
913 fifo_count = 32;
914 } else
915 fifo_count = 32;
d12341f9 916
1da177e4
LT		 917 do {
918 if (fifo_count == 1) {
919 read_count = 1;
920 data[0] = read_reg(info, CHA + RXFIFO);
921 } else {
922 read_count = 2;
923 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
924 }
925 fifo_count -= read_count;
926 if (!fifo_count && eom)
927 buf->status = data[--read_count];
928
929 for (i = 0; i < read_count; i++) {
930 if (buf->count >= info->max_frame_size) {
931 /* frame too large, reset receiver and reset current buffer */
932 issue_command(info, CHA, CMD_RXRESET);
933 buf->count = 0;
934 return;
935 }
936 *(buf->data + buf->count) = data[i];
937 buf->count++;
938 }
939 } while (fifo_count);
940
941 if (eom) {
942 info->pending_bh |= BH_RECEIVE;
943 info->rx_frame_count++;
944 info->rx_put++;
945 if (info->rx_put >= info->rx_buf_count)
946 info->rx_put = 0;
947 }
948 issue_command(info, CHA, CMD_RXFIFO);
949}
950
951static void rx_ready_async(MGSLPC_INFO *info, int tcd)
952{
33f0f88f 953 unsigned char data, status, flag;
1da177e4 954 int fifo_count;
33f0f88f 955 int work = 0;
1da177e4
LT		 956 struct tty_struct *tty = info->tty;
957 struct mgsl_icount *icount = &info->icount;
958
959 if (tcd) {
d12341f9 960 /* early termination, get FIFO count from RBCL register */
1da177e4
LT		 961 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
962
963 /* Zero fifo count could mean 0 or 32 bytes available.
964 * If BIT5 of STAR is set then at least 1 byte is available.
965 */
966 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
967 fifo_count = 32;
968 } else
969 fifo_count = 32;
33f0f88f
AC		 970
971 tty_buffer_request_room(tty, fifo_count);
d12341f9 972 /* Flush received async data to receive data buffer. */
1da177e4
LT		 973 while (fifo_count) {
974 data = read_reg(info, CHA + RXFIFO);
975 status = read_reg(info, CHA + RXFIFO);
976 fifo_count -= 2;
977
1da177e4 978 icount->rx++;
33f0f88f 979 flag = TTY_NORMAL;
1da177e4
LT		 980
981 // if no frameing/crc error then save data
982 // BIT7:parity error
983 // BIT6:framing error
984
985 if (status & (BIT7 + BIT6)) {
d12341f9 986 if (status & BIT7)
1da177e4
LT		 987 icount->parity++;
988 else
989 icount->frame++;
990
991 /* discard char if tty control flags say so */
992 if (status & info->ignore_status_mask)
993 continue;
d12341f9 994
1da177e4
LT		 995 status &= info->read_status_mask;
996
997 if (status & BIT7)
33f0f88f 998 flag = TTY_PARITY;
1da177e4 999 else if (status & BIT6)
33f0f88f 1000 flag = TTY_FRAME;
1da177e4 1001 }
33f0f88f 1002 work += tty_insert_flip_char(tty, data, flag);
1da177e4
LT		 1003 }
1004 issue_command(info, CHA, CMD_RXFIFO);
1005
1006 if (debug_level >= DEBUG_LEVEL_ISR) {
33f0f88f
AC		 1007 printk("%s(%d):rx_ready_async",
1008 __FILE__,__LINE__);
1da177e4
LT		 1009 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1010 __FILE__,__LINE__,icount->rx,icount->brk,
1011 icount->parity,icount->frame,icount->overrun);
1012 }
d12341f9 1013
33f0f88f 1014 if (work)
1da177e4
LT		 1015 tty_flip_buffer_push(tty);
1016}
1017
1018
1019static void tx_done(MGSLPC_INFO *info)
1020{
1021 if (!info->tx_active)
1022 return;
d12341f9 1023
0fab6de0
JP		 1024 info->tx_active = false;
1025 info->tx_aborting = false;
1da177e4
LT		 1026
1027 if (info->params.mode == MGSL_MODE_ASYNC)
1028 return;
1029
1030 info->tx_count = info->tx_put = info->tx_get = 0;
d12341f9
JG		 1031 del_timer(&info->tx_timer);
1032
1da177e4
LT		 1033 if (info->drop_rts_on_tx_done) {
1034 get_signals(info);
1035 if (info->serial_signals & SerialSignal_RTS) {
1036 info->serial_signals &= ~SerialSignal_RTS;
1037 set_signals(info);
1038 }
0fab6de0 1039 info->drop_rts_on_tx_done = false;
1da177e4
LT		 1040 }
1041
af69c7f9 1042#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 1043 if (info->netcount)
1044 hdlcdev_tx_done(info);
d12341f9 1045 else
1da177e4
LT		 1046#endif
1047 {
1048 if (info->tty->stopped || info->tty->hw_stopped) {
1049 tx_stop(info);
1050 return;
1051 }
1052 info->pending_bh |= BH_TRANSMIT;
1053 }
1054}
1055
1056static void tx_ready(MGSLPC_INFO *info)
1057{
1058 unsigned char fifo_count = 32;
1059 int c;
1060
1061 if (debug_level >= DEBUG_LEVEL_ISR)
1062 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1063
1064 if (info->params.mode == MGSL_MODE_HDLC) {
1065 if (!info->tx_active)
1066 return;
1067 } else {
1068 if (info->tty->stopped || info->tty->hw_stopped) {
1069 tx_stop(info);
1070 return;
1071 }
1072 if (!info->tx_count)
0fab6de0 1073 info->tx_active = false;
1da177e4
LT		 1074 }
1075
1076 if (!info->tx_count)
1077 return;
1078
1079 while (info->tx_count && fifo_count) {
1080 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
d12341f9 1081
1da177e4
LT		 1082 if (c == 1) {
1083 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1084 } else {
1085 write_reg16(info, CHA + TXFIFO,
1086 *((unsigned short*)(info->tx_buf + info->tx_get)));
1087 }
1088 info->tx_count -= c;
1089 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1090 fifo_count -= c;
1091 }
1092
1093 if (info->params.mode == MGSL_MODE_ASYNC) {
1094 if (info->tx_count < WAKEUP_CHARS)
1095 info->pending_bh |= BH_TRANSMIT;
1096 issue_command(info, CHA, CMD_TXFIFO);
1097 } else {
1098 if (info->tx_count)
1099 issue_command(info, CHA, CMD_TXFIFO);
1100 else
1101 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1102 }
1103}
1104
1105static void cts_change(MGSLPC_INFO *info)
1106{
1107 get_signals(info);
1108 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1109 irq_disable(info, CHB, IRQ_CTS);
1110 info->icount.cts++;
1111 if (info->serial_signals & SerialSignal_CTS)
1112 info->input_signal_events.cts_up++;
1113 else
1114 info->input_signal_events.cts_down++;
1115 wake_up_interruptible(&info->status_event_wait_q);
1116 wake_up_interruptible(&info->event_wait_q);
1117
1118 if (info->flags & ASYNC_CTS_FLOW) {
1119 if (info->tty->hw_stopped) {
1120 if (info->serial_signals & SerialSignal_CTS) {
1121 if (debug_level >= DEBUG_LEVEL_ISR)
1122 printk("CTS tx start...");
1123 if (info->tty)
1124 info->tty->hw_stopped = 0;
1125 tx_start(info);
1126 info->pending_bh |= BH_TRANSMIT;
1127 return;
1128 }
1129 } else {
1130 if (!(info->serial_signals & SerialSignal_CTS)) {
1131 if (debug_level >= DEBUG_LEVEL_ISR)
1132 printk("CTS tx stop...");
1133 if (info->tty)
1134 info->tty->hw_stopped = 1;
1135 tx_stop(info);
1136 }
1137 }
1138 }
1139 info->pending_bh |= BH_STATUS;
1140}
1141
1142static void dcd_change(MGSLPC_INFO *info)
1143{
1144 get_signals(info);
1145 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1146 irq_disable(info, CHB, IRQ_DCD);
1147 info->icount.dcd++;
1148 if (info->serial_signals & SerialSignal_DCD) {
1149 info->input_signal_events.dcd_up++;
1150 }
1151 else
1152 info->input_signal_events.dcd_down++;
af69c7f9 1153#if SYNCLINK_GENERIC_HDLC
fbeff3c1
KH		 1154 if (info->netcount) {
1155 if (info->serial_signals & SerialSignal_DCD)
1156 netif_carrier_on(info->netdev);
1157 else
1158 netif_carrier_off(info->netdev);
1159 }
1da177e4
LT		 1160#endif
1161 wake_up_interruptible(&info->status_event_wait_q);
1162 wake_up_interruptible(&info->event_wait_q);
1163
1164 if (info->flags & ASYNC_CHECK_CD) {
1165 if (debug_level >= DEBUG_LEVEL_ISR)
1166 printk("%s CD now %s...", info->device_name,
1167 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1168 if (info->serial_signals & SerialSignal_DCD)
1169 wake_up_interruptible(&info->open_wait);
1170 else {
1171 if (debug_level >= DEBUG_LEVEL_ISR)
1172 printk("doing serial hangup...");
1173 if (info->tty)
1174 tty_hangup(info->tty);
1175 }
1176 }
1177 info->pending_bh |= BH_STATUS;
1178}
1179
1180static void dsr_change(MGSLPC_INFO *info)
1181{
1182 get_signals(info);
1183 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1184 port_irq_disable(info, PVR_DSR);
1185 info->icount.dsr++;
1186 if (info->serial_signals & SerialSignal_DSR)
1187 info->input_signal_events.dsr_up++;
1188 else
1189 info->input_signal_events.dsr_down++;
1190 wake_up_interruptible(&info->status_event_wait_q);
1191 wake_up_interruptible(&info->event_wait_q);
1192 info->pending_bh |= BH_STATUS;
1193}
1194
1195static void ri_change(MGSLPC_INFO *info)
1196{
1197 get_signals(info);
1198 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1199 port_irq_disable(info, PVR_RI);
1200 info->icount.rng++;
1201 if (info->serial_signals & SerialSignal_RI)
1202 info->input_signal_events.ri_up++;
1203 else
1204 info->input_signal_events.ri_down++;
1205 wake_up_interruptible(&info->status_event_wait_q);
1206 wake_up_interruptible(&info->event_wait_q);
1207 info->pending_bh |= BH_STATUS;
1208}
1209
1210/* Interrupt service routine entry point.
d12341f9 1211 *
1da177e4 1212 * Arguments:
d12341f9 1213 *
1da177e4
LT		 1214 * irq interrupt number that caused interrupt
1215 * dev_id device ID supplied during interrupt registration
1da177e4 1216 */
a6f97b29 1217static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1da177e4 1218{
a6f97b29 1219 MGSLPC_INFO *info = dev_id;
1da177e4
LT		 1220 unsigned short isr;
1221 unsigned char gis, pis;
1222 int count=0;
1223
d12341f9 1224 if (debug_level >= DEBUG_LEVEL_ISR)
a6f97b29 1225 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
d12341f9 1226
e2d40963 1227 if (!(info->p_dev->_locked))
1da177e4
LT		 1228 return IRQ_HANDLED;
1229
1230 spin_lock(&info->lock);
1231
1232 while ((gis = read_reg(info, CHA + GIS))) {
d12341f9 1233 if (debug_level >= DEBUG_LEVEL_ISR)
1da177e4
LT		 1234 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1235
1236 if ((gis & 0x70) || count > 1000) {
1237 printk("synclink_cs:hardware failed or ejected\n");
1238 break;
1239 }
1240 count++;
1241
1242 if (gis & (BIT1 + BIT0)) {
1243 isr = read_reg16(info, CHB + ISR);
1244 if (isr & IRQ_DCD)
1245 dcd_change(info);
1246 if (isr & IRQ_CTS)
1247 cts_change(info);
1248 }
1249 if (gis & (BIT3 + BIT2))
1250 {
1251 isr = read_reg16(info, CHA + ISR);
1252 if (isr & IRQ_TIMER) {
0fab6de0 1253 info->irq_occurred = true;
1da177e4
LT		 1254 irq_disable(info, CHA, IRQ_TIMER);
1255 }
1256
d12341f9 1257 /* receive IRQs */
1da177e4
LT		 1258 if (isr & IRQ_EXITHUNT) {
1259 info->icount.exithunt++;
1260 wake_up_interruptible(&info->event_wait_q);
1261 }
1262 if (isr & IRQ_BREAK_ON) {
1263 info->icount.brk++;
1264 if (info->flags & ASYNC_SAK)
1265 do_SAK(info->tty);
1266 }
1267 if (isr & IRQ_RXTIME) {
1268 issue_command(info, CHA, CMD_RXFIFO_READ);
1269 }
1270 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1271 if (info->params.mode == MGSL_MODE_HDLC)
d12341f9 1272 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1da177e4
LT		 1273 else
1274 rx_ready_async(info, isr & IRQ_RXEOM);
1275 }
1276
d12341f9 1277 /* transmit IRQs */
1da177e4
LT		 1278 if (isr & IRQ_UNDERRUN) {
1279 if (info->tx_aborting)
1280 info->icount.txabort++;
1281 else
1282 info->icount.txunder++;
1283 tx_done(info);
1284 }
1285 else if (isr & IRQ_ALLSENT) {
1286 info->icount.txok++;
1287 tx_done(info);
1288 }
1289 else if (isr & IRQ_TXFIFO)
1290 tx_ready(info);
1291 }
1292 if (gis & BIT7) {
1293 pis = read_reg(info, CHA + PIS);
1294 if (pis & BIT1)
1295 dsr_change(info);
1296 if (pis & BIT2)
1297 ri_change(info);
1298 }
1299 }
d12341f9
JG		 1300
1301 /* Request bottom half processing if there's something
1da177e4
LT		 1302 * for it to do and the bh is not already running
1303 */
1304
1305 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
d12341f9 1306 if ( debug_level >= DEBUG_LEVEL_ISR )
1da177e4
LT		 1307 printk("%s(%d):%s queueing bh task.\n",
1308 __FILE__,__LINE__,info->device_name);
1309 schedule_work(&info->task);
0fab6de0 1310 info->bh_requested = true;
1da177e4
LT		 1311 }
1312
1313 spin_unlock(&info->lock);
d12341f9
JG		 1314
1315 if (debug_level >= DEBUG_LEVEL_ISR)
1da177e4 1316 printk("%s(%d):mgslpc_isr(%d)exit.\n",
a6f97b29 1317 __FILE__, __LINE__, info->irq_level);
1da177e4
LT		 1318
1319 return IRQ_HANDLED;
1320}
1321
1322/* Initialize and start device.
1323 */
1324static int startup(MGSLPC_INFO * info)
1325{
1326 int retval = 0;
d12341f9 1327
1da177e4
LT		 1328 if (debug_level >= DEBUG_LEVEL_INFO)
1329 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
d12341f9 1330
1da177e4
LT		 1331 if (info->flags & ASYNC_INITIALIZED)
1332 return 0;
d12341f9 1333
1da177e4
LT		 1334 if (!info->tx_buf) {
1335 /* allocate a page of memory for a transmit buffer */
1336 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1337 if (!info->tx_buf) {
1338 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1339 __FILE__,__LINE__,info->device_name);
1340 return -ENOMEM;
1341 }
1342 }
1343
1344 info->pending_bh = 0;
d12341f9 1345
a7482a2e
PF		 1346 memset(&info->icount, 0, sizeof(info->icount));
1347
40565f19 1348 setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1da177e4
LT		 1349
1350 /* Allocate and claim adapter resources */
1351 retval = claim_resources(info);
d12341f9 1352
1da177e4
LT		 1353 /* perform existance check and diagnostics */
1354 if ( !retval )
1355 retval = adapter_test(info);
d12341f9 1356
1da177e4
LT		 1357 if ( retval ) {
1358 if (capable(CAP_SYS_ADMIN) && info->tty)
1359 set_bit(TTY_IO_ERROR, &info->tty->flags);
1360 release_resources(info);
1361 return retval;
1362 }
1363
1364 /* program hardware for current parameters */
1365 mgslpc_change_params(info);
d12341f9 1366
1da177e4
LT		 1367 if (info->tty)
1368 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1369
1370 info->flags |= ASYNC_INITIALIZED;
d12341f9 1371
1da177e4
LT		 1372 return 0;
1373}
1374
1375/* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1376 */
1377static void shutdown(MGSLPC_INFO * info)
1378{
1379 unsigned long flags;
d12341f9 1380
1da177e4
LT		 1381 if (!(info->flags & ASYNC_INITIALIZED))
1382 return;
1383
1384 if (debug_level >= DEBUG_LEVEL_INFO)
1385 printk("%s(%d):mgslpc_shutdown(%s)\n",
1386 __FILE__,__LINE__, info->device_name );
1387
1388 /* clear status wait queue because status changes */
1389 /* can't happen after shutting down the hardware */
1390 wake_up_interruptible(&info->status_event_wait_q);
1391 wake_up_interruptible(&info->event_wait_q);
1392
40565f19 1393 del_timer_sync(&info->tx_timer);
1da177e4
LT		 1394
1395 if (info->tx_buf) {
1396 free_page((unsigned long) info->tx_buf);
1397 info->tx_buf = NULL;
1398 }
1399
1400 spin_lock_irqsave(&info->lock,flags);
1401
1402 rx_stop(info);
1403 tx_stop(info);
1404
1405 /* TODO:disable interrupts instead of reset to preserve signal states */
1406 reset_device(info);
d12341f9 1407
1da177e4
LT		 1408 if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1409 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1410 set_signals(info);
1411 }
d12341f9 1412
1da177e4
LT		 1413 spin_unlock_irqrestore(&info->lock,flags);
1414
d12341f9
JG		 1415 release_resources(info);
1416
1da177e4
LT		 1417 if (info->tty)
1418 set_bit(TTY_IO_ERROR, &info->tty->flags);
1419
1420 info->flags &= ~ASYNC_INITIALIZED;
1421}
1422
1423static void mgslpc_program_hw(MGSLPC_INFO *info)
1424{
1425 unsigned long flags;
1426
1427 spin_lock_irqsave(&info->lock,flags);
d12341f9 1428
1da177e4
LT		 1429 rx_stop(info);
1430 tx_stop(info);
1431 info->tx_count = info->tx_put = info->tx_get = 0;
d12341f9 1432
1da177e4
LT		 1433 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1434 hdlc_mode(info);
1435 else
1436 async_mode(info);
d12341f9 1437
1da177e4 1438 set_signals(info);
d12341f9 1439
1da177e4
LT		 1440 info->dcd_chkcount = 0;
1441 info->cts_chkcount = 0;
1442 info->ri_chkcount = 0;
1443 info->dsr_chkcount = 0;
1444
1445 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1446 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1447 get_signals(info);
d12341f9 1448
1da177e4
LT		 1449 if (info->netcount || info->tty->termios->c_cflag & CREAD)
1450 rx_start(info);
d12341f9 1451
1da177e4
LT		 1452 spin_unlock_irqrestore(&info->lock,flags);
1453}
1454
1455/* Reconfigure adapter based on new parameters
1456 */
1457static void mgslpc_change_params(MGSLPC_INFO *info)
1458{
1459 unsigned cflag;
1460 int bits_per_char;
1461
1462 if (!info->tty || !info->tty->termios)
1463 return;
d12341f9 1464
1da177e4
LT		 1465 if (debug_level >= DEBUG_LEVEL_INFO)
1466 printk("%s(%d):mgslpc_change_params(%s)\n",
1467 __FILE__,__LINE__, info->device_name );
d12341f9 1468
1da177e4
LT		 1469 cflag = info->tty->termios->c_cflag;
1470
1471 /* if B0 rate (hangup) specified then negate DTR and RTS */
1472 /* otherwise assert DTR and RTS */
1473 if (cflag & CBAUD)
1474 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1475 else
1476 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
d12341f9 1477
1da177e4 1478 /* byte size and parity */
d12341f9 1479
1da177e4
LT		 1480 switch (cflag & CSIZE) {
1481 case CS5: info->params.data_bits = 5; break;
1482 case CS6: info->params.data_bits = 6; break;
1483 case CS7: info->params.data_bits = 7; break;
1484 case CS8: info->params.data_bits = 8; break;
1485 default: info->params.data_bits = 7; break;
1486 }
d12341f9 1487
1da177e4
LT		 1488 if (cflag & CSTOPB)
1489 info->params.stop_bits = 2;
1490 else
1491 info->params.stop_bits = 1;
1492
1493 info->params.parity = ASYNC_PARITY_NONE;
1494 if (cflag & PARENB) {
1495 if (cflag & PARODD)
1496 info->params.parity = ASYNC_PARITY_ODD;
1497 else
1498 info->params.parity = ASYNC_PARITY_EVEN;
1499#ifdef CMSPAR
1500 if (cflag & CMSPAR)
1501 info->params.parity = ASYNC_PARITY_SPACE;
1502#endif
1503 }
1504
1505 /* calculate number of jiffies to transmit a full
1506 * FIFO (32 bytes) at specified data rate
1507 */
d12341f9 1508 bits_per_char = info->params.data_bits +
1da177e4
LT		 1509 info->params.stop_bits + 1;
1510
1511 /* if port data rate is set to 460800 or less then
1512 * allow tty settings to override, otherwise keep the
1513 * current data rate.
1514 */
1515 if (info->params.data_rate <= 460800) {
1516 info->params.data_rate = tty_get_baud_rate(info->tty);
1517 }
d12341f9 1518
1da177e4 1519 if ( info->params.data_rate ) {
d12341f9 1520 info->timeout = (32*HZ*bits_per_char) /
1da177e4
LT		 1521 info->params.data_rate;
1522 }
1523 info->timeout += HZ/50; /* Add .02 seconds of slop */
1524
1525 if (cflag & CRTSCTS)
1526 info->flags |= ASYNC_CTS_FLOW;
1527 else
1528 info->flags &= ~ASYNC_CTS_FLOW;
d12341f9 1529
1da177e4
LT		 1530 if (cflag & CLOCAL)
1531 info->flags &= ~ASYNC_CHECK_CD;
1532 else
1533 info->flags |= ASYNC_CHECK_CD;
1534
1535 /* process tty input control flags */
d12341f9 1536
1da177e4
LT		 1537 info->read_status_mask = 0;
1538 if (I_INPCK(info->tty))
1539 info->read_status_mask |= BIT7 | BIT6;
1540 if (I_IGNPAR(info->tty))
1541 info->ignore_status_mask |= BIT7 | BIT6;
1542
1543 mgslpc_program_hw(info);
1544}
1545
1546/* Add a character to the transmit buffer
1547 */
d7e752e2 1548static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1da177e4
LT		 1549{
1550 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1551 unsigned long flags;
1552
1553 if (debug_level >= DEBUG_LEVEL_INFO) {
1554 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1555 __FILE__,__LINE__,ch,info->device_name);
1556 }
1557
1558 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
d7e752e2 1559 return 0;
1da177e4 1560
326f28e9 1561 if (!info->tx_buf)
d7e752e2 1562 return 0;
1da177e4
LT		 1563
1564 spin_lock_irqsave(&info->lock,flags);
d12341f9 1565
1da177e4
LT		 1566 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1567 if (info->tx_count < TXBUFSIZE - 1) {
1568 info->tx_buf[info->tx_put++] = ch;
1569 info->tx_put &= TXBUFSIZE-1;
1570 info->tx_count++;
1571 }
1572 }
d12341f9 1573
1da177e4 1574 spin_unlock_irqrestore(&info->lock,flags);
d7e752e2 1575 return 1;
1da177e4
LT		 1576}
1577
1578/* Enable transmitter so remaining characters in the
1579 * transmit buffer are sent.
1580 */
1581static void mgslpc_flush_chars(struct tty_struct *tty)
1582{
1583 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1584 unsigned long flags;
d12341f9 1585
1da177e4
LT		 1586 if (debug_level >= DEBUG_LEVEL_INFO)
1587 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1588 __FILE__,__LINE__,info->device_name,info->tx_count);
d12341f9 1589
1da177e4
LT		 1590 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1591 return;
1592
1593 if (info->tx_count <= 0 || tty->stopped ||
1594 tty->hw_stopped || !info->tx_buf)
1595 return;
1596
1597 if (debug_level >= DEBUG_LEVEL_INFO)
1598 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1599 __FILE__,__LINE__,info->device_name);
1600
1601 spin_lock_irqsave(&info->lock,flags);
1602 if (!info->tx_active)
1603 tx_start(info);
1604 spin_unlock_irqrestore(&info->lock,flags);
1605}
1606
1607/* Send a block of data
d12341f9 1608 *
1da177e4 1609 * Arguments:
d12341f9 1610 *
1da177e4
LT		 1611 * tty pointer to tty information structure
1612 * buf pointer to buffer containing send data
1613 * count size of send data in bytes
d12341f9 1614 *
1da177e4
LT		 1615 * Returns: number of characters written
1616 */
1617static int mgslpc_write(struct tty_struct * tty,
1618 const unsigned char *buf, int count)
1619{
1620 int c, ret = 0;
1621 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1622 unsigned long flags;
d12341f9 1623
1da177e4
LT		 1624 if (debug_level >= DEBUG_LEVEL_INFO)
1625 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1626 __FILE__,__LINE__,info->device_name,count);
d12341f9 1627
1da177e4 1628 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
326f28e9 1629 !info->tx_buf)
1da177e4
LT		 1630 goto cleanup;
1631
1632 if (info->params.mode == MGSL_MODE_HDLC) {
1633 if (count > TXBUFSIZE) {
1634 ret = -EIO;
1635 goto cleanup;
1636 }
1637 if (info->tx_active)
1638 goto cleanup;
1639 else if (info->tx_count)
1640 goto start;
1641 }
1642
1643 for (;;) {
1644 c = min(count,
1645 min(TXBUFSIZE - info->tx_count - 1,
1646 TXBUFSIZE - info->tx_put));
1647 if (c <= 0)
1648 break;
d12341f9 1649
1da177e4
LT		 1650 memcpy(info->tx_buf + info->tx_put, buf, c);
1651
1652 spin_lock_irqsave(&info->lock,flags);
1653 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1654 info->tx_count += c;
1655 spin_unlock_irqrestore(&info->lock,flags);
1656
1657 buf += c;
1658 count -= c;
1659 ret += c;
1660 }
1661start:
1662 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1663 spin_lock_irqsave(&info->lock,flags);
1664 if (!info->tx_active)
1665 tx_start(info);
1666 spin_unlock_irqrestore(&info->lock,flags);
1667 }
d12341f9 1668cleanup:
1da177e4
LT		 1669 if (debug_level >= DEBUG_LEVEL_INFO)
1670 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1671 __FILE__,__LINE__,info->device_name,ret);
1672 return ret;
1673}
1674
1675/* Return the count of free bytes in transmit buffer
1676 */
1677static int mgslpc_write_room(struct tty_struct *tty)
1678{
1679 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1680 int ret;
d12341f9 1681
1da177e4
LT		 1682 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1683 return 0;
1684
1685 if (info->params.mode == MGSL_MODE_HDLC) {
1686 /* HDLC (frame oriented) mode */
1687 if (info->tx_active)
1688 return 0;
1689 else
1690 return HDLC_MAX_FRAME_SIZE;
1691 } else {
1692 ret = TXBUFSIZE - info->tx_count - 1;
1693 if (ret < 0)
1694 ret = 0;
1695 }
d12341f9 1696
1da177e4
LT		 1697 if (debug_level >= DEBUG_LEVEL_INFO)
1698 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1699 __FILE__,__LINE__, info->device_name, ret);
1700 return ret;
1701}
1702
1703/* Return the count of bytes in transmit buffer
1704 */
1705static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1706{
1707 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1708 int rc;
d12341f9 1709
1da177e4
LT		 1710 if (debug_level >= DEBUG_LEVEL_INFO)
1711 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1712 __FILE__,__LINE__, info->device_name );
d12341f9 1713
1da177e4
LT		 1714 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1715 return 0;
d12341f9 1716
1da177e4
LT		 1717 if (info->params.mode == MGSL_MODE_HDLC)
1718 rc = info->tx_active ? info->max_frame_size : 0;
1719 else
1720 rc = info->tx_count;
1721
1722 if (debug_level >= DEBUG_LEVEL_INFO)
1723 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1724 __FILE__,__LINE__, info->device_name, rc);
d12341f9 1725
1da177e4
LT		 1726 return rc;
1727}
1728
1729/* Discard all data in the send buffer
1730 */
1731static void mgslpc_flush_buffer(struct tty_struct *tty)
1732{
1733 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1734 unsigned long flags;
d12341f9 1735
1da177e4
LT		 1736 if (debug_level >= DEBUG_LEVEL_INFO)
1737 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1738 __FILE__,__LINE__, info->device_name );
d12341f9 1739
1da177e4
LT		 1740 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1741 return;
d12341f9
JG		 1742
1743 spin_lock_irqsave(&info->lock,flags);
1da177e4 1744 info->tx_count = info->tx_put = info->tx_get = 0;
d12341f9 1745 del_timer(&info->tx_timer);
1da177e4
LT		 1746 spin_unlock_irqrestore(&info->lock,flags);
1747
1748 wake_up_interruptible(&tty->write_wait);
1749 tty_wakeup(tty);
1750}
1751
1752/* Send a high-priority XON/XOFF character
1753 */
1754static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1755{
1756 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1757 unsigned long flags;
1758
1759 if (debug_level >= DEBUG_LEVEL_INFO)
1760 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1761 __FILE__,__LINE__, info->device_name, ch );
d12341f9 1762
1da177e4
LT		 1763 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1764 return;
1765
1766 info->x_char = ch;
1767 if (ch) {
1768 spin_lock_irqsave(&info->lock,flags);
1769 if (!info->tx_enabled)
1770 tx_start(info);
1771 spin_unlock_irqrestore(&info->lock,flags);
1772 }
1773}
1774
1775/* Signal remote device to throttle send data (our receive data)
1776 */
1777static void mgslpc_throttle(struct tty_struct * tty)
1778{
1779 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1780 unsigned long flags;
d12341f9 1781
1da177e4
LT		 1782 if (debug_level >= DEBUG_LEVEL_INFO)
1783 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1784 __FILE__,__LINE__, info->device_name );
1785
1786 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1787 return;
d12341f9 1788
1da177e4
LT		 1789 if (I_IXOFF(tty))
1790 mgslpc_send_xchar(tty, STOP_CHAR(tty));
d12341f9 1791
1da177e4
LT		 1792 if (tty->termios->c_cflag & CRTSCTS) {
1793 spin_lock_irqsave(&info->lock,flags);
1794 info->serial_signals &= ~SerialSignal_RTS;
1795 set_signals(info);
1796 spin_unlock_irqrestore(&info->lock,flags);
1797 }
1798}
1799
1800/* Signal remote device to stop throttling send data (our receive data)
1801 */
1802static void mgslpc_unthrottle(struct tty_struct * tty)
1803{
1804 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1805 unsigned long flags;
d12341f9 1806
1da177e4
LT		 1807 if (debug_level >= DEBUG_LEVEL_INFO)
1808 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1809 __FILE__,__LINE__, info->device_name );
1810
1811 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1812 return;
d12341f9 1813
1da177e4
LT		 1814 if (I_IXOFF(tty)) {
1815 if (info->x_char)
1816 info->x_char = 0;
1817 else
1818 mgslpc_send_xchar(tty, START_CHAR(tty));
1819 }
d12341f9 1820
1da177e4
LT		 1821 if (tty->termios->c_cflag & CRTSCTS) {
1822 spin_lock_irqsave(&info->lock,flags);
1823 info->serial_signals |= SerialSignal_RTS;
1824 set_signals(info);
1825 spin_unlock_irqrestore(&info->lock,flags);
1826 }
1827}
1828
1829/* get the current serial statistics
1830 */
1831static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1832{
1833 int err;
1834 if (debug_level >= DEBUG_LEVEL_INFO)
1835 printk("get_params(%s)\n", info->device_name);
a7482a2e
PF		 1836 if (!user_icount) {
1837 memset(&info->icount, 0, sizeof(info->icount));
1838 } else {
1839 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1840 if (err)
1841 return -EFAULT;
1842 }
1da177e4
LT		 1843 return 0;
1844}
1845
1846/* get the current serial parameters
1847 */
1848static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1849{
1850 int err;
1851 if (debug_level >= DEBUG_LEVEL_INFO)
1852 printk("get_params(%s)\n", info->device_name);
1853 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1854 if (err)
1855 return -EFAULT;
1856 return 0;
1857}
1858
1859/* set the serial parameters
d12341f9 1860 *
1da177e4 1861 * Arguments:
d12341f9 1862 *
1da177e4
LT		 1863 * info pointer to device instance data
1864 * new_params user buffer containing new serial params
1865 *
1866 * Returns: 0 if success, otherwise error code
1867 */
1868static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1869{
1870 unsigned long flags;
1871 MGSL_PARAMS tmp_params;
1872 int err;
d12341f9 1873
1da177e4
LT		 1874 if (debug_level >= DEBUG_LEVEL_INFO)
1875 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1876 info->device_name );
1877 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1878 if (err) {
1879 if ( debug_level >= DEBUG_LEVEL_INFO )
1880 printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1881 __FILE__,__LINE__,info->device_name);
1882 return -EFAULT;
1883 }
d12341f9 1884
1da177e4
LT		 1885 spin_lock_irqsave(&info->lock,flags);
1886 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1887 spin_unlock_irqrestore(&info->lock,flags);
d12341f9 1888
1da177e4 1889 mgslpc_change_params(info);
d12341f9 1890
1da177e4
LT		 1891 return 0;
1892}
1893
1894static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1895{
1896 int err;
1897 if (debug_level >= DEBUG_LEVEL_INFO)
1898 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1899 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1900 if (err)
1901 return -EFAULT;
1902 return 0;
1903}
1904
1905static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1906{
1907 unsigned long flags;
1908 if (debug_level >= DEBUG_LEVEL_INFO)
1909 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1910 spin_lock_irqsave(&info->lock,flags);
1911 info->idle_mode = idle_mode;
1912 tx_set_idle(info);
1913 spin_unlock_irqrestore(&info->lock,flags);
1914 return 0;
1915}
1916
1917static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1918{
1919 int err;
1920 if (debug_level >= DEBUG_LEVEL_INFO)
1921 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1922 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1923 if (err)
1924 return -EFAULT;
1925 return 0;
1926}
1927
1928static int set_interface(MGSLPC_INFO * info, int if_mode)
1929{
1930 unsigned long flags;
1931 unsigned char val;
1932 if (debug_level >= DEBUG_LEVEL_INFO)
1933 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1934 spin_lock_irqsave(&info->lock,flags);
1935 info->if_mode = if_mode;
1936
1937 val = read_reg(info, PVR) & 0x0f;
1938 switch (info->if_mode)
1939 {
1940 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1941 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1942 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1943 }
1944 write_reg(info, PVR, val);
1945
1946 spin_unlock_irqrestore(&info->lock,flags);
1947 return 0;
1948}
1949
1950static int set_txenable(MGSLPC_INFO * info, int enable)
1951{
1952 unsigned long flags;
d12341f9 1953
1da177e4
LT		 1954 if (debug_level >= DEBUG_LEVEL_INFO)
1955 printk("set_txenable(%s,%d)\n", info->device_name, enable);
d12341f9 1956
1da177e4
LT		 1957 spin_lock_irqsave(&info->lock,flags);
1958 if (enable) {
1959 if (!info->tx_enabled)
1960 tx_start(info);
1961 } else {
1962 if (info->tx_enabled)
1963 tx_stop(info);
1964 }
1965 spin_unlock_irqrestore(&info->lock,flags);
1966 return 0;
1967}
1968
1969static int tx_abort(MGSLPC_INFO * info)
1970{
1971 unsigned long flags;
d12341f9 1972
1da177e4
LT		 1973 if (debug_level >= DEBUG_LEVEL_INFO)
1974 printk("tx_abort(%s)\n", info->device_name);
d12341f9 1975
1da177e4
LT		 1976 spin_lock_irqsave(&info->lock,flags);
1977 if (info->tx_active && info->tx_count &&
1978 info->params.mode == MGSL_MODE_HDLC) {
1979 /* clear data count so FIFO is not filled on next IRQ.
1980 * This results in underrun and abort transmission.
1981 */
1982 info->tx_count = info->tx_put = info->tx_get = 0;
0fab6de0 1983 info->tx_aborting = true;
1da177e4
LT		 1984 }
1985 spin_unlock_irqrestore(&info->lock,flags);
1986 return 0;
1987}
1988
1989static int set_rxenable(MGSLPC_INFO * info, int enable)
1990{
1991 unsigned long flags;
d12341f9 1992
1da177e4
LT		 1993 if (debug_level >= DEBUG_LEVEL_INFO)
1994 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
d12341f9 1995
1da177e4
LT		 1996 spin_lock_irqsave(&info->lock,flags);
1997 if (enable) {
1998 if (!info->rx_enabled)
1999 rx_start(info);
2000 } else {
2001 if (info->rx_enabled)
2002 rx_stop(info);
2003 }
2004 spin_unlock_irqrestore(&info->lock,flags);
2005 return 0;
2006}
2007
2008/* wait for specified event to occur
d12341f9 2009 *
1da177e4
LT		 2010 * Arguments: info pointer to device instance data
2011 * mask pointer to bitmask of events to wait for
2012 * Return Value: 0 if successful and bit mask updated with
2013 * of events triggerred,
2014 * otherwise error code
2015 */
2016static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2017{
2018 unsigned long flags;
2019 int s;
2020 int rc=0;
2021 struct mgsl_icount cprev, cnow;
2022 int events;
2023 int mask;
2024 struct _input_signal_events oldsigs, newsigs;
2025 DECLARE_WAITQUEUE(wait, current);
2026
2027 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2028 if (rc)
2029 return -EFAULT;
d12341f9 2030
1da177e4
LT		 2031 if (debug_level >= DEBUG_LEVEL_INFO)
2032 printk("wait_events(%s,%d)\n", info->device_name, mask);
2033
2034 spin_lock_irqsave(&info->lock,flags);
2035
2036 /* return immediately if state matches requested events */
2037 get_signals(info);
2038 s = info->serial_signals;
2039 events = mask &
2040 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2041 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2042 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2043 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2044 if (events) {
2045 spin_unlock_irqrestore(&info->lock,flags);
2046 goto exit;
2047 }
2048
2049 /* save current irq counts */
2050 cprev = info->icount;
2051 oldsigs = info->input_signal_events;
d12341f9 2052
1da177e4
LT		 2053 if ((info->params.mode == MGSL_MODE_HDLC) &&
2054 (mask & MgslEvent_ExitHuntMode))
2055 irq_enable(info, CHA, IRQ_EXITHUNT);
d12341f9 2056
1da177e4
LT		 2057 set_current_state(TASK_INTERRUPTIBLE);
2058 add_wait_queue(&info->event_wait_q, &wait);
d12341f9 2059
1da177e4 2060 spin_unlock_irqrestore(&info->lock,flags);
d12341f9
JG		 2061
2062
1da177e4
LT		 2063 for(;;) {
2064 schedule();
2065 if (signal_pending(current)) {
2066 rc = -ERESTARTSYS;
2067 break;
2068 }
d12341f9 2069
1da177e4
LT		 2070 /* get current irq counts */
2071 spin_lock_irqsave(&info->lock,flags);
2072 cnow = info->icount;
2073 newsigs = info->input_signal_events;
2074 set_current_state(TASK_INTERRUPTIBLE);
2075 spin_unlock_irqrestore(&info->lock,flags);
2076
2077 /* if no change, wait aborted for some reason */
2078 if (newsigs.dsr_up == oldsigs.dsr_up &&
2079 newsigs.dsr_down == oldsigs.dsr_down &&
2080 newsigs.dcd_up == oldsigs.dcd_up &&
2081 newsigs.dcd_down == oldsigs.dcd_down &&
2082 newsigs.cts_up == oldsigs.cts_up &&
2083 newsigs.cts_down == oldsigs.cts_down &&
2084 newsigs.ri_up == oldsigs.ri_up &&
2085 newsigs.ri_down == oldsigs.ri_down &&
2086 cnow.exithunt == cprev.exithunt &&
2087 cnow.rxidle == cprev.rxidle) {
2088 rc = -EIO;
2089 break;
2090 }
2091
2092 events = mask &
2093 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2094 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2095 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2096 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2097 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2098 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2099 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2100 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2101 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2102 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2103 if (events)
2104 break;
d12341f9 2105
1da177e4
LT		 2106 cprev = cnow;
2107 oldsigs = newsigs;
2108 }
d12341f9 2109
1da177e4
LT		 2110 remove_wait_queue(&info->event_wait_q, &wait);
2111 set_current_state(TASK_RUNNING);
2112
2113 if (mask & MgslEvent_ExitHuntMode) {
2114 spin_lock_irqsave(&info->lock,flags);
2115 if (!waitqueue_active(&info->event_wait_q))
2116 irq_disable(info, CHA, IRQ_EXITHUNT);
2117 spin_unlock_irqrestore(&info->lock,flags);
2118 }
2119exit:
2120 if (rc == 0)
2121 PUT_USER(rc, events, mask_ptr);
2122 return rc;
2123}
2124
2125static int modem_input_wait(MGSLPC_INFO *info,int arg)
2126{
2127 unsigned long flags;
2128 int rc;
2129 struct mgsl_icount cprev, cnow;
2130 DECLARE_WAITQUEUE(wait, current);
2131
2132 /* save current irq counts */
2133 spin_lock_irqsave(&info->lock,flags);
2134 cprev = info->icount;
2135 add_wait_queue(&info->status_event_wait_q, &wait);
2136 set_current_state(TASK_INTERRUPTIBLE);
2137 spin_unlock_irqrestore(&info->lock,flags);
2138
2139 for(;;) {
2140 schedule();
2141 if (signal_pending(current)) {
2142 rc = -ERESTARTSYS;
2143 break;
2144 }
2145
2146 /* get new irq counts */
2147 spin_lock_irqsave(&info->lock,flags);
2148 cnow = info->icount;
2149 set_current_state(TASK_INTERRUPTIBLE);
2150 spin_unlock_irqrestore(&info->lock,flags);
2151
2152 /* if no change, wait aborted for some reason */
2153 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2154 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2155 rc = -EIO;
2156 break;
2157 }
2158
2159 /* check for change in caller specified modem input */
2160 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2161 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2162 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2163 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2164 rc = 0;
2165 break;
2166 }
2167
2168 cprev = cnow;
2169 }
2170 remove_wait_queue(&info->status_event_wait_q, &wait);
2171 set_current_state(TASK_RUNNING);
2172 return rc;
2173}
2174
2175/* return the state of the serial control and status signals
2176 */
2177static int tiocmget(struct tty_struct *tty, struct file *file)
2178{
2179 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2180 unsigned int result;
2181 unsigned long flags;
2182
2183 spin_lock_irqsave(&info->lock,flags);
2184 get_signals(info);
2185 spin_unlock_irqrestore(&info->lock,flags);
2186
2187 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2188 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2189 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2190 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2191 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2192 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2193
2194 if (debug_level >= DEBUG_LEVEL_INFO)
2195 printk("%s(%d):%s tiocmget() value=%08X\n",
2196 __FILE__,__LINE__, info->device_name, result );
2197 return result;
2198}
2199
2200/* set modem control signals (DTR/RTS)
2201 */
2202static int tiocmset(struct tty_struct *tty, struct file *file,
2203 unsigned int set, unsigned int clear)
2204{
2205 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2206 unsigned long flags;
2207
2208 if (debug_level >= DEBUG_LEVEL_INFO)
2209 printk("%s(%d):%s tiocmset(%x,%x)\n",
2210 __FILE__,__LINE__,info->device_name, set, clear);
2211
2212 if (set & TIOCM_RTS)
2213 info->serial_signals |= SerialSignal_RTS;
2214 if (set & TIOCM_DTR)
2215 info->serial_signals |= SerialSignal_DTR;
2216 if (clear & TIOCM_RTS)
2217 info->serial_signals &= ~SerialSignal_RTS;
2218 if (clear & TIOCM_DTR)
2219 info->serial_signals &= ~SerialSignal_DTR;
2220
2221 spin_lock_irqsave(&info->lock,flags);
2222 set_signals(info);
2223 spin_unlock_irqrestore(&info->lock,flags);
2224
2225 return 0;
2226}
2227
2228/* Set or clear transmit break condition
2229 *
2230 * Arguments: tty pointer to tty instance data
2231 * break_state -1=set break condition, 0=clear
2232 */
2233static void mgslpc_break(struct tty_struct *tty, int break_state)
2234{
2235 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2236 unsigned long flags;
d12341f9 2237
1da177e4
LT		 2238 if (debug_level >= DEBUG_LEVEL_INFO)
2239 printk("%s(%d):mgslpc_break(%s,%d)\n",
2240 __FILE__,__LINE__, info->device_name, break_state);
d12341f9 2241
1da177e4
LT		 2242 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2243 return;
2244
2245 spin_lock_irqsave(&info->lock,flags);
2246 if (break_state == -1)
2247 set_reg_bits(info, CHA+DAFO, BIT6);
d12341f9 2248 else
1da177e4
LT		 2249 clear_reg_bits(info, CHA+DAFO, BIT6);
2250 spin_unlock_irqrestore(&info->lock,flags);
2251}
2252
2253/* Service an IOCTL request
d12341f9 2254 *
1da177e4 2255 * Arguments:
d12341f9 2256 *
1da177e4
LT		 2257 * tty pointer to tty instance data
2258 * file pointer to associated file object for device
2259 * cmd IOCTL command code
2260 * arg command argument/context
d12341f9 2261 *
1da177e4
LT		 2262 * Return Value: 0 if success, otherwise error code
2263 */
2264static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2265 unsigned int cmd, unsigned long arg)
2266{
2267 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
d12341f9 2268
1da177e4
LT		 2269 if (debug_level >= DEBUG_LEVEL_INFO)
2270 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2271 info->device_name, cmd );
d12341f9 2272
1da177e4
LT		 2273 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2274 return -ENODEV;
2275
2276 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2277 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2278 if (tty->flags & (1 << TTY_IO_ERROR))
2279 return -EIO;
2280 }
2281
2282 return ioctl_common(info, cmd, arg);
2283}
2284
cdaad343 2285static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
1da177e4
LT		 2286{
2287 int error;
2288 struct mgsl_icount cnow; /* kernel counter temps */
2289 struct serial_icounter_struct __user *p_cuser; /* user space */
2290 void __user *argp = (void __user *)arg;
2291 unsigned long flags;
d12341f9 2292
1da177e4
LT		 2293 switch (cmd) {
2294 case MGSL_IOCGPARAMS:
2295 return get_params(info, argp);
2296 case MGSL_IOCSPARAMS:
2297 return set_params(info, argp);
2298 case MGSL_IOCGTXIDLE:
2299 return get_txidle(info, argp);
2300 case MGSL_IOCSTXIDLE:
2301 return set_txidle(info, (int)arg);
2302 case MGSL_IOCGIF:
2303 return get_interface(info, argp);
2304 case MGSL_IOCSIF:
2305 return set_interface(info,(int)arg);
2306 case MGSL_IOCTXENABLE:
2307 return set_txenable(info,(int)arg);
2308 case MGSL_IOCRXENABLE:
2309 return set_rxenable(info,(int)arg);
2310 case MGSL_IOCTXABORT:
2311 return tx_abort(info);
2312 case MGSL_IOCGSTATS:
2313 return get_stats(info, argp);
2314 case MGSL_IOCWAITEVENT:
2315 return wait_events(info, argp);
2316 case TIOCMIWAIT:
2317 return modem_input_wait(info,(int)arg);
2318 case TIOCGICOUNT:
2319 spin_lock_irqsave(&info->lock,flags);
2320 cnow = info->icount;
2321 spin_unlock_irqrestore(&info->lock,flags);
2322 p_cuser = argp;
2323 PUT_USER(error,cnow.cts, &p_cuser->cts);
2324 if (error) return error;
2325 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2326 if (error) return error;
2327 PUT_USER(error,cnow.rng, &p_cuser->rng);
2328 if (error) return error;
2329 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2330 if (error) return error;
2331 PUT_USER(error,cnow.rx, &p_cuser->rx);
2332 if (error) return error;
2333 PUT_USER(error,cnow.tx, &p_cuser->tx);
2334 if (error) return error;
2335 PUT_USER(error,cnow.frame, &p_cuser->frame);
2336 if (error) return error;
2337 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2338 if (error) return error;
2339 PUT_USER(error,cnow.parity, &p_cuser->parity);
2340 if (error) return error;
2341 PUT_USER(error,cnow.brk, &p_cuser->brk);
2342 if (error) return error;
2343 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2344 if (error) return error;
2345 return 0;
2346 default:
2347 return -ENOIOCTLCMD;
2348 }
2349 return 0;
2350}
2351
2352/* Set new termios settings
d12341f9 2353 *
1da177e4 2354 * Arguments:
d12341f9 2355 *
1da177e4
LT		 2356 * tty pointer to tty structure
2357 * termios pointer to buffer to hold returned old termios
2358 */
606d099c 2359static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4
LT		 2360{
2361 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2362 unsigned long flags;
d12341f9 2363
1da177e4
LT		 2364 if (debug_level >= DEBUG_LEVEL_INFO)
2365 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2366 tty->driver->name );
d12341f9 2367
1da177e4
LT		 2368 /* just return if nothing has changed */
2369 if ((tty->termios->c_cflag == old_termios->c_cflag)
d12341f9 2370 && (RELEVANT_IFLAG(tty->termios->c_iflag)
1da177e4
LT		 2371 == RELEVANT_IFLAG(old_termios->c_iflag)))
2372 return;
2373
2374 mgslpc_change_params(info);
2375
2376 /* Handle transition to B0 status */
2377 if (old_termios->c_cflag & CBAUD &&
2378 !(tty->termios->c_cflag & CBAUD)) {
2379 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2380 spin_lock_irqsave(&info->lock,flags);
2381 set_signals(info);
2382 spin_unlock_irqrestore(&info->lock,flags);
2383 }
d12341f9 2384
1da177e4
LT		 2385 /* Handle transition away from B0 status */
2386 if (!(old_termios->c_cflag & CBAUD) &&
2387 tty->termios->c_cflag & CBAUD) {
2388 info->serial_signals |= SerialSignal_DTR;
d12341f9 2389 if (!(tty->termios->c_cflag & CRTSCTS) ||
1da177e4
LT		 2390 !test_bit(TTY_THROTTLED, &tty->flags)) {
2391 info->serial_signals |= SerialSignal_RTS;
2392 }
2393 spin_lock_irqsave(&info->lock,flags);
2394 set_signals(info);
2395 spin_unlock_irqrestore(&info->lock,flags);
2396 }
d12341f9 2397
1da177e4
LT		 2398 /* Handle turning off CRTSCTS */
2399 if (old_termios->c_cflag & CRTSCTS &&
2400 !(tty->termios->c_cflag & CRTSCTS)) {
2401 tty->hw_stopped = 0;
2402 tx_release(tty);
2403 }
2404}
2405
2406static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2407{
2408 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2409
2410 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2411 return;
d12341f9 2412
1da177e4
LT		 2413 if (debug_level >= DEBUG_LEVEL_INFO)
2414 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2415 __FILE__,__LINE__, info->device_name, info->count);
d12341f9 2416
1da177e4
LT		 2417 if (!info->count)
2418 return;
2419
2420 if (tty_hung_up_p(filp))
2421 goto cleanup;
d12341f9 2422
1da177e4
LT		 2423 if ((tty->count == 1) && (info->count != 1)) {
2424 /*
2425 * tty->count is 1 and the tty structure will be freed.
2426 * info->count should be one in this case.
2427 * if it's not, correct it so that the port is shutdown.
2428 */
2429 printk("mgslpc_close: bad refcount; tty->count is 1, "
2430 "info->count is %d\n", info->count);
2431 info->count = 1;
2432 }
d12341f9 2433
1da177e4 2434 info->count--;
d12341f9 2435
1da177e4
LT		 2436 /* if at least one open remaining, leave hardware active */
2437 if (info->count)
2438 goto cleanup;
d12341f9 2439
1da177e4 2440 info->flags |= ASYNC_CLOSING;
d12341f9
JG		 2441
2442 /* set tty->closing to notify line discipline to
1da177e4
LT		 2443 * only process XON/XOFF characters. Only the N_TTY
2444 * discipline appears to use this (ppp does not).
2445 */
2446 tty->closing = 1;
d12341f9 2447
1da177e4 2448 /* wait for transmit data to clear all layers */
d12341f9 2449
1da177e4
LT		 2450 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2451 if (debug_level >= DEBUG_LEVEL_INFO)
2452 printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2453 __FILE__,__LINE__, info->device_name );
2454 tty_wait_until_sent(tty, info->closing_wait);
2455 }
d12341f9 2456
1da177e4
LT		 2457 if (info->flags & ASYNC_INITIALIZED)
2458 mgslpc_wait_until_sent(tty, info->timeout);
2459
978e595f 2460 mgslpc_flush_buffer(tty);
1da177e4 2461
978e595f 2462 tty_ldisc_flush(tty);
d12341f9 2463
1da177e4 2464 shutdown(info);
d12341f9 2465
1da177e4
LT		 2466 tty->closing = 0;
2467 info->tty = NULL;
d12341f9 2468
1da177e4
LT		 2469 if (info->blocked_open) {
2470 if (info->close_delay) {
2471 msleep_interruptible(jiffies_to_msecs(info->close_delay));
2472 }
2473 wake_up_interruptible(&info->open_wait);
2474 }
d12341f9 2475
1da177e4 2476 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
d12341f9 2477
1da177e4 2478 wake_up_interruptible(&info->close_wait);
d12341f9
JG		 2479
2480cleanup:
1da177e4
LT		 2481 if (debug_level >= DEBUG_LEVEL_INFO)
2482 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2483 tty->driver->name, info->count);
2484}
2485
2486/* Wait until the transmitter is empty.
2487 */
2488static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2489{
2490 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2491 unsigned long orig_jiffies, char_time;
2492
2493 if (!info )
2494 return;
2495
2496 if (debug_level >= DEBUG_LEVEL_INFO)
2497 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2498 __FILE__,__LINE__, info->device_name );
d12341f9 2499
1da177e4
LT		 2500 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2501 return;
2502
2503 if (!(info->flags & ASYNC_INITIALIZED))
2504 goto exit;
d12341f9 2505
1da177e4 2506 orig_jiffies = jiffies;
d12341f9 2507
1da177e4
LT		 2508 /* Set check interval to 1/5 of estimated time to
2509 * send a character, and make it at least 1. The check
2510 * interval should also be less than the timeout.
2511 * Note: use tight timings here to satisfy the NIST-PCTS.
d12341f9
JG		 2512 */
2513
1da177e4
LT		 2514 if ( info->params.data_rate ) {
2515 char_time = info->timeout/(32 * 5);
2516 if (!char_time)
2517 char_time++;
2518 } else
2519 char_time = 1;
d12341f9 2520
1da177e4
LT		 2521 if (timeout)
2522 char_time = min_t(unsigned long, char_time, timeout);
d12341f9 2523
1da177e4
LT		 2524 if (info->params.mode == MGSL_MODE_HDLC) {
2525 while (info->tx_active) {
2526 msleep_interruptible(jiffies_to_msecs(char_time));
2527 if (signal_pending(current))
2528 break;
2529 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2530 break;
2531 }
2532 } else {
2533 while ((info->tx_count || info->tx_active) &&
2534 info->tx_enabled) {
2535 msleep_interruptible(jiffies_to_msecs(char_time));
2536 if (signal_pending(current))
2537 break;
2538 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2539 break;
2540 }
2541 }
d12341f9 2542
1da177e4
LT		 2543exit:
2544 if (debug_level >= DEBUG_LEVEL_INFO)
2545 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2546 __FILE__,__LINE__, info->device_name );
2547}
2548
2549/* Called by tty_hangup() when a hangup is signaled.
2550 * This is the same as closing all open files for the port.
2551 */
2552static void mgslpc_hangup(struct tty_struct *tty)
2553{
2554 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
d12341f9 2555
1da177e4
LT		 2556 if (debug_level >= DEBUG_LEVEL_INFO)
2557 printk("%s(%d):mgslpc_hangup(%s)\n",
2558 __FILE__,__LINE__, info->device_name );
d12341f9 2559
1da177e4
LT		 2560 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2561 return;
2562
2563 mgslpc_flush_buffer(tty);
2564 shutdown(info);
d12341f9
JG		 2565
2566 info->count = 0;
1da177e4
LT		 2567 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2568 info->tty = NULL;
2569
2570 wake_up_interruptible(&info->open_wait);
2571}
2572
2573/* Block the current process until the specified port
2574 * is ready to be opened.
2575 */
2576static int block_til_ready(struct tty_struct *tty, struct file *filp,
2577 MGSLPC_INFO *info)
2578{
2579 DECLARE_WAITQUEUE(wait, current);
2580 int retval;
0fab6de0
JP		 2581 bool do_clocal = false;
2582 bool extra_count = false;
1da177e4 2583 unsigned long flags;
d12341f9 2584
1da177e4
LT		 2585 if (debug_level >= DEBUG_LEVEL_INFO)
2586 printk("%s(%d):block_til_ready on %s\n",
2587 __FILE__,__LINE__, tty->driver->name );
2588
2589 if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2590 /* nonblock mode is set or port is not enabled */
2591 /* just verify that callout device is not active */
2592 info->flags |= ASYNC_NORMAL_ACTIVE;
2593 return 0;
2594 }
2595
2596 if (tty->termios->c_cflag & CLOCAL)
0fab6de0 2597 do_clocal = true;
1da177e4
LT		 2598
2599 /* Wait for carrier detect and the line to become
2600 * free (i.e., not in use by the callout). While we are in
2601 * this loop, info->count is dropped by one, so that
2602 * mgslpc_close() knows when to free things. We restore it upon
2603 * exit, either normal or abnormal.
2604 */
d12341f9 2605
1da177e4
LT		 2606 retval = 0;
2607 add_wait_queue(&info->open_wait, &wait);
d12341f9 2608
1da177e4
LT		 2609 if (debug_level >= DEBUG_LEVEL_INFO)
2610 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2611 __FILE__,__LINE__, tty->driver->name, info->count );
2612
2613 spin_lock_irqsave(&info->lock, flags);
2614 if (!tty_hung_up_p(filp)) {
0fab6de0 2615 extra_count = true;
1da177e4
LT		 2616 info->count--;
2617 }
2618 spin_unlock_irqrestore(&info->lock, flags);
2619 info->blocked_open++;
d12341f9 2620
1da177e4
LT		 2621 while (1) {
2622 if ((tty->termios->c_cflag & CBAUD)) {
2623 spin_lock_irqsave(&info->lock,flags);
2624 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2625 set_signals(info);
2626 spin_unlock_irqrestore(&info->lock,flags);
2627 }
d12341f9 2628
1da177e4 2629 set_current_state(TASK_INTERRUPTIBLE);
d12341f9 2630
1da177e4
LT		 2631 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2632 retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2633 -EAGAIN : -ERESTARTSYS;
2634 break;
2635 }
d12341f9 2636
1da177e4
LT		 2637 spin_lock_irqsave(&info->lock,flags);
2638 get_signals(info);
2639 spin_unlock_irqrestore(&info->lock,flags);
d12341f9 2640
1da177e4
LT		 2641 if (!(info->flags & ASYNC_CLOSING) &&
2642 (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2643 break;
2644 }
d12341f9 2645
1da177e4
LT		 2646 if (signal_pending(current)) {
2647 retval = -ERESTARTSYS;
2648 break;
2649 }
d12341f9 2650
1da177e4
LT		 2651 if (debug_level >= DEBUG_LEVEL_INFO)
2652 printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2653 __FILE__,__LINE__, tty->driver->name, info->count );
d12341f9 2654
1da177e4
LT		 2655 schedule();
2656 }
d12341f9 2657
1da177e4
LT		 2658 set_current_state(TASK_RUNNING);
2659 remove_wait_queue(&info->open_wait, &wait);
d12341f9 2660
1da177e4
LT		 2661 if (extra_count)
2662 info->count++;
2663 info->blocked_open--;
d12341f9 2664
1da177e4
LT		 2665 if (debug_level >= DEBUG_LEVEL_INFO)
2666 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2667 __FILE__,__LINE__, tty->driver->name, info->count );
d12341f9 2668
1da177e4
LT		 2669 if (!retval)
2670 info->flags |= ASYNC_NORMAL_ACTIVE;
d12341f9 2671
1da177e4
LT		 2672 return retval;
2673}
2674
2675static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2676{
2677 MGSLPC_INFO *info;
2678 int retval, line;
2679 unsigned long flags;
2680
d12341f9 2681 /* verify range of specified line number */
1da177e4
LT		 2682 line = tty->index;
2683 if ((line < 0) || (line >= mgslpc_device_count)) {
2684 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2685 __FILE__,__LINE__,line);
2686 return -ENODEV;
2687 }
2688
2689 /* find the info structure for the specified line */
2690 info = mgslpc_device_list;
2691 while(info && info->line != line)
2692 info = info->next_device;
2693 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2694 return -ENODEV;
d12341f9 2695
1da177e4
LT		 2696 tty->driver_data = info;
2697 info->tty = tty;
d12341f9 2698
1da177e4
LT		 2699 if (debug_level >= DEBUG_LEVEL_INFO)
2700 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2701 __FILE__,__LINE__,tty->driver->name, info->count);
2702
2703 /* If port is closing, signal caller to try again */
2704 if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2705 if (info->flags & ASYNC_CLOSING)
2706 interruptible_sleep_on(&info->close_wait);
2707 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2708 -EAGAIN : -ERESTARTSYS);
2709 goto cleanup;
2710 }
d12341f9 2711
1da177e4
LT		 2712 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2713
2714 spin_lock_irqsave(&info->netlock, flags);
2715 if (info->netcount) {
2716 retval = -EBUSY;
2717 spin_unlock_irqrestore(&info->netlock, flags);
2718 goto cleanup;
2719 }
2720 info->count++;
2721 spin_unlock_irqrestore(&info->netlock, flags);
2722
2723 if (info->count == 1) {
2724 /* 1st open on this device, init hardware */
2725 retval = startup(info);
2726 if (retval < 0)
2727 goto cleanup;
2728 }
2729
2730 retval = block_til_ready(tty, filp, info);
2731 if (retval) {
2732 if (debug_level >= DEBUG_LEVEL_INFO)
2733 printk("%s(%d):block_til_ready(%s) returned %d\n",
2734 __FILE__,__LINE__, info->device_name, retval);
2735 goto cleanup;
2736 }
2737
2738 if (debug_level >= DEBUG_LEVEL_INFO)
2739 printk("%s(%d):mgslpc_open(%s) success\n",
2740 __FILE__,__LINE__, info->device_name);
2741 retval = 0;
d12341f9
JG		 2742
2743cleanup:
1da177e4
LT		 2744 if (retval) {
2745 if (tty->count == 1)
2746 info->tty = NULL; /* tty layer will release tty struct */
2747 if(info->count)
2748 info->count--;
2749 }
d12341f9 2750
1da177e4
LT		 2751 return retval;
2752}
2753
2754/*
2755 * /proc fs routines....
2756 */
2757
2758static inline int line_info(char *buf, MGSLPC_INFO *info)
2759{
2760 char stat_buf[30];
2761 int ret;
2762 unsigned long flags;
2763
2764 ret = sprintf(buf, "%s:io:%04X irq:%d",
2765 info->device_name, info->io_base, info->irq_level);
2766
2767 /* output current serial signal states */
2768 spin_lock_irqsave(&info->lock,flags);
2769 get_signals(info);
2770 spin_unlock_irqrestore(&info->lock,flags);
d12341f9 2771
1da177e4
LT		 2772 stat_buf[0] = 0;
2773 stat_buf[1] = 0;
2774 if (info->serial_signals & SerialSignal_RTS)
2775 strcat(stat_buf, "|RTS");
2776 if (info->serial_signals & SerialSignal_CTS)
2777 strcat(stat_buf, "|CTS");
2778 if (info->serial_signals & SerialSignal_DTR)
2779 strcat(stat_buf, "|DTR");
2780 if (info->serial_signals & SerialSignal_DSR)
2781 strcat(stat_buf, "|DSR");
2782 if (info->serial_signals & SerialSignal_DCD)
2783 strcat(stat_buf, "|CD");
2784 if (info->serial_signals & SerialSignal_RI)
2785 strcat(stat_buf, "|RI");
2786
2787 if (info->params.mode == MGSL_MODE_HDLC) {
2788 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2789 info->icount.txok, info->icount.rxok);
2790 if (info->icount.txunder)
2791 ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2792 if (info->icount.txabort)
2793 ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2794 if (info->icount.rxshort)
d12341f9 2795 ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
1da177e4
LT		 2796 if (info->icount.rxlong)
2797 ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2798 if (info->icount.rxover)
2799 ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2800 if (info->icount.rxcrc)
2801 ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2802 } else {
2803 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2804 info->icount.tx, info->icount.rx);
2805 if (info->icount.frame)
2806 ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2807 if (info->icount.parity)
2808 ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2809 if (info->icount.brk)
d12341f9 2810 ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
1da177e4
LT		 2811 if (info->icount.overrun)
2812 ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2813 }
d12341f9 2814
1da177e4
LT		 2815 /* Append serial signal status to end */
2816 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
d12341f9 2817
1da177e4
LT		 2818 ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2819 info->tx_active,info->bh_requested,info->bh_running,
2820 info->pending_bh);
d12341f9 2821
1da177e4
LT		 2822 return ret;
2823}
2824
2825/* Called to print information about devices
2826 */
2827static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2828 int *eof, void *data)
2829{
2830 int len = 0, l;
2831 off_t begin = 0;
2832 MGSLPC_INFO *info;
d12341f9 2833
1da177e4 2834 len += sprintf(page, "synclink driver:%s\n", driver_version);
d12341f9 2835
1da177e4
LT		 2836 info = mgslpc_device_list;
2837 while( info ) {
2838 l = line_info(page + len, info);
2839 len += l;
2840 if (len+begin > off+count)
2841 goto done;
2842 if (len+begin < off) {
2843 begin += len;
2844 len = 0;
2845 }
2846 info = info->next_device;
2847 }
2848
2849 *eof = 1;
2850done:
2851 if (off >= len+begin)
2852 return 0;
2853 *start = page + (off-begin);
2854 return ((count < begin+len-off) ? count : begin+len-off);
2855}
2856
cdaad343 2857static int rx_alloc_buffers(MGSLPC_INFO *info)
1da177e4
LT		 2858{
2859 /* each buffer has header and data */
2860 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2861
2862 /* calculate total allocation size for 8 buffers */
2863 info->rx_buf_total_size = info->rx_buf_size * 8;
2864
2865 /* limit total allocated memory */
2866 if (info->rx_buf_total_size > 0x10000)
2867 info->rx_buf_total_size = 0x10000;
2868
2869 /* calculate number of buffers */
2870 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2871
2872 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2873 if (info->rx_buf == NULL)
2874 return -ENOMEM;
2875
2876 rx_reset_buffers(info);
2877 return 0;
2878}
2879
cdaad343 2880static void rx_free_buffers(MGSLPC_INFO *info)
1da177e4 2881{
735d5661 2882 kfree(info->rx_buf);
1da177e4
LT		 2883 info->rx_buf = NULL;
2884}
2885
cdaad343 2886static int claim_resources(MGSLPC_INFO *info)
1da177e4
LT		 2887{
2888 if (rx_alloc_buffers(info) < 0 ) {
2889 printk( "Cant allocate rx buffer %s\n", info->device_name);
2890 release_resources(info);
2891 return -ENODEV;
d12341f9 2892 }
1da177e4
LT		 2893 return 0;
2894}
2895
cdaad343 2896static void release_resources(MGSLPC_INFO *info)
1da177e4
LT		 2897{
2898 if (debug_level >= DEBUG_LEVEL_INFO)
2899 printk("release_resources(%s)\n", info->device_name);
2900 rx_free_buffers(info);
2901}
2902
2903/* Add the specified device instance data structure to the
2904 * global linked list of devices and increment the device count.
d12341f9 2905 *
1da177e4
LT		 2906 * Arguments: info pointer to device instance data
2907 */
cdaad343 2908static void mgslpc_add_device(MGSLPC_INFO *info)
1da177e4
LT		 2909{
2910 info->next_device = NULL;
2911 info->line = mgslpc_device_count;
2912 sprintf(info->device_name,"ttySLP%d",info->line);
d12341f9 2913
1da177e4
LT		 2914 if (info->line < MAX_DEVICE_COUNT) {
2915 if (maxframe[info->line])
2916 info->max_frame_size = maxframe[info->line];
2917 info->dosyncppp = dosyncppp[info->line];
2918 }
2919
2920 mgslpc_device_count++;
d12341f9 2921
1da177e4
LT		 2922 if (!mgslpc_device_list)
2923 mgslpc_device_list = info;
d12341f9 2924 else {
1da177e4
LT		 2925 MGSLPC_INFO *current_dev = mgslpc_device_list;
2926 while( current_dev->next_device )
2927 current_dev = current_dev->next_device;
2928 current_dev->next_device = info;
2929 }
d12341f9 2930
1da177e4
LT		 2931 if (info->max_frame_size < 4096)
2932 info->max_frame_size = 4096;
2933 else if (info->max_frame_size > 65535)
2934 info->max_frame_size = 65535;
d12341f9 2935
1da177e4
LT		 2936 printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2937 info->device_name, info->io_base, info->irq_level);
2938
af69c7f9 2939#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 2940 hdlcdev_init(info);
2941#endif
2942}
2943
cdaad343 2944static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
1da177e4
LT		 2945{
2946 MGSLPC_INFO *info = mgslpc_device_list;
2947 MGSLPC_INFO *last = NULL;
2948
2949 while(info) {
2950 if (info == remove_info) {
2951 if (last)
2952 last->next_device = info->next_device;
2953 else
2954 mgslpc_device_list = info->next_device;
af69c7f9 2955#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 2956 hdlcdev_exit(info);
2957#endif
2958 release_resources(info);
2959 kfree(info);
2960 mgslpc_device_count--;
2961 return;
2962 }
2963 last = info;
2964 info = info->next_device;
2965 }
2966}
2967
4af48c8c
DB		 2968static struct pcmcia_device_id mgslpc_ids[] = {
2969 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2970 PCMCIA_DEVICE_NULL
2971};
2972MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2973
1da177e4
LT		 2974static struct pcmcia_driver mgslpc_driver = {
2975 .owner = THIS_MODULE,
2976 .drv = {
2977 .name = "synclink_cs",
2978 },
15b99ac1 2979 .probe = mgslpc_probe,
cc3b4866 2980 .remove = mgslpc_detach,
4af48c8c 2981 .id_table = mgslpc_ids,
98e4c28b
DB		 2982 .suspend = mgslpc_suspend,
2983 .resume = mgslpc_resume,
1da177e4
LT		 2984};
2985
b68e31d0 2986static const struct tty_operations mgslpc_ops = {
1da177e4
LT		 2987 .open = mgslpc_open,
2988 .close = mgslpc_close,
2989 .write = mgslpc_write,
2990 .put_char = mgslpc_put_char,
2991 .flush_chars = mgslpc_flush_chars,
2992 .write_room = mgslpc_write_room,
2993 .chars_in_buffer = mgslpc_chars_in_buffer,
2994 .flush_buffer = mgslpc_flush_buffer,
2995 .ioctl = mgslpc_ioctl,
2996 .throttle = mgslpc_throttle,
2997 .unthrottle = mgslpc_unthrottle,
2998 .send_xchar = mgslpc_send_xchar,
2999 .break_ctl = mgslpc_break,
3000 .wait_until_sent = mgslpc_wait_until_sent,
3001 .read_proc = mgslpc_read_proc,
3002 .set_termios = mgslpc_set_termios,
3003 .stop = tx_pause,
3004 .start = tx_release,
3005 .hangup = mgslpc_hangup,
3006 .tiocmget = tiocmget,
3007 .tiocmset = tiocmset,
3008};
3009
3010static void synclink_cs_cleanup(void)
3011{
3012 int rc;
3013
3014 printk("Unloading %s: version %s\n", driver_name, driver_version);
3015
3016 while(mgslpc_device_list)
3017 mgslpc_remove_device(mgslpc_device_list);
3018
3019 if (serial_driver) {
3020 if ((rc = tty_unregister_driver(serial_driver)))
3021 printk("%s(%d) failed to unregister tty driver err=%d\n",
3022 __FILE__,__LINE__,rc);
3023 put_tty_driver(serial_driver);
3024 }
3025
3026 pcmcia_unregister_driver(&mgslpc_driver);
1da177e4
LT		 3027}
3028
3029static int __init synclink_cs_init(void)
3030{
3031 int rc;
3032
3033 if (break_on_load) {
3034 mgslpc_get_text_ptr();
3035 BREAKPOINT();
3036 }
3037
3038 printk("%s %s\n", driver_name, driver_version);
3039
3040 if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3041 return rc;
3042
3043 serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3044 if (!serial_driver) {
3045 rc = -ENOMEM;
3046 goto error;
3047 }
3048
3049 /* Initialize the tty_driver structure */
d12341f9 3050
1da177e4
LT		 3051 serial_driver->owner = THIS_MODULE;
3052 serial_driver->driver_name = "synclink_cs";
3053 serial_driver->name = "ttySLP";
3054 serial_driver->major = ttymajor;
3055 serial_driver->minor_start = 64;
3056 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3057 serial_driver->subtype = SERIAL_TYPE_NORMAL;
3058 serial_driver->init_termios = tty_std_termios;
3059 serial_driver->init_termios.c_cflag =
3060 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3061 serial_driver->flags = TTY_DRIVER_REAL_RAW;
3062 tty_set_operations(serial_driver, &mgslpc_ops);
3063
3064 if ((rc = tty_register_driver(serial_driver)) < 0) {
3065 printk("%s(%d):Couldn't register serial driver\n",
3066 __FILE__,__LINE__);
3067 put_tty_driver(serial_driver);
3068 serial_driver = NULL;
3069 goto error;
3070 }
d12341f9 3071
1da177e4
LT		 3072 printk("%s %s, tty major#%d\n",
3073 driver_name, driver_version,
3074 serial_driver->major);
d12341f9 3075
1da177e4
LT		 3076 return 0;
3077
3078error:
3079 synclink_cs_cleanup();
3080 return rc;
3081}
3082
d12341f9 3083static void __exit synclink_cs_exit(void)
1da177e4
LT		 3084{
3085 synclink_cs_cleanup();
3086}
3087
3088module_init(synclink_cs_init);
3089module_exit(synclink_cs_exit);
3090
3091static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3092{
3093 unsigned int M, N;
3094 unsigned char val;
3095
d12341f9
JG		 3096 /* note:standard BRG mode is broken in V3.2 chip
3097 * so enhanced mode is always used
1da177e4
LT		 3098 */
3099
3100 if (rate) {
3101 N = 3686400 / rate;
3102 if (!N)
3103 N = 1;
3104 N >>= 1;
3105 for (M = 1; N > 64 && M < 16; M++)
3106 N >>= 1;
3107 N--;
3108
3109 /* BGR[5..0] = N
3110 * BGR[9..6] = M
3111 * BGR[7..0] contained in BGR register
3112 * BGR[9..8] contained in CCR2[7..6]
3113 * divisor = (N+1)*2^M
3114 *
3115 * Note: M *must* not be zero (causes asymetric duty cycle)
d12341f9 3116 */
1da177e4
LT		 3117 write_reg(info, (unsigned char) (channel + BGR),
3118 (unsigned char) ((M << 6) + N));
3119 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3120 val |= ((M << 4) & 0xc0);
3121 write_reg(info, (unsigned char) (channel + CCR2), val);
3122 }
3123}
3124
3125/* Enabled the AUX clock output at the specified frequency.
3126 */
3127static void enable_auxclk(MGSLPC_INFO *info)
3128{
3129 unsigned char val;
d12341f9 3130
1da177e4
LT		 3131 /* MODE
3132 *
3133 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3134 * 05 ADM Address Mode, 0 = no addr recognition
3135 * 04 TMD Timer Mode, 0 = external
3136 * 03 RAC Receiver Active, 0 = inactive
3137 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3138 * 01 TRS Timer Resolution, 1=512
3139 * 00 TLP Test Loop, 0 = no loop
3140 *
3141 * 1000 0010
d12341f9 3142 */
1da177e4 3143 val = 0x82;
d12341f9
JG		 3144
3145 /* channel B RTS is used to enable AUXCLK driver on SP505 */
1da177e4
LT		 3146 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3147 val |= BIT2;
3148 write_reg(info, CHB + MODE, val);
d12341f9 3149
1da177e4
LT		 3150 /* CCR0
3151 *
3152 * 07 PU Power Up, 1=active, 0=power down
3153 * 06 MCE Master Clock Enable, 1=enabled
3154 * 05 Reserved, 0
3155 * 04..02 SC[2..0] Encoding
3156 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3157 *
3158 * 11000000
d12341f9 3159 */
1da177e4 3160 write_reg(info, CHB + CCR0, 0xc0);
d12341f9 3161
1da177e4
LT		 3162 /* CCR1
3163 *
3164 * 07 SFLG Shared Flag, 0 = disable shared flags
3165 * 06 GALP Go Active On Loop, 0 = not used
3166 * 05 GLP Go On Loop, 0 = not used
3167 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3168 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3169 * 02..00 CM[2..0] Clock Mode
3170 *
3171 * 0001 0111
d12341f9 3172 */
1da177e4 3173 write_reg(info, CHB + CCR1, 0x17);
d12341f9 3174
1da177e4
LT		 3175 /* CCR2 (Channel B)
3176 *
3177 * 07..06 BGR[9..8] Baud rate bits 9..8
3178 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3179 * 04 SSEL Clock source select, 1=submode b
3180 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
3181 * 02 RWX Read/Write Exchange 0=disabled
3182 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3183 * 00 DIV, data inversion 0=disabled, 1=enabled
3184 *
3185 * 0011 1000
d12341f9 3186 */
1da177e4
LT		 3187 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3188 write_reg(info, CHB + CCR2, 0x38);
3189 else
3190 write_reg(info, CHB + CCR2, 0x30);
d12341f9 3191
1da177e4
LT		 3192 /* CCR4
3193 *
3194 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3195 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3196 * 05 TST1 Test Pin, 0=normal operation
3197 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3198 * 03..02 Reserved, must be 0
3199 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3200 *
3201 * 0101 0000
d12341f9 3202 */
1da177e4 3203 write_reg(info, CHB + CCR4, 0x50);
d12341f9 3204
1da177e4
LT		 3205 /* if auxclk not enabled, set internal BRG so
3206 * CTS transitions can be detected (requires TxC)
d12341f9 3207 */
1da177e4
LT		 3208 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3209 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3210 else
3211 mgslpc_set_rate(info, CHB, 921600);
3212}
3213
d12341f9 3214static void loopback_enable(MGSLPC_INFO *info)
1da177e4
LT		 3215{
3216 unsigned char val;
d12341f9
JG		 3217
3218 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
1da177e4
LT		 3219 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3220 write_reg(info, CHA + CCR1, val);
d12341f9
JG		 3221
3222 /* CCR2:04 SSEL Clock source select, 1=submode b */
1da177e4
LT		 3223 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3224 write_reg(info, CHA + CCR2, val);
d12341f9
JG		 3225
3226 /* set LinkSpeed if available, otherwise default to 2Mbps */
1da177e4
LT		 3227 if (info->params.clock_speed)
3228 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3229 else
3230 mgslpc_set_rate(info, CHA, 1843200);
d12341f9
JG		 3231
3232 /* MODE:00 TLP Test Loop, 1=loopback enabled */
1da177e4
LT		 3233 val = read_reg(info, CHA + MODE) | BIT0;
3234 write_reg(info, CHA + MODE, val);
3235}
3236
cdaad343 3237static void hdlc_mode(MGSLPC_INFO *info)
1da177e4
LT		 3238{
3239 unsigned char val;
3240 unsigned char clkmode, clksubmode;
3241
d12341f9 3242 /* disable all interrupts */
1da177e4
LT		 3243 irq_disable(info, CHA, 0xffff);
3244 irq_disable(info, CHB, 0xffff);
3245 port_irq_disable(info, 0xff);
d12341f9
JG		 3246
3247 /* assume clock mode 0a, rcv=RxC xmt=TxC */
1da177e4
LT		 3248 clkmode = clksubmode = 0;
3249 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3250 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
d12341f9 3251 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
1da177e4
LT		 3252 clkmode = 7;
3253 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3254 && info->params.flags & HDLC_FLAG_TXC_BRG) {
d12341f9 3255 /* clock mode 7b, rcv = BRG, xmt = BRG */
1da177e4
LT		 3256 clkmode = 7;
3257 clksubmode = 1;
3258 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3259 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
d12341f9 3260 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
1da177e4
LT		 3261 clkmode = 6;
3262 clksubmode = 1;
3263 } else {
d12341f9 3264 /* clock mode 6a, rcv = DPLL, xmt = TxC */
1da177e4
LT		 3265 clkmode = 6;
3266 }
3267 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
d12341f9 3268 /* clock mode 0b, rcv = RxC, xmt = BRG */
1da177e4
LT		 3269 clksubmode = 1;
3270 }
d12341f9 3271
1da177e4
LT		 3272 /* MODE
3273 *
3274 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3275 * 05 ADM Address Mode, 0 = no addr recognition
3276 * 04 TMD Timer Mode, 0 = external
3277 * 03 RAC Receiver Active, 0 = inactive
3278 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3279 * 01 TRS Timer Resolution, 1=512
3280 * 00 TLP Test Loop, 0 = no loop
3281 *
3282 * 1000 0010
d12341f9 3283 */
1da177e4
LT		 3284 val = 0x82;
3285 if (info->params.loopback)
3286 val |= BIT0;
d12341f9
JG		 3287
3288 /* preserve RTS state */
1da177e4
LT		 3289 if (info->serial_signals & SerialSignal_RTS)
3290 val |= BIT2;
3291 write_reg(info, CHA + MODE, val);
d12341f9 3292
1da177e4
LT		 3293 /* CCR0
3294 *
3295 * 07 PU Power Up, 1=active, 0=power down
3296 * 06 MCE Master Clock Enable, 1=enabled
3297 * 05 Reserved, 0
3298 * 04..02 SC[2..0] Encoding
3299 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3300 *
3301 * 11000000
d12341f9 3302 */
1da177e4
LT		 3303 val = 0xc0;
3304 switch (info->params.encoding)
3305 {
3306 case HDLC_ENCODING_NRZI:
3307 val |= BIT3;
3308 break;
3309 case HDLC_ENCODING_BIPHASE_SPACE:
3310 val |= BIT4;
3311 break; // FM0
3312 case HDLC_ENCODING_BIPHASE_MARK:
3313 val |= BIT4 + BIT2;
3314 break; // FM1
3315 case HDLC_ENCODING_BIPHASE_LEVEL:
3316 val |= BIT4 + BIT3;
3317 break; // Manchester
3318 }
3319 write_reg(info, CHA + CCR0, val);
d12341f9 3320
1da177e4
LT		 3321 /* CCR1
3322 *
3323 * 07 SFLG Shared Flag, 0 = disable shared flags
3324 * 06 GALP Go Active On Loop, 0 = not used
3325 * 05 GLP Go On Loop, 0 = not used
3326 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3327 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3328 * 02..00 CM[2..0] Clock Mode
3329 *
3330 * 0001 0000
d12341f9 3331 */
1da177e4
LT		 3332 val = 0x10 + clkmode;
3333 write_reg(info, CHA + CCR1, val);
d12341f9 3334
1da177e4
LT		 3335 /* CCR2
3336 *
3337 * 07..06 BGR[9..8] Baud rate bits 9..8
3338 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3339 * 04 SSEL Clock source select, 1=submode b
3340 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3341 * 02 RWX Read/Write Exchange 0=disabled
3342 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3343 * 00 DIV, data inversion 0=disabled, 1=enabled
3344 *
3345 * 0000 0000
d12341f9 3346 */
1da177e4
LT		 3347 val = 0x00;
3348 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3349 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3350 val |= BIT5;
3351 if (clksubmode)
3352 val |= BIT4;
3353 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3354 val |= BIT1;
3355 if (info->params.encoding == HDLC_ENCODING_NRZB)
3356 val |= BIT0;
3357 write_reg(info, CHA + CCR2, val);
d12341f9 3358
1da177e4
LT		 3359 /* CCR3
3360 *
3361 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3362 * 05 EPT Enable preamble transmission, 1=enabled
3363 * 04 RADD Receive address pushed to FIFO, 0=disabled
3364 * 03 CRL CRC Reset Level, 0=FFFF
3365 * 02 RCRC Rx CRC 0=On 1=Off
3366 * 01 TCRC Tx CRC 0=On 1=Off
3367 * 00 PSD DPLL Phase Shift Disable
3368 *
3369 * 0000 0000
d12341f9 3370 */
1da177e4
LT		 3371 val = 0x00;
3372 if (info->params.crc_type == HDLC_CRC_NONE)
3373 val |= BIT2 + BIT1;
3374 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3375 val |= BIT5;
3376 switch (info->params.preamble_length)
3377 {
3378 case HDLC_PREAMBLE_LENGTH_16BITS:
3379 val |= BIT6;
3380 break;
3381 case HDLC_PREAMBLE_LENGTH_32BITS:
3382 val |= BIT6;
3383 break;
3384 case HDLC_PREAMBLE_LENGTH_64BITS:
3385 val |= BIT7 + BIT6;
3386 break;
3387 }
3388 write_reg(info, CHA + CCR3, val);
d12341f9
JG		 3389
3390 /* PRE - Preamble pattern */
1da177e4
LT		 3391 val = 0;
3392 switch (info->params.preamble)
3393 {
3394 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3395 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3396 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3397 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3398 }
3399 write_reg(info, CHA + PRE, val);
d12341f9 3400
1da177e4
LT		 3401 /* CCR4
3402 *
3403 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3404 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3405 * 05 TST1 Test Pin, 0=normal operation
3406 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3407 * 03..02 Reserved, must be 0
3408 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3409 *
3410 * 0101 0000
d12341f9 3411 */
1da177e4
LT		 3412 val = 0x50;
3413 write_reg(info, CHA + CCR4, val);
3414 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3415 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3416 else
3417 mgslpc_set_rate(info, CHA, info->params.clock_speed);
d12341f9 3418
1da177e4
LT		 3419 /* RLCR Receive length check register
3420 *
3421 * 7 1=enable receive length check
3422 * 6..0 Max frame length = (RL + 1) * 32
d12341f9 3423 */
1da177e4 3424 write_reg(info, CHA + RLCR, 0);
d12341f9 3425
1da177e4
LT		 3426 /* XBCH Transmit Byte Count High
3427 *
3428 * 07 DMA mode, 0 = interrupt driven
3429 * 06 NRM, 0=ABM (ignored)
3430 * 05 CAS Carrier Auto Start
3431 * 04 XC Transmit Continuously (ignored)
3432 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3433 *
3434 * 0000 0000
d12341f9 3435 */
1da177e4
LT		 3436 val = 0x00;
3437 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3438 val |= BIT5;
3439 write_reg(info, CHA + XBCH, val);
3440 enable_auxclk(info);
3441 if (info->params.loopback || info->testing_irq)
3442 loopback_enable(info);
3443 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3444 {
3445 irq_enable(info, CHB, IRQ_CTS);
d12341f9 3446 /* PVR[3] 1=AUTO CTS active */
1da177e4
LT		 3447 set_reg_bits(info, CHA + PVR, BIT3);
3448 } else
3449 clear_reg_bits(info, CHA + PVR, BIT3);
3450
3451 irq_enable(info, CHA,
3452 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3453 IRQ_UNDERRUN + IRQ_TXFIFO);
3454 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3455 wait_command_complete(info, CHA);
3456 read_reg16(info, CHA + ISR); /* clear pending IRQs */
d12341f9 3457
1da177e4
LT		 3458 /* Master clock mode enabled above to allow reset commands
3459 * to complete even if no data clocks are present.
3460 *
3461 * Disable master clock mode for normal communications because
3462 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3463 * IRQ when in master clock mode.
3464 *
3465 * Leave master clock mode enabled for IRQ test because the
3466 * timer IRQ used by the test can only happen in master clock mode.
d12341f9 3467 */
1da177e4
LT		 3468 if (!info->testing_irq)
3469 clear_reg_bits(info, CHA + CCR0, BIT6);
3470
3471 tx_set_idle(info);
3472
3473 tx_stop(info);
3474 rx_stop(info);
3475}
3476
cdaad343 3477static void rx_stop(MGSLPC_INFO *info)
1da177e4
LT		 3478{
3479 if (debug_level >= DEBUG_LEVEL_ISR)
3480 printk("%s(%d):rx_stop(%s)\n",
3481 __FILE__,__LINE__, info->device_name );
d12341f9
JG		 3482
3483 /* MODE:03 RAC Receiver Active, 0=inactive */
1da177e4
LT		 3484 clear_reg_bits(info, CHA + MODE, BIT3);
3485
0fab6de0
JP		 3486 info->rx_enabled = false;
3487 info->rx_overflow = false;
1da177e4
LT		 3488}
3489
cdaad343 3490static void rx_start(MGSLPC_INFO *info)
1da177e4
LT		 3491{
3492 if (debug_level >= DEBUG_LEVEL_ISR)
3493 printk("%s(%d):rx_start(%s)\n",
3494 __FILE__,__LINE__, info->device_name );
3495
3496 rx_reset_buffers(info);
0fab6de0
JP		 3497 info->rx_enabled = false;
3498 info->rx_overflow = false;
1da177e4 3499
d12341f9 3500 /* MODE:03 RAC Receiver Active, 1=active */
1da177e4
LT		 3501 set_reg_bits(info, CHA + MODE, BIT3);
3502
0fab6de0 3503 info->rx_enabled = true;
1da177e4
LT		 3504}
3505
cdaad343 3506static void tx_start(MGSLPC_INFO *info)
1da177e4
LT		 3507{
3508 if (debug_level >= DEBUG_LEVEL_ISR)
3509 printk("%s(%d):tx_start(%s)\n",
3510 __FILE__,__LINE__, info->device_name );
d12341f9 3511
1da177e4
LT		 3512 if (info->tx_count) {
3513 /* If auto RTS enabled and RTS is inactive, then assert */
3514 /* RTS and set a flag indicating that the driver should */
3515 /* negate RTS when the transmission completes. */
0fab6de0 3516 info->drop_rts_on_tx_done = false;
1da177e4
LT		 3517
3518 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3519 get_signals(info);
3520 if (!(info->serial_signals & SerialSignal_RTS)) {
3521 info->serial_signals |= SerialSignal_RTS;
3522 set_signals(info);
0fab6de0 3523 info->drop_rts_on_tx_done = true;
1da177e4
LT		 3524 }
3525 }
3526
3527 if (info->params.mode == MGSL_MODE_ASYNC) {
3528 if (!info->tx_active) {
0fab6de0 3529 info->tx_active = true;
1da177e4
LT		 3530 tx_ready(info);
3531 }
3532 } else {
0fab6de0 3533 info->tx_active = true;
1da177e4 3534 tx_ready(info);
40565f19
JS		 3535 mod_timer(&info->tx_timer, jiffies +
3536 msecs_to_jiffies(5000));
1da177e4
LT		 3537 }
3538 }
3539
3540 if (!info->tx_enabled)
0fab6de0 3541 info->tx_enabled = true;
1da177e4
LT		 3542}
3543
cdaad343 3544static void tx_stop(MGSLPC_INFO *info)
1da177e4
LT		 3545{
3546 if (debug_level >= DEBUG_LEVEL_ISR)
3547 printk("%s(%d):tx_stop(%s)\n",
3548 __FILE__,__LINE__, info->device_name );
d12341f9
JG		 3549
3550 del_timer(&info->tx_timer);
1da177e4 3551
0fab6de0
JP		 3552 info->tx_enabled = false;
3553 info->tx_active = false;
1da177e4
LT		 3554}
3555
3556/* Reset the adapter to a known state and prepare it for further use.
3557 */
cdaad343 3558static void reset_device(MGSLPC_INFO *info)
1da177e4 3559{
d12341f9 3560 /* power up both channels (set BIT7) */
1da177e4
LT		 3561 write_reg(info, CHA + CCR0, 0x80);
3562 write_reg(info, CHB + CCR0, 0x80);
3563 write_reg(info, CHA + MODE, 0);
3564 write_reg(info, CHB + MODE, 0);
d12341f9
JG		 3565
3566 /* disable all interrupts */
1da177e4
LT		 3567 irq_disable(info, CHA, 0xffff);
3568 irq_disable(info, CHB, 0xffff);
3569 port_irq_disable(info, 0xff);
d12341f9 3570
1da177e4
LT		 3571 /* PCR Port Configuration Register
3572 *
3573 * 07..04 DEC[3..0] Serial I/F select outputs
3574 * 03 output, 1=AUTO CTS control enabled
3575 * 02 RI Ring Indicator input 0=active
3576 * 01 DSR input 0=active
3577 * 00 DTR output 0=active
3578 *
3579 * 0000 0110
d12341f9 3580 */
1da177e4 3581 write_reg(info, PCR, 0x06);
d12341f9 3582
1da177e4
LT		 3583 /* PVR Port Value Register
3584 *
3585 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3586 * 03 AUTO CTS output 1=enabled
3587 * 02 RI Ring Indicator input
3588 * 01 DSR input
3589 * 00 DTR output (1=inactive)
3590 *
3591 * 0000 0001
3592 */
3593// write_reg(info, PVR, PVR_DTR);
d12341f9 3594
1da177e4
LT		 3595 /* IPC Interrupt Port Configuration
3596 *
3597 * 07 VIS 1=Masked interrupts visible
3598 * 06..05 Reserved, 0
3599 * 04..03 SLA Slave address, 00 ignored
3600 * 02 CASM Cascading Mode, 1=daisy chain
3601 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3602 *
3603 * 0000 0101
d12341f9 3604 */
1da177e4
LT		 3605 write_reg(info, IPC, 0x05);
3606}
3607
cdaad343 3608static void async_mode(MGSLPC_INFO *info)
1da177e4
LT		 3609{
3610 unsigned char val;
3611
d12341f9 3612 /* disable all interrupts */
1da177e4
LT		 3613 irq_disable(info, CHA, 0xffff);
3614 irq_disable(info, CHB, 0xffff);
3615 port_irq_disable(info, 0xff);
d12341f9 3616
1da177e4
LT		 3617 /* MODE
3618 *
3619 * 07 Reserved, 0
3620 * 06 FRTS RTS State, 0=active
3621 * 05 FCTS Flow Control on CTS
3622 * 04 FLON Flow Control Enable
3623 * 03 RAC Receiver Active, 0 = inactive
3624 * 02 RTS 0=Auto RTS, 1=manual RTS
3625 * 01 TRS Timer Resolution, 1=512
3626 * 00 TLP Test Loop, 0 = no loop
3627 *
3628 * 0000 0110
d12341f9 3629 */
1da177e4
LT		 3630 val = 0x06;
3631 if (info->params.loopback)
3632 val |= BIT0;
d12341f9
JG		 3633
3634 /* preserve RTS state */
1da177e4
LT		 3635 if (!(info->serial_signals & SerialSignal_RTS))
3636 val |= BIT6;
3637 write_reg(info, CHA + MODE, val);
d12341f9 3638
1da177e4
LT		 3639 /* CCR0
3640 *
3641 * 07 PU Power Up, 1=active, 0=power down
3642 * 06 MCE Master Clock Enable, 1=enabled
3643 * 05 Reserved, 0
3644 * 04..02 SC[2..0] Encoding, 000=NRZ
3645 * 01..00 SM[1..0] Serial Mode, 11=Async
3646 *
3647 * 1000 0011
d12341f9 3648 */
1da177e4 3649 write_reg(info, CHA + CCR0, 0x83);
d12341f9 3650
1da177e4
LT		 3651 /* CCR1
3652 *
3653 * 07..05 Reserved, 0
3654 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3655 * 03 BCR Bit Clock Rate, 1=16x
3656 * 02..00 CM[2..0] Clock Mode, 111=BRG
3657 *
3658 * 0001 1111
d12341f9 3659 */
1da177e4 3660 write_reg(info, CHA + CCR1, 0x1f);
d12341f9 3661
1da177e4
LT		 3662 /* CCR2 (channel A)
3663 *
3664 * 07..06 BGR[9..8] Baud rate bits 9..8
3665 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3666 * 04 SSEL Clock source select, 1=submode b
3667 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3668 * 02 RWX Read/Write Exchange 0=disabled
3669 * 01 Reserved, 0
3670 * 00 DIV, data inversion 0=disabled, 1=enabled
3671 *
3672 * 0001 0000
d12341f9 3673 */
1da177e4 3674 write_reg(info, CHA + CCR2, 0x10);
d12341f9 3675
1da177e4
LT		 3676 /* CCR3
3677 *
3678 * 07..01 Reserved, 0
3679 * 00 PSD DPLL Phase Shift Disable
3680 *
3681 * 0000 0000
d12341f9 3682 */
1da177e4 3683 write_reg(info, CHA + CCR3, 0);
d12341f9 3684
1da177e4
LT		 3685 /* CCR4
3686 *
3687 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3688 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3689 * 05 TST1 Test Pin, 0=normal operation
3690 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3691 * 03..00 Reserved, must be 0
3692 *
3693 * 0101 0000
d12341f9 3694 */
1da177e4
LT		 3695 write_reg(info, CHA + CCR4, 0x50);
3696 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
d12341f9 3697
1da177e4
LT		 3698 /* DAFO Data Format
3699 *
3700 * 07 Reserved, 0
3701 * 06 XBRK transmit break, 0=normal operation
3702 * 05 Stop bits (0=1, 1=2)
3703 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3704 * 02 PAREN Parity Enable
3705 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3706 *
d12341f9 3707 */
1da177e4
LT		 3708 val = 0x00;
3709 if (info->params.data_bits != 8)
3710 val |= BIT0; /* 7 bits */
3711 if (info->params.stop_bits != 1)
3712 val |= BIT5;
3713 if (info->params.parity != ASYNC_PARITY_NONE)
3714 {
3715 val |= BIT2; /* Parity enable */
3716 if (info->params.parity == ASYNC_PARITY_ODD)
3717 val |= BIT3;
3718 else
3719 val |= BIT4;
3720 }
3721 write_reg(info, CHA + DAFO, val);
d12341f9 3722
1da177e4
LT		 3723 /* RFC Rx FIFO Control
3724 *
3725 * 07 Reserved, 0
3726 * 06 DPS, 1=parity bit not stored in data byte
3727 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3728 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3729 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3730 * 01 Reserved, 0
3731 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3732 *
3733 * 0101 1100
d12341f9 3734 */
1da177e4 3735 write_reg(info, CHA + RFC, 0x5c);
d12341f9 3736
1da177e4
LT		 3737 /* RLCR Receive length check register
3738 *
3739 * Max frame length = (RL + 1) * 32
d12341f9 3740 */
1da177e4 3741 write_reg(info, CHA + RLCR, 0);
d12341f9 3742
1da177e4
LT		 3743 /* XBCH Transmit Byte Count High
3744 *
3745 * 07 DMA mode, 0 = interrupt driven
3746 * 06 NRM, 0=ABM (ignored)
3747 * 05 CAS Carrier Auto Start
3748 * 04 XC Transmit Continuously (ignored)
3749 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3750 *
3751 * 0000 0000
d12341f9 3752 */
1da177e4
LT		 3753 val = 0x00;
3754 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3755 val |= BIT5;
3756 write_reg(info, CHA + XBCH, val);
3757 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3758 irq_enable(info, CHA, IRQ_CTS);
d12341f9
JG		 3759
3760 /* MODE:03 RAC Receiver Active, 1=active */
1da177e4
LT		 3761 set_reg_bits(info, CHA + MODE, BIT3);
3762 enable_auxclk(info);
3763 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3764 irq_enable(info, CHB, IRQ_CTS);
d12341f9 3765 /* PVR[3] 1=AUTO CTS active */
1da177e4
LT		 3766 set_reg_bits(info, CHA + PVR, BIT3);
3767 } else
3768 clear_reg_bits(info, CHA + PVR, BIT3);
3769 irq_enable(info, CHA,
3770 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3771 IRQ_ALLSENT + IRQ_TXFIFO);
3772 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3773 wait_command_complete(info, CHA);
3774 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3775}
3776
3777/* Set the HDLC idle mode for the transmitter.
3778 */
cdaad343 3779static void tx_set_idle(MGSLPC_INFO *info)
1da177e4 3780{
d12341f9 3781 /* Note: ESCC2 only supports flags and one idle modes */
1da177e4
LT		 3782 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3783 set_reg_bits(info, CHA + CCR1, BIT3);
3784 else
3785 clear_reg_bits(info, CHA + CCR1, BIT3);
3786}
3787
3788/* get state of the V24 status (input) signals.
3789 */
cdaad343 3790static void get_signals(MGSLPC_INFO *info)
1da177e4
LT		 3791{
3792 unsigned char status = 0;
d12341f9
JG		 3793
3794 /* preserve DTR and RTS */
1da177e4
LT		 3795 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3796
3797 if (read_reg(info, CHB + VSTR) & BIT7)
3798 info->serial_signals |= SerialSignal_DCD;
3799 if (read_reg(info, CHB + STAR) & BIT1)
3800 info->serial_signals |= SerialSignal_CTS;
3801
3802 status = read_reg(info, CHA + PVR);
3803 if (!(status & PVR_RI))
3804 info->serial_signals |= SerialSignal_RI;
3805 if (!(status & PVR_DSR))
3806 info->serial_signals |= SerialSignal_DSR;
3807}
3808
3809/* Set the state of DTR and RTS based on contents of
3810 * serial_signals member of device extension.
3811 */
cdaad343 3812static void set_signals(MGSLPC_INFO *info)
1da177e4
LT		 3813{
3814 unsigned char val;
3815
3816 val = read_reg(info, CHA + MODE);
3817 if (info->params.mode == MGSL_MODE_ASYNC) {
3818 if (info->serial_signals & SerialSignal_RTS)
3819 val &= ~BIT6;
3820 else
3821 val |= BIT6;
3822 } else {
3823 if (info->serial_signals & SerialSignal_RTS)
3824 val |= BIT2;
3825 else
3826 val &= ~BIT2;
3827 }
3828 write_reg(info, CHA + MODE, val);
3829
3830 if (info->serial_signals & SerialSignal_DTR)
3831 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3832 else
3833 set_reg_bits(info, CHA + PVR, PVR_DTR);
3834}
3835
cdaad343 3836static void rx_reset_buffers(MGSLPC_INFO *info)
1da177e4
LT		 3837{
3838 RXBUF *buf;
3839 int i;
3840
3841 info->rx_put = 0;
3842 info->rx_get = 0;
3843 info->rx_frame_count = 0;
3844 for (i=0 ; i < info->rx_buf_count ; i++) {
3845 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3846 buf->status = buf->count = 0;
3847 }
3848}
3849
3850/* Attempt to return a received HDLC frame
3851 * Only frames received without errors are returned.
3852 *
0fab6de0 3853 * Returns true if frame returned, otherwise false
1da177e4 3854 */
0fab6de0 3855static bool rx_get_frame(MGSLPC_INFO *info)
1da177e4
LT		 3856{
3857 unsigned short status;
3858 RXBUF *buf;
3859 unsigned int framesize = 0;
3860 unsigned long flags;
3861 struct tty_struct *tty = info->tty;
0fab6de0 3862 bool return_frame = false;
d12341f9 3863
1da177e4 3864 if (info->rx_frame_count == 0)
0fab6de0 3865 return false;
1da177e4
LT		 3866
3867 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3868
3869 status = buf->status;
3870
3871 /* 07 VFR 1=valid frame
3872 * 06 RDO 1=data overrun
3873 * 05 CRC 1=OK, 0=error
3874 * 04 RAB 1=frame aborted
3875 */
3876 if ((status & 0xf0) != 0xA0) {
3877 if (!(status & BIT7) || (status & BIT4))
3878 info->icount.rxabort++;
3879 else if (status & BIT6)
3880 info->icount.rxover++;
3881 else if (!(status & BIT5)) {
3882 info->icount.rxcrc++;
3883 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
0fab6de0 3884 return_frame = true;
1da177e4
LT		 3885 }
3886 framesize = 0;
af69c7f9 3887#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 3888 {
3889 struct net_device_stats *stats = hdlc_stats(info->netdev);
3890 stats->rx_errors++;
3891 stats->rx_frame_errors++;
3892 }
3893#endif
3894 } else
0fab6de0 3895 return_frame = true;
1da177e4
LT		 3896
3897 if (return_frame)
3898 framesize = buf->count;
3899
3900 if (debug_level >= DEBUG_LEVEL_BH)
3901 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3902 __FILE__,__LINE__,info->device_name,status,framesize);
d12341f9 3903
1da177e4 3904 if (debug_level >= DEBUG_LEVEL_DATA)
d12341f9
JG		 3905 trace_block(info, buf->data, framesize, 0);
3906
1da177e4
LT		 3907 if (framesize) {
3908 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3909 framesize+1 > info->max_frame_size) ||
3910 framesize > info->max_frame_size)
3911 info->icount.rxlong++;
3912 else {
3913 if (status & BIT5)
3914 info->icount.rxok++;
3915
3916 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3917 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3918 ++framesize;
3919 }
3920
af69c7f9 3921#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 3922 if (info->netcount)
3923 hdlcdev_rx(info, buf->data, framesize);
3924 else
3925#endif
3926 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3927 }
3928 }
3929
3930 spin_lock_irqsave(&info->lock,flags);
3931 buf->status = buf->count = 0;
3932 info->rx_frame_count--;
3933 info->rx_get++;
3934 if (info->rx_get >= info->rx_buf_count)
3935 info->rx_get = 0;
3936 spin_unlock_irqrestore(&info->lock,flags);
3937
0fab6de0 3938 return true;
1da177e4
LT		 3939}
3940
0fab6de0 3941static bool register_test(MGSLPC_INFO *info)
1da177e4 3942{
d12341f9 3943 static unsigned char patterns[] =
1da177e4 3944 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
fe971071 3945 static unsigned int count = ARRAY_SIZE(patterns);
1da177e4 3946 unsigned int i;
0fab6de0 3947 bool rc = true;
1da177e4
LT		 3948 unsigned long flags;
3949
3950 spin_lock_irqsave(&info->lock,flags);
3951 reset_device(info);
3952
3953 for (i = 0; i < count; i++) {
3954 write_reg(info, XAD1, patterns[i]);
3955 write_reg(info, XAD2, patterns[(i + 1) % count]);
fe971071 3956 if ((read_reg(info, XAD1) != patterns[i]) ||
1da177e4 3957 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
0fab6de0 3958 rc = false;
1da177e4
LT		 3959 break;
3960 }
3961 }
3962
3963 spin_unlock_irqrestore(&info->lock,flags);
3964 return rc;
3965}
3966
0fab6de0 3967static bool irq_test(MGSLPC_INFO *info)
1da177e4
LT		 3968{
3969 unsigned long end_time;
3970 unsigned long flags;
3971
3972 spin_lock_irqsave(&info->lock,flags);
3973 reset_device(info);
3974
0fab6de0 3975 info->testing_irq = true;
1da177e4
LT		 3976 hdlc_mode(info);
3977
0fab6de0 3978 info->irq_occurred = false;
1da177e4
LT		 3979
3980 /* init hdlc mode */
3981
3982 irq_enable(info, CHA, IRQ_TIMER);
3983 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3984 issue_command(info, CHA, CMD_START_TIMER);
3985
3986 spin_unlock_irqrestore(&info->lock,flags);
3987
3988 end_time=100;
3989 while(end_time-- && !info->irq_occurred) {
3990 msleep_interruptible(10);
3991 }
d12341f9 3992
0fab6de0 3993 info->testing_irq = false;
1da177e4
LT		 3994
3995 spin_lock_irqsave(&info->lock,flags);
3996 reset_device(info);
3997 spin_unlock_irqrestore(&info->lock,flags);
d12341f9 3998
0fab6de0 3999 return info->irq_occurred;
1da177e4
LT		 4000}
4001
cdaad343 4002static int adapter_test(MGSLPC_INFO *info)
1da177e4
LT		 4003{
4004 if (!register_test(info)) {
4005 info->init_error = DiagStatus_AddressFailure;
4006 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4007 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4008 return -ENODEV;
4009 }
4010
4011 if (!irq_test(info)) {
4012 info->init_error = DiagStatus_IrqFailure;
4013 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4014 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4015 return -ENODEV;
4016 }
4017
4018 if (debug_level >= DEBUG_LEVEL_INFO)
4019 printk("%s(%d):device %s passed diagnostics\n",
4020 __FILE__,__LINE__,info->device_name);
4021 return 0;
4022}
4023
cdaad343 4024static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
1da177e4
LT		 4025{
4026 int i;
4027 int linecount;
4028 if (xmit)
4029 printk("%s tx data:\n",info->device_name);
4030 else
4031 printk("%s rx data:\n",info->device_name);
d12341f9 4032
1da177e4
LT		 4033 while(count) {
4034 if (count > 16)
4035 linecount = 16;
4036 else
4037 linecount = count;
d12341f9 4038
1da177e4
LT		 4039 for(i=0;i<linecount;i++)
4040 printk("%02X ",(unsigned char)data[i]);
4041 for(;i<17;i++)
4042 printk(" ");
4043 for(i=0;i<linecount;i++) {
4044 if (data[i]>=040 && data[i]<=0176)
4045 printk("%c",data[i]);
4046 else
4047 printk(".");
4048 }
4049 printk("\n");
d12341f9 4050
1da177e4
LT		 4051 data += linecount;
4052 count -= linecount;
4053 }
4054}
4055
4056/* HDLC frame time out
4057 * update stats and do tx completion processing
4058 */
cdaad343 4059static void tx_timeout(unsigned long context)
1da177e4
LT		 4060{
4061 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4062 unsigned long flags;
d12341f9 4063
1da177e4
LT		 4064 if ( debug_level >= DEBUG_LEVEL_INFO )
4065 printk( "%s(%d):tx_timeout(%s)\n",
4066 __FILE__,__LINE__,info->device_name);
4067 if(info->tx_active &&
4068 info->params.mode == MGSL_MODE_HDLC) {
4069 info->icount.txtimeout++;
4070 }
4071 spin_lock_irqsave(&info->lock,flags);
0fab6de0 4072 info->tx_active = false;
1da177e4
LT		 4073 info->tx_count = info->tx_put = info->tx_get = 0;
4074
4075 spin_unlock_irqrestore(&info->lock,flags);
d12341f9 4076
af69c7f9 4077#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 4078 if (info->netcount)
4079 hdlcdev_tx_done(info);
4080 else
4081#endif
4082 bh_transmit(info);
4083}
4084
af69c7f9 4085#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 4086
4087/**
4088 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4089 * set encoding and frame check sequence (FCS) options
4090 *
4091 * dev pointer to network device structure
4092 * encoding serial encoding setting
4093 * parity FCS setting
4094 *
4095 * returns 0 if success, otherwise error code
4096 */
4097static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4098 unsigned short parity)
4099{
4100 MGSLPC_INFO *info = dev_to_port(dev);
4101 unsigned char new_encoding;
4102 unsigned short new_crctype;
4103
4104 /* return error if TTY interface open */
4105 if (info->count)
4106 return -EBUSY;
4107
4108 switch (encoding)
4109 {
4110 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
4111 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4112 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4113 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4114 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4115 default: return -EINVAL;
4116 }
4117
4118 switch (parity)
4119 {
4120 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
4121 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4122 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4123 default: return -EINVAL;
4124 }
4125
4126 info->params.encoding = new_encoding;
53b3531b 4127 info->params.crc_type = new_crctype;
1da177e4
LT		 4128
4129 /* if network interface up, reprogram hardware */
4130 if (info->netcount)
4131 mgslpc_program_hw(info);
4132
4133 return 0;
4134}
4135
4136/**
4137 * called by generic HDLC layer to send frame
4138 *
4139 * skb socket buffer containing HDLC frame
4140 * dev pointer to network device structure
4141 *
4142 * returns 0 if success, otherwise error code
4143 */
4144static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4145{
4146 MGSLPC_INFO *info = dev_to_port(dev);
4147 struct net_device_stats *stats = hdlc_stats(dev);
4148 unsigned long flags;
4149
4150 if (debug_level >= DEBUG_LEVEL_INFO)
4151 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4152
4153 /* stop sending until this frame completes */
4154 netif_stop_queue(dev);
4155
4156 /* copy data to device buffers */
d626f62b 4157 skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
1da177e4
LT		 4158 info->tx_get = 0;
4159 info->tx_put = info->tx_count = skb->len;
4160
4161 /* update network statistics */
4162 stats->tx_packets++;
4163 stats->tx_bytes += skb->len;
4164
4165 /* done with socket buffer, so free it */
4166 dev_kfree_skb(skb);
4167
4168 /* save start time for transmit timeout detection */
4169 dev->trans_start = jiffies;
4170
4171 /* start hardware transmitter if necessary */
4172 spin_lock_irqsave(&info->lock,flags);
4173 if (!info->tx_active)
4174 tx_start(info);
4175 spin_unlock_irqrestore(&info->lock,flags);
4176
4177 return 0;
4178}
4179
4180/**
4181 * called by network layer when interface enabled
4182 * claim resources and initialize hardware
4183 *
4184 * dev pointer to network device structure
4185 *
4186 * returns 0 if success, otherwise error code
4187 */
4188static int hdlcdev_open(struct net_device *dev)
4189{
4190 MGSLPC_INFO *info = dev_to_port(dev);
4191 int rc;
4192 unsigned long flags;
4193
4194 if (debug_level >= DEBUG_LEVEL_INFO)
4195 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4196
4197 /* generic HDLC layer open processing */
4198 if ((rc = hdlc_open(dev)))
4199 return rc;
4200
4201 /* arbitrate between network and tty opens */
4202 spin_lock_irqsave(&info->netlock, flags);
4203 if (info->count != 0 || info->netcount != 0) {
4204 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4205 spin_unlock_irqrestore(&info->netlock, flags);
4206 return -EBUSY;
4207 }
4208 info->netcount=1;
4209 spin_unlock_irqrestore(&info->netlock, flags);
4210
4211 /* claim resources and init adapter */
4212 if ((rc = startup(info)) != 0) {
4213 spin_lock_irqsave(&info->netlock, flags);
4214 info->netcount=0;
4215 spin_unlock_irqrestore(&info->netlock, flags);
4216 return rc;
4217 }
4218
4219 /* assert DTR and RTS, apply hardware settings */
4220 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4221 mgslpc_program_hw(info);
4222
4223 /* enable network layer transmit */
4224 dev->trans_start = jiffies;
4225 netif_start_queue(dev);
4226
4227 /* inform generic HDLC layer of current DCD status */
4228 spin_lock_irqsave(&info->lock, flags);
4229 get_signals(info);
4230 spin_unlock_irqrestore(&info->lock, flags);
fbeff3c1
KH		 4231 if (info->serial_signals & SerialSignal_DCD)
4232 netif_carrier_on(dev);
4233 else
4234 netif_carrier_off(dev);
1da177e4
LT		 4235 return 0;
4236}
4237
4238/**
4239 * called by network layer when interface is disabled
4240 * shutdown hardware and release resources
4241 *
4242 * dev pointer to network device structure
4243 *
4244 * returns 0 if success, otherwise error code
4245 */
4246static int hdlcdev_close(struct net_device *dev)
4247{
4248 MGSLPC_INFO *info = dev_to_port(dev);
4249 unsigned long flags;
4250
4251 if (debug_level >= DEBUG_LEVEL_INFO)
4252 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4253
4254 netif_stop_queue(dev);
4255
4256 /* shutdown adapter and release resources */
4257 shutdown(info);
4258
4259 hdlc_close(dev);
4260
4261 spin_lock_irqsave(&info->netlock, flags);
4262 info->netcount=0;
4263 spin_unlock_irqrestore(&info->netlock, flags);
4264
4265 return 0;
4266}
4267
4268/**
4269 * called by network layer to process IOCTL call to network device
4270 *
4271 * dev pointer to network device structure
4272 * ifr pointer to network interface request structure
4273 * cmd IOCTL command code
4274 *
4275 * returns 0 if success, otherwise error code
4276 */
4277static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4278{
4279 const size_t size = sizeof(sync_serial_settings);
4280 sync_serial_settings new_line;
4281 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4282 MGSLPC_INFO *info = dev_to_port(dev);
4283 unsigned int flags;
4284
4285 if (debug_level >= DEBUG_LEVEL_INFO)
4286 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4287
4288 /* return error if TTY interface open */
4289 if (info->count)
4290 return -EBUSY;
4291
4292 if (cmd != SIOCWANDEV)
4293 return hdlc_ioctl(dev, ifr, cmd);
4294
4295 switch(ifr->ifr_settings.type) {
4296 case IF_GET_IFACE: /* return current sync_serial_settings */
4297
4298 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4299 if (ifr->ifr_settings.size < size) {
4300 ifr->ifr_settings.size = size; /* data size wanted */
4301 return -ENOBUFS;
4302 }
4303
4304 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4305 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4306 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4307 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4308
4309 switch (flags){
4310 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4311 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4312 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4313 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4314 default: new_line.clock_type = CLOCK_DEFAULT;
4315 }
4316
4317 new_line.clock_rate = info->params.clock_speed;
4318 new_line.loopback = info->params.loopback ? 1:0;
4319
4320 if (copy_to_user(line, &new_line, size))
4321 return -EFAULT;
4322 return 0;
4323
4324 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4325
4326 if(!capable(CAP_NET_ADMIN))
4327 return -EPERM;
4328 if (copy_from_user(&new_line, line, size))
4329 return -EFAULT;
4330
4331 switch (new_line.clock_type)
4332 {
4333 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4334 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4335 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4336 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4337 case CLOCK_DEFAULT: flags = info->params.flags &
4338 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4339 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4340 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4341 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4342 default: return -EINVAL;
4343 }
4344
4345 if (new_line.loopback != 0 && new_line.loopback != 1)
4346 return -EINVAL;
4347
4348 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4349 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4350 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4351 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4352 info->params.flags |= flags;
4353
4354 info->params.loopback = new_line.loopback;
4355
4356 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4357 info->params.clock_speed = new_line.clock_rate;
4358 else
4359 info->params.clock_speed = 0;
4360
4361 /* if network interface up, reprogram hardware */
4362 if (info->netcount)
4363 mgslpc_program_hw(info);
4364 return 0;
4365
4366 default:
4367 return hdlc_ioctl(dev, ifr, cmd);
4368 }
4369}
4370
4371/**
4372 * called by network layer when transmit timeout is detected
4373 *
4374 * dev pointer to network device structure
4375 */
4376static void hdlcdev_tx_timeout(struct net_device *dev)
4377{
4378 MGSLPC_INFO *info = dev_to_port(dev);
4379 struct net_device_stats *stats = hdlc_stats(dev);
4380 unsigned long flags;
4381
4382 if (debug_level >= DEBUG_LEVEL_INFO)
4383 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4384
4385 stats->tx_errors++;
4386 stats->tx_aborted_errors++;
4387
4388 spin_lock_irqsave(&info->lock,flags);
4389 tx_stop(info);
4390 spin_unlock_irqrestore(&info->lock,flags);
4391
4392 netif_wake_queue(dev);
4393}
4394
4395/**
4396 * called by device driver when transmit completes
4397 * reenable network layer transmit if stopped
4398 *
4399 * info pointer to device instance information
4400 */
4401static void hdlcdev_tx_done(MGSLPC_INFO *info)
4402{
4403 if (netif_queue_stopped(info->netdev))
4404 netif_wake_queue(info->netdev);
4405}
4406
4407/**
4408 * called by device driver when frame received
4409 * pass frame to network layer
4410 *
4411 * info pointer to device instance information
4412 * buf pointer to buffer contianing frame data
4413 * size count of data bytes in buf
4414 */
4415static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4416{
4417 struct sk_buff *skb = dev_alloc_skb(size);
4418 struct net_device *dev = info->netdev;
4419 struct net_device_stats *stats = hdlc_stats(dev);
4420
4421 if (debug_level >= DEBUG_LEVEL_INFO)
4422 printk("hdlcdev_rx(%s)\n",dev->name);
4423
4424 if (skb == NULL) {
4425 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4426 stats->rx_dropped++;
4427 return;
4428 }
4429
4430 memcpy(skb_put(skb, size),buf,size);
4431
4432 skb->protocol = hdlc_type_trans(skb, info->netdev);
4433
4434 stats->rx_packets++;
4435 stats->rx_bytes += size;
4436
4437 netif_rx(skb);
4438
4439 info->netdev->last_rx = jiffies;
4440}
4441
4442/**
4443 * called by device driver when adding device instance
4444 * do generic HDLC initialization
4445 *
4446 * info pointer to device instance information
4447 *
4448 * returns 0 if success, otherwise error code
4449 */
4450static int hdlcdev_init(MGSLPC_INFO *info)
4451{
4452 int rc;
4453 struct net_device *dev;
4454 hdlc_device *hdlc;
4455
4456 /* allocate and initialize network and HDLC layer objects */
4457
4458 if (!(dev = alloc_hdlcdev(info))) {
4459 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4460 return -ENOMEM;
4461 }
4462
4463 /* for network layer reporting purposes only */
4464 dev->base_addr = info->io_base;
4465 dev->irq = info->irq_level;
4466
4467 /* network layer callbacks and settings */
4468 dev->do_ioctl = hdlcdev_ioctl;
4469 dev->open = hdlcdev_open;
4470 dev->stop = hdlcdev_close;
4471 dev->tx_timeout = hdlcdev_tx_timeout;
4472 dev->watchdog_timeo = 10*HZ;
4473 dev->tx_queue_len = 50;
4474
4475 /* generic HDLC layer callbacks and settings */
4476 hdlc = dev_to_hdlc(dev);
4477 hdlc->attach = hdlcdev_attach;
4478 hdlc->xmit = hdlcdev_xmit;
4479
4480 /* register objects with HDLC layer */
4481 if ((rc = register_hdlc_device(dev))) {
4482 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4483 free_netdev(dev);
4484 return rc;
4485 }
4486
4487 info->netdev = dev;
4488 return 0;
4489}
4490
4491/**
4492 * called by device driver when removing device instance
4493 * do generic HDLC cleanup
4494 *
4495 * info pointer to device instance information
4496 */
4497static void hdlcdev_exit(MGSLPC_INFO *info)
4498{
4499 unregister_hdlc_device(info->netdev);
4500 free_netdev(info->netdev);
4501 info->netdev = NULL;
4502}
4503
4504#endif /* CONFIG_HDLC */
4505
Linux 6.x block layer and io_uring tree(s)