Commit | Line | Data |
---|---|---|
77c44ab1 HW |
1 | /* |
2 | * A driver for the Omnikey PCMCIA smartcard reader CardMan 4040 | |
3 | * | |
4 | * (c) 2000-2004 Omnikey AG (http://www.omnikey.com/) | |
5 | * | |
67bc6200 | 6 | * (C) 2005-2006 Harald Welte <laforge@gnumonks.org> |
77c44ab1 HW |
7 | * - add support for poll() |
8 | * - driver cleanup | |
9 | * - add waitqueues | |
10 | * - adhere to linux kernel coding style and policies | |
11 | * - support 2.6.13 "new style" pcmcia interface | |
67bc6200 | 12 | * - add class interface for udev device creation |
77c44ab1 HW |
13 | * |
14 | * The device basically is a USB CCID compliant device that has been | |
15 | * attached to an I/O-Mapped FIFO. | |
16 | * | |
17 | * All rights reserved, Dual BSD/GPL Licensed. | |
18 | */ | |
19 | ||
77c44ab1 HW |
20 | #include <linux/kernel.h> |
21 | #include <linux/module.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/fs.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/poll.h> | |
613655fa | 27 | #include <linux/mutex.h> |
77c44ab1 HW |
28 | #include <linux/wait.h> |
29 | #include <asm/uaccess.h> | |
30 | #include <asm/io.h> | |
31 | ||
77c44ab1 HW |
32 | #include <pcmcia/cs.h> |
33 | #include <pcmcia/cistpl.h> | |
34 | #include <pcmcia/cisreg.h> | |
35 | #include <pcmcia/ciscode.h> | |
36 | #include <pcmcia/ds.h> | |
37 | ||
38 | #include "cm4040_cs.h" | |
39 | ||
40 | ||
dd2e5a15 | 41 | #define reader_to_dev(x) (&x->p_dev->dev) |
cbf624f0 DB |
42 | |
43 | /* n (debug level) is ignored */ | |
44 | /* additional debug output may be enabled by re-compiling with | |
45 | * CM4040_DEBUG set */ | |
46 | /* #define CM4040_DEBUG */ | |
47 | #define DEBUGP(n, rdr, x, args...) do { \ | |
48 | dev_dbg(reader_to_dev(rdr), "%s:" x, \ | |
49 | __func__ , ## args); \ | |
77c44ab1 | 50 | } while (0) |
77c44ab1 | 51 | |
613655fa | 52 | static DEFINE_MUTEX(cm4040_mutex); |
77c44ab1 | 53 | static char *version = |
67bc6200 | 54 | "OMNIKEY CardMan 4040 v1.1.0gm5 - All bugs added by Harald Welte"; |
77c44ab1 HW |
55 | |
56 | #define CCID_DRIVER_BULK_DEFAULT_TIMEOUT (150*HZ) | |
57 | #define CCID_DRIVER_ASYNC_POWERUP_TIMEOUT (35*HZ) | |
58 | #define CCID_DRIVER_MINIMUM_TIMEOUT (3*HZ) | |
59 | #define READ_WRITE_BUFFER_SIZE 512 | |
60 | #define POLL_LOOP_COUNT 1000 | |
61 | ||
62 | /* how often to poll for fifo status change */ | |
63 | #define POLL_PERIOD msecs_to_jiffies(10) | |
64 | ||
fba395ee | 65 | static void reader_release(struct pcmcia_device *link); |
77c44ab1 HW |
66 | |
67 | static int major; | |
67bc6200 | 68 | static struct class *cmx_class; |
77c44ab1 HW |
69 | |
70 | #define BS_READABLE 0x01 | |
71 | #define BS_WRITABLE 0x02 | |
72 | ||
73 | struct reader_dev { | |
fd238232 | 74 | struct pcmcia_device *p_dev; |
77c44ab1 HW |
75 | wait_queue_head_t devq; |
76 | wait_queue_head_t poll_wait; | |
77 | wait_queue_head_t read_wait; | |
78 | wait_queue_head_t write_wait; | |
79 | unsigned long buffer_status; | |
80 | unsigned long timeout; | |
81 | unsigned char s_buf[READ_WRITE_BUFFER_SIZE]; | |
82 | unsigned char r_buf[READ_WRITE_BUFFER_SIZE]; | |
83 | struct timer_list poll_timer; | |
84 | }; | |
85 | ||
fba395ee | 86 | static struct pcmcia_device *dev_table[CM_MAX_DEV]; |
77c44ab1 | 87 | |
cbf624f0 | 88 | #ifndef CM4040_DEBUG |
77c44ab1 HW |
89 | #define xoutb outb |
90 | #define xinb inb | |
91 | #else | |
92 | static inline void xoutb(unsigned char val, unsigned short port) | |
93 | { | |
cbf624f0 | 94 | pr_debug("outb(val=%.2x,port=%.4x)\n", val, port); |
77c44ab1 HW |
95 | outb(val, port); |
96 | } | |
97 | ||
98 | static inline unsigned char xinb(unsigned short port) | |
99 | { | |
100 | unsigned char val; | |
101 | ||
102 | val = inb(port); | |
cbf624f0 | 103 | pr_debug("%.2x=inb(%.4x)\n", val, port); |
77c44ab1 HW |
104 | return val; |
105 | } | |
106 | #endif | |
107 | ||
108 | /* poll the device fifo status register. not to be confused with | |
109 | * the poll syscall. */ | |
110 | static void cm4040_do_poll(unsigned long dummy) | |
111 | { | |
112 | struct reader_dev *dev = (struct reader_dev *) dummy; | |
9a017a91 | 113 | unsigned int obs = xinb(dev->p_dev->resource[0]->start |
77c44ab1 HW |
114 | + REG_OFFSET_BUFFER_STATUS); |
115 | ||
116 | if ((obs & BSR_BULK_IN_FULL)) { | |
117 | set_bit(BS_READABLE, &dev->buffer_status); | |
118 | DEBUGP(4, dev, "waking up read_wait\n"); | |
119 | wake_up_interruptible(&dev->read_wait); | |
120 | } else | |
121 | clear_bit(BS_READABLE, &dev->buffer_status); | |
122 | ||
123 | if (!(obs & BSR_BULK_OUT_FULL)) { | |
124 | set_bit(BS_WRITABLE, &dev->buffer_status); | |
125 | DEBUGP(4, dev, "waking up write_wait\n"); | |
126 | wake_up_interruptible(&dev->write_wait); | |
127 | } else | |
128 | clear_bit(BS_WRITABLE, &dev->buffer_status); | |
129 | ||
130 | if (dev->buffer_status) | |
131 | wake_up_interruptible(&dev->poll_wait); | |
132 | ||
133 | mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD); | |
134 | } | |
135 | ||
136 | static void cm4040_stop_poll(struct reader_dev *dev) | |
137 | { | |
138 | del_timer_sync(&dev->poll_timer); | |
139 | } | |
140 | ||
141 | static int wait_for_bulk_out_ready(struct reader_dev *dev) | |
142 | { | |
143 | int i, rc; | |
9a017a91 | 144 | int iobase = dev->p_dev->resource[0]->start; |
77c44ab1 HW |
145 | |
146 | for (i = 0; i < POLL_LOOP_COUNT; i++) { | |
147 | if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS) | |
148 | & BSR_BULK_OUT_FULL) == 0) { | |
149 | DEBUGP(4, dev, "BulkOut empty (i=%d)\n", i); | |
150 | return 1; | |
151 | } | |
152 | } | |
153 | ||
154 | DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n", | |
155 | dev->timeout); | |
156 | rc = wait_event_interruptible_timeout(dev->write_wait, | |
157 | test_and_clear_bit(BS_WRITABLE, | |
158 | &dev->buffer_status), | |
159 | dev->timeout); | |
160 | ||
161 | if (rc > 0) | |
162 | DEBUGP(4, dev, "woke up: BulkOut empty\n"); | |
163 | else if (rc == 0) | |
164 | DEBUGP(4, dev, "woke up: BulkOut full, returning 0 :(\n"); | |
165 | else if (rc < 0) | |
166 | DEBUGP(4, dev, "woke up: signal arrived\n"); | |
167 | ||
168 | return rc; | |
169 | } | |
170 | ||
171 | /* Write to Sync Control Register */ | |
172 | static int write_sync_reg(unsigned char val, struct reader_dev *dev) | |
173 | { | |
9a017a91 | 174 | int iobase = dev->p_dev->resource[0]->start; |
77c44ab1 HW |
175 | int rc; |
176 | ||
177 | rc = wait_for_bulk_out_ready(dev); | |
178 | if (rc <= 0) | |
179 | return rc; | |
180 | ||
181 | xoutb(val, iobase + REG_OFFSET_SYNC_CONTROL); | |
182 | rc = wait_for_bulk_out_ready(dev); | |
183 | if (rc <= 0) | |
184 | return rc; | |
185 | ||
186 | return 1; | |
187 | } | |
188 | ||
189 | static int wait_for_bulk_in_ready(struct reader_dev *dev) | |
190 | { | |
191 | int i, rc; | |
9a017a91 | 192 | int iobase = dev->p_dev->resource[0]->start; |
77c44ab1 HW |
193 | |
194 | for (i = 0; i < POLL_LOOP_COUNT; i++) { | |
195 | if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS) | |
196 | & BSR_BULK_IN_FULL) == BSR_BULK_IN_FULL) { | |
197 | DEBUGP(3, dev, "BulkIn full (i=%d)\n", i); | |
198 | return 1; | |
199 | } | |
200 | } | |
201 | ||
202 | DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n", | |
203 | dev->timeout); | |
204 | rc = wait_event_interruptible_timeout(dev->read_wait, | |
205 | test_and_clear_bit(BS_READABLE, | |
206 | &dev->buffer_status), | |
207 | dev->timeout); | |
208 | if (rc > 0) | |
209 | DEBUGP(4, dev, "woke up: BulkIn full\n"); | |
210 | else if (rc == 0) | |
211 | DEBUGP(4, dev, "woke up: BulkIn not full, returning 0 :(\n"); | |
212 | else if (rc < 0) | |
213 | DEBUGP(4, dev, "woke up: signal arrived\n"); | |
214 | ||
215 | return rc; | |
216 | } | |
217 | ||
218 | static ssize_t cm4040_read(struct file *filp, char __user *buf, | |
219 | size_t count, loff_t *ppos) | |
220 | { | |
221 | struct reader_dev *dev = filp->private_data; | |
9a017a91 | 222 | int iobase = dev->p_dev->resource[0]->start; |
77c44ab1 HW |
223 | size_t bytes_to_read; |
224 | unsigned long i; | |
225 | size_t min_bytes_to_read; | |
226 | int rc; | |
227 | unsigned char uc; | |
228 | ||
229 | DEBUGP(2, dev, "-> cm4040_read(%s,%d)\n", current->comm, current->pid); | |
230 | ||
231 | if (count == 0) | |
232 | return 0; | |
233 | ||
234 | if (count < 10) | |
235 | return -EFAULT; | |
236 | ||
237 | if (filp->f_flags & O_NONBLOCK) { | |
238 | DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n"); | |
239 | DEBUGP(2, dev, "<- cm4040_read (failure)\n"); | |
240 | return -EAGAIN; | |
241 | } | |
242 | ||
e2d40963 | 243 | if (!pcmcia_dev_present(dev->p_dev)) |
77c44ab1 HW |
244 | return -ENODEV; |
245 | ||
246 | for (i = 0; i < 5; i++) { | |
247 | rc = wait_for_bulk_in_ready(dev); | |
248 | if (rc <= 0) { | |
249 | DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc); | |
250 | DEBUGP(2, dev, "<- cm4040_read (failed)\n"); | |
251 | if (rc == -ERESTARTSYS) | |
252 | return rc; | |
253 | return -EIO; | |
254 | } | |
255 | dev->r_buf[i] = xinb(iobase + REG_OFFSET_BULK_IN); | |
cbf624f0 DB |
256 | #ifdef CM4040_DEBUG |
257 | pr_debug("%lu:%2x ", i, dev->r_buf[i]); | |
77c44ab1 | 258 | } |
cbf624f0 | 259 | pr_debug("\n"); |
77c44ab1 HW |
260 | #else |
261 | } | |
262 | #endif | |
263 | ||
264 | bytes_to_read = 5 + le32_to_cpu(*(__le32 *)&dev->r_buf[1]); | |
265 | ||
e657ea17 | 266 | DEBUGP(6, dev, "BytesToRead=%zu\n", bytes_to_read); |
77c44ab1 HW |
267 | |
268 | min_bytes_to_read = min(count, bytes_to_read + 5); | |
059819a4 | 269 | min_bytes_to_read = min_t(size_t, min_bytes_to_read, READ_WRITE_BUFFER_SIZE); |
77c44ab1 | 270 | |
e657ea17 | 271 | DEBUGP(6, dev, "Min=%zu\n", min_bytes_to_read); |
77c44ab1 HW |
272 | |
273 | for (i = 0; i < (min_bytes_to_read-5); i++) { | |
274 | rc = wait_for_bulk_in_ready(dev); | |
275 | if (rc <= 0) { | |
276 | DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc); | |
277 | DEBUGP(2, dev, "<- cm4040_read (failed)\n"); | |
278 | if (rc == -ERESTARTSYS) | |
279 | return rc; | |
280 | return -EIO; | |
281 | } | |
282 | dev->r_buf[i+5] = xinb(iobase + REG_OFFSET_BULK_IN); | |
cbf624f0 DB |
283 | #ifdef CM4040_DEBUG |
284 | pr_debug("%lu:%2x ", i, dev->r_buf[i]); | |
77c44ab1 | 285 | } |
cbf624f0 | 286 | pr_debug("\n"); |
77c44ab1 HW |
287 | #else |
288 | } | |
289 | #endif | |
290 | ||
291 | *ppos = min_bytes_to_read; | |
292 | if (copy_to_user(buf, dev->r_buf, min_bytes_to_read)) | |
293 | return -EFAULT; | |
294 | ||
295 | rc = wait_for_bulk_in_ready(dev); | |
296 | if (rc <= 0) { | |
297 | DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc); | |
298 | DEBUGP(2, dev, "<- cm4040_read (failed)\n"); | |
299 | if (rc == -ERESTARTSYS) | |
300 | return rc; | |
301 | return -EIO; | |
302 | } | |
303 | ||
304 | rc = write_sync_reg(SCR_READER_TO_HOST_DONE, dev); | |
305 | if (rc <= 0) { | |
306 | DEBUGP(5, dev, "write_sync_reg c=%.2x\n", rc); | |
307 | DEBUGP(2, dev, "<- cm4040_read (failed)\n"); | |
308 | if (rc == -ERESTARTSYS) | |
309 | return rc; | |
310 | else | |
311 | return -EIO; | |
312 | } | |
313 | ||
314 | uc = xinb(iobase + REG_OFFSET_BULK_IN); | |
315 | ||
316 | DEBUGP(2, dev, "<- cm4040_read (successfully)\n"); | |
317 | return min_bytes_to_read; | |
318 | } | |
319 | ||
320 | static ssize_t cm4040_write(struct file *filp, const char __user *buf, | |
321 | size_t count, loff_t *ppos) | |
322 | { | |
323 | struct reader_dev *dev = filp->private_data; | |
9a017a91 | 324 | int iobase = dev->p_dev->resource[0]->start; |
77c44ab1 HW |
325 | ssize_t rc; |
326 | int i; | |
327 | unsigned int bytes_to_write; | |
328 | ||
329 | DEBUGP(2, dev, "-> cm4040_write(%s,%d)\n", current->comm, current->pid); | |
330 | ||
331 | if (count == 0) { | |
332 | DEBUGP(2, dev, "<- cm4040_write empty read (successfully)\n"); | |
333 | return 0; | |
334 | } | |
335 | ||
059819a4 | 336 | if ((count < 5) || (count > READ_WRITE_BUFFER_SIZE)) { |
77c44ab1 HW |
337 | DEBUGP(2, dev, "<- cm4040_write buffersize=%Zd < 5\n", count); |
338 | return -EIO; | |
339 | } | |
340 | ||
341 | if (filp->f_flags & O_NONBLOCK) { | |
342 | DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n"); | |
343 | DEBUGP(4, dev, "<- cm4040_write (failure)\n"); | |
344 | return -EAGAIN; | |
345 | } | |
346 | ||
e2d40963 | 347 | if (!pcmcia_dev_present(dev->p_dev)) |
77c44ab1 HW |
348 | return -ENODEV; |
349 | ||
350 | bytes_to_write = count; | |
351 | if (copy_from_user(dev->s_buf, buf, bytes_to_write)) | |
352 | return -EFAULT; | |
353 | ||
354 | switch (dev->s_buf[0]) { | |
355 | case CMD_PC_TO_RDR_XFRBLOCK: | |
356 | case CMD_PC_TO_RDR_SECURE: | |
357 | case CMD_PC_TO_RDR_TEST_SECURE: | |
358 | case CMD_PC_TO_RDR_OK_SECURE: | |
359 | dev->timeout = CCID_DRIVER_BULK_DEFAULT_TIMEOUT; | |
360 | break; | |
361 | ||
362 | case CMD_PC_TO_RDR_ICCPOWERON: | |
363 | dev->timeout = CCID_DRIVER_ASYNC_POWERUP_TIMEOUT; | |
364 | break; | |
365 | ||
366 | case CMD_PC_TO_RDR_GETSLOTSTATUS: | |
367 | case CMD_PC_TO_RDR_ICCPOWEROFF: | |
368 | case CMD_PC_TO_RDR_GETPARAMETERS: | |
369 | case CMD_PC_TO_RDR_RESETPARAMETERS: | |
370 | case CMD_PC_TO_RDR_SETPARAMETERS: | |
371 | case CMD_PC_TO_RDR_ESCAPE: | |
372 | case CMD_PC_TO_RDR_ICCCLOCK: | |
373 | default: | |
374 | dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT; | |
375 | break; | |
376 | } | |
377 | ||
378 | rc = write_sync_reg(SCR_HOST_TO_READER_START, dev); | |
379 | if (rc <= 0) { | |
380 | DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc); | |
381 | DEBUGP(2, dev, "<- cm4040_write (failed)\n"); | |
382 | if (rc == -ERESTARTSYS) | |
383 | return rc; | |
384 | else | |
385 | return -EIO; | |
386 | } | |
387 | ||
388 | DEBUGP(4, dev, "start \n"); | |
389 | ||
390 | for (i = 0; i < bytes_to_write; i++) { | |
391 | rc = wait_for_bulk_out_ready(dev); | |
392 | if (rc <= 0) { | |
393 | DEBUGP(5, dev, "wait_for_bulk_out_ready rc=%.2Zx\n", | |
394 | rc); | |
395 | DEBUGP(2, dev, "<- cm4040_write (failed)\n"); | |
396 | if (rc == -ERESTARTSYS) | |
397 | return rc; | |
398 | else | |
399 | return -EIO; | |
400 | } | |
401 | ||
402 | xoutb(dev->s_buf[i],iobase + REG_OFFSET_BULK_OUT); | |
403 | } | |
404 | DEBUGP(4, dev, "end\n"); | |
405 | ||
406 | rc = write_sync_reg(SCR_HOST_TO_READER_DONE, dev); | |
407 | ||
408 | if (rc <= 0) { | |
409 | DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc); | |
410 | DEBUGP(2, dev, "<- cm4040_write (failed)\n"); | |
411 | if (rc == -ERESTARTSYS) | |
412 | return rc; | |
413 | else | |
414 | return -EIO; | |
415 | } | |
416 | ||
417 | DEBUGP(2, dev, "<- cm4040_write (successfully)\n"); | |
418 | return count; | |
419 | } | |
420 | ||
421 | static unsigned int cm4040_poll(struct file *filp, poll_table *wait) | |
422 | { | |
423 | struct reader_dev *dev = filp->private_data; | |
424 | unsigned int mask = 0; | |
425 | ||
426 | poll_wait(filp, &dev->poll_wait, wait); | |
427 | ||
428 | if (test_and_clear_bit(BS_READABLE, &dev->buffer_status)) | |
429 | mask |= POLLIN | POLLRDNORM; | |
430 | if (test_and_clear_bit(BS_WRITABLE, &dev->buffer_status)) | |
431 | mask |= POLLOUT | POLLWRNORM; | |
432 | ||
433 | DEBUGP(2, dev, "<- cm4040_poll(%u)\n", mask); | |
434 | ||
435 | return mask; | |
436 | } | |
437 | ||
438 | static int cm4040_open(struct inode *inode, struct file *filp) | |
439 | { | |
440 | struct reader_dev *dev; | |
fba395ee | 441 | struct pcmcia_device *link; |
77c44ab1 | 442 | int minor = iminor(inode); |
8b5332f6 | 443 | int ret; |
77c44ab1 HW |
444 | |
445 | if (minor >= CM_MAX_DEV) | |
446 | return -ENODEV; | |
447 | ||
613655fa | 448 | mutex_lock(&cm4040_mutex); |
77c44ab1 | 449 | link = dev_table[minor]; |
8b5332f6 JC |
450 | if (link == NULL || !pcmcia_dev_present(link)) { |
451 | ret = -ENODEV; | |
452 | goto out; | |
453 | } | |
77c44ab1 | 454 | |
8b5332f6 JC |
455 | if (link->open) { |
456 | ret = -EBUSY; | |
457 | goto out; | |
458 | } | |
77c44ab1 HW |
459 | |
460 | dev = link->priv; | |
461 | filp->private_data = dev; | |
462 | ||
463 | if (filp->f_flags & O_NONBLOCK) { | |
464 | DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n"); | |
8b5332f6 JC |
465 | ret = -EAGAIN; |
466 | goto out; | |
77c44ab1 HW |
467 | } |
468 | ||
469 | link->open = 1; | |
470 | ||
471 | dev->poll_timer.data = (unsigned long) dev; | |
472 | mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD); | |
473 | ||
474 | DEBUGP(2, dev, "<- cm4040_open (successfully)\n"); | |
8b5332f6 JC |
475 | ret = nonseekable_open(inode, filp); |
476 | out: | |
613655fa | 477 | mutex_unlock(&cm4040_mutex); |
8b5332f6 | 478 | return ret; |
77c44ab1 HW |
479 | } |
480 | ||
481 | static int cm4040_close(struct inode *inode, struct file *filp) | |
482 | { | |
483 | struct reader_dev *dev = filp->private_data; | |
fba395ee | 484 | struct pcmcia_device *link; |
77c44ab1 HW |
485 | int minor = iminor(inode); |
486 | ||
487 | DEBUGP(2, dev, "-> cm4040_close(maj/min=%d.%d)\n", imajor(inode), | |
488 | iminor(inode)); | |
489 | ||
490 | if (minor >= CM_MAX_DEV) | |
491 | return -ENODEV; | |
492 | ||
493 | link = dev_table[minor]; | |
494 | if (link == NULL) | |
495 | return -ENODEV; | |
496 | ||
497 | cm4040_stop_poll(dev); | |
498 | ||
499 | link->open = 0; | |
500 | wake_up(&dev->devq); | |
501 | ||
502 | DEBUGP(2, dev, "<- cm4040_close\n"); | |
503 | return 0; | |
504 | } | |
505 | ||
fba395ee | 506 | static void cm4040_reader_release(struct pcmcia_device *link) |
77c44ab1 HW |
507 | { |
508 | struct reader_dev *dev = link->priv; | |
509 | ||
510 | DEBUGP(3, dev, "-> cm4040_reader_release\n"); | |
511 | while (link->open) { | |
512 | DEBUGP(3, dev, KERN_INFO MODULE_NAME ": delaying release " | |
513 | "until process has terminated\n"); | |
514 | wait_event(dev->devq, (link->open == 0)); | |
515 | } | |
516 | DEBUGP(3, dev, "<- cm4040_reader_release\n"); | |
517 | return; | |
518 | } | |
519 | ||
84e2d340 DB |
520 | static int cm4040_config_check(struct pcmcia_device *p_dev, |
521 | cistpl_cftable_entry_t *cfg, | |
8e2fc39d | 522 | cistpl_cftable_entry_t *dflt, |
ad913c11 | 523 | unsigned int vcc, |
84e2d340 | 524 | void *priv_data) |
77c44ab1 | 525 | { |
77c44ab1 | 526 | int rc; |
84e2d340 DB |
527 | if (!cfg->io.nwin) |
528 | return -ENODEV; | |
77c44ab1 | 529 | |
84e2d340 | 530 | /* Get the IOaddr */ |
90abdc3b DB |
531 | p_dev->resource[0]->start = cfg->io.win[0].base; |
532 | p_dev->resource[0]->end = cfg->io.win[0].len; | |
533 | p_dev->resource[0]->flags |= pcmcia_io_cfg_data_width(cfg->io.flags); | |
534 | p_dev->io_lines = cfg->io.flags & CISTPL_IO_LINES_MASK; | |
535 | rc = pcmcia_request_io(p_dev); | |
536 | ||
dd2e5a15 | 537 | dev_printk(KERN_INFO, &p_dev->dev, |
84e2d340 DB |
538 | "pcmcia_request_io returned 0x%x\n", rc); |
539 | return rc; | |
540 | } | |
541 | ||
542 | ||
543 | static int reader_config(struct pcmcia_device *link, int devno) | |
544 | { | |
545 | struct reader_dev *dev; | |
546 | int fail_rc; | |
77c44ab1 | 547 | |
84e2d340 | 548 | if (pcmcia_loop_config(link, cm4040_config_check, NULL)) |
77c44ab1 HW |
549 | goto cs_release; |
550 | ||
551 | link->conf.IntType = 00000002; | |
552 | ||
4c89e88b DB |
553 | fail_rc = pcmcia_request_configuration(link, &link->conf); |
554 | if (fail_rc != 0) { | |
dd2e5a15 | 555 | dev_printk(KERN_INFO, &link->dev, |
77c44ab1 HW |
556 | "pcmcia_request_configuration failed 0x%x\n", |
557 | fail_rc); | |
558 | goto cs_release; | |
559 | } | |
560 | ||
561 | dev = link->priv; | |
77c44ab1 | 562 | |
9a017a91 DB |
563 | DEBUGP(2, dev, "device " DEVICE_NAME "%d at %pR\n", devno, |
564 | link->resource[0]); | |
77c44ab1 HW |
565 | DEBUGP(2, dev, "<- reader_config (succ)\n"); |
566 | ||
15b99ac1 | 567 | return 0; |
77c44ab1 | 568 | |
77c44ab1 HW |
569 | cs_release: |
570 | reader_release(link); | |
15b99ac1 | 571 | return -ENODEV; |
77c44ab1 HW |
572 | } |
573 | ||
fba395ee | 574 | static void reader_release(struct pcmcia_device *link) |
77c44ab1 | 575 | { |
925796e0 | 576 | cm4040_reader_release(link); |
fba395ee | 577 | pcmcia_disable_device(link); |
77c44ab1 HW |
578 | } |
579 | ||
15b99ac1 | 580 | static int reader_probe(struct pcmcia_device *link) |
77c44ab1 HW |
581 | { |
582 | struct reader_dev *dev; | |
15b99ac1 | 583 | int i, ret; |
77c44ab1 HW |
584 | |
585 | for (i = 0; i < CM_MAX_DEV; i++) { | |
586 | if (dev_table[i] == NULL) | |
587 | break; | |
588 | } | |
589 | ||
590 | if (i == CM_MAX_DEV) | |
f8cfa618 | 591 | return -ENODEV; |
77c44ab1 HW |
592 | |
593 | dev = kzalloc(sizeof(struct reader_dev), GFP_KERNEL); | |
594 | if (dev == NULL) | |
f8cfa618 | 595 | return -ENOMEM; |
77c44ab1 HW |
596 | |
597 | dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT; | |
598 | dev->buffer_status = 0; | |
599 | ||
77c44ab1 | 600 | link->priv = dev; |
fba395ee | 601 | dev->p_dev = link; |
77c44ab1 HW |
602 | |
603 | link->conf.IntType = INT_MEMORY_AND_IO; | |
604 | dev_table[i] = link; | |
605 | ||
77c44ab1 HW |
606 | init_waitqueue_head(&dev->devq); |
607 | init_waitqueue_head(&dev->poll_wait); | |
608 | init_waitqueue_head(&dev->read_wait); | |
609 | init_waitqueue_head(&dev->write_wait); | |
40565f19 | 610 | setup_timer(&dev->poll_timer, cm4040_do_poll, 0); |
77c44ab1 | 611 | |
15b99ac1 | 612 | ret = reader_config(link, i); |
54493c10 AM |
613 | if (ret) { |
614 | dev_table[i] = NULL; | |
615 | kfree(dev); | |
15b99ac1 | 616 | return ret; |
54493c10 | 617 | } |
f8cfa618 | 618 | |
03457cd4 | 619 | device_create(cmx_class, NULL, MKDEV(major, i), NULL, "cmx%d", i); |
67bc6200 | 620 | |
f8cfa618 | 621 | return 0; |
77c44ab1 HW |
622 | } |
623 | ||
fba395ee | 624 | static void reader_detach(struct pcmcia_device *link) |
77c44ab1 HW |
625 | { |
626 | struct reader_dev *dev = link->priv; | |
cc3b4866 | 627 | int devno; |
77c44ab1 HW |
628 | |
629 | /* find device */ | |
cc3b4866 DB |
630 | for (devno = 0; devno < CM_MAX_DEV; devno++) { |
631 | if (dev_table[devno] == link) | |
77c44ab1 HW |
632 | break; |
633 | } | |
cc3b4866 | 634 | if (devno == CM_MAX_DEV) |
77c44ab1 HW |
635 | return; |
636 | ||
e2d40963 | 637 | reader_release(link); |
cc3b4866 DB |
638 | |
639 | dev_table[devno] = NULL; | |
640 | kfree(dev); | |
641 | ||
07c015e7 | 642 | device_destroy(cmx_class, MKDEV(major, devno)); |
67bc6200 | 643 | |
77c44ab1 HW |
644 | return; |
645 | } | |
646 | ||
62322d25 | 647 | static const struct file_operations reader_fops = { |
77c44ab1 HW |
648 | .owner = THIS_MODULE, |
649 | .read = cm4040_read, | |
650 | .write = cm4040_write, | |
651 | .open = cm4040_open, | |
652 | .release = cm4040_close, | |
653 | .poll = cm4040_poll, | |
654 | }; | |
655 | ||
656 | static struct pcmcia_device_id cm4040_ids[] = { | |
657 | PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0200), | |
658 | PCMCIA_DEVICE_PROD_ID12("OMNIKEY", "CardMan 4040", | |
659 | 0xE32CDD8C, 0x8F23318B), | |
660 | PCMCIA_DEVICE_NULL, | |
661 | }; | |
662 | MODULE_DEVICE_TABLE(pcmcia, cm4040_ids); | |
663 | ||
664 | static struct pcmcia_driver reader_driver = { | |
665 | .owner = THIS_MODULE, | |
666 | .drv = { | |
667 | .name = "cm4040_cs", | |
668 | }, | |
15b99ac1 | 669 | .probe = reader_probe, |
cc3b4866 | 670 | .remove = reader_detach, |
77c44ab1 HW |
671 | .id_table = cm4040_ids, |
672 | }; | |
673 | ||
674 | static int __init cm4040_init(void) | |
675 | { | |
67bc6200 HW |
676 | int rc; |
677 | ||
77c44ab1 | 678 | printk(KERN_INFO "%s\n", version); |
67bc6200 | 679 | cmx_class = class_create(THIS_MODULE, "cardman_4040"); |
5eb5fc97 AM |
680 | if (IS_ERR(cmx_class)) |
681 | return PTR_ERR(cmx_class); | |
67bc6200 | 682 | |
77c44ab1 HW |
683 | major = register_chrdev(0, DEVICE_NAME, &reader_fops); |
684 | if (major < 0) { | |
685 | printk(KERN_WARNING MODULE_NAME | |
686 | ": could not get major number\n"); | |
54493c10 | 687 | class_destroy(cmx_class); |
5eb5fc97 | 688 | return major; |
77c44ab1 | 689 | } |
7fc5b1e3 HW |
690 | |
691 | rc = pcmcia_register_driver(&reader_driver); | |
692 | if (rc < 0) { | |
693 | unregister_chrdev(major, DEVICE_NAME); | |
54493c10 | 694 | class_destroy(cmx_class); |
7fc5b1e3 HW |
695 | return rc; |
696 | } | |
697 | ||
77c44ab1 HW |
698 | return 0; |
699 | } | |
700 | ||
701 | static void __exit cm4040_exit(void) | |
702 | { | |
77c44ab1 HW |
703 | printk(KERN_INFO MODULE_NAME ": unloading\n"); |
704 | pcmcia_unregister_driver(&reader_driver); | |
77c44ab1 | 705 | unregister_chrdev(major, DEVICE_NAME); |
67bc6200 | 706 | class_destroy(cmx_class); |
77c44ab1 HW |
707 | } |
708 | ||
709 | module_init(cm4040_init); | |
710 | module_exit(cm4040_exit); | |
711 | MODULE_LICENSE("Dual BSD/GPL"); |