Commit | Line | Data |
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681a3e7d JC |
1 | /* linux/drivers/char/pc8736x_gpio.c |
2 | ||
3 | National Semiconductor PC8736x GPIO driver. Allows a user space | |
4 | process to play with the GPIO pins. | |
5 | ||
6 | Copyright (c) 2005 Jim Cromie <jim.cromie@gmail.com> | |
7 | ||
8 | adapted from linux/drivers/char/scx200_gpio.c | |
9 | Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>, | |
10 | */ | |
11 | ||
12 | #include <linux/config.h> | |
13 | #include <linux/fs.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/errno.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/ioport.h> | |
19 | #include <linux/nsc_gpio.h> | |
20 | #include <asm/uaccess.h> | |
21 | #include <asm/io.h> | |
22 | ||
23 | #define NAME "pc8736x_gpio" | |
24 | ||
25 | MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>"); | |
26 | MODULE_DESCRIPTION("NatSemi SCx200 GPIO Pin Driver"); | |
27 | MODULE_LICENSE("GPL"); | |
28 | ||
29 | static int major; /* default to dynamic major */ | |
30 | module_param(major, int, 0); | |
31 | MODULE_PARM_DESC(major, "Major device number"); | |
32 | ||
33 | static DEFINE_SPINLOCK(pc8736x_gpio_config_lock); | |
34 | static unsigned pc8736x_gpio_base; | |
35 | ||
36 | #define SIO_BASE1 0x2E /* 1st command-reg to check */ | |
37 | #define SIO_BASE2 0x4E /* alt command-reg to check */ | |
38 | #define SIO_BASE_OFFSET 0x20 | |
39 | ||
40 | #define SIO_SID 0x20 /* SuperI/O ID Register */ | |
41 | #define SIO_SID_VALUE 0xe9 /* Expected value in SuperI/O ID Register */ | |
42 | ||
43 | #define SIO_CF1 0x21 /* chip config, bit0 is chip enable */ | |
44 | ||
45 | #define SIO_UNIT_SEL 0x7 /* unit select reg */ | |
46 | #define SIO_UNIT_ACT 0x30 /* unit enable */ | |
47 | #define SIO_GPIO_UNIT 0x7 /* unit number of GPIO */ | |
48 | #define SIO_VLM_UNIT 0x0D | |
49 | #define SIO_TMS_UNIT 0x0E | |
50 | ||
51 | /* config-space addrs to read/write each unit's runtime addr */ | |
52 | #define SIO_BASE_HADDR 0x60 | |
53 | #define SIO_BASE_LADDR 0x61 | |
54 | ||
55 | /* GPIO config-space pin-control addresses */ | |
56 | #define SIO_GPIO_PIN_SELECT 0xF0 | |
57 | #define SIO_GPIO_PIN_CONFIG 0xF1 | |
58 | #define SIO_GPIO_PIN_EVENT 0xF2 | |
59 | ||
60 | static unsigned char superio_cmd = 0; | |
61 | static unsigned char selected_device = 0xFF; /* bogus start val */ | |
62 | ||
63 | /* GPIO port runtime access, functionality */ | |
64 | static int port_offset[] = { 0, 4, 8, 10 }; /* non-uniform offsets ! */ | |
65 | /* static int event_capable[] = { 1, 1, 0, 0 }; ports 2,3 are hobbled */ | |
66 | ||
67 | #define PORT_OUT 0 | |
68 | #define PORT_IN 1 | |
69 | #define PORT_EVT_EN 2 | |
70 | #define PORT_EVT_STST 3 | |
71 | ||
72 | static inline void superio_outb(int addr, int val) | |
73 | { | |
74 | outb_p(addr, superio_cmd); | |
75 | outb_p(val, superio_cmd + 1); | |
76 | } | |
77 | ||
78 | static inline int superio_inb(int addr) | |
79 | { | |
80 | outb_p(addr, superio_cmd); | |
81 | return inb_p(superio_cmd + 1); | |
82 | } | |
83 | ||
84 | static int pc8736x_superio_present(void) | |
85 | { | |
86 | /* try the 2 possible values, read a hardware reg to verify */ | |
87 | superio_cmd = SIO_BASE1; | |
88 | if (superio_inb(SIO_SID) == SIO_SID_VALUE) | |
89 | return superio_cmd; | |
90 | ||
91 | superio_cmd = SIO_BASE2; | |
92 | if (superio_inb(SIO_SID) == SIO_SID_VALUE) | |
93 | return superio_cmd; | |
94 | ||
95 | return 0; | |
96 | } | |
97 | ||
98 | static void device_select(unsigned devldn) | |
99 | { | |
100 | superio_outb(SIO_UNIT_SEL, devldn); | |
101 | selected_device = devldn; | |
102 | } | |
103 | ||
104 | static void select_pin(unsigned iminor) | |
105 | { | |
106 | /* select GPIO port/pin from device minor number */ | |
107 | device_select(SIO_GPIO_UNIT); | |
108 | superio_outb(SIO_GPIO_PIN_SELECT, | |
109 | ((iminor << 1) & 0xF0) | (iminor & 0x7)); | |
110 | } | |
111 | ||
112 | static inline u32 pc8736x_gpio_configure_fn(unsigned index, u32 mask, u32 bits, | |
113 | u32 func_slct) | |
114 | { | |
115 | u32 config, new_config; | |
116 | unsigned long flags; | |
117 | ||
118 | spin_lock_irqsave(&pc8736x_gpio_config_lock, flags); | |
119 | ||
120 | device_select(SIO_GPIO_UNIT); | |
121 | select_pin(index); | |
122 | ||
123 | /* read current config value */ | |
124 | config = superio_inb(func_slct); | |
125 | ||
126 | /* set new config */ | |
127 | new_config = (config & mask) | bits; | |
128 | superio_outb(func_slct, new_config); | |
129 | ||
130 | spin_unlock_irqrestore(&pc8736x_gpio_config_lock, flags); | |
131 | ||
132 | return config; | |
133 | } | |
134 | ||
135 | static u32 pc8736x_gpio_configure(unsigned index, u32 mask, u32 bits) | |
136 | { | |
137 | return pc8736x_gpio_configure_fn(index, mask, bits, | |
138 | SIO_GPIO_PIN_CONFIG); | |
139 | } | |
140 | ||
141 | static int pc8736x_gpio_get(unsigned minor) | |
142 | { | |
143 | int port, bit, val; | |
144 | ||
145 | port = minor >> 3; | |
146 | bit = minor & 7; | |
147 | val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN); | |
148 | val >>= bit; | |
149 | val &= 1; | |
150 | ||
151 | printk(KERN_INFO NAME ": _gpio_get(%d from %x bit %d) == val %d\n", | |
152 | minor, pc8736x_gpio_base + port_offset[port] + PORT_IN, bit, | |
153 | val); | |
154 | ||
155 | return val; | |
156 | } | |
157 | ||
158 | static void pc8736x_gpio_set(unsigned minor, int val) | |
159 | { | |
160 | int port, bit, curval; | |
161 | ||
162 | minor &= 0x1f; | |
163 | port = minor >> 3; | |
164 | bit = minor & 7; | |
165 | curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT); | |
166 | ||
167 | printk(KERN_INFO NAME | |
168 | ": addr:%x cur:%x bit-pos:%d cur-bit:%x + new:%d -> bit-new:%d\n", | |
169 | pc8736x_gpio_base + port_offset[port] + PORT_OUT, | |
170 | curval, bit, (curval & ~(1 << bit)), val, (val << bit)); | |
171 | ||
172 | val = (curval & ~(1 << bit)) | (val << bit); | |
173 | ||
174 | printk(KERN_INFO NAME ": gpio_set(minor:%d port:%d bit:%d" | |
175 | ") %2x -> %2x\n", minor, port, bit, curval, val); | |
176 | ||
177 | outb_p(val, pc8736x_gpio_base + port_offset[port] + PORT_OUT); | |
178 | ||
179 | curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT); | |
180 | val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN); | |
181 | ||
182 | printk(KERN_INFO NAME ": wrote %x, read: %x\n", curval, val); | |
183 | } | |
184 | ||
185 | static void pc8736x_gpio_set_high(unsigned index) | |
186 | { | |
187 | pc8736x_gpio_set(index, 1); | |
188 | } | |
189 | ||
190 | static void pc8736x_gpio_set_low(unsigned index) | |
191 | { | |
192 | pc8736x_gpio_set(index, 0); | |
193 | } | |
194 | ||
195 | static int pc8736x_gpio_current(unsigned index) | |
196 | { | |
197 | printk(KERN_WARNING NAME ": pc8736x_gpio_current unimplemented\n"); | |
198 | return 0; | |
199 | } | |
200 | ||
201 | static void pc8736x_gpio_change(unsigned index) | |
202 | { | |
203 | pc8736x_gpio_set(index, !pc8736x_gpio_get(index)); | |
204 | } | |
205 | ||
206 | extern void nsc_gpio_dump(unsigned iminor); | |
207 | ||
208 | static struct nsc_gpio_ops pc8736x_access = { | |
209 | .owner = THIS_MODULE, | |
210 | .gpio_config = pc8736x_gpio_configure, | |
211 | .gpio_dump = nsc_gpio_dump, | |
212 | .gpio_get = pc8736x_gpio_get, | |
213 | .gpio_set = pc8736x_gpio_set, | |
214 | .gpio_set_high = pc8736x_gpio_set_high, | |
215 | .gpio_set_low = pc8736x_gpio_set_low, | |
216 | .gpio_change = pc8736x_gpio_change, | |
217 | .gpio_current = pc8736x_gpio_current | |
218 | }; | |
219 | ||
220 | static int pc8736x_gpio_open(struct inode *inode, struct file *file) | |
221 | { | |
222 | unsigned m = iminor(inode); | |
223 | file->private_data = &pc8736x_access; | |
224 | ||
225 | printk(KERN_NOTICE NAME " open %d\n", m); | |
226 | ||
227 | if (m > 63) | |
228 | return -EINVAL; | |
229 | return nonseekable_open(inode, file); | |
230 | } | |
231 | ||
232 | static struct file_operations pc8736x_gpio_fops = { | |
233 | .owner = THIS_MODULE, | |
234 | .open = pc8736x_gpio_open, | |
235 | .write = nsc_gpio_write, | |
236 | .read = nsc_gpio_read, | |
237 | }; | |
238 | ||
239 | static int __init pc8736x_gpio_init(void) | |
240 | { | |
241 | int r, rc; | |
242 | ||
243 | printk(KERN_DEBUG NAME " initializing\n"); | |
244 | ||
245 | if (!pc8736x_superio_present()) { | |
246 | printk(KERN_ERR NAME ": no device found\n"); | |
247 | return -ENODEV; | |
248 | } | |
249 | ||
250 | /* Verify that chip and it's GPIO unit are both enabled. | |
251 | My BIOS does this, so I take minimum action here | |
252 | */ | |
253 | rc = superio_inb(SIO_CF1); | |
254 | if (!(rc & 0x01)) { | |
255 | printk(KERN_ERR NAME ": device not enabled\n"); | |
256 | return -ENODEV; | |
257 | } | |
258 | device_select(SIO_GPIO_UNIT); | |
259 | if (!superio_inb(SIO_UNIT_ACT)) { | |
260 | printk(KERN_ERR NAME ": GPIO unit not enabled\n"); | |
261 | return -ENODEV; | |
262 | } | |
263 | ||
264 | /* read GPIO unit base address */ | |
265 | pc8736x_gpio_base = (superio_inb(SIO_BASE_HADDR) << 8 | |
266 | | superio_inb(SIO_BASE_LADDR)); | |
267 | ||
268 | if (request_region(pc8736x_gpio_base, 16, NAME)) | |
269 | printk(KERN_INFO NAME ": GPIO ioport %x reserved\n", | |
270 | pc8736x_gpio_base); | |
271 | ||
272 | r = register_chrdev(major, NAME, &pc8736x_gpio_fops); | |
273 | if (r < 0) { | |
274 | printk(KERN_ERR NAME ": unable to register character device\n"); | |
275 | return r; | |
276 | } | |
277 | if (!major) { | |
278 | major = r; | |
279 | printk(KERN_DEBUG NAME ": got dynamic major %d\n", major); | |
280 | } | |
281 | ||
282 | pc8736x_init_shadow(); | |
283 | return 0; | |
284 | } | |
285 | ||
286 | static void __exit pc8736x_gpio_cleanup(void) | |
287 | { | |
288 | printk(KERN_DEBUG NAME " cleanup\n"); | |
289 | ||
290 | release_region(pc8736x_gpio_base, 16); | |
291 | ||
292 | unregister_chrdev(major, NAME); | |
293 | } | |
294 | ||
295 | module_init(pc8736x_gpio_init); | |
296 | module_exit(pc8736x_gpio_cleanup); |