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1da177e4 LT |
1 | /* |
2 | * Flash memory interface rev.5 driver for the Intel | |
3 | * Flash chips used on the NetWinder. | |
4 | * | |
5 | * 20/08/2000 RMK use __ioremap to map flash into virtual memory | |
6 | * make a few more places use "volatile" | |
7 | * 22/05/2001 RMK - Lock read against write | |
8 | * - merge printk level changes (with mods) from Alan Cox. | |
9 | * - use *ppos as the file position, not file->f_pos. | |
10 | * - fix check for out of range pos and r/w size | |
11 | * | |
12 | * Please note that we are tampering with the only flash chip in the | |
13 | * machine, which contains the bootup code. We therefore have the | |
14 | * power to convert these machines into doorstops... | |
15 | */ | |
16 | ||
17 | #include <linux/module.h> | |
18 | #include <linux/types.h> | |
19 | #include <linux/fs.h> | |
20 | #include <linux/errno.h> | |
21 | #include <linux/mm.h> | |
22 | #include <linux/delay.h> | |
23 | #include <linux/proc_fs.h> | |
1da177e4 LT |
24 | #include <linux/miscdevice.h> |
25 | #include <linux/spinlock.h> | |
26 | #include <linux/rwsem.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/smp_lock.h> | |
6f87f0de | 29 | #include <linux/mutex.h> |
1da177e4 LT |
30 | |
31 | #include <asm/hardware/dec21285.h> | |
32 | #include <asm/io.h> | |
33 | #include <asm/leds.h> | |
34 | #include <asm/mach-types.h> | |
35 | #include <asm/system.h> | |
36 | #include <asm/uaccess.h> | |
37 | ||
38 | /*****************************************************************************/ | |
39 | #include <asm/nwflash.h> | |
40 | ||
41 | #define NWFLASH_VERSION "6.4" | |
42 | ||
43 | static void kick_open(void); | |
44 | static int get_flash_id(void); | |
45 | static int erase_block(int nBlock); | |
46 | static int write_block(unsigned long p, const char __user *buf, int count); | |
47 | ||
48 | #define KFLASH_SIZE 1024*1024 //1 Meg | |
49 | #define KFLASH_SIZE4 4*1024*1024 //4 Meg | |
50 | #define KFLASH_ID 0x89A6 //Intel flash | |
51 | #define KFLASH_ID4 0xB0D4 //Intel flash 4Meg | |
52 | ||
53 | static int flashdebug; //if set - we will display progress msgs | |
54 | ||
55 | static int gbWriteEnable; | |
56 | static int gbWriteBase64Enable; | |
57 | static volatile unsigned char *FLASH_BASE; | |
58 | static int gbFlashSize = KFLASH_SIZE; | |
6f87f0de | 59 | static DEFINE_MUTEX(nwflash_mutex); |
1da177e4 LT |
60 | |
61 | extern spinlock_t gpio_lock; | |
62 | ||
63 | static int get_flash_id(void) | |
64 | { | |
65 | volatile unsigned int c1, c2; | |
66 | ||
67 | /* | |
68 | * try to get flash chip ID | |
69 | */ | |
70 | kick_open(); | |
71 | c2 = inb(0x80); | |
72 | *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x90; | |
73 | udelay(15); | |
74 | c1 = *(volatile unsigned char *) FLASH_BASE; | |
75 | c2 = inb(0x80); | |
76 | ||
77 | /* | |
78 | * on 4 Meg flash the second byte is actually at offset 2... | |
79 | */ | |
80 | if (c1 == 0xB0) | |
81 | c2 = *(volatile unsigned char *) (FLASH_BASE + 2); | |
82 | else | |
83 | c2 = *(volatile unsigned char *) (FLASH_BASE + 1); | |
84 | ||
85 | c2 += (c1 << 8); | |
86 | ||
87 | /* | |
88 | * set it back to read mode | |
89 | */ | |
90 | *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF; | |
91 | ||
92 | if (c2 == KFLASH_ID4) | |
93 | gbFlashSize = KFLASH_SIZE4; | |
94 | ||
95 | return c2; | |
96 | } | |
97 | ||
98 | static int flash_ioctl(struct inode *inodep, struct file *filep, unsigned int cmd, unsigned long arg) | |
99 | { | |
100 | switch (cmd) { | |
101 | case CMD_WRITE_DISABLE: | |
102 | gbWriteBase64Enable = 0; | |
103 | gbWriteEnable = 0; | |
104 | break; | |
105 | ||
106 | case CMD_WRITE_ENABLE: | |
107 | gbWriteEnable = 1; | |
108 | break; | |
109 | ||
110 | case CMD_WRITE_BASE64K_ENABLE: | |
111 | gbWriteBase64Enable = 1; | |
112 | break; | |
113 | ||
114 | default: | |
115 | gbWriteBase64Enable = 0; | |
116 | gbWriteEnable = 0; | |
117 | return -EINVAL; | |
118 | } | |
119 | return 0; | |
120 | } | |
121 | ||
122 | static ssize_t flash_read(struct file *file, char __user *buf, size_t size, | |
123 | loff_t *ppos) | |
124 | { | |
6ee8928d | 125 | ssize_t ret; |
1da177e4 LT |
126 | |
127 | if (flashdebug) | |
4ef584ba RK |
128 | printk(KERN_DEBUG "flash_read: flash_read: offset=0x%llx, " |
129 | "buffer=%p, count=0x%zx.\n", *ppos, buf, size); | |
6ee8928d AM |
130 | /* |
131 | * We now lock against reads and writes. --rmk | |
132 | */ | |
133 | if (mutex_lock_interruptible(&nwflash_mutex)) | |
134 | return -ERESTARTSYS; | |
135 | ||
4ef584ba | 136 | ret = simple_read_from_buffer(buf, size, ppos, (void *)FLASH_BASE, gbFlashSize); |
6ee8928d | 137 | mutex_unlock(&nwflash_mutex); |
1da177e4 | 138 | |
1da177e4 LT |
139 | return ret; |
140 | } | |
141 | ||
142 | static ssize_t flash_write(struct file *file, const char __user *buf, | |
143 | size_t size, loff_t * ppos) | |
144 | { | |
145 | unsigned long p = *ppos; | |
146 | unsigned int count = size; | |
147 | int written; | |
148 | int nBlock, temp, rc; | |
149 | int i, j; | |
150 | ||
151 | if (flashdebug) | |
152 | printk("flash_write: offset=0x%lX, buffer=0x%p, count=0x%X.\n", | |
153 | p, buf, count); | |
154 | ||
155 | if (!gbWriteEnable) | |
156 | return -EINVAL; | |
157 | ||
158 | if (p < 64 * 1024 && (!gbWriteBase64Enable)) | |
159 | return -EINVAL; | |
160 | ||
161 | /* | |
162 | * check for out of range pos or count | |
163 | */ | |
164 | if (p >= gbFlashSize) | |
165 | return count ? -ENXIO : 0; | |
166 | ||
167 | if (count > gbFlashSize - p) | |
168 | count = gbFlashSize - p; | |
169 | ||
170 | if (!access_ok(VERIFY_READ, buf, count)) | |
171 | return -EFAULT; | |
172 | ||
173 | /* | |
174 | * We now lock against reads and writes. --rmk | |
175 | */ | |
6f87f0de | 176 | if (mutex_lock_interruptible(&nwflash_mutex)) |
1da177e4 LT |
177 | return -ERESTARTSYS; |
178 | ||
179 | written = 0; | |
180 | ||
181 | leds_event(led_claim); | |
182 | leds_event(led_green_on); | |
183 | ||
184 | nBlock = (int) p >> 16; //block # of 64K bytes | |
185 | ||
186 | /* | |
187 | * # of 64K blocks to erase and write | |
188 | */ | |
189 | temp = ((int) (p + count) >> 16) - nBlock + 1; | |
190 | ||
191 | /* | |
192 | * write ends at exactly 64k boundary? | |
193 | */ | |
194 | if (((int) (p + count) & 0xFFFF) == 0) | |
195 | temp -= 1; | |
196 | ||
197 | if (flashdebug) | |
198 | printk(KERN_DEBUG "flash_write: writing %d block(s) " | |
199 | "starting at %d.\n", temp, nBlock); | |
200 | ||
201 | for (; temp; temp--, nBlock++) { | |
202 | if (flashdebug) | |
203 | printk(KERN_DEBUG "flash_write: erasing block %d.\n", nBlock); | |
204 | ||
205 | /* | |
206 | * first we have to erase the block(s), where we will write... | |
207 | */ | |
208 | i = 0; | |
209 | j = 0; | |
210 | RetryBlock: | |
211 | do { | |
212 | rc = erase_block(nBlock); | |
213 | i++; | |
214 | } while (rc && i < 10); | |
215 | ||
216 | if (rc) { | |
217 | printk(KERN_ERR "flash_write: erase error %x\n", rc); | |
218 | break; | |
219 | } | |
220 | if (flashdebug) | |
221 | printk(KERN_DEBUG "flash_write: writing offset %lX, " | |
222 | "from buf %p, bytes left %X.\n", p, buf, | |
223 | count - written); | |
224 | ||
225 | /* | |
226 | * write_block will limit write to space left in this block | |
227 | */ | |
228 | rc = write_block(p, buf, count - written); | |
229 | j++; | |
230 | ||
231 | /* | |
232 | * if somehow write verify failed? Can't happen?? | |
233 | */ | |
234 | if (!rc) { | |
235 | /* | |
236 | * retry up to 10 times | |
237 | */ | |
238 | if (j < 10) | |
239 | goto RetryBlock; | |
240 | else | |
241 | /* | |
242 | * else quit with error... | |
243 | */ | |
244 | rc = -1; | |
245 | ||
246 | } | |
247 | if (rc < 0) { | |
248 | printk(KERN_ERR "flash_write: write error %X\n", rc); | |
249 | break; | |
250 | } | |
251 | p += rc; | |
252 | buf += rc; | |
253 | written += rc; | |
254 | *ppos += rc; | |
255 | ||
256 | if (flashdebug) | |
257 | printk(KERN_DEBUG "flash_write: written 0x%X bytes OK.\n", written); | |
258 | } | |
259 | ||
260 | /* | |
261 | * restore reg on exit | |
262 | */ | |
263 | leds_event(led_release); | |
264 | ||
6f87f0de | 265 | mutex_unlock(&nwflash_mutex); |
1da177e4 LT |
266 | |
267 | return written; | |
268 | } | |
269 | ||
270 | ||
271 | /* | |
272 | * The memory devices use the full 32/64 bits of the offset, and so we cannot | |
273 | * check against negative addresses: they are ok. The return value is weird, | |
274 | * though, in that case (0). | |
275 | * | |
276 | * also note that seeking relative to the "end of file" isn't supported: | |
277 | * it has no meaning, so it returns -EINVAL. | |
278 | */ | |
279 | static loff_t flash_llseek(struct file *file, loff_t offset, int orig) | |
280 | { | |
281 | loff_t ret; | |
282 | ||
283 | lock_kernel(); | |
284 | if (flashdebug) | |
285 | printk(KERN_DEBUG "flash_llseek: offset=0x%X, orig=0x%X.\n", | |
286 | (unsigned int) offset, orig); | |
287 | ||
288 | switch (orig) { | |
289 | case 0: | |
290 | if (offset < 0) { | |
291 | ret = -EINVAL; | |
292 | break; | |
293 | } | |
294 | ||
295 | if ((unsigned int) offset > gbFlashSize) { | |
296 | ret = -EINVAL; | |
297 | break; | |
298 | } | |
299 | ||
300 | file->f_pos = (unsigned int) offset; | |
301 | ret = file->f_pos; | |
302 | break; | |
303 | case 1: | |
304 | if ((file->f_pos + offset) > gbFlashSize) { | |
305 | ret = -EINVAL; | |
306 | break; | |
307 | } | |
308 | if ((file->f_pos + offset) < 0) { | |
309 | ret = -EINVAL; | |
310 | break; | |
311 | } | |
312 | file->f_pos += offset; | |
313 | ret = file->f_pos; | |
314 | break; | |
315 | default: | |
316 | ret = -EINVAL; | |
317 | } | |
318 | unlock_kernel(); | |
319 | return ret; | |
320 | } | |
321 | ||
322 | ||
323 | /* | |
324 | * assume that main Write routine did the parameter checking... | |
325 | * so just go ahead and erase, what requested! | |
326 | */ | |
327 | ||
328 | static int erase_block(int nBlock) | |
329 | { | |
330 | volatile unsigned int c1; | |
331 | volatile unsigned char *pWritePtr; | |
332 | unsigned long timeout; | |
333 | int temp, temp1; | |
334 | ||
335 | /* | |
336 | * orange LED == erase | |
337 | */ | |
338 | leds_event(led_amber_on); | |
339 | ||
340 | /* | |
341 | * reset footbridge to the correct offset 0 (...0..3) | |
342 | */ | |
343 | *CSR_ROMWRITEREG = 0; | |
344 | ||
345 | /* | |
346 | * dummy ROM read | |
347 | */ | |
348 | c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000); | |
349 | ||
350 | kick_open(); | |
351 | /* | |
352 | * reset status if old errors | |
353 | */ | |
354 | *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50; | |
355 | ||
356 | /* | |
357 | * erase a block... | |
358 | * aim at the middle of a current block... | |
359 | */ | |
360 | pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + 0x8000 + (nBlock << 16))); | |
361 | /* | |
362 | * dummy read | |
363 | */ | |
364 | c1 = *pWritePtr; | |
365 | ||
366 | kick_open(); | |
367 | /* | |
368 | * erase | |
369 | */ | |
370 | *(volatile unsigned char *) pWritePtr = 0x20; | |
371 | ||
372 | /* | |
373 | * confirm | |
374 | */ | |
375 | *(volatile unsigned char *) pWritePtr = 0xD0; | |
376 | ||
377 | /* | |
378 | * wait 10 ms | |
379 | */ | |
380 | msleep(10); | |
381 | ||
382 | /* | |
383 | * wait while erasing in process (up to 10 sec) | |
384 | */ | |
385 | timeout = jiffies + 10 * HZ; | |
386 | c1 = 0; | |
387 | while (!(c1 & 0x80) && time_before(jiffies, timeout)) { | |
388 | msleep(10); | |
389 | /* | |
390 | * read any address | |
391 | */ | |
392 | c1 = *(volatile unsigned char *) (pWritePtr); | |
393 | // printk("Flash_erase: status=%X.\n",c1); | |
394 | } | |
395 | ||
396 | /* | |
397 | * set flash for normal read access | |
398 | */ | |
399 | kick_open(); | |
400 | // *(volatile unsigned char*)(FLASH_BASE+0x8000) = 0xFF; | |
401 | *(volatile unsigned char *) pWritePtr = 0xFF; //back to normal operation | |
402 | ||
403 | /* | |
404 | * check if erase errors were reported | |
405 | */ | |
406 | if (c1 & 0x20) { | |
407 | printk(KERN_ERR "flash_erase: err at %p\n", pWritePtr); | |
408 | ||
409 | /* | |
410 | * reset error | |
411 | */ | |
412 | *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50; | |
413 | return -2; | |
414 | } | |
415 | ||
416 | /* | |
417 | * just to make sure - verify if erased OK... | |
418 | */ | |
419 | msleep(10); | |
420 | ||
421 | pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + (nBlock << 16))); | |
422 | ||
423 | for (temp = 0; temp < 16 * 1024; temp++, pWritePtr += 4) { | |
424 | if ((temp1 = *(volatile unsigned int *) pWritePtr) != 0xFFFFFFFF) { | |
425 | printk(KERN_ERR "flash_erase: verify err at %p = %X\n", | |
426 | pWritePtr, temp1); | |
427 | return -1; | |
428 | } | |
429 | } | |
430 | ||
431 | return 0; | |
432 | ||
433 | } | |
434 | ||
435 | /* | |
436 | * write_block will limit number of bytes written to the space in this block | |
437 | */ | |
438 | static int write_block(unsigned long p, const char __user *buf, int count) | |
439 | { | |
440 | volatile unsigned int c1; | |
441 | volatile unsigned int c2; | |
442 | unsigned char *pWritePtr; | |
443 | unsigned int uAddress; | |
444 | unsigned int offset; | |
445 | unsigned long timeout; | |
446 | unsigned long timeout1; | |
447 | ||
448 | /* | |
449 | * red LED == write | |
450 | */ | |
451 | leds_event(led_amber_off); | |
452 | leds_event(led_red_on); | |
453 | ||
454 | pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p)); | |
455 | ||
456 | /* | |
457 | * check if write will end in this block.... | |
458 | */ | |
459 | offset = p & 0xFFFF; | |
460 | ||
461 | if (offset + count > 0x10000) | |
462 | count = 0x10000 - offset; | |
463 | ||
464 | /* | |
465 | * wait up to 30 sec for this block | |
466 | */ | |
467 | timeout = jiffies + 30 * HZ; | |
468 | ||
469 | for (offset = 0; offset < count; offset++, pWritePtr++) { | |
470 | uAddress = (unsigned int) pWritePtr; | |
471 | uAddress &= 0xFFFFFFFC; | |
472 | if (__get_user(c2, buf + offset)) | |
473 | return -EFAULT; | |
474 | ||
475 | WriteRetry: | |
476 | /* | |
477 | * dummy read | |
478 | */ | |
479 | c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000); | |
480 | ||
481 | /* | |
482 | * kick open the write gate | |
483 | */ | |
484 | kick_open(); | |
485 | ||
486 | /* | |
487 | * program footbridge to the correct offset...0..3 | |
488 | */ | |
489 | *CSR_ROMWRITEREG = (unsigned int) pWritePtr & 3; | |
490 | ||
491 | /* | |
492 | * write cmd | |
493 | */ | |
494 | *(volatile unsigned char *) (uAddress) = 0x40; | |
495 | ||
496 | /* | |
497 | * data to write | |
498 | */ | |
499 | *(volatile unsigned char *) (uAddress) = c2; | |
500 | ||
501 | /* | |
502 | * get status | |
503 | */ | |
504 | *(volatile unsigned char *) (FLASH_BASE + 0x10000) = 0x70; | |
505 | ||
506 | c1 = 0; | |
507 | ||
508 | /* | |
509 | * wait up to 1 sec for this byte | |
510 | */ | |
511 | timeout1 = jiffies + 1 * HZ; | |
512 | ||
513 | /* | |
514 | * while not ready... | |
515 | */ | |
516 | while (!(c1 & 0x80) && time_before(jiffies, timeout1)) | |
517 | c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000); | |
518 | ||
519 | /* | |
520 | * if timeout getting status | |
521 | */ | |
522 | if (time_after_eq(jiffies, timeout1)) { | |
523 | kick_open(); | |
524 | /* | |
525 | * reset err | |
526 | */ | |
527 | *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50; | |
528 | ||
529 | goto WriteRetry; | |
530 | } | |
531 | /* | |
532 | * switch on read access, as a default flash operation mode | |
533 | */ | |
534 | kick_open(); | |
535 | /* | |
536 | * read access | |
537 | */ | |
538 | *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF; | |
539 | ||
540 | /* | |
541 | * if hardware reports an error writing, and not timeout - | |
542 | * reset the chip and retry | |
543 | */ | |
544 | if (c1 & 0x10) { | |
545 | kick_open(); | |
546 | /* | |
547 | * reset err | |
548 | */ | |
549 | *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50; | |
550 | ||
551 | /* | |
552 | * before timeout? | |
553 | */ | |
554 | if (time_before(jiffies, timeout)) { | |
555 | if (flashdebug) | |
556 | printk(KERN_DEBUG "write_block: Retrying write at 0x%X)n", | |
557 | pWritePtr - FLASH_BASE); | |
558 | ||
559 | /* | |
560 | * no LED == waiting | |
561 | */ | |
562 | leds_event(led_amber_off); | |
563 | /* | |
564 | * wait couple ms | |
565 | */ | |
566 | msleep(10); | |
567 | /* | |
568 | * red LED == write | |
569 | */ | |
570 | leds_event(led_red_on); | |
571 | ||
572 | goto WriteRetry; | |
573 | } else { | |
574 | printk(KERN_ERR "write_block: timeout at 0x%X\n", | |
575 | pWritePtr - FLASH_BASE); | |
576 | /* | |
577 | * return error -2 | |
578 | */ | |
579 | return -2; | |
580 | ||
581 | } | |
582 | } | |
583 | } | |
584 | ||
585 | /* | |
586 | * green LED == read/verify | |
587 | */ | |
588 | leds_event(led_amber_off); | |
589 | leds_event(led_green_on); | |
590 | ||
591 | msleep(10); | |
592 | ||
593 | pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p)); | |
594 | ||
595 | for (offset = 0; offset < count; offset++) { | |
596 | char c, c1; | |
597 | if (__get_user(c, buf)) | |
598 | return -EFAULT; | |
599 | buf++; | |
600 | if ((c1 = *pWritePtr++) != c) { | |
601 | printk(KERN_ERR "write_block: verify error at 0x%X (%02X!=%02X)\n", | |
602 | pWritePtr - FLASH_BASE, c1, c); | |
603 | return 0; | |
604 | } | |
605 | } | |
606 | ||
607 | return count; | |
608 | } | |
609 | ||
610 | ||
611 | static void kick_open(void) | |
612 | { | |
613 | unsigned long flags; | |
614 | ||
615 | /* | |
616 | * we want to write a bit pattern XXX1 to Xilinx to enable | |
617 | * the write gate, which will be open for about the next 2ms. | |
618 | */ | |
619 | spin_lock_irqsave(&gpio_lock, flags); | |
620 | cpld_modify(1, 1); | |
621 | spin_unlock_irqrestore(&gpio_lock, flags); | |
622 | ||
623 | /* | |
624 | * let the ISA bus to catch on... | |
625 | */ | |
626 | udelay(25); | |
627 | } | |
628 | ||
62322d25 | 629 | static const struct file_operations flash_fops = |
1da177e4 LT |
630 | { |
631 | .owner = THIS_MODULE, | |
632 | .llseek = flash_llseek, | |
633 | .read = flash_read, | |
634 | .write = flash_write, | |
635 | .ioctl = flash_ioctl, | |
636 | }; | |
637 | ||
638 | static struct miscdevice flash_miscdev = | |
639 | { | |
640 | FLASH_MINOR, | |
641 | "nwflash", | |
642 | &flash_fops | |
643 | }; | |
644 | ||
645 | static int __init nwflash_init(void) | |
646 | { | |
647 | int ret = -ENODEV; | |
648 | ||
649 | if (machine_is_netwinder()) { | |
650 | int id; | |
651 | ||
652 | FLASH_BASE = ioremap(DC21285_FLASH, KFLASH_SIZE4); | |
653 | if (!FLASH_BASE) | |
654 | goto out; | |
655 | ||
656 | id = get_flash_id(); | |
657 | if ((id != KFLASH_ID) && (id != KFLASH_ID4)) { | |
658 | ret = -ENXIO; | |
659 | iounmap((void *)FLASH_BASE); | |
660 | printk("Flash: incorrect ID 0x%04X.\n", id); | |
661 | goto out; | |
662 | } | |
663 | ||
664 | printk("Flash ROM driver v.%s, flash device ID 0x%04X, size %d Mb.\n", | |
665 | NWFLASH_VERSION, id, gbFlashSize / (1024 * 1024)); | |
666 | ||
667 | ret = misc_register(&flash_miscdev); | |
668 | if (ret < 0) { | |
669 | iounmap((void *)FLASH_BASE); | |
670 | } | |
671 | } | |
672 | out: | |
673 | return ret; | |
674 | } | |
675 | ||
676 | static void __exit nwflash_exit(void) | |
677 | { | |
678 | misc_deregister(&flash_miscdev); | |
679 | iounmap((void *)FLASH_BASE); | |
680 | } | |
681 | ||
682 | MODULE_LICENSE("GPL"); | |
683 | ||
684 | module_param(flashdebug, bool, 0644); | |
685 | ||
686 | module_init(nwflash_init); | |
687 | module_exit(nwflash_exit); |